From 50b18fe8b439e75787a3b5d114f4089045d893a2 Mon Sep 17 00:00:00 2001 From: Jason Wright Date: Fri, 27 May 2005 06:27:44 +0000 Subject: handle multi-cpu GART allocation: iommu0(cpu0): base 0x80000000 length 512 pte 0xa80000 --- sys/arch/amd64/pci/iommu.c | 446 +++++++++++++++++++++++++-------------------- 1 file changed, 250 insertions(+), 196 deletions(-) diff --git a/sys/arch/amd64/pci/iommu.c b/sys/arch/amd64/pci/iommu.c index 5b72f34de2f..507b206a6f6 100644 --- a/sys/arch/amd64/pci/iommu.c +++ b/sys/arch/amd64/pci/iommu.c @@ -1,4 +1,4 @@ -/* $OpenBSD: iommu.c,v 1.2 2005/05/26 19:47:44 jason Exp $ */ +/* $OpenBSD: iommu.c,v 1.3 2005/05/27 06:27:43 jason Exp $ */ /* * Copyright (c) 2005 Jason L. Wright (jason@thought.net) @@ -28,7 +28,6 @@ /* * TODO: - * - scribble page for devices that lie about being done with memory. * - map the PTE uncacheable and disable table walk probes */ @@ -110,25 +109,30 @@ extern paddr_t avail_end; extern struct extent *iomem_ex; -u_int32_t *gartpt; -struct pglist gartplist; -struct extent *gartex; -pci_chipset_tag_t gartpc; -pcitag_t garttag; -bus_dma_tag_t gartparent; -paddr_t gartpa; -paddr_t gartscribpa; -void *gartscrib; -u_int32_t gartscribflags; - -void amdgart_invalidate_wait(pci_chipset_tag_t, pcitag_t); -void amdgart_invalidate(pci_chipset_tag_t, pcitag_t); +int amdgarts; + +struct amdgart_softc { + pci_chipset_tag_t g_pc; + pcitag_t g_tag; + struct extent *g_ex; + paddr_t g_pa; + paddr_t g_scribpa; + void *g_scrib; + u_int32_t g_scribpte; + u_int32_t *g_pte; + bus_dma_tag_t g_dmat; +} *amdgart_softcs; + +void amdgart_invalidate_wait(void); +void amdgart_invalidate(void); void amdgart_probe(struct pcibus_attach_args *); int amdgart_initpte(pci_chipset_tag_t, pcitag_t, paddr_t, psize_t, psize_t); void amdgart_dumpregs(void); int amdgart_iommu_map(struct extent *, paddr_t, paddr_t *, psize_t); int amdgart_iommu_unmap(struct extent *, paddr_t, psize_t); int amdgart_reload(struct extent *, bus_dmamap_t); +int amdgart_ok(pci_chipset_tag_t, pcitag_t); +int amdgart_load_phys(struct pglist *, vaddr_t); int amdgart_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t, bus_size_t, int, bus_dmamap_t *); @@ -170,193 +174,244 @@ struct x86_bus_dma_tag amdgart_bus_dma_tag = { }; void -amdgart_invalidate_wait(pci_chipset_tag_t pc, pcitag_t tag) +amdgart_invalidate_wait(void) { u_int32_t v; - int i; - - for (i = 1000; i > 0; i--) { - v = pci_conf_read(NULL, tag, GART_CACHECTRL); - if ((v & GART_CACHE_INVALIDATE) == 0) - break; - delay(1); + int i, n; + + for (n = 0; n < amdgarts; n++) { + for (i = 1000; i > 0; i--) { + v = pci_conf_read(amdgart_softcs[n].g_pc, + amdgart_softcs[n].g_tag, GART_CACHECTRL); + if ((v & GART_CACHE_INVALIDATE) == 0) + break; + delay(1); + } + if (i == 0) + printf("GART%d: timeout\n", n); } - if (i == 0) - printf("GART: invalidate timeout\n"); } void -amdgart_invalidate(pci_chipset_tag_t pc, pcitag_t tag) +amdgart_invalidate(void) +{ + int n; + + for (n = 0; n < amdgarts; n++) + pci_conf_write(amdgart_softcs[n].g_pc, + amdgart_softcs[n].g_tag, GART_CACHECTRL, + GART_CACHE_INVALIDATE); +} + +void +amdgart_dumpregs(void) { - pci_conf_write(pc, tag, GART_CACHECTRL, GART_CACHE_INVALIDATE); + int n; + + for (n = 0; n < amdgarts; n++) { + printf("GART%d:\n", n); + printf(" apctl %x\n", pci_conf_read(amdgart_softcs[n].g_pc, + amdgart_softcs[n].g_tag, GART_APCTRL)); + printf(" apbase %x\n", pci_conf_read(amdgart_softcs[n].g_pc, + amdgart_softcs[n].g_tag, GART_APBASE)); + printf(" tblbase %x\n", pci_conf_read(amdgart_softcs[n].g_pc, + amdgart_softcs[n].g_tag, GART_TBLBASE)); + printf("cachectl %x\n", pci_conf_read(amdgart_softcs[n].g_pc, + amdgart_softcs[n].g_tag, GART_CACHECTRL)); + } } int -amdgart_initpte(pci_chipset_tag_t pc, pcitag_t tag, paddr_t base, - psize_t mapsize, psize_t sz) +amdgart_ok(pci_chipset_tag_t pc, pcitag_t tag) { - struct vm_page *m; - vaddr_t va; - paddr_t pa, off; - u_int32_t r, *pte; - int err; + pcireg_t v; - TAILQ_INIT(&gartplist); + v = pci_conf_read(pc, tag, PCI_ID_REG); + if (PCI_VENDOR(v) != PCI_VENDOR_AMD) + return (0); + if (PCI_PRODUCT(v) != PCI_PRODUCT_AMD_AMD64_MISC) + return (0); - gartscrib = (void *)malloc(PAGE_SIZE, M_DEVBUF, M_NOWAIT); - if (gartscrib == NULL) { - printf("\nGART: failed to get scribble page"); - goto err; - } - pmap_extract(pmap_kernel(), (vaddr_t)gartscrib, &gartscribpa); - gartscribflags = GART_PTE_VALID | GART_PTE_COHERENT | - ((gartscribpa >> 28) & GART_PTE_PHYSHI) | - (gartscribpa & GART_PTE_PHYSLO); + v = pci_conf_read(pc, tag, GART_APCTRL); + if (v & GART_APCTRL_ENABLE) + return (0); - err = uvm_pglistalloc(sz, sz, trunc_page(avail_end), sz, sz, - &gartplist, 1, 0); - if (err) { - printf("\nGART: failed to get PTE pages: %d", err); - goto err; - } - va = uvm_km_valloc(kernel_map, sz); - if (va == 0) { - printf("\nGART: failed to get PTE vspace"); - goto err; - } - gartpt = (u_int32_t *)va; + return (1); +} - gartex = extent_create("iommu", base, base + mapsize - 1, M_DEVBUF, - NULL, NULL, EX_NOWAIT | EX_NOCOALESCE); - gartpa = base; - if (gartex == NULL) { - printf("\nGART: can't create extent"); - goto err; - } - printf("\n"); - extent_print(gartex); +int +amdgart_load_phys(struct pglist *plist, vaddr_t va) +{ + struct vm_page *m; + paddr_t pa; + psize_t off; - m = TAILQ_FIRST(&gartplist); + m = TAILQ_FIRST(plist); pa = VM_PAGE_TO_PHYS(m); for (off = 0; m; m = TAILQ_NEXT(m, pageq), off += PAGE_SIZE) { if (VM_PAGE_TO_PHYS(m) != (pa + off)) { - printf("\nGART: too many segments!"); - goto err; + printf("\nGART: too many segments"); + return (-1); } - /* XXX check for error? art? */ pmap_enter(pmap_kernel(), va + off, pa + off, VM_PROT_READ | VM_PROT_WRITE, VM_PROT_READ | VM_PROT_WRITE | PMAP_WIRED); } pmap_update(pmap_kernel()); - - pci_conf_write(NULL, tag, GART_TBLBASE, (pa >> 8) & GART_TBLBASE_MASK); - - for (r = 0, pte = gartpt; r < (sz / sizeof(*gartpt)); r++, pte++) - *pte = gartscribflags; - amdgart_invalidate(pc, tag); - amdgart_invalidate_wait(pc, tag); - return (0); - -err: - if (gartscrib) - free(gartscrib, M_DEVBUF); - if (!TAILQ_EMPTY(&gartplist)) - uvm_pglistfree(&gartplist); - if (gartex != NULL) { - extent_destroy(gartex); - gartex = NULL; - } - return (-1); -} - -void -amdgart_dumpregs(void) -{ - printf("apctl %x\n", pci_conf_read(gartpc, garttag, GART_APCTRL)); - printf("apbase %x\n", pci_conf_read(gartpc, garttag, GART_APBASE)); - printf("tblbase %x\n", pci_conf_read(gartpc, garttag, GART_TBLBASE)); - printf("cachectl %x\n", pci_conf_read(gartpc, garttag, GART_CACHECTRL)); } void amdgart_probe(struct pcibus_attach_args *pba) { - pci_chipset_tag_t pc = pba->pba_pc; + int dev, func, count = 0, r; + u_long dvabase = (u_long)-1, mapsize, ptesize; pcitag_t tag; - u_int32_t apctl, v; - u_long base; - int r; + pcireg_t v; + struct pglist plist; + void *scrib = NULL; + struct extent *ex = NULL; + u_int32_t *pte; - gartpc = pc; - garttag = tag = pci_make_tag(pc, 0, 24, 3); - gartparent = pba->pba_dmat; - v = pci_conf_read(pc, tag, PCI_ID_REG); - if (PCI_VENDOR(v) != PCI_VENDOR_AMD || - PCI_PRODUCT(v) != PCI_PRODUCT_AMD_AMD64_MISC) { - printf("\ndidn't find misc registers, no gart."); - return; + TAILQ_INIT(&plist); + + for (count = 0, dev = 24; dev < 32; dev++) { + for (func = 0; func < 8; func++) { + tag = pci_make_tag(pba->pba_pc, 0, dev, func); + + if (amdgart_ok(pba->pba_pc, tag)) + count++; + } } - apctl = pci_conf_read(pc, tag, GART_APCTRL); - if (apctl & GART_APCTRL_ENABLE) { - printf("\nBIOS already enabled it, this is hard, no gart."); + if (count == 0) return; + + amdgart_softcs = (struct amdgart_softc *)malloc(sizeof(*amdgart_softcs), + M_DEVBUF, M_NOWAIT); + if (amdgart_softcs == NULL) { + printf("\nGART: can't get softc"); + goto err; } r = extent_alloc_subregion(iomem_ex, IOMMU_START, IOMMU_END, IOMMU_SIZE * 1024 * 1024, IOMMU_ALIGN * 1024 * 1024, 0, - EX_NOBOUNDARY, EX_NOWAIT, &base); + EX_NOBOUNDARY, EX_NOWAIT, &dvabase); if (r != 0) { - printf("\nGART extent alloc failed: %d", r); - return; + printf("\nGART: extent alloc failed: %d", r); + goto err; } - apctl &= ~GART_APCTRL_SIZE; - switch (IOMMU_SIZE) { - case 32: - apctl |= GART_APCTRL_SIZE_32M; - break; - case 64: - apctl |= GART_APCTRL_SIZE_64M; - break; - case 128: - apctl |= GART_APCTRL_SIZE_128M; - break; - case 256: - apctl |= GART_APCTRL_SIZE_256M; - break; - case 512: - apctl |= GART_APCTRL_SIZE_512M; - break; - case 1024: - apctl |= GART_APCTRL_SIZE_1G; - break; - case 2048: - apctl |= GART_APCTRL_SIZE_2G; - break; - default: - printf("\nGART: bad size"); - return; + mapsize = IOMMU_SIZE * 1024 * 1024; + ptesize = mapsize / (PAGE_SIZE / sizeof(u_int32_t)); + + r = uvm_pglistalloc(ptesize, ptesize, trunc_page(avail_end), + ptesize, ptesize, &plist, 1, 0); + if (r != 0) { + printf("\nGART: failed to get pte pages"); + goto err; } - apctl |= GART_APCTRL_ENABLE | GART_APCTRL_DISCPU | GART_APCTRL_DISTBL | - GART_APCTRL_DISIO; - pci_conf_write(pc, tag, GART_APCTRL, apctl); - pci_conf_write(pc, tag, GART_APBASE, base >> 25); - - v = ((IOMMU_SIZE * 1024) / (PAGE_SIZE / sizeof(u_int32_t))) * 1024; - if (amdgart_initpte(pc, tag, base, IOMMU_SIZE * 1024 * 1024, v)) { - printf("\nGART: initpte failed"); - return; + pte = (u_int32_t *)uvm_km_valloc(kernel_map, ptesize); + + if (amdgart_load_phys(&plist, (vaddr_t)pte)) + goto err; + + ex = extent_create("iommu", dvabase, dvabase + mapsize - 1, M_DEVBUF, + NULL, NULL, EX_NOWAIT | EX_NOCOALESCE); + if (ex == NULL) { + printf("\nGART: extent create failed"); + goto err; + } + + for (count = 0, dev = 24; dev < 32; dev++) { + for (func = 0; func < 8; func++) { + tag = pci_make_tag(pba->pba_pc, 0, dev, func); + + if (!amdgart_ok(pba->pba_pc, tag)) + continue; + + v = pci_conf_read(pba->pba_pc, tag, GART_APCTRL); + v |= GART_APCTRL_DISCPU | GART_APCTRL_DISTBL | + GART_APCTRL_DISIO; + v &= ~(GART_APCTRL_ENABLE | GART_APCTRL_SIZE); + switch (IOMMU_SIZE) { + case 32: + v |= GART_APCTRL_SIZE_32M; + break; + case 64: + v |= GART_APCTRL_SIZE_64M; + break; + case 128: + v |= GART_APCTRL_SIZE_128M; + break; + case 256: + v |= GART_APCTRL_SIZE_256M; + break; + case 512: + v |= GART_APCTRL_SIZE_512M; + break; + case 1024: + v |= GART_APCTRL_SIZE_1G; + break; + case 2048: + v |= GART_APCTRL_SIZE_2G; + break; + default: + printf("\nGART: bad size"); + return; + } + pci_conf_write(pba->pba_pc, tag, GART_APCTRL, v); + + pci_conf_write(pba->pba_pc, tag, GART_APBASE, + dvabase >> 25); + + v = pci_conf_read(pba->pba_pc, tag, GART_APCTRL); + v |= GART_APCTRL_ENABLE; + v &= ~(GART_APCTRL_DISIO | GART_APCTRL_DISTBL); + pci_conf_write(pba->pba_pc, tag, GART_APCTRL, v); + + amdgart_softcs[count].g_pc = pba->pba_pc; + amdgart_softcs[count].g_tag = tag; + amdgart_softcs[count].g_ex = ex; + amdgart_softcs[count].g_pa = dvabase; + pmap_extract(pmap_kernel(), (vaddr_t)scrib, + &amdgart_softcs[count].g_scribpa); + amdgart_softcs[count].g_scrib = scrib; + amdgart_softcs[count].g_scribpte = + GART_PTE_VALID | GART_PTE_COHERENT | + ((amdgart_softcs[count].g_scribpa >> 28) & + GART_PTE_PHYSHI) | + (amdgart_softcs[count].g_scribpa & + GART_PTE_PHYSLO); + amdgart_softcs[count].g_pte = pte; + amdgart_softcs[count].g_dmat = pba->pba_dmat; + + printf("\niommu%d(cpu%d): base 0x%lx length %d pte 0x%lx", + count, dev - 24, dvabase, IOMMU_SIZE, + VM_PAGE_TO_PHYS(TAILQ_FIRST(&plist))); + count++; + } } - apctl &= ~(GART_APCTRL_DISIO | GART_APCTRL_DISTBL); - pci_conf_write(pc, tag, GART_APCTRL, apctl); - printf("\nGART base 0x%08x (%uMB) pte 0x%lx", - base, v / 1024, VM_PAGE_TO_PHYS(TAILQ_FIRST(&gartplist))); - /* switch to our own bus_dma_tag_t */ pba->pba_dmat = &amdgart_bus_dma_tag; + amdgarts = count; + + return; + +err: + /* XXX pmap_remove? */ + if (pte != NULL) + uvm_km_free(kernel_map, (vaddr_t)pte, ptesize); + if (ex != NULL) + extent_destroy(ex); + if (scrib != NULL) + free(scrib, M_DEVBUF); + if (amdgart_softcs != NULL) + free(amdgart_softcs, M_DEVBUF); + if (dvabase == (u_long)-1) + extent_free(iomem_ex, dvabase, IOMMU_SIZE * 1024 * 1024, 0); + if (!TAILQ_EMPTY(&plist)) + uvm_pglistfree(&plist); } int @@ -370,7 +425,7 @@ amdgart_reload(struct extent *ex, bus_dmamap_t dmam) opa = dmam->dm_segs[i].ds_addr; len = dmam->dm_segs[i].ds_len; - err = amdgart_iommu_map(gartex, opa, &npa, len); + err = amdgart_iommu_map(ex, opa, &npa, len); if (err) { for (j = 0; j < i - 1; j++) amdgart_iommu_unmap(ex, opa, len); @@ -402,11 +457,11 @@ amdgart_iommu_map(struct extent *ex, paddr_t opa, paddr_t *npa, psize_t len) *npa = res | (opa & PGOFSET); for (idx = 0; idx < alen; idx += PAGE_SIZE) { - pgno = ((res + idx) - gartpa) >> PGSHIFT; + pgno = ((res + idx) - amdgart_softcs[0].g_pa) >> PGSHIFT; flags = GART_PTE_VALID | GART_PTE_COHERENT | (((base + idx) >> 28) & GART_PTE_PHYSHI) | ((base + idx) & GART_PTE_PHYSLO); - gartpt[pgno] = flags; + amdgart_softcs[0].g_pte[pgno] = flags; } return (0); @@ -430,8 +485,8 @@ amdgart_iommu_unmap(struct extent *ex, paddr_t pa, psize_t len) } for (idx = 0; idx < alen; idx += PAGE_SIZE) { - pgno = ((base - gartpa) + idx) >> PGSHIFT; - gartpt[pgno] = gartscribflags; + pgno = ((base - amdgart_softcs[0].g_pa) + idx) >> PGSHIFT; + amdgart_softcs[0].g_pte[pgno] = amdgart_softcs[0].g_scribpte; } return (0); @@ -441,20 +496,14 @@ int amdgart_dmamap_create(bus_dma_tag_t tag, bus_size_t size, int nsegments, bus_size_t maxsegsz, bus_size_t boundary, int flags, bus_dmamap_t *dmamp) { - static int once = 0; - - if (!once) { - once = 1; - printf("using AMDGART bus_dma!\n"); - } - return (bus_dmamap_create(gartparent, size, nsegments, maxsegsz, - boundary, flags, dmamp)); + return (bus_dmamap_create(amdgart_softcs[0].g_dmat, size, nsegments, + maxsegsz, boundary, flags, dmamp)); } void amdgart_dmamap_destroy(bus_dma_tag_t tag, bus_dmamap_t dmam) { - bus_dmamap_destroy(gartparent, dmam); + bus_dmamap_destroy(amdgart_softcs[0].g_dmat, dmam); } int @@ -463,14 +512,15 @@ amdgart_dmamap_load(bus_dma_tag_t tag, bus_dmamap_t dmam, void *buf, { int err; - err = bus_dmamap_load(gartparent, dmam, buf, buflen, p, flags); + err = bus_dmamap_load(amdgart_softcs[0].g_dmat, dmam, buf, buflen, + p, flags); if (err) return (err); - err = amdgart_reload(gartex, dmam); + err = amdgart_reload(amdgart_softcs[0].g_ex, dmam); if (err) - bus_dmamap_unload(gartparent, dmam); + bus_dmamap_unload(amdgart_softcs[0].g_dmat, dmam); else - amdgart_invalidate(gartpc, garttag); + amdgart_invalidate(); return (err); } @@ -480,14 +530,15 @@ amdgart_dmamap_load_mbuf(bus_dma_tag_t tag, bus_dmamap_t dmam, { int err; - err = bus_dmamap_load_mbuf(gartparent, dmam, chain, flags); + err = bus_dmamap_load_mbuf(amdgart_softcs[0].g_dmat, dmam, + chain, flags); if (err) return (err); - err = amdgart_reload(gartex, dmam); + err = amdgart_reload(amdgart_softcs[0].g_ex, dmam); if (err) - bus_dmamap_unload(gartparent, dmam); + bus_dmamap_unload(amdgart_softcs[0].g_dmat, dmam); else - amdgart_invalidate(gartpc, garttag); + amdgart_invalidate(); return (err); } @@ -497,14 +548,14 @@ amdgart_dmamap_load_uio(bus_dma_tag_t tag, bus_dmamap_t dmam, { int err; - err = bus_dmamap_load_uio(gartparent, dmam, uio, flags); + err = bus_dmamap_load_uio(amdgart_softcs[0].g_dmat, dmam, uio, flags); if (err) return (err); - err = amdgart_reload(gartex, dmam); + err = amdgart_reload(amdgart_softcs[0].g_ex, dmam); if (err) - bus_dmamap_unload(gartparent, dmam); + bus_dmamap_unload(amdgart_softcs[0].g_dmat, dmam); else - amdgart_invalidate(gartpc, garttag); + amdgart_invalidate(); return (err); } @@ -514,14 +565,15 @@ amdgart_dmamap_load_raw(bus_dma_tag_t tag, bus_dmamap_t dmam, { int err; - err = bus_dmamap_load_raw(gartparent, dmam, segs, nsegs, size, flags); + err = bus_dmamap_load_raw(amdgart_softcs[0].g_dmat, dmam, segs, nsegs, + size, flags); if (err) return (err); - err = amdgart_reload(gartex, dmam); + err = amdgart_reload(amdgart_softcs[0].g_ex, dmam); if (err) - bus_dmamap_unload(gartparent, dmam); + bus_dmamap_unload(amdgart_softcs[0].g_dmat, dmam); else - amdgart_invalidate(gartpc, garttag); + amdgart_invalidate(); return (err); } @@ -531,10 +583,10 @@ amdgart_dmamap_unload(bus_dma_tag_t tag, bus_dmamap_t dmam) int i; for (i = 0; i < dmam->dm_nsegs; i++) - amdgart_iommu_unmap(gartex, dmam->dm_segs[i].ds_addr, - dmam->dm_segs[i].ds_len); + amdgart_iommu_unmap(amdgart_softcs[0].g_ex, + dmam->dm_segs[i].ds_addr, dmam->dm_segs[i].ds_len); /* XXX should we invalidate here? */ - bus_dmamap_unload(gartparent, dmam); + bus_dmamap_unload(amdgart_softcs[0].g_dmat, dmam); } void @@ -546,7 +598,7 @@ amdgart_dmamap_sync(bus_dma_tag_t tag, bus_dmamap_t dmam, bus_addr_t offset, * XXX this should be conditionalized... only do it * XXX when necessary. */ - amdgart_invalidate_wait(gartpc, garttag); + amdgart_invalidate_wait(); } /* @@ -554,7 +606,7 @@ amdgart_dmamap_sync(bus_dma_tag_t tag, bus_dmamap_t dmam, bus_addr_t offset, * XXX allow them right now. */ - bus_dmamap_sync(gartparent, dmam, offset, size, ops); + bus_dmamap_sync(amdgart_softcs[0].g_dmat, dmam, offset, size, ops); } int @@ -562,32 +614,34 @@ amdgart_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size, bus_size_t alignment, bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags) { - return (bus_dmamem_alloc(gartparent, size, alignment, boundary, segs, - nsegs, rsegs, flags)); + return (bus_dmamem_alloc(amdgart_softcs[0].g_dmat, size, alignment, + boundary, segs, nsegs, rsegs, flags)); } void amdgart_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs, int nsegs) { - bus_dmamem_free(gartparent, segs, nsegs); + bus_dmamem_free(amdgart_softcs[0].g_dmat, segs, nsegs); } int amdgart_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs, int nsegs, size_t size, caddr_t *kvap, int flags) { - return (bus_dmamem_map(gartparent, segs, nsegs, size, kvap, flags)); + return (bus_dmamem_map(amdgart_softcs[0].g_dmat, segs, nsegs, size, + kvap, flags)); } void amdgart_dmamem_unmap(bus_dma_tag_t tag, caddr_t kva, size_t size) { - bus_dmamem_unmap(gartparent, kva, size); + bus_dmamem_unmap(amdgart_softcs[0].g_dmat, kva, size); } paddr_t amdgart_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs, int nsegs, off_t off, int prot, int flags) { - return (bus_dmamem_mmap(gartparent, segs, nsegs, off, prot, flags)); + return (bus_dmamem_mmap(amdgart_softcs[0].g_dmat, segs, nsegs, off, + prot, flags)); } -- cgit v1.2.3