From bef07b6f1a8a06a768197c2c7495549709771a8b Mon Sep 17 00:00:00 2001 From: Theo de Raadt Date: Tue, 23 Jan 2001 21:59:19 +0000 Subject: recognize P4; testing by techsupport@lokmail.net, the unfortunate owner of such a thing --- sys/arch/i386/i386/machdep.c | 57 +++++++++++++++++++++++++++++++++++----- sys/arch/i386/include/cputypes.h | 4 +-- 2 files changed, 52 insertions(+), 9 deletions(-) diff --git a/sys/arch/i386/i386/machdep.c b/sys/arch/i386/i386/machdep.c index 188383cc884..86a6155977a 100644 --- a/sys/arch/i386/i386/machdep.c +++ b/sys/arch/i386/i386/machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: machdep.c,v 1.141 2001/01/05 04:27:23 marc Exp $ */ +/* $OpenBSD: machdep.c,v 1.142 2001/01/23 21:59:18 deraadt Exp $ */ /* $NetBSD: machdep.c,v 1.214 1996/11/10 03:16:17 thorpej Exp $ */ /*- @@ -719,6 +719,50 @@ struct cpu_cpuid_nameclass i386_cpuid_cpus[] = { "Pentium Pro, II or III" /* Default */ }, intel686_cpu_setup + }, + /* Family 7 */ + { + CPUCLASS_686, + } , + /* Family 8 */ + { + CPUCLASS_686, + } , + /* Family 9 */ + { + CPUCLASS_686, + } , + /* Family A */ + { + CPUCLASS_686, + } , + /* Family B */ + { + CPUCLASS_686, + } , + /* Family C */ + { + CPUCLASS_686, + } , + /* Family D */ + { + CPUCLASS_686, + } , + /* Family E */ + { + CPUCLASS_686, + } , + /* Family F */ + { + CPUCLASS_686, + { + "Pentium 4", 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + "Pentium 4" /* Default */ + }, + intel686_cpu_setup } } }, { @@ -1123,8 +1167,8 @@ identifycpu() i = family - CPU_MINFAMILY; /* Special hack for the PentiumII/III series. */ - if ((vendor == CPUVENDOR_INTEL) && (family == 6) - && ((model == 5) || (model == 7))) { + if (vendor == CPUVENDOR_INTEL && family == 6 && + (model == 5 || model == 7)) { name = intel686_cpu_name(model); } else name = cpup->cpu_family[i].cpu_models[model]; @@ -1137,12 +1181,11 @@ identifycpu() /* Find the amount of on-chip L2 cache. Add support for AMD K6-3...*/ cachesize = -1; - if ((vendor == CPUVENDOR_INTEL) && (cpuid_level >= 2)) { + if (vendor == CPUVENDOR_INTEL && cpuid_level >= 2 && family < 0xf) { int intel_cachetable[] = { 0, 128, 256, 512, 1024, 2048 }; - if ((cpu_cache_edx & 0xFF) >= 0x40 - && (cpu_cache_edx & 0xFF) <= 0x45) { + if ((cpu_cache_edx & 0xFF) >= 0x40 && + (cpu_cache_edx & 0xFF) <= 0x45) cachesize = intel_cachetable[(cpu_cache_edx & 0xFF) - 0x40]; - } } if (cachesize > -1) { diff --git a/sys/arch/i386/include/cputypes.h b/sys/arch/i386/include/cputypes.h index 0d55c54bc68..38587fc369e 100644 --- a/sys/arch/i386/include/cputypes.h +++ b/sys/arch/i386/include/cputypes.h @@ -1,4 +1,4 @@ -/* $OpenBSD: cputypes.h,v 1.5 1999/08/20 10:33:35 deraadt Exp $ */ +/* $OpenBSD: cputypes.h,v 1.6 2001/01/23 21:59:18 deraadt Exp $ */ /* $NetBSD: cputypes.h,v 1.10 1997/10/18 04:51:03 mikel Exp $ */ /* @@ -74,4 +74,4 @@ #define CPU_MAXMODEL 15 /* Models within family range 0-15 */ #define CPU_DEFMODEL 16 /* Value for unknown model -> default */ #define CPU_MINFAMILY 4 /* Lowest that cpuid can return (486) */ -#define CPU_MAXFAMILY 6 /* Highest we know (686) */ +#define CPU_MAXFAMILY 0xf /* Highest we know (686) */ -- cgit v1.2.3