From ce7410ab255a69e674e0bce5d5f85bc1a9d42277 Mon Sep 17 00:00:00 2001 From: Brad Smith Date: Sun, 6 Nov 2005 21:51:56 +0000 Subject: load DSP code on all 5421's for now. --- sys/dev/mii/brgphy.c | 32 +++++++++++++++----------------- 1 file changed, 15 insertions(+), 17 deletions(-) diff --git a/sys/dev/mii/brgphy.c b/sys/dev/mii/brgphy.c index 4d22d1c1309..a4d6aeab442 100644 --- a/sys/dev/mii/brgphy.c +++ b/sys/dev/mii/brgphy.c @@ -1,4 +1,4 @@ -/* $OpenBSD: brgphy.c,v 1.40 2005/11/06 07:25:05 brad Exp $ */ +/* $OpenBSD: brgphy.c,v 1.41 2005/11/06 21:51:55 brad Exp $ */ /* * Copyright (c) 2000 @@ -555,22 +555,20 @@ brgphy_bcm5411_dspcode(struct mii_softc *sc) void brgphy_bcm5421_dspcode(struct mii_softc *sc) { - u_int16_t data; - - if (sc->mii_rev == 1) { - /* Set Class A mode */ - PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x1007); - data = PHY_READ(sc, BRGPHY_MII_AUXCTL); - PHY_WRITE(sc, BRGPHY_MII_AUXCTL, data | 0x0400); - - /* Set FFE gamma override to -0.125 */ - PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x0007); - data = PHY_READ(sc, BRGPHY_MII_AUXCTL); - PHY_WRITE(sc, BRGPHY_MII_AUXCTL, data | 0x0800); - PHY_WRITE(sc, BRGPHY_MII_DSP_ADDR_REG, 0x000a); - data = PHY_READ(sc, BRGPHY_MII_DSP_RW_PORT); - PHY_WRITE(sc, BRGPHY_MII_DSP_RW_PORT, data | 0x0200); - } + uint16_t data; + + /* Set Class A mode */ + PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x1007); + data = PHY_READ(sc, BRGPHY_MII_AUXCTL); + PHY_WRITE(sc, BRGPHY_MII_AUXCTL, data | 0x0400); + + /* Set FFE gamma override to -0.125 */ + PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x0007); + data = PHY_READ(sc, BRGPHY_MII_AUXCTL); + PHY_WRITE(sc, BRGPHY_MII_AUXCTL, data | 0x0800); + PHY_WRITE(sc, BRGPHY_MII_DSP_ADDR_REG, 0x000a); + data = PHY_READ(sc, BRGPHY_MII_DSP_RW_PORT); + PHY_WRITE(sc, BRGPHY_MII_DSP_RW_PORT, data | 0x0200); } void -- cgit v1.2.3