From cb25d9dbac4029fd7ef13c8ebb998bf9de079b72 Mon Sep 17 00:00:00 2001 From: Joel Sing Date: Tue, 18 Feb 2014 13:47:54 +0000 Subject: Actually check to see if the CPU supports tsc, rather than assuming that it does and triggering an illegal instruction trap when it does not. Found the hard way and fix tested by nick@ --- sys/arch/i386/stand/libsa/random_i386.S | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'sys/arch/i386/stand/libsa') diff --git a/sys/arch/i386/stand/libsa/random_i386.S b/sys/arch/i386/stand/libsa/random_i386.S index 987c0a25fca..dc94f373449 100644 --- a/sys/arch/i386/stand/libsa/random_i386.S +++ b/sys/arch/i386/stand/libsa/random_i386.S @@ -55,6 +55,7 @@ ENTRY(mdrandom) movl $1, %eax movl $0, %ecx cpuid + movl %edx, %eax movl 36(%esp), %ebx movl 40(%esp), %edx @@ -65,7 +66,10 @@ ENTRY(mdrandom) jnz userand movl %edx, %ecx - jmp usetsc + andl $CPUID_TSC, %eax // See if we have rdtsc. + jnz usetsc + + jmp done userand: rdrand %eax -- cgit v1.2.3