From a2cee032ec1afe36876c84a6d3e297d71022838f Mon Sep 17 00:00:00 2001
From: Miod Vallat <miod@cvs.openbsd.org>
Date: Sat, 29 Sep 2012 18:54:40 +0000
Subject: Proide a mips_sync() macro to wrap asm("sync"), and replace
 gazillions of such statements with it.

---
 sys/arch/loongson/dev/bonito.c                 | 11 +++++++----
 sys/arch/loongson/loongson/generic2e_machdep.c |  8 +++++---
 sys/arch/loongson/loongson/isa_machdep.c       |  6 ++++--
 sys/arch/loongson/loongson/yeeloong_machdep.c  |  6 ++++--
 4 files changed, 20 insertions(+), 11 deletions(-)

(limited to 'sys/arch/loongson')

diff --git a/sys/arch/loongson/dev/bonito.c b/sys/arch/loongson/dev/bonito.c
index daf6c1ef3c7..026fdb06eee 100644
--- a/sys/arch/loongson/dev/bonito.c
+++ b/sys/arch/loongson/dev/bonito.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: bonito.c,v 1.19 2011/03/31 20:37:44 miod Exp $	*/
+/*	$OpenBSD: bonito.c,v 1.20 2012/09/29 18:54:36 miod Exp $	*/
 /*	$NetBSD: bonito_mainbus.c,v 1.11 2008/04/28 20:23:10 martin Exp $	*/
 /*	$NetBSD: bonito_pci.c,v 1.5 2008/04/28 20:23:28 martin Exp $	*/
 
@@ -59,6 +59,7 @@
 
 #include <machine/autoconf.h>
 #include <machine/bus.h>
+#include <machine/cpu.h>
 #include <machine/intr.h>
 
 #include <dev/pci/pcidevs.h>
@@ -88,7 +89,7 @@ struct cfdriver bonito_cd = {
 	NULL, "bonito", DV_DULL
 };
 
-#define	wbflush()	__asm__ __volatile__ ("sync" ::: "memory")
+#define	wbflush()	mips_sync()
 
 bus_addr_t	bonito_pa_to_device(paddr_t);
 paddr_t		bonito_device_to_pa(bus_addr_t);
@@ -477,7 +478,8 @@ bonito_splx(int newipl)
 	/* Update masks to new ipl. Order highly important! */
 	__asm__ (".set noreorder\n");
 	ci->ci_ipl = newipl;
-	__asm__ ("sync\n\t.set reorder\n");
+	mips_sync();
+	__asm__ (".set reorder\n");
 	bonito_setintrmask(newipl);
 	/* If we still have softints pending trigger processing. */
 	if (ci->ci_softpending != 0 && newipl < IPL_SOFTINT)
@@ -697,7 +699,8 @@ bonito_intr_dispatch(uint64_t isr, int startbit, struct trap_frame *frame)
 				}
 				__asm__ (".set noreorder\n");
 				curcpu()->ci_ipl = frame->ipl;
-				__asm__ ("sync\n\t.set reorder\n");
+				mips_sync();
+				__asm__ (".set reorder\n");
 			}
 			if (rc == 0) {
 				printf("spurious interrupt %d\n", bitno);
diff --git a/sys/arch/loongson/loongson/generic2e_machdep.c b/sys/arch/loongson/loongson/generic2e_machdep.c
index f98d7ae034d..be8a7d2f4ad 100644
--- a/sys/arch/loongson/loongson/generic2e_machdep.c
+++ b/sys/arch/loongson/loongson/generic2e_machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: generic2e_machdep.c,v 1.2 2011/04/15 20:40:06 deraadt Exp $	*/
+/*	$OpenBSD: generic2e_machdep.c,v 1.3 2012/09/29 18:54:38 miod Exp $	*/
 
 /*
  * Copyright (c) 2010 Miodrag Vallat.
@@ -54,6 +54,7 @@
 
 #include <mips64/archtype.h>
 #include <machine/autoconf.h>
+#include <machine/cpu.h>
 #include <machine/pmon.h>
 
 #include <dev/ic/i8259reg.h>
@@ -291,7 +292,8 @@ generic2e_isa_intr(uint32_t hwpend, struct trap_frame *frame)
 
 			__asm__ (".set noreorder\n");
 			curcpu()->ci_ipl = frame->ipl;
-			__asm__ ("sync\n\t.set reorder\n");
+			mips_sync();
+			__asm__ (".set reorder\n");
 			if (ret == 1)
 				break;
 		}
@@ -560,7 +562,7 @@ via686sb_setup(pci_chipset_tag_t pc, int dev)
 	REGVAL8(BONITO_PCIIO_BASE + 0x4d0) = (elcr >> 0) & 0xff;
 	REGVAL8(BONITO_PCIIO_BASE + 0x4d1) = (elcr >> 8) & 0xff;
 
-	__asm__ __volatile__ ("sync" ::: "memory");
+	mips_sync();
 
 	/*
 	 * Update interrupt information for secondary functions.
diff --git a/sys/arch/loongson/loongson/isa_machdep.c b/sys/arch/loongson/loongson/isa_machdep.c
index 389dac292fc..3d91916df04 100644
--- a/sys/arch/loongson/loongson/isa_machdep.c
+++ b/sys/arch/loongson/loongson/isa_machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: isa_machdep.c,v 1.1 2010/05/08 21:59:56 miod Exp $	*/
+/*	$OpenBSD: isa_machdep.c,v 1.2 2012/09/29 18:54:38 miod Exp $	*/
 
 /*
  * Copyright (c) 2009, 2010 Miodrag Vallat.
@@ -25,6 +25,7 @@
 #include <sys/device.h>
 
 #include <machine/autoconf.h>
+#include <machine/cpu.h>
 #include <machine/intr.h>
 
 #include <dev/ic/i8259reg.h>
@@ -87,7 +88,8 @@ loongson_isa_splx(int newipl)
 	/* Update masks to new ipl. Order highly important! */
 	__asm__ (".set noreorder\n");
 	ci->ci_ipl = newipl;
-	__asm__ ("sync\n\t.set reorder\n");
+	mips_sync();
+	__asm__ (".set reorder\n");
 	loongson_isa_setintrmask(newipl);
 	/* If we still have softints pending trigger processing. */
 	if (ci->ci_softpending != 0 && newipl < IPL_SOFTINT)
diff --git a/sys/arch/loongson/loongson/yeeloong_machdep.c b/sys/arch/loongson/loongson/yeeloong_machdep.c
index 08baf14833b..d5d2baeba9c 100644
--- a/sys/arch/loongson/loongson/yeeloong_machdep.c
+++ b/sys/arch/loongson/loongson/yeeloong_machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: yeeloong_machdep.c,v 1.17 2011/07/21 20:36:12 miod Exp $	*/
+/*	$OpenBSD: yeeloong_machdep.c,v 1.18 2012/09/29 18:54:38 miod Exp $	*/
 
 /*
  * Copyright (c) 2009, 2010 Miodrag Vallat.
@@ -28,6 +28,7 @@
 
 #include <mips64/archtype.h>
 #include <machine/autoconf.h>
+#include <machine/cpu.h>
 #include <machine/pmon.h>
 
 #include <dev/isa/isareg.h>
@@ -396,7 +397,8 @@ lemote_isa_intr(uint32_t hwpend, struct trap_frame *frame)
 					}
 					__asm__ (".set noreorder\n");
 					curcpu()->ci_ipl = frame->ipl;
-					__asm__ ("sync\n\t.set reorder\n");
+					mips_sync();
+					__asm__ (".set reorder\n");
 					if (ret == 1)
 						break;
 				}
-- 
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