From 21bce0b3873e59c1f9e8e097e28aa4b985e339c3 Mon Sep 17 00:00:00 2001 From: Miod Vallat Date: Sat, 8 Jun 2002 15:45:33 +0000 Subject: Factorize common parts (cache-related stuff). ok drahn@ --- sys/arch/powerpc/include/cpu.h | 45 +++++++++++++++++++++++++++++++++++++++++- 1 file changed, 44 insertions(+), 1 deletion(-) (limited to 'sys/arch/powerpc/include') diff --git a/sys/arch/powerpc/include/cpu.h b/sys/arch/powerpc/include/cpu.h index 5fddfb0fc62..826cb409e2e 100644 --- a/sys/arch/powerpc/include/cpu.h +++ b/sys/arch/powerpc/include/cpu.h @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.h,v 1.10 2002/06/07 21:33:43 nordin Exp $ */ +/* $OpenBSD: cpu.h,v 1.11 2002/06/08 15:45:32 miod Exp $ */ /* $NetBSD: cpu.h,v 1.1 1996/09/30 16:34:21 ws Exp $ */ /* @@ -57,4 +57,47 @@ extern volatile int astpending; extern char *bootpath; +#ifndef CACHELINESIZE +#define CACHELINESIZE 32 /* For now XXX */ +#endif + +static __inline void +syncicache(void *from, int len) +{ + int l; + char *p = from; + + len = len + (((u_int32_t) from) & (CACHELINESIZE - 1)); + l = len; + + do { + __asm__ __volatile__ ("dcbst 0,%0" :: "r"(p)); + p += CACHELINESIZE; + } while ((l -= CACHELINESIZE) > 0); + __asm__ __volatile__ ("sync"); + p = from; + l = len; + do { + __asm__ __volatile__ ("icbi 0,%0" :: "r"(p)); + p += CACHELINESIZE; + } while ((l -= CACHELINESIZE) > 0); + __asm__ __volatile__ ("isync"); +} + +static __inline void +invdcache(void *from, int len) +{ + int l; + char *p = from; + + len = len + (((u_int32_t) from) & (CACHELINESIZE - 1)); + l = len; + + do { + __asm__ __volatile__ ("dcbi 0,%0" :: "r"(p)); + p += CACHELINESIZE; + } while ((l -= CACHELINESIZE) > 0); + __asm__ __volatile__ ("sync"); +} + #endif /* _POWERPC_CPU_H_ */ -- cgit v1.2.3