From 87eb0efadd1a61e4eb4cb8047fede2761f8d64aa Mon Sep 17 00:00:00 2001 From: Miod Vallat Date: Thu, 22 Nov 2007 05:42:53 +0000 Subject: Move the cmmu lock to 88200-specific code. 88110 MP code will use ipis and will not require such a lock. --- sys/arch/m88k/include/cmmu.h | 21 +-------------------- sys/arch/m88k/m88k/m8820x_machdep.c | 15 ++++++++++++++- sys/arch/m88k/m88k/m88k_machdep.c | 3 +-- sys/arch/mvme88k/mvme88k/m88110.c | 28 +++++++++++++--------------- 4 files changed, 29 insertions(+), 38 deletions(-) (limited to 'sys/arch') diff --git a/sys/arch/m88k/include/cmmu.h b/sys/arch/m88k/include/cmmu.h index f0bf7c31982..e21d3dfc644 100644 --- a/sys/arch/m88k/include/cmmu.h +++ b/sys/arch/m88k/include/cmmu.h @@ -1,4 +1,4 @@ -/* $OpenBSD: cmmu.h,v 1.17 2007/02/11 12:49:35 miod Exp $ */ +/* $OpenBSD: cmmu.h,v 1.18 2007/11/22 05:42:48 miod Exp $ */ /* * Mach Operating System * Copyright (c) 1993-1992 Carnegie Mellon University @@ -33,25 +33,6 @@ */ #if defined(_KERNEL) && !defined(_LOCORE) -#ifdef MULTIPROCESSOR -/* - * This lock protects the cmmu SAR and SCR's; other ports - * can be accessed without locking it. - * - * May be used from "db_interface.c". - */ -extern __cpu_simple_lock_t cmmu_cpu_lock; - -#define CMMU_LOCK __cpu_simple_lock(&cmmu_cpu_lock) -#define CMMU_UNLOCK __cpu_simple_unlock(&cmmu_cpu_lock) - -#else - -#define CMMU_LOCK do { /* nothing */ } while (0) -#define CMMU_UNLOCK do { /* nothing */ } while (0) - -#endif /* MULTIPROCESSOR */ - /* machine dependent cmmu function pointer structure */ struct cmmu_p { cpuid_t (*init)(void); diff --git a/sys/arch/m88k/m88k/m8820x_machdep.c b/sys/arch/m88k/m88k/m8820x_machdep.c index f6fe89996fc..54275cb2072 100644 --- a/sys/arch/m88k/m88k/m8820x_machdep.c +++ b/sys/arch/m88k/m88k/m8820x_machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: m8820x_machdep.c,v 1.30 2007/11/14 23:12:46 miod Exp $ */ +/* $OpenBSD: m8820x_machdep.c,v 1.31 2007/11/22 05:42:50 miod Exp $ */ /* * Copyright (c) 2004, Miodrag Vallat. * @@ -126,6 +126,19 @@ struct cmmu_p cmmu8820x = { #endif }; +#ifdef MULTIPROCESSOR +/* + * This lock protects the cmmu SAR and SCR's; other ports + * can be accessed without locking it. + */ +__cpu_simple_lock_t cmmu_cpu_lock = __SIMPLELOCK_UNLOCKED; +#define CMMU_LOCK __cpu_simple_lock(&cmmu_cpu_lock) +#define CMMU_UNLOCK __cpu_simple_unlock(&cmmu_cpu_lock) +#else +#define CMMU_LOCK do { /* nothing */ } while (0) +#define CMMU_UNLOCK do { /* nothing */ } while (0) +#endif /* MULTIPROCESSOR */ + /* * Systems with more than 2 CMMUs per CPU use programmable split schemes. * diff --git a/sys/arch/m88k/m88k/m88k_machdep.c b/sys/arch/m88k/m88k/m88k_machdep.c index 4f276442de9..cf81fd6ad1e 100644 --- a/sys/arch/m88k/m88k/m88k_machdep.c +++ b/sys/arch/m88k/m88k/m88k_machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: m88k_machdep.c,v 1.33 2007/11/20 21:47:12 miod Exp $ */ +/* $OpenBSD: m88k_machdep.c,v 1.34 2007/11/22 05:42:50 miod Exp $ */ /* * Copyright (c) 1998, 1999, 2000, 2001 Steve Murphree, Jr. * Copyright (c) 1996 Nivas Madhur @@ -92,7 +92,6 @@ void vector_init(m88k_exception_vector_area *, u_int32_t *); */ #ifdef MULTIPROCESSOR -__cpu_simple_lock_t cmmu_cpu_lock = __SIMPLELOCK_UNLOCKED; cpuid_t master_cpu; #endif diff --git a/sys/arch/mvme88k/mvme88k/m88110.c b/sys/arch/mvme88k/mvme88k/m88110.c index 1260bad8643..07d25ce16b9 100644 --- a/sys/arch/mvme88k/mvme88k/m88110.c +++ b/sys/arch/mvme88k/mvme88k/m88110.c @@ -1,4 +1,4 @@ -/* $OpenBSD: m88110.c,v 1.40 2007/11/21 19:42:36 miod Exp $ */ +/* $OpenBSD: m88110.c,v 1.41 2007/11/22 05:42:52 miod Exp $ */ /* * Copyright (c) 1998 Steve Murphree, Jr. * All rights reserved. @@ -245,8 +245,6 @@ m88110_set_sapr(cpuid_t cpu, apr_t ap) { u_int ictl, dctl; - CMMU_LOCK; - set_icmd(CMMU_ICMD_INV_SATC); set_dcmd(CMMU_DCMD_INV_SATC); @@ -270,14 +268,11 @@ m88110_set_sapr(cpuid_t cpu, apr_t ap) /* restore MMU settings */ set_ictl(ictl); set_dctl(dctl); - - CMMU_UNLOCK; } void m88110_set_uapr(apr_t ap) { - CMMU_LOCK; set_iuap(ap); set_duap(ap); @@ -286,7 +281,6 @@ m88110_set_uapr(apr_t ap) /* We need to at least invalidate the TIC, as it is va-addressed */ mc88110_inval_inst(); - CMMU_UNLOCK; } /* @@ -301,9 +295,9 @@ m88110_flush_tlb(cpuid_t cpu, u_int kernel, vaddr_t vaddr, u_int count) { u_int32_t psr; - disable_interrupt(psr); + psr = get_psr(); + set_psr(psr | PSR_IND); - CMMU_LOCK; if (kernel) { set_icmd(CMMU_ICMD_INV_SATC); set_dcmd(CMMU_DCMD_INV_SATC); @@ -311,7 +305,6 @@ m88110_flush_tlb(cpuid_t cpu, u_int kernel, vaddr_t vaddr, u_int count) set_icmd(CMMU_ICMD_INV_UATC); set_dcmd(CMMU_DCMD_INV_UATC); } - CMMU_UNLOCK; set_psr(psr); } @@ -350,7 +343,8 @@ m88110_flush_cache(cpuid_t cpu, paddr_t pa, psize_t size) { u_int32_t psr; - disable_interrupt(psr); + psr = get_psr(); + set_psr(psr | PSR_IND); mc88110_inval_inst(); mc88110_flush_data(); @@ -367,7 +361,8 @@ m88110_flush_inst_cache(cpuid_t cpu, paddr_t pa, psize_t size) { u_int32_t psr; - disable_interrupt(psr); + psr = get_psr(); + set_psr(psr | PSR_IND); mc88110_inval_inst(); set_psr(psr); @@ -397,7 +392,8 @@ m88110_cmmu_sync_cache(paddr_t pa, psize_t size) { u_int32_t psr; - disable_interrupt(psr); + psr = get_psr(); + set_psr(psr | PSR_IND); mc88110_inval_inst(); mc88110_flush_data(); @@ -411,7 +407,8 @@ m88110_cmmu_sync_inval_cache(paddr_t pa, psize_t size) { u_int32_t psr; - disable_interrupt(psr); + psr = get_psr(); + set_psr(psr | PSR_IND); mc88110_sync_data(); if (mc88410_present()) @@ -424,7 +421,8 @@ m88110_cmmu_inval_cache(paddr_t pa, psize_t size) { u_int32_t psr; - disable_interrupt(psr); + psr = get_psr(); + set_psr(psr | PSR_IND); mc88110_inval_inst(); mc88110_inval_data(); -- cgit v1.2.3