From 1f67550696361d063bc4a1092a7d9478d916159a Mon Sep 17 00:00:00 2001 From: Jonathan Gray Date: Wed, 19 May 2021 05:21:25 +0000 Subject: regen --- sys/dev/pci/pcidevs.h | 80 +++++++++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 75 insertions(+), 5 deletions(-) (limited to 'sys/dev/pci/pcidevs.h') diff --git a/sys/dev/pci/pcidevs.h b/sys/dev/pci/pcidevs.h index 5a4d638f475..fe81340d984 100644 --- a/sys/dev/pci/pcidevs.h +++ b/sys/dev/pci/pcidevs.h @@ -2,7 +2,7 @@ * THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT. * * generated from: - * OpenBSD: pcidevs,v 1.1969 2021/05/19 02:14:11 jsg Exp + * OpenBSD: pcidevs,v 1.1970 2021/05/19 05:20:48 jsg Exp */ /* $NetBSD: pcidevs,v 1.30 1997/06/24 06:20:24 thorpej Exp $ */ @@ -3444,6 +3444,7 @@ #define PCI_PRODUCT_INTEL_400SERIES_I2C_4 0x06eb /* 400 Series I2C */ #define PCI_PRODUCT_INTEL_400SERIES_XHCI 0x06ed /* 400 Series xHCI */ #define PCI_PRODUCT_INTEL_400SERIES_SRAM 0x06ef /* 400 Series Shared SRAM */ +#define PCI_PRODUCT_INTEL_WL_22500_5 0x06f0 /* Wi-Fi 6 AX201 */ #define PCI_PRODUCT_INTEL_400SERIES_SDXC 0x06f5 /* 400 Series SDXC */ #define PCI_PRODUCT_INTEL_400SERIES_THERM 0x06f9 /* 400 Series Thermal */ #define PCI_PRODUCT_INTEL_400SERIES_GSPI_3 0x06fb /* 400 Series GSPI */ @@ -3974,9 +3975,6 @@ #define PCI_PRODUCT_INTEL_JHL6340 0x15d9 /* JHL6340 Thunderbolt 3 */ #define PCI_PRODUCT_INTEL_JHL6340_PCIE 0x15da /* JHL6340 Thunderbolt 3 */ #define PCI_PRODUCT_INTEL_JHL6340_XHCI 0x15db /* JHL6340 Thunderbolt 3 */ -#define PCI_PRODUCT_INTEL_JHL7540 0x15eb /* JHL7540 Thunderbolt 3 */ -#define PCI_PRODUCT_INTEL_JHL7540_PCIE 0x15ea /* JHL7540 Thunderbolt 3 */ -#define PCI_PRODUCT_INTEL_JHL7540_XHCI 0x15ec /* JHL7540 Thunderbolt 3 */ #define PCI_PRODUCT_INTEL_I219_LM8 0x15df /* I219-LM */ #define PCI_PRODUCT_INTEL_I219_V8 0x15e0 /* I219-V */ #define PCI_PRODUCT_INTEL_I219_LM9 0x15e1 /* I219-LM */ @@ -3984,6 +3982,9 @@ #define PCI_PRODUCT_INTEL_I219_LM5 0x15e3 /* I219-LM */ #define PCI_PRODUCT_INTEL_X550EM_A_1G_T 0x15e4 /* X553 SGMII */ #define PCI_PRODUCT_INTEL_X550EM_A_1G_T_L 0x15e5 /* X553 SGMII */ +#define PCI_PRODUCT_INTEL_JHL7540_PCIE 0x15ea /* JHL7540 Thunderbolt 3 */ +#define PCI_PRODUCT_INTEL_JHL7540 0x15eb /* JHL7540 Thunderbolt 3 */ +#define PCI_PRODUCT_INTEL_JHL7540_XHCI 0x15ec /* JHL7540 Thunderbolt 3 */ #define PCI_PRODUCT_INTEL_I225_LM 0x15f2 /* I225-LM */ #define PCI_PRODUCT_INTEL_I225_V 0x15f3 /* I225-V */ #define PCI_PRODUCT_INTEL_I219_LM15 0x15f4 /* I219-LM */ @@ -4618,6 +4619,7 @@ #define PCI_PRODUCT_INTEL_82801H_RAID 0x2822 /* 82801H RAID */ #define PCI_PRODUCT_INTEL_82801H_AHCI_4P 0x2824 /* 82801H AHCI */ #define PCI_PRODUCT_INTEL_82801H_SATA_2 0x2825 /* 82801H SATA */ +#define PCI_PRODUCT_INTEL_500SERIES_RAID_2 0x2826 /* 500 Series RAID */ #define PCI_PRODUCT_INTEL_82801HBM_SATA 0x2828 /* 82801HBM SATA */ #define PCI_PRODUCT_INTEL_82801HBM_AHCI 0x2829 /* 82801HBM AHCI */ #define PCI_PRODUCT_INTEL_82801HBM_RAID 0x282a /* 82801HBM RAID */ @@ -5025,7 +5027,6 @@ #define PCI_PRODUCT_INTEL_495SERIES_LP_XDCI 0x34ee /* 495 Series xDCI */ #define PCI_PRODUCT_INTEL_495SERIES_LP_SRAM 0x34ef /* 495 Series Shared SRAM */ #define PCI_PRODUCT_INTEL_WL_22500_4 0x34f0 /* Wi-Fi 6 AX201 */ -#define PCI_PRODUCT_INTEL_WL_22500_5 0x06f0 /* Wi-Fi 6 AX201 */ #define PCI_PRODUCT_INTEL_495SERIES_LP_SDXC 0x34f8 /* 495 Series SDXC */ #define PCI_PRODUCT_INTEL_495SERIES_LP_GSPI_3 0x34fb /* 495 Series GSPI */ #define PCI_PRODUCT_INTEL_495SERIES_LP_ISH 0x34fc /* 495 Series ISH */ @@ -5332,6 +5333,75 @@ #define PCI_PRODUCT_INTEL_WL_5350_2 0x423b /* WiFi Link 5350 */ #define PCI_PRODUCT_INTEL_WL_5150_1 0x423c /* WiFi Link 5150 */ #define PCI_PRODUCT_INTEL_WL_5150_2 0x423d /* WiFi Link 5150 */ +#define PCI_PRODUCT_INTEL_Q570_ESPI 0x4384 /* Q570 eSPI */ +#define PCI_PRODUCT_INTEL_Z590_ESPI 0x4385 /* Z590 eSPI */ +#define PCI_PRODUCT_INTEL_H570_ESPI 0x4386 /* H570 eSPI */ +#define PCI_PRODUCT_INTEL_B560_ESPI 0x4387 /* B560 eSPI */ +#define PCI_PRODUCT_INTEL_H510_ESPI 0x4388 /* H510 eSPI */ +#define PCI_PRODUCT_INTEL_W580_ESPI 0x438f /* W580 eSPI */ +#define PCI_PRODUCT_INTEL_500SERIES_P2SB 0x43a0 /* 500 Series P2SB */ +#define PCI_PRODUCT_INTEL_500SERIES_PMC 0x43a1 /* 500 Series PMC */ +#define PCI_PRODUCT_INTEL_500SERIES_SMB 0x43a3 /* 500 Series SMBus */ +#define PCI_PRODUCT_INTEL_500SERIES_SPI 0x43a4 /* 500 Series SPI */ +#define PCI_PRODUCT_INTEL_500SERIES_TH 0x43a6 /* 500 Series TH */ +#define PCI_PRODUCT_INTEL_500SERIES_UART_2 0x43a7 /* 500 Series UART */ +#define PCI_PRODUCT_INTEL_500SERIES_UART_0 0x43a8 /* 500 Series UART */ +#define PCI_PRODUCT_INTEL_500SERIES_UART_1 0x43a9 /* 500 Series UART */ +#define PCI_PRODUCT_INTEL_500SERIES_GSPI_0 0x43aa /* 500 Series GSPI */ +#define PCI_PRODUCT_INTEL_500SERIES_GSPI_1 0x43ab /* 500 Series GSPI */ +#define PCI_PRODUCT_INTEL_500SERIES_I2C_4 0x43ad /* 500 Series I2C */ +#define PCI_PRODUCT_INTEL_500SERIES_I2C_5 0x43ae /* 500 Series I2C */ +#define PCI_PRODUCT_INTEL_500SERIES_PCIE_9 0x43b0 /* 500 Series PCIE */ +#define PCI_PRODUCT_INTEL_500SERIES_PCIE_10 0x43b1 /* 500 Series PCIE */ +#define PCI_PRODUCT_INTEL_500SERIES_PCIE_11 0x43b2 /* 500 Series PCIE */ +#define PCI_PRODUCT_INTEL_500SERIES_PCIE_12 0x43b3 /* 500 Series PCIE */ +#define PCI_PRODUCT_INTEL_500SERIES_PCIE_13 0x43b4 /* 500 Series PCIE */ +#define PCI_PRODUCT_INTEL_500SERIES_PCIE_14 0x43b5 /* 500 Series PCIE */ +#define PCI_PRODUCT_INTEL_500SERIES_PCIE_15 0x43b6 /* 500 Series PCIE */ +#define PCI_PRODUCT_INTEL_500SERIES_PCIE_16 0x43b7 /* 500 Series PCIE */ +#define PCI_PRODUCT_INTEL_500SERIES_PCIE_1 0x43b8 /* 500 Series PCIE */ +#define PCI_PRODUCT_INTEL_500SERIES_PCIE_2 0x43b9 /* 500 Series PCIE */ +#define PCI_PRODUCT_INTEL_500SERIES_PCIE_3 0x43ba /* 500 Series PCIE */ +#define PCI_PRODUCT_INTEL_500SERIES_PCIE_4 0x43bb /* 500 Series PCIE */ +#define PCI_PRODUCT_INTEL_500SERIES_PCIE_5 0x43bc /* 500 Series PCIE */ +#define PCI_PRODUCT_INTEL_500SERIES_PCIE_6 0x43bd /* 500 Series PCIE */ +#define PCI_PRODUCT_INTEL_500SERIES_PCIE_7 0x43be /* 500 Series PCIE */ +#define PCI_PRODUCT_INTEL_500SERIES_PCIE_8 0x43bf /* 500 Series PCIE */ +#define PCI_PRODUCT_INTEL_500SERIES_PCIE_17 0x43c0 /* 500 Series PCIE */ +#define PCI_PRODUCT_INTEL_500SERIES_PCIE_18 0x43c1 /* 500 Series PCIE */ +#define PCI_PRODUCT_INTEL_500SERIES_PCIE_19 0x43c2 /* 500 Series PCIE */ +#define PCI_PRODUCT_INTEL_500SERIES_PCIE_20 0x43c3 /* 500 Series PCIE */ +#define PCI_PRODUCT_INTEL_500SERIES_PCIE_21 0x43c4 /* 500 Series PCIE */ +#define PCI_PRODUCT_INTEL_500SERIES_PCIE_22 0x43c5 /* 500 Series PCIE */ +#define PCI_PRODUCT_INTEL_500SERIES_PCIE_23 0x43c6 /* 500 Series PCIE */ +#define PCI_PRODUCT_INTEL_500SERIES_PCIE_24 0x43c7 /* 500 Series PCIE */ +#define PCI_PRODUCT_INTEL_500SERIES_HDA 0x43c8 /* 500 Series HD Audio */ +#define PCI_PRODUCT_INTEL_500SERIES_THC_0 0x43d0 /* 500 Series THC */ +#define PCI_PRODUCT_INTEL_500SERIES_THC_1 0x43d1 /* 500 Series THC */ +#define PCI_PRODUCT_INTEL_500SERIES_AHCI_1 0x43d2 /* 500 Series AHCI */ +#define PCI_PRODUCT_INTEL_500SERIES_AHCI_2 0x43d3 /* 500 Series AHCI */ +#define PCI_PRODUCT_INTEL_500SERIES_RAID_4 0x43d4 /* 500 Series RAID */ +#define PCI_PRODUCT_INTEL_500SERIES_RAID_5 0x43d5 /* 500 Series RAID */ +#define PCI_PRODUCT_INTEL_500SERIES_RAID_6 0x43d6 /* 500 Series RAID */ +#define PCI_PRODUCT_INTEL_500SERIES_RAID_7 0x43d7 /* 500 Series RAID */ +#define PCI_PRODUCT_INTEL_500SERIES_I2C_6 0x43d8 /* 500 Series I2C */ +#define PCI_PRODUCT_INTEL_500SERIES_UART_3 0x43da /* 500 Series UART */ +#define PCI_PRODUCT_INTEL_500SERIES_HECI_1 0x43e0 /* 500 Series HECI */ +#define PCI_PRODUCT_INTEL_500SERIES_HECI_2 0x43e1 /* 500 Series HECI */ +#define PCI_PRODUCT_INTEL_500SERIES_IDER 0x43e2 /* 500 Series IDE-R */ +#define PCI_PRODUCT_INTEL_500SERIES_KT 0x43e3 /* 500 Series KT */ +#define PCI_PRODUCT_INTEL_500SERIES_HECI_3 0x43e4 /* 500 Series HECI */ +#define PCI_PRODUCT_INTEL_500SERIES_HECI_4 0x43e5 /* 500 Series HECI */ +#define PCI_PRODUCT_INTEL_500SERIES_I2C_0 0x43e8 /* 500 Series I2C */ +#define PCI_PRODUCT_INTEL_500SERIES_I2C_1 0x43e9 /* 500 Series I2C */ +#define PCI_PRODUCT_INTEL_500SERIES_I2C_2 0x43ea /* 500 Series I2C */ +#define PCI_PRODUCT_INTEL_500SERIES_I2C_3 0x43eb /* 500 Series I2C */ +#define PCI_PRODUCT_INTEL_500SERIES_XHCI 0x43ed /* 500 Series xHCI */ +#define PCI_PRODUCT_INTEL_500SERIES_XDCI 0x43ee /* 500 Series xDCI */ +#define PCI_PRODUCT_INTEL_500SERIES_SRAM 0x43ef /* 500 Series Shared SRAM */ +#define PCI_PRODUCT_INTEL_500SERIES_GSPI_2 0x43fb /* 500 Series GSPI */ +#define PCI_PRODUCT_INTEL_500SERIES_ISH 0x43fc /* 500 Series ISH */ +#define PCI_PRODUCT_INTEL_500SERIES_GSPI_3 0x43fd /* 500 Series GSPI */ #define PCI_PRODUCT_INTEL_TURBO_MEMORY 0x444e /* Turbo Memory */ #define PCI_PRODUCT_INTEL_EP80579_HB 0x5020 /* EP80579 Host */ #define PCI_PRODUCT_INTEL_EP80579_MEM 0x5021 /* EP80579 Memory */ -- cgit v1.2.3