From 2e838f4533fb4b2ab47537c5c8d265f5c3732c3b Mon Sep 17 00:00:00 2001 From: Jonathan Gray Date: Thu, 9 May 2019 19:56:19 +0000 Subject: set up IFP using the gen3 path on pineview Avoids crashes on boot with pineview on chipset flush due to IFP not being initialised. Diagnosed by, tested by and ok ratchov@ ok kettenis@ --- sys/dev/pci/drm/i915/intel_gtt.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) (limited to 'sys/dev/pci') diff --git a/sys/dev/pci/drm/i915/intel_gtt.c b/sys/dev/pci/drm/i915/intel_gtt.c index 5bd6a74f4fe..e6e1bfff9c6 100644 --- a/sys/dev/pci/drm/i915/intel_gtt.c +++ b/sys/dev/pci/drm/i915/intel_gtt.c @@ -130,11 +130,10 @@ intel_gtt_chipset_setup(struct drm_device *dev) } /* Set up the IFP for chipset flushing */ - if (IS_I915G(dev_priv) || IS_I915GM(dev_priv) || IS_I945G(dev_priv) || - IS_I945GM(dev_priv)) { - i915_alloc_ifp(dev_priv, &bpa); - } else if (INTEL_GEN(dev_priv) >= 4 || IS_G33(dev_priv)) { + if (INTEL_GEN(dev_priv) >= 4 || IS_G33(dev_priv)) { i965_alloc_ifp(dev_priv, &bpa); + } else if (INTEL_GEN(dev_priv) == 3) { + i915_alloc_ifp(dev_priv, &bpa); } else { int nsegs; /* -- cgit v1.2.3