From e6410b01b2722155b881d53ddf0f19b3539b5a2d Mon Sep 17 00:00:00 2001 From: Mike Belopuhov Date: Wed, 5 Dec 2012 14:41:29 +0000 Subject: minor cleanup, whitespaces, mostly synced with freebsd --- sys/dev/pci/ixgbe.c | 32 +++++++++++++++----------------- sys/dev/pci/ixgbe.h | 6 +++--- sys/dev/pci/ixgbe_82598.c | 11 ++++------- sys/dev/pci/ixgbe_phy.c | 7 +++++-- sys/dev/pci/ixgbe_type.h | 45 +++++++++++++++++++++++---------------------- 5 files changed, 50 insertions(+), 51 deletions(-) (limited to 'sys/dev/pci') diff --git a/sys/dev/pci/ixgbe.c b/sys/dev/pci/ixgbe.c index 43f39a02ab4..4909ec1424c 100644 --- a/sys/dev/pci/ixgbe.c +++ b/sys/dev/pci/ixgbe.c @@ -1,4 +1,4 @@ -/* $OpenBSD: ixgbe.c,v 1.9 2012/11/06 17:29:39 mikeb Exp $ */ +/* $OpenBSD: ixgbe.c,v 1.10 2012/12/05 14:41:28 mikeb Exp $ */ /****************************************************************************** @@ -42,7 +42,7 @@ void ixgbe_release_eeprom_semaphore(struct ixgbe_hw *hw); int32_t ixgbe_ready_eeprom(struct ixgbe_hw *hw); void ixgbe_standby_eeprom(struct ixgbe_hw *hw); void ixgbe_shift_out_eeprom_bits(struct ixgbe_hw *hw, uint16_t data, - uint16_t count); + uint16_t count); uint16_t ixgbe_shift_in_eeprom_bits(struct ixgbe_hw *hw, uint16_t count); void ixgbe_raise_eeprom_clk(struct ixgbe_hw *hw, uint32_t *eec); void ixgbe_lower_eeprom_clk(struct ixgbe_hw *hw, uint32_t *eec); @@ -53,9 +53,9 @@ int32_t ixgbe_fc_autoneg_fiber(struct ixgbe_hw *hw); int32_t ixgbe_fc_autoneg_backplane(struct ixgbe_hw *hw); int32_t ixgbe_fc_autoneg_copper(struct ixgbe_hw *hw); int32_t ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw); -int32_t ixgbe_negotiate_fc(struct ixgbe_hw *hw, uint32_t adv_reg, uint32_t lp_reg, - uint32_t adv_sym, uint32_t adv_asm, uint32_t lp_sym, uint32_t lp_asm); - +int32_t ixgbe_negotiate_fc(struct ixgbe_hw *hw, uint32_t adv_reg, + uint32_t lp_reg, uint32_t adv_sym, uint32_t adv_asm, + uint32_t lp_sym, uint32_t lp_asm); int32_t ixgbe_find_vlvf_slot(struct ixgbe_hw *hw, uint32_t vlan); @@ -69,18 +69,19 @@ int32_t ixgbe_check_for_ack_vf(struct ixgbe_hw *hw, uint16_t mbx_id); int32_t ixgbe_check_for_rst_vf(struct ixgbe_hw *hw, uint16_t mbx_id); int32_t ixgbe_obtain_mbx_lock_vf(struct ixgbe_hw *hw); int32_t ixgbe_write_mbx_vf(struct ixgbe_hw *hw, uint32_t *msg, uint16_t size, - uint16_t mbx_id); + uint16_t mbx_id); int32_t ixgbe_read_mbx_vf(struct ixgbe_hw *hw, uint32_t *msg, uint16_t size, - uint16_t mbx_id); -int32_t ixgbe_check_for_bit_pf(struct ixgbe_hw *hw, uint32_t mask, int32_t index); + uint16_t mbx_id); +int32_t ixgbe_check_for_bit_pf(struct ixgbe_hw *hw, uint32_t mask, + int32_t index); int32_t ixgbe_check_for_msg_pf(struct ixgbe_hw *hw, uint16_t vf_number); int32_t ixgbe_check_for_ack_pf(struct ixgbe_hw *hw, uint16_t vf_number); int32_t ixgbe_check_for_rst_pf(struct ixgbe_hw *hw, uint16_t vf_number); int32_t ixgbe_obtain_mbx_lock_pf(struct ixgbe_hw *hw, uint16_t vf_number); int32_t ixgbe_write_mbx_pf(struct ixgbe_hw *hw, uint32_t *msg, uint16_t size, - uint16_t vf_number); + uint16_t vf_number); int32_t ixgbe_read_mbx_pf(struct ixgbe_hw *hw, uint32_t *msg, uint16_t size, - uint16_t vf_number); + uint16_t vf_number); /** @@ -98,7 +99,7 @@ int32_t ixgbe_init_ops_generic(struct ixgbe_hw *hw) /* EEPROM */ eeprom->ops.init_params = &ixgbe_init_eeprom_params_generic; /* If EEPROM is valid (bit 8 = 1), use EERD otherwise use bit bang */ - if (eec & (1 << 8)) + if (eec & IXGBE_EEC_PRES) eeprom->ops.read = &ixgbe_read_eerd_generic; else eeprom->ops.read = &ixgbe_read_eeprom_bit_bang_generic; @@ -226,7 +227,7 @@ int32_t ixgbe_start_hw_gen2(struct ixgbe_hw *hw) for (i = 0; i < hw->mac.max_rx_queues; i++) { regval = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i)); regval &= ~(IXGBE_DCA_RXCTRL_DESC_WRO_EN | - IXGBE_DCA_RXCTRL_DESC_HSRO_EN); + IXGBE_DCA_RXCTRL_DESC_HSRO_EN); IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(i), regval); } @@ -2119,21 +2120,18 @@ int32_t ixgbe_setup_fc(struct ixgbe_hw *hw, int32_t packetbuf_num) * HW will be able to do fc autoneg once the cable is plugged in. If * we link at 10G, the 1G advertisement is harmless and vice versa. */ - switch (hw->phy.media_type) { case ixgbe_media_type_fiber: case ixgbe_media_type_backplane: reg = IXGBE_READ_REG(hw, IXGBE_PCS1GANA); reg_bp = IXGBE_READ_REG(hw, IXGBE_AUTOC); break; - case ixgbe_media_type_copper: hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_ADVT, - IXGBE_MDIO_AUTO_NEG_DEV_TYPE, ®_cu); + IXGBE_MDIO_AUTO_NEG_DEV_TYPE, ®_cu); break; - default: - ; + break; } /* diff --git a/sys/dev/pci/ixgbe.h b/sys/dev/pci/ixgbe.h index 3e9e82a951d..07b07a04ef9 100644 --- a/sys/dev/pci/ixgbe.h +++ b/sys/dev/pci/ixgbe.h @@ -1,4 +1,4 @@ -/* $OpenBSD: ixgbe.h,v 1.11 2012/11/06 17:29:39 mikeb Exp $ */ +/* $OpenBSD: ixgbe.h,v 1.12 2012/12/05 14:41:28 mikeb Exp $ */ /****************************************************************************** @@ -170,7 +170,7 @@ int32_t ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, uint8_t *pba_num, int32_t ixgbe_read_pba_length_generic(struct ixgbe_hw *hw, uint32_t *pba_num_size); int32_t ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, uint8_t *mac_addr); int32_t ixgbe_get_bus_info_generic(struct ixgbe_hw *hw); -void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw); +void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw); int32_t ixgbe_stop_adapter_generic(struct ixgbe_hw *hw); int32_t ixgbe_led_on_generic(struct ixgbe_hw *hw, uint32_t index); @@ -207,7 +207,7 @@ int32_t ixgbe_fc_autoneg(struct ixgbe_hw *hw); int32_t ixgbe_validate_mac_addr(uint8_t *mac_addr); int32_t ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, uint16_t mask); -void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, uint16_t mask); +void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, uint16_t mask); int32_t ixgbe_disable_pcie_master(struct ixgbe_hw *hw); int32_t ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, uint32_t index); diff --git a/sys/dev/pci/ixgbe_82598.c b/sys/dev/pci/ixgbe_82598.c index 4dcc3b7ddc9..cd4e9faf437 100644 --- a/sys/dev/pci/ixgbe_82598.c +++ b/sys/dev/pci/ixgbe_82598.c @@ -1,4 +1,4 @@ -/* $OpenBSD: ixgbe_82598.c,v 1.7 2012/07/29 13:49:03 mikeb Exp $ */ +/* $OpenBSD: ixgbe_82598.c,v 1.8 2012/12/05 14:41:28 mikeb Exp $ */ /****************************************************************************** @@ -893,21 +893,18 @@ mac_reset_top: DEBUGOUT("Reset polling failed to complete.\n"); } + msec_delay(50); + /* * Double resets are required for recovery from certain error * conditions. Between resets, it is necessary to stall to allow time - * for any pending HW events to complete. We use 1usec since that is - * what is needed for ixgbe_disable_pcie_master(). The second reset - * then clears out any effects of those events. + * for any pending HW events to complete. */ if (hw->mac.flags & IXGBE_FLAGS_DOUBLE_RESET_REQUIRED) { hw->mac.flags &= ~IXGBE_FLAGS_DOUBLE_RESET_REQUIRED; - usec_delay(1); goto mac_reset_top; } - msec_delay(50); - gheccr = IXGBE_READ_REG(hw, IXGBE_GHECCR); gheccr &= ~((1 << 21) | (1 << 18) | (1 << 9) | (1 << 6)); IXGBE_WRITE_REG(hw, IXGBE_GHECCR, gheccr); diff --git a/sys/dev/pci/ixgbe_phy.c b/sys/dev/pci/ixgbe_phy.c index 2abe3fce4a1..708f6242286 100644 --- a/sys/dev/pci/ixgbe_phy.c +++ b/sys/dev/pci/ixgbe_phy.c @@ -1,4 +1,4 @@ -/* $OpenBSD: ixgbe_phy.c,v 1.8 2012/08/06 21:07:52 mikeb Exp $ */ +/* $OpenBSD: ixgbe_phy.c,v 1.9 2012/12/05 14:41:28 mikeb Exp $ */ /****************************************************************************** @@ -1279,7 +1279,7 @@ int32_t ixgbe_write_i2c_eeprom_generic(struct ixgbe_hw *hw, uint8_t byte_offset, * @data: value read * * Performs byte read operation to SFP module's EEPROM over I2C interface at - * a specified deivce address. + * a specified device address. **/ int32_t ixgbe_read_i2c_byte_generic(struct ixgbe_hw *hw, uint8_t byte_offset, uint8_t dev_addr, uint8_t *data) @@ -1535,6 +1535,7 @@ int32_t ixgbe_clock_out_i2c_byte(struct ixgbe_hw *hw, uint8_t data) i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL); i2cctl |= IXGBE_I2C_DATA_OUT; IXGBE_WRITE_REG(hw, IXGBE_I2CCTL, i2cctl); + IXGBE_WRITE_FLUSH(hw); return status; } @@ -1680,6 +1681,7 @@ void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, uint32_t *i2cctl) *i2cctl &= ~IXGBE_I2C_CLK_OUT; IXGBE_WRITE_REG(hw, IXGBE_I2CCTL, *i2cctl); + IXGBE_WRITE_FLUSH(hw); /* SCL fall time (300ns) */ usec_delay(IXGBE_I2C_T_FALL); @@ -1703,6 +1705,7 @@ int32_t ixgbe_set_i2c_data(struct ixgbe_hw *hw, uint32_t *i2cctl, int data) *i2cctl &= ~IXGBE_I2C_DATA_OUT; IXGBE_WRITE_REG(hw, IXGBE_I2CCTL, *i2cctl); + IXGBE_WRITE_FLUSH(hw); /* Data rise/fall (1000ns/300ns) and set-up time (250ns) */ usec_delay(IXGBE_I2C_T_RISE + IXGBE_I2C_T_FALL + IXGBE_I2C_T_SU_DATA); diff --git a/sys/dev/pci/ixgbe_type.h b/sys/dev/pci/ixgbe_type.h index 71710de713d..676970bed65 100644 --- a/sys/dev/pci/ixgbe_type.h +++ b/sys/dev/pci/ixgbe_type.h @@ -1,4 +1,4 @@ -/* $OpenBSD: ixgbe_type.h,v 1.15 2012/11/08 10:12:15 mikeb Exp $ */ +/* $OpenBSD: ixgbe_type.h,v 1.16 2012/12/05 14:41:28 mikeb Exp $ */ /****************************************************************************** @@ -404,16 +404,17 @@ #define IXGBE_WUPL_LENGTH_MASK 0xFFFF /* DCB registers */ -#define IXGBE_RMCS 0x03D00 -#define IXGBE_DPMCS 0x07F40 -#define IXGBE_PDPMCS 0x0CD00 -#define IXGBE_RUPPBMR 0x050A0 -#define IXGBE_RT2CR(_i) (0x03C20 + ((_i) * 4)) /* 8 of these (0-7) */ -#define IXGBE_RT2SR(_i) (0x03C40 + ((_i) * 4)) /* 8 of these (0-7) */ -#define IXGBE_TDTQ2TCCR(_i) (0x0602C + ((_i) * 0x40)) /* 8 of these (0-7) */ -#define IXGBE_TDTQ2TCSR(_i) (0x0622C + ((_i) * 0x40)) /* 8 of these (0-7) */ -#define IXGBE_TDPT2TCCR(_i) (0x0CD20 + ((_i) * 4)) /* 8 of these (0-7) */ -#define IXGBE_TDPT2TCSR(_i) (0x0CD40 + ((_i) * 4)) /* 8 of these (0-7) */ +#define IXGBE_DCB_MAX_TRAFFIC_CLASS 8 +#define IXGBE_RMCS 0x03D00 +#define IXGBE_DPMCS 0x07F40 +#define IXGBE_PDPMCS 0x0CD00 +#define IXGBE_RUPPBMR 0x050A0 +#define IXGBE_RT2CR(_i) (0x03C20 + ((_i) * 4)) /* 8 of these (0-7) */ +#define IXGBE_RT2SR(_i) (0x03C40 + ((_i) * 4)) /* 8 of these (0-7) */ +#define IXGBE_TDTQ2TCCR(_i) (0x0602C + ((_i) * 0x40)) /* 8 of these (0-7) */ +#define IXGBE_TDTQ2TCSR(_i) (0x0622C + ((_i) * 0x40)) /* 8 of these (0-7) */ +#define IXGBE_TDPT2TCCR(_i) (0x0CD20 + ((_i) * 4)) /* 8 of these (0-7) */ +#define IXGBE_TDPT2TCSR(_i) (0x0CD40 + ((_i) * 4)) /* 8 of these (0-7) */ /* Security Control Registers */ @@ -421,7 +422,6 @@ #define IXGBE_SECTXSTAT 0x08804 #define IXGBE_SECTXBUFFAF 0x08808 #define IXGBE_SECTXMINIFG 0x08810 -#define IXGBE_SECTXSTAT 0x08804 #define IXGBE_SECRXCTRL 0x08D00 #define IXGBE_SECRXSTAT 0x08D04 @@ -1823,11 +1823,12 @@ #define IXGBE_FCTRL_DPF 0x00002000 /* Discard Pause Frame */ /* Receive Priority Flow Control Enable */ #define IXGBE_FCTRL_RPFCE 0x00004000 -#define IXGBE_FCTRL_RFCE 0x00008000 /* Receive Flow Control Ena */ +#define IXGBE_FCTRL_RFCE 0x00008000 /* Receive Flow Control Enable */ #define IXGBE_MFLCN_PMCF 0x00000001 /* Pass MAC Control Frames */ #define IXGBE_MFLCN_DPF 0x00000002 /* Discard Pause Frame */ #define IXGBE_MFLCN_RPFCE 0x00000004 /* Receive Priority FC Enable */ #define IXGBE_MFLCN_RFCE 0x00000008 /* Receive FC Enable */ +#define IXGBE_MFLCN_RPFCE_MASK 0x00000FF4 /* Rx Priority FC bitmap mask */ /* Multiple Receive Queue Control */ #define IXGBE_MRQC_RSSEN 0x00000001 /* RSS Enable */ @@ -2348,15 +2349,15 @@ union ixgbe_atr_input { /* * Byte layout in order, all values with MSB first: * - * vm_pool - 1 byte - * flow_type - 1 byte - * vlan_id - 2 bytes - * src_ip - 16 bytes - * dst_ip - 16 bytes - * src_port - 2 bytes - * dst_port - 2 bytes - * flex_bytes - 2 bytes - * rsvd0 - 2 bytes - space reserved must be 0. + * vm_pool - 1 byte + * flow_type - 1 byte + * vlan_id - 2 bytes + * src_ip - 16 bytes + * dst_ip - 16 bytes + * src_port - 2 bytes + * dst_port - 2 bytes + * flex_bytes - 2 bytes + * bkt_hash - 2 bytes */ struct { uint8_t vm_pool; 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