From 2fdfb5dab29b9ca308fa90f8ee19ae5df27c64d5 Mon Sep 17 00:00:00 2001 From: Philip Guenther Date: Sun, 23 Nov 2014 00:25:06 +0000 Subject: Make sure the direction bit is cleared on entry to the kernel by syscall or interrupt, as specified by the ABIs. Our current gcc doesn't assume this bit of the ABI, but future compilers may and some ASM can be simplified by assuming it. in snaps for a bit --- sys/arch/amd64/amd64/cpu.c | 4 ++-- sys/arch/amd64/amd64/vector.S | 7 ++++++- sys/arch/i386/i386/locore.s | 3 ++- 3 files changed, 10 insertions(+), 4 deletions(-) (limited to 'sys') diff --git a/sys/arch/amd64/amd64/cpu.c b/sys/arch/amd64/amd64/cpu.c index d40dbdd070f..e27de4ba448 100644 --- a/sys/arch/amd64/amd64/cpu.c +++ b/sys/arch/amd64/amd64/cpu.c @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.c,v 1.69 2014/11/22 18:31:46 mlarkin Exp $ */ +/* $OpenBSD: cpu.c,v 1.70 2014/11/23 00:25:05 guenther Exp $ */ /* $NetBSD: cpu.c,v 1.1 2003/04/26 18:39:26 fvdl Exp $ */ /*- @@ -900,7 +900,7 @@ cpu_init_msrs(struct cpu_info *ci) ((uint64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48)); wrmsr(MSR_LSTAR, (uint64_t)Xsyscall); wrmsr(MSR_CSTAR, (uint64_t)Xsyscall32); - wrmsr(MSR_SFMASK, PSL_NT|PSL_T|PSL_I|PSL_C); + wrmsr(MSR_SFMASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D); wrmsr(MSR_FSBASE, 0); wrmsr(MSR_GSBASE, (u_int64_t)ci); diff --git a/sys/arch/amd64/amd64/vector.S b/sys/arch/amd64/amd64/vector.S index 19fa93eff88..2e23826add2 100644 --- a/sys/arch/amd64/amd64/vector.S +++ b/sys/arch/amd64/amd64/vector.S @@ -1,4 +1,4 @@ -/* $OpenBSD: vector.S,v 1.34 2013/11/02 14:23:38 kettenis Exp $ */ +/* $OpenBSD: vector.S,v 1.35 2014/11/23 00:25:05 guenther Exp $ */ /* $NetBSD: vector.S,v 1.5 2004/06/28 09:13:11 fvdl Exp $ */ /* @@ -122,6 +122,7 @@ IDTVEC(trap07) pushq $T_DNA INTRENTRY sti + cld movq CPUVAR(SELF),%rdi call _C_LABEL(fpudna) INTRFASTEXIT @@ -247,6 +248,7 @@ NENTRY(alltraps) sti .globl calltrap calltrap: + cld #ifdef DIAGNOSTIC movl CPUVAR(ILEVEL),%ebx #endif /* DIAGNOSTIC */ @@ -332,6 +334,7 @@ IDTVEC(resume_lapic_ipi) incl CPUVAR(IDEPTH) movl $IPL_IPI,CPUVAR(ILEVEL) sti + cld pushq %rbx call _C_LABEL(x86_ipi_handler) jmp _C_LABEL(Xdoreti) @@ -413,6 +416,7 @@ IDTVEC(resume_lapic_ltimer) incl CPUVAR(IDEPTH) movl $IPL_CLOCK,CPUVAR(ILEVEL) sti + cld pushq %rbx xorq %rdi,%rdi call _C_LABEL(lapic_clockintr) @@ -463,6 +467,7 @@ IDTVEC(intr_##name##num) ;\ pushq %r13 ;\ movl %ebx,CPUVAR(ILEVEL) ;\ sti ;\ + cld ;\ incl CPUVAR(IDEPTH) ;\ movq IS_HANDLERS(%r14),%rbx ;\ 6: \ diff --git a/sys/arch/i386/i386/locore.s b/sys/arch/i386/i386/locore.s index 16ff2377e08..4c24cb91987 100644 --- a/sys/arch/i386/i386/locore.s +++ b/sys/arch/i386/i386/locore.s @@ -1,4 +1,4 @@ -/* $OpenBSD: locore.s,v 1.147 2013/06/13 02:26:53 deraadt Exp $ */ +/* $OpenBSD: locore.s,v 1.148 2014/11/23 00:25:05 guenther Exp $ */ /* $NetBSD: locore.s,v 1.145 1996/05/03 19:41:19 christos Exp $ */ /*- @@ -104,6 +104,7 @@ * These are used on interrupt or trap entry or exit. */ #define INTRENTRY \ + cld ; \ pushl %eax ; \ pushl %ecx ; \ pushl %edx ; \ -- cgit v1.2.3