From 4f015a207c0842c11563fae5a46586f8ba4b16c2 Mon Sep 17 00:00:00 2001 From: Mike Larkin Date: Thu, 2 Mar 2017 02:34:57 +0000 Subject: Refactor cpuid exit handler to make it easier to bolt on SVM support shortly (instead of having two nearly identical functions.) ok reyk --- sys/arch/amd64/amd64/vmm.c | 89 ++++++++++++++++++++++++++++------------------ 1 file changed, 54 insertions(+), 35 deletions(-) (limited to 'sys') diff --git a/sys/arch/amd64/amd64/vmm.c b/sys/arch/amd64/amd64/vmm.c index 54b52034b07..6481f1a4cef 100644 --- a/sys/arch/amd64/amd64/vmm.c +++ b/sys/arch/amd64/amd64/vmm.c @@ -1,4 +1,4 @@ -/* $OpenBSD: vmm.c,v 1.115 2017/02/20 08:12:47 mlarkin Exp $ */ +/* $OpenBSD: vmm.c,v 1.116 2017/03/02 02:34:56 mlarkin Exp $ */ /* * Copyright (c) 2014 Mike Larkin * @@ -144,7 +144,7 @@ int vcpu_vmx_check_cap(struct vcpu *, uint32_t, uint32_t, int); int vcpu_vmx_compute_ctrl(uint64_t, uint16_t, uint32_t, uint32_t, uint32_t *); int vmx_get_exit_info(uint64_t *, uint64_t *); int vmx_handle_exit(struct vcpu *); -int vmx_handle_cpuid(struct vcpu *); +int vmm_handle_cpuid(struct vcpu *); int vmx_handle_rdmsr(struct vcpu *); int vmx_handle_wrmsr(struct vcpu *); int vmx_handle_cr(struct vcpu *); @@ -3786,7 +3786,7 @@ vmx_handle_exit(struct vcpu *vcpu) ret = vmx_handle_np_fault(vcpu); break; case VMX_EXIT_CPUID: - ret = vmx_handle_cpuid(vcpu); + ret = vmm_handle_cpuid(vcpu); update_rip = 1; break; case VMX_EXIT_IO: @@ -4217,23 +4217,34 @@ vmx_handle_wrmsr(struct vcpu *vcpu) } /* - * vmx_handle_cpuid + * vmm_handle_cpuid * * Exit handler for CPUID instruction + * + * Parameters: + * vcpu: vcpu causing the CPUID exit + * + * Return value: + * 0: the exit was processed successfully + * EINVAL: error occurred validating the CPUID instruction arguments */ int -vmx_handle_cpuid(struct vcpu *vcpu) +vmm_handle_cpuid(struct vcpu *vcpu) { uint64_t insn_length; uint64_t *rax, *rbx, *rcx, *rdx; - if (vmread(VMCS_INSTRUCTION_LENGTH, &insn_length)) { - printf("vmx_handle_cpuid: can't obtain instruction length\n"); - return (EINVAL); - } + if (vmm_softc->mode == VMM_MODE_VMX || + vmm_softc->mode == VMM_MODE_EPT) { + if (vmread(VMCS_INSTRUCTION_LENGTH, &insn_length)) { + DPRINTF("%s: can't obtain instruction length\n", + __func__); + return (EINVAL); + } - /* All CPUID instructions are 0x0F 0xA2 */ - KASSERT(insn_length == 2); + /* All CPUID instructions are 0x0F 0xA2 */ + KASSERT(insn_length == 2); + } rax = &vcpu->vc_gueststate.vg_rax; rbx = &vcpu->vc_gueststate.vg_rbx; @@ -4294,9 +4305,9 @@ vmx_handle_cpuid(struct vcpu *vcpu) CPUID_PSN | CPUID_SS | CPUID_PBE | CPUID_MTRR | CPUID_PAT); break; - case 0x02: /* Cache and TLB information */ - DPRINTF("vmx_handle_cpuid: function 0x02 (cache/TLB) not" - " supported\n"); + case 0x02: /* Cache and TLB information (not supported) */ + DPRINTF("%s: function 0x02 (cache/TLB) not supported\n", + __func__); *rax = 0; *rbx = 0; *rcx = 0; @@ -4309,20 +4320,24 @@ vmx_handle_cpuid(struct vcpu *vcpu) *rdx = 0; break; case 0x04: - DPRINTF("vmx_handle_cpuid: function 0x04 (deterministic " - "cache info) not supported\n"); + DPRINTF("%s: function 0x04 (deterministic cache info) not " + "supported\n", __func__); *rax = 0; *rbx = 0; *rcx = 0; *rdx = 0; break; case 0x05: /* MONITOR/MWAIT (not supported) */ + DPRINTF("%s: function 0x05 (monitor/mwait) not supported\n", + __func__); *rax = 0; *rbx = 0; *rcx = 0; *rdx = 0; break; - case 0x06: /* Thermal / Power management */ + case 0x06: /* Thermal / Power management (not supported) */ + DPRINTF("%s: function 0x06 (thermal/power mgt) not supported\n", + __func__); *rax = 0; *rbx = 0; *rcx = 0; @@ -4350,6 +4365,8 @@ vmx_handle_cpuid(struct vcpu *vcpu) *rdx = 0; } else { /* Unsupported subleaf */ + DPRINTF("%s: function 0x07 (SEFF) unsupported subleaf " + "0x%llx not supported\n", __func__, *rcx); *rax = 0; *rbx = 0; *rcx = 0; @@ -4357,62 +4374,64 @@ vmx_handle_cpuid(struct vcpu *vcpu) } break; case 0x09: /* Direct Cache Access (not supported) */ - DPRINTF("vmx_handle_cpuid: function 0x09 (direct cache access)" - " not supported\n"); + DPRINTF("%s: function 0x09 (direct cache access) not " + "supported\n", __func__); *rax = 0; *rbx = 0; *rcx = 0; *rdx = 0; break; - case 0x0a: /* Architectural performance monitoring */ + case 0x0a: /* Architectural perf monitoring (not supported) */ + DPRINTF("%s: function 0x0a (arch. perf mon) not supported\n", + __func__); *rax = 0; *rbx = 0; *rcx = 0; *rdx = 0; break; case 0x0b: /* Extended topology enumeration (not supported) */ - DPRINTF("vmx_handle_cpuid: function 0x0b (topology enumeration)" - " not supported\n"); + DPRINTF("%s: function 0x0b (topology enumeration) not " + "supported\n", __func__); *rax = 0; *rbx = 0; *rcx = 0; *rdx = 0; break; case 0x0d: /* Processor ext. state information (not supported) */ - DPRINTF("vmx_handle_cpuid: function 0x0d (ext. state info)" - " not supported\n"); + DPRINTF("%s: function 0x0d (ext. state info) not supported\n", + __func__); *rax = 0; *rbx = 0; *rcx = 0; *rdx = 0; break; case 0x0f: /* QoS info (not supported) */ - DPRINTF("vmx_handle_cpuid: function 0x0f (QoS info)" - " not supported\n"); + DPRINTF("%s: function 0x0f (QoS info) not supported\n", + __func__); *rax = 0; *rbx = 0; *rcx = 0; *rdx = 0; break; case 0x14: /* Processor Trace info (not supported) */ - DPRINTF("vmx_handle_cpuid: function 0x14 (processor trace info)" - " not supported\n"); + DPRINTF("%s: function 0x14 (processor trace info) not " + "supported\n", __func__); *rax = 0; *rbx = 0; *rcx = 0; *rdx = 0; break; case 0x15: /* TSC / Core Crystal Clock info (not supported) */ - DPRINTF("vmx_handle_cpuid: function 0x15 (TSC / CCC info)" - " not supported\n"); + DPRINTF("%s: function 0x15 (TSC / CCC info) not supported\n", + __func__); *rax = 0; *rbx = 0; *rcx = 0; *rdx = 0; break; case 0x16: /* Processor frequency info (not supported) */ - DPRINTF("vmx_handle_cpuid: function 0x16 (frequency info)" - " not supported\n"); + DPRINTF("%s: function 0x16 (frequency info) not supported\n", + __func__); *rax = 0; *rbx = 0; *rcx = 0; @@ -4472,15 +4491,15 @@ vmx_handle_cpuid(struct vcpu *vcpu) *rdx = 0; /* unsupported ITSC */ break; case 0x80000008: /* Phys bits info and topology (AMD) */ - DPRINTF("vmx_handle_cpuid: function 0x80000008 (phys bits info)" - " not supported\n"); + DPRINTF("%s: function 0x80000008 (phys bits info) not " + "supported\n", __func__); *rax = 0; *rbx = 0; *rcx = 0; *rdx = 0; break; default: - DPRINTF("vmx_handle_cpuid: unsupported rax=0x%llx\n", *rax); + DPRINTF("%s: unsupported rax=0x%llx\n", __func__, *rax); *rax = 0; *rbx = 0; *rcx = 0; -- cgit v1.2.3