From b57f9f5ef5ecb674dac71b5b6c6158a029e4c77c Mon Sep 17 00:00:00 2001 From: Dale Rahn Date: Mon, 7 Jan 2002 05:03:24 +0000 Subject: On cache flushing, if start is not cacheline aligned, add to the lenght to make sure the whole region is flushed. from conversation with pefo. --- sys/arch/macppc/include/cpu.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'sys') diff --git a/sys/arch/macppc/include/cpu.h b/sys/arch/macppc/include/cpu.h index d0b6b60f731..0a1bd865f7d 100644 --- a/sys/arch/macppc/include/cpu.h +++ b/sys/arch/macppc/include/cpu.h @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.h,v 1.2 2001/11/06 18:41:10 art Exp $ */ +/* $OpenBSD: cpu.h,v 1.3 2002/01/07 05:03:23 drahn Exp $ */ /* $NetBSD: cpu.h,v 1.1 1996/09/30 16:34:21 ws Exp $ */ /* @@ -41,8 +41,10 @@ static __inline void syncicache(void *from, int len) { - int l = len; + int l; char *p = from; + len = len + (((u_int32_t) from) & (CACHELINESIZE-1)); + l = len; do { __asm__ __volatile__ ("dcbst 0,%0" :: "r"(p)); -- cgit v1.2.3