From d11d0b3a465886abffeea7090b98e2f99ae52f31 Mon Sep 17 00:00:00 2001 From: Jonathan Gray Date: Thu, 23 Feb 2023 02:13:25 +0000 Subject: drm/amd/display: Adjust downscaling limits for dcn314 From Daniel Miess 7dbd205349f1fb098057c28a9a2af244aa868f72 in linux-6.1.y/6.1.13 dd2db2dc4bd298f33dea50c80c3c11bee4e3b0a4 in mainline linux --- sys/dev/pci/drm/amd/display/dc/dcn314/dcn314_resource.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'sys') diff --git a/sys/dev/pci/drm/amd/display/dc/dcn314/dcn314_resource.c b/sys/dev/pci/drm/amd/display/dc/dcn314/dcn314_resource.c index 9066c511a05..c80c8c8f51e 100644 --- a/sys/dev/pci/drm/amd/display/dc/dcn314/dcn314_resource.c +++ b/sys/dev/pci/drm/amd/display/dc/dcn314/dcn314_resource.c @@ -871,8 +871,9 @@ static const struct dc_plane_cap plane_cap = { }, // 6:1 downscaling ratio: 1000/6 = 166.666 + // 4:1 downscaling ratio for ARGB888 to prevent underflow during P010 playback: 1000/4 = 250 .max_downscale_factor = { - .argb8888 = 167, + .argb8888 = 250, .nv12 = 167, .fp16 = 167 }, @@ -1755,7 +1756,7 @@ static bool dcn314_resource_construct( pool->base.underlay_pipe_index = NO_UNDERLAY_PIPE; pool->base.pipe_count = pool->base.res_cap->num_timing_generator; pool->base.mpcc_count = pool->base.res_cap->num_timing_generator; - dc->caps.max_downscale_ratio = 600; + dc->caps.max_downscale_ratio = 400; dc->caps.i2c_speed_in_khz = 100; dc->caps.i2c_speed_in_khz_hdcp = 100; dc->caps.max_cursor_size = 256; -- cgit v1.2.3