From ec858ef0e954d010155cf2b122d3113c2f9e7a81 Mon Sep 17 00:00:00 2001
From: Hugh Graham <hugh@cvs.openbsd.org>
Date: Sun, 25 Feb 2001 15:55:29 +0000
Subject: Code to enable the cache on VS4000/VLC. From mhitch@netbsd.org.

---
 sys/arch/vax/include/ka48.h | 11 +++++++++--
 sys/arch/vax/vax/ka48.c     | 35 ++++++++++++-----------------------
 2 files changed, 21 insertions(+), 25 deletions(-)

(limited to 'sys')

diff --git a/sys/arch/vax/include/ka48.h b/sys/arch/vax/include/ka48.h
index d3b7ed843b0..2da6beba2d2 100644
--- a/sys/arch/vax/include/ka48.h
+++ b/sys/arch/vax/include/ka48.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ka48.h,v 1.1 2000/04/26 06:08:27 bjc Exp $	*/
+/*	$OpenBSD: ka48.h,v 1.2 2001/02/25 15:55:28 hugh Exp $	*/
 /*
  * Copyright (c) 1998 Ludd, University of Lule}, Sweden.
  * All rights reserved.
@@ -43,7 +43,7 @@
 
 /* memory addresses of interest */
 #define	KA48_INVFLT	0x20200000
-#define	KA48_INVFLTSZ	32768
+#define	KA48_INVFLTSZ	16384
 #define	KA48_CCR	0x23000000
 #define	KA48_TAGST	0x2d000000
 #define	KA48_TAGSZ	32768
@@ -53,3 +53,10 @@
 
 #define	KA48_BWF0	0x20080014
 #define	BWF0_FEN	0x01000000
+
+/* From OpenVMS $IO440DEF & $KA440DEF */
+#define	KA48_PARCTL	0x20080014
+#define	KA48_PARCTL_CPEN	0x00000001	/* CPU Parity Eanble? */
+#define	KA48_PARCTL_NPEN	0x00000100	/* ?? Parity Enable */
+#define	KA48_PARCTL_INVENA	0x01000000	/* Invalid ? Enable */
+#define	KA48_PARCTL_AGS		0x02000000	/* ??? */
diff --git a/sys/arch/vax/vax/ka48.c b/sys/arch/vax/vax/ka48.c
index ae2c4bcfe1f..460f343afe7 100644
--- a/sys/arch/vax/vax/ka48.c
+++ b/sys/arch/vax/vax/ka48.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ka48.c,v 1.1 2000/04/27 01:10:10 bjc Exp $	*/
+/*	$OpenBSD: ka48.c,v 1.2 2001/02/25 15:55:27 hugh Exp $	*/
 /*
  * Copyright (c) 1998 Ludd, University of Lule}, Sweden.
  * All rights reserved.
@@ -102,33 +102,22 @@ void
 ka48_cache_enable()
 {
 	int i, *tmp;
-	return; /*** not yet MK-990306 ***/
+	long *par_ctl = (long *)KA48_PARCTL;
 
-	/* Disable caches */
-	*(int *)KA48_CCR &= ~CCR_SPECIO;/* secondary */
-	mtpr(PCSTS_FLUSH, PR_PCSTS);	/* primary */
-	*(int *)KA48_BWF0 &= ~BWF0_FEN; /* invalidate filter */
+	/* Disable cache */
+	mtpr(0, PR_CADR);		/* disable */
+	*par_ctl &= ~KA48_PARCTL_INVENA;	/* clear ? invalid enable */
+	mtpr(2, PR_CADR);		/* flush */
 
 	/* Clear caches */
 	tmp = (void *)KA48_INVFLT;	/* inv filter */
-	for (i = 0; i < 32768; i++)
+	for (i = 0; i < KA48_INVFLTSZ / sizeof(int); i++)
 		tmp[i] = 0;
-
-	/* Write valid parity to all primary cache entries */
-	for (i = 0; i < 256; i++) {
-		mtpr(i << 3, PR_PCIDX);
-		mtpr(PCTAG_PARITY, PR_PCTAG);
-	}
-
-	/* Secondary cache */
-	tmp = (void *)KA48_TAGST;
-	for (i = 0; i < KA48_TAGSZ*2; i+=2)
-		tmp[i] = 0;
-
-	/* Enable cache */
-	*(int *)KA48_BWF0 |= BWF0_FEN; /* invalidate filter */
-	mtpr(PCSTS_ENABLE, PR_PCSTS);
-	*(int *)KA48_CCR = CCR_SPECIO | CCR_CENA;
+	*par_ctl |= KA48_PARCTL_INVENA;	/* Enable ???? */
+	mtpr(4, PR_CADR);		/* enable cache */
+	*par_ctl |= (KA48_PARCTL_AGS |	/* AGS? */
+	    KA48_PARCTL_NPEN |		/* N? Parity Enable */
+	    KA48_PARCTL_CPEN);		/* Cpu parity enable */
 }
 
 void
-- 
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