.\" $OpenBSD: cpu.4,v 1.10 2006/07/01 07:28:13 jmc Exp $ .\" .\" Copyright (c) 2004 Ted Unangst .\" All rights reserved. .\" .\" Redistribution and use in source and binary forms, with or without .\" modification, are permitted provided that the following conditions .\" are met: .\" 1. Redistributions of source code must retain the above copyright .\" notice, this list of conditions and the following disclaimer. .\" 2. Redistributions in binary form must reproduce the above copyright .\" notice, this list of conditions and the following disclaimer in the .\" documentation and/or other materials provided with the distribution. .\" .\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR .\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES .\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. .\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, .\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT .\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, .\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY .\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT .\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF .\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. .\" .Dd March 15, 2004 .Dt CPU 4 i386 .Os .Sh NAME .Nm cpu .Nd Central Processing Unit .Sh SYNOPSIS .Cd "option I386_CPU" .Cd "option I486_CPU" .Cd "option I586_CPU" .Cd "option I686_CPU" .Sh DESCRIPTION Several processor models have additional features that extend their base functionality, such as power and frequency control or additional instructions. .Sh FREQUENCY CONTROL The .Xr sysctl 3 hw.cpuspeed will return the current operating frequency of the processor (on some processors this value may be an approximation). If possible, speed may be adjusted by altering hw.setperf from 0 to 100, representing percentage of maximum speed. There are several possible implementations for setperf, all transparent to the user. In systems with more than one control capability, they are preferred in the order given. .Bl -tag -width tenletters .It LongRun Found on Transmeta Crusoe processors, offers frequency scaling with numerous positions. The processor dynamically adjusts frequency in response to load, the setperf value is interpreted as the maximum. .It EST Enhanced SpeedStep found on Intel Pentium M processors, offers frequency scaling with numerous positions. .It SpeedStep Found on some Intel Pentium 3 and newer mobile chips, it is capable of adjusting frequency between a low and high value. Only enabled on some chipsets. .It TCC Thermal Control Circuit found on Intel Pentium 4 and newer processors, adjusts processor duty cycle in 12.5 percent increments. .It PowerNow Found on various AMD processors. Currently only supports a limited set of models in the K6, K7, and K8 families. .El .Sh INSTRUCTION SET EXTENSIONS The presence of extended instruction sets can be determined by sysctl machdep. .Bl -tag -width "tenletters" .It osfxsr Supports the fxsave instruction. .It sse Supports the SSE instruction set. .It sse2 Supports the SSE2 instruction set. .It xcrypt Support the VIA AES encryption instruction set. If this is supported, the .Li libcrypto EVP AES functions will automatically use this support. .El .Sh SEE ALSO .Xr ichpcib 4 , .Xr npx 4 , .Xr sysctl 8