/**************************************************************************

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***************************************************************************/

/* $OpenBSD: if_ixgb_osdep.h,v 1.1 2005/11/14 23:25:43 brad Exp $ */

#ifndef _IXGB_OPENBSD_OS_H_
#define _IXGB_OPENBSD_OS_H_

#define ASSERT(x) if(!(x)) panic("IXGB: x")

/* The happy-fun DELAY macro is defined in /usr/src/sys/i386/include/clock.h */
#define usec_delay(x) DELAY(x)
#define msec_delay(x) DELAY(1000*(x))

#define DBG 0 
#define MSGOUT(S, A, B)     printf(S "\n", A, B)
#define DEBUGFUNC(F)        DEBUGOUT(F);
#if DBG
	#define DEBUGOUT(S)         printf(S "\n")
	#define DEBUGOUT1(S,A)      printf(S "\n",A)
	#define DEBUGOUT2(S,A,B)    printf(S "\n",A,B)
	#define DEBUGOUT3(S,A,B,C)  printf(S "\n",A,B,C)
	#define DEBUGOUT7(S,A,B,C,D,E,F,G)  printf(S "\n",A,B,C,D,E,F,G)
#else
	#define DEBUGOUT(S)
	#define DEBUGOUT1(S,A)
	#define DEBUGOUT2(S,A,B)
	#define DEBUGOUT3(S,A,B,C)
	#define DEBUGOUT7(S,A,B,C,D,E,F,G)
#endif

#define FALSE               0
#define TRUE                1
#define CMD_MEM_WRT_INVALIDATE          0x0010  /* BIT_4 */
#define PCI_COMMAND_REGISTER            PCIR_COMMAND

#define le16_to_cpu 

struct ixgb_osdep
{
	bus_space_tag_t    mem_bus_space_tag;
	bus_space_handle_t mem_bus_space_handle;
        struct device     *dev;

        struct pci_attach_args ixgb_pa;

        bus_size_t              ixgb_memsize;
        bus_addr_t              ixgb_membase;
};

#define IXGB_WRITE_FLUSH(a) IXGB_READ_REG(a, STATUS)

#define IXGB_READ_REG(a, reg)						\
   bus_space_read_4( ((struct ixgb_osdep *)(a)->back)->mem_bus_space_tag, \
                     ((struct ixgb_osdep *)(a)->back)->mem_bus_space_handle, \
                     IXGB_##reg)

#define IXGB_WRITE_REG(a, reg, value)					\
   bus_space_write_4( ((struct ixgb_osdep *)(a)->back)->mem_bus_space_tag, \
                     ((struct ixgb_osdep *)(a)->back)->mem_bus_space_handle, \
                     IXGB_##reg, value)

#define IXGB_READ_REG_ARRAY(a, reg, offset)				\
   bus_space_read_4( ((struct ixgb_osdep *)(a)->back)->mem_bus_space_tag, \
                     ((struct ixgb_osdep *)(a)->back)->mem_bus_space_handle, \
                     (IXGB_##reg + ((offset) << 2)))

#define IXGB_WRITE_REG_ARRAY(a, reg, offset, value)			\
      bus_space_write_4( ((struct ixgb_osdep *)(a)->back)->mem_bus_space_tag, \
                      ((struct ixgb_osdep *)(a)->back)->mem_bus_space_handle, \
                      (IXGB_##reg + ((offset) << 2)), value)

#ifdef DEBUG
#define IXGB_KASSERT(exp,msg)        do { if (!(exp)) panic msg; } while (0)
#else
#define IXGB_KASSERT(exp,msg)
#endif

#endif  /* _IXGB_OPENBSD_OS_H_ */