/* $OpenBSD: pcivar.h,v 1.43 2006/03/11 22:08:07 brad Exp $ */ /* $NetBSD: pcivar.h,v 1.23 1997/06/06 23:48:05 thorpej Exp $ */ /* * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. * Copyright (c) 1994 Charles Hannum. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by Charles Hannum. * 4. The name of the author may not be used to endorse or promote products * derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #ifndef _DEV_PCI_PCIVAR_H_ #define _DEV_PCI_PCIVAR_H_ /* * Definitions for PCI autoconfiguration. * * This file describes types and functions which are used for PCI * configuration. Some of this information is machine-specific, and is * provided by pci_machdep.h. */ #include #include #include /* * Structures and definitions needed by the machine-dependent header. */ typedef u_int32_t pcireg_t; /* configuration space register XXX */ struct pcibus_attach_args; struct pci_softc; /* * Machine-dependent definitions. */ #if defined(__alpha__) #include #elif defined(__i386__) #include #elif defined(__cats__) #include #elif defined(__powerpc__) #include #elif defined(__sgi__) #include #else #include #endif /* * PCI bus attach arguments. */ struct pcibus_attach_args { char *pba_busname; /* XXX should be common */ bus_space_tag_t pba_iot; /* pci i/o space tag */ bus_space_tag_t pba_memt; /* pci mem space tag */ bus_dma_tag_t pba_dmat; /* DMA tag */ pci_chipset_tag_t pba_pc; int pba_bus; /* PCI bus number */ /* * Interrupt swizzling information. These fields * are only used by secondary busses. */ u_int pba_intrswiz; /* how to swizzle pins */ pcitag_t pba_intrtag; /* intr. appears to come from here */ }; /* * PCI device attach arguments. */ struct pci_attach_args { bus_space_tag_t pa_iot; /* pci i/o space tag */ bus_space_tag_t pa_memt; /* pci mem space tag */ bus_dma_tag_t pa_dmat; /* DMA tag */ pci_chipset_tag_t pa_pc; int pa_flags; /* flags; see below */ u_int pa_device; u_int pa_bus; u_int pa_function; pcitag_t pa_tag; pcireg_t pa_id, pa_class; /* * Interrupt information. * * "Intrline" is used on systems whose firmware puts * the right routing data into the line register in * configuration space. The rest are used on systems * that do not. */ u_int pa_intrswiz; /* how to swizzle pins if ppb */ pcitag_t pa_intrtag; /* intr. appears to come from here */ pci_intr_pin_t pa_intrpin; /* intr. appears on this pin */ pci_intr_line_t pa_intrline; /* intr. routing information */ pci_intr_pin_t pa_rawintrpin; /* unswizzled pin */ }; /* * Flags given in the bus and device attachment args. * * OpenBSD doesn't actually use them yet -- csapuntz@cvs.openbsd.org */ #define PCI_FLAGS_IO_ENABLED 0x01 /* I/O space is enabled */ #define PCI_FLAGS_MEM_ENABLED 0x02 /* memory space is enabled */ #define PCI_FLAGS_MRL_OKAY 0x04 /* Memory Read Line okay */ #define PCI_FLAGS_MRM_OKAY 0x08 /* Memory Read Multiple okay */ #define PCI_FLAGS_MWI_OKAY 0x10 /* Memory Write and Invalidate okay */ /* * */ struct pci_quirkdata { pci_vendor_id_t vendor; /* Vendor ID */ pci_product_id_t product; /* Product ID */ int quirks; /* quirks; see below */ }; #define PCI_QUIRK_MULTIFUNCTION 0x00000001 struct pci_softc { struct device sc_dev; pci_chipset_tag_t sc_pc; void *sc_powerhook; LIST_HEAD(, pci_dev) sc_devs; int sc_bus; }; /* * Locators devices that attach to 'pcibus', as specified to config. */ #define pcibuscf_bus cf_loc[0] #define PCIBUS_UNK_BUS -1 /* wildcarded 'bus' */ /* * Locators for PCI devices, as specified to config. */ #define pcicf_dev cf_loc[0] #define PCI_UNK_DEV -1 /* wildcarded 'dev' */ #define pcicf_function cf_loc[1] #define PCI_UNK_FUNCTION -1 /* wildcarded 'function' */ /* * Configuration space access and utility functions. (Note that most, * e.g. make_tag, conf_read, conf_write are declared by pci_machdep.h.) */ pcireg_t pci_mapreg_type(pci_chipset_tag_t, pcitag_t, int); int pci_mapreg_info(pci_chipset_tag_t, pcitag_t, int, pcireg_t, bus_addr_t *, bus_size_t *, int *); int pci_mapreg_map(struct pci_attach_args *, int, pcireg_t, int, bus_space_tag_t *, bus_space_handle_t *, bus_addr_t *, bus_size_t *, bus_size_t); int pci_io_find(pci_chipset_tag_t, pcitag_t, int, bus_addr_t *, bus_size_t *); int pci_mem_find(pci_chipset_tag_t, pcitag_t, int, bus_addr_t *, bus_size_t *, int *); int pci_get_capability(pci_chipset_tag_t, pcitag_t, int, int *, pcireg_t *); struct pci_matchid { pci_vendor_id_t pm_vid; pci_product_id_t pm_pid; }; int pci_matchbyid(struct pci_attach_args *, const struct pci_matchid *, int); /* * Helper functions for autoconfiguration. */ const char *pci_findvendor(pcireg_t); void pci_devinfo(pcireg_t, pcireg_t, int, char *, size_t); const struct pci_quirkdata * pci_lookup_quirkdata(pci_vendor_id_t, pci_product_id_t); void pciagp_set_pchb(struct pci_attach_args *); /* * Power Management (PCI 2.2) */ #define PCI_PWR_D0 0 #define PCI_PWR_D1 1 #define PCI_PWR_D2 2 #define PCI_PWR_D3 3 #endif /* _DEV_PCI_PCIVAR_H_ */