/* $OpenBSD: udl.h,v 1.5 2009/08/26 12:23:39 mglocker Exp $ */ /* * Copyright (c) 2009 Marcus Glocker * * Permission to use, copy, modify, and distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ /* * Bulk command xfer structure. */ #define UDL_CMD_MAX_XFER_SIZE 1048576 #define UDL_CMD_MAX_DATA_SIZE 512 #define UDL_CMD_MAX_PIXEL_COUNT (UDL_CMD_MAX_DATA_SIZE / 2) #define UDL_CMD_WRITE_HEAD_SIZE 6 #define UDL_CMD_COPY_HEAD_SIZE 9 struct udl_cmd_xfer { struct udl_softc *sc; usbd_xfer_handle xfer; uint8_t busy; uint8_t *buf; }; struct udl_cmd_buf { uint16_t compblock; uint32_t off; uint8_t *buf; }; /* * Our per device structure. */ struct udl_softc { struct device sc_dev; usbd_device_handle sc_udev; usbd_interface_handle sc_iface; usbd_pipe_handle sc_tx_pipeh; /* wsdisplay glue */ struct device *sc_wsdisplay; struct rasops_info sc_ri; uint8_t sc_nscreens; #define UDL_CMD_XFER_COUNT 8 int sc_cmd_xfer_cnt; struct udl_cmd_xfer sc_cmd_xfer[UDL_CMD_XFER_COUNT]; struct udl_cmd_buf sc_cmd_buf; uint8_t *sc_huffman; size_t sc_huffman_size; uint16_t sc_width; uint16_t sc_height; uint8_t sc_depth; uint8_t sc_cursor_on; /* * We use function pointers to the framebuffer manipulation * functions so we can easily differ between compressed and * none-compressed mode. */ void (*udl_fb_off_write) (struct udl_softc *, uint16_t, uint32_t, uint16_t); void (*udl_fb_line_write) (struct udl_softc *, uint16_t, uint32_t, uint32_t, uint32_t); void (*udl_fb_block_write) (struct udl_softc *, uint16_t, uint32_t, uint32_t, uint32_t, uint32_t); void (*udl_fb_buf_write) (struct udl_softc *, uint8_t *, uint32_t, uint32_t, uint16_t); void (*udl_fb_off_copy) (struct udl_softc *, uint32_t, uint32_t, uint16_t); void (*udl_fb_line_copy) (struct udl_softc *, uint32_t, uint32_t, uint32_t, uint32_t, uint32_t); void (*udl_fb_block_copy) (struct udl_softc *, uint32_t, uint32_t, uint32_t, uint32_t, uint32_t, uint32_t); }; /* * Chip commands. */ #define UDL_CTRL_CMD_READ_EDID 0x02 #define UDL_CTRL_CMD_WRITE_1 0x03 #define UDL_CTRL_CMD_READ_1 0x04 #define UDL_CTRL_CMD_POLL 0x06 #define UDL_CTRL_CMD_SET_KEY 0x12 #define UDL_BULK_SOC 0xaf /* start of command token */ #define UDL_BULK_CMD_REG_WRITE_1 0x20 /* write 1 byte to register */ #define UDL_BULK_CMD_EOC 0xa0 /* end of command stack */ #define UDL_BULK_CMD_DECOMP 0xe0 /* send decompression table */ #define UDL_BULK_CMD_FB_BASE 0x60 #define UDL_BULK_CMD_FB_WORD 0x08 #define UDL_BULK_CMD_FB_COMP 0x10 #define UDL_BULK_CMD_FB_WRITE (UDL_BULK_CMD_FB_BASE | 0x00) #define UDL_BULK_CMD_FB_COPY (UDL_BULK_CMD_FB_BASE | 0x02) /* * Chip registers. */ #define UDL_REG_ADDR_START16 0x20 #define UDL_REG_ADDR_STRIDE16 0x23 #define UDL_REG_ADDR_START8 0x26 #define UDL_REG_ADDR_STRIDE8 0x29 #define UDL_REG_SCREEN 0x1f #define UDL_REG_SCREEN_ON 0x00 #define UDL_REG_SCREEN_OFF 0x01 #define UDL_REG_SYNC 0xff /* * Register values for screen resolution initialization. */ uint8_t udl_reg_vals_640[] = { 0x00, 0x99, 0x30, 0x26, 0x94, 0x60, 0xa9, 0xce, 0x60, 0x07, 0xb3, 0x0f, 0x79, 0xff, 0xff, 0x02, 0x80, 0x83, 0xbc, 0xff, 0xfc, 0xff, 0xff, 0x01, 0xe0, 0x01, 0x02, 0xab, 0x13 }; uint8_t udl_reg_vals_800[] = { 0x00, 0x20, 0x3c, 0x7a, 0xc9, 0x93, 0x60, 0xc8, 0xc7, 0x70, 0x53, 0xff, 0xff, 0x21, 0x27, 0x03, 0x20, 0x91, 0x8f, 0xff, 0xff, 0xff, 0xf2, 0x02, 0x58, 0x01, 0x02, 0x40, 0x1f }; uint8_t udl_reg_vals_1024[] = { 0x00, 0x36, 0x18, 0xd5, 0x10, 0x60, 0xa9, 0x7b, 0x33, 0xa1, 0x2b, 0x27, 0x32, 0xff, 0xff, 0x04, 0x00, 0xd9, 0x9a, 0xff, 0xca, 0xff, 0xff, 0x03, 0x00, 0x04, 0x03, 0xc8, 0x32 }; uint8_t udl_reg_vals_1280[] = { 0x00, 0x98, 0xf8, 0x0d, 0x57, 0x2a, 0x55, 0x4d, 0x54, 0xca, 0x0d, 0xff, 0xff, 0x94, 0x43, 0x05, 0x00, 0x9a, 0xa8, 0xff, 0xff, 0xff, 0xf9, 0x04, 0x00, 0x04, 0x02, 0x60, 0x54 }; /* * Encryption. */ uint8_t udl_null_key_1[] = { 0x57, 0xcd, 0xdc, 0xa7, 0x1c, 0x88, 0x5e, 0x15, 0x60, 0xfe, 0xc6, 0x97, 0x16, 0x3d, 0x47, 0xf2 }; /* * Compression. */ struct udl_huffman { uint32_t bit_count; uint32_t bit_pattern; }; #define UDL_HUFFMAN_RECORD_SIZE sizeof(struct udl_huffman) #define UDL_HUFFMAN_RECORDS (65536 + 1) #define UDL_HUFFMAN_BASE (((UDL_HUFFMAN_RECORDS - 1) / 2) * \ UDL_HUFFMAN_RECORD_SIZE) #define UDL_CB_TOTAL_SIZE 512 #define UDL_CB_TAIL_SIZE 4 #define UDL_CB_BODY_SIZE (UDL_CB_TOTAL_SIZE - UDL_CB_TAIL_SIZE) #define UDL_CB_RESTART1_SIZE (UDL_CB_BODY_SIZE - 4) #define UDL_CB_RESTART2_SIZE (UDL_CB_BODY_SIZE - 9) uint8_t udl_decomp_table[] = { 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x01, 0x60, 0x01, 0x00, 0x00, 0x00, 0x61, 0x00, 0x00, 0x00, 0x01, 0x23, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x01, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x01, 0x60, 0x05, 0x00, 0x00, 0x00, 0x61, 0x00, 0x00, 0x00, 0x01, 0x67, 0x00, 0x01, 0x00, 0x01, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0xff, 0x7f, 0x00, 0x00, 0x00, 0x01, 0x89, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x61, 0xab, 0x00, 0x00, 0x00, 0x61, 0x00, 0x00, 0x00, 0x01, 0xcd, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x01, 0x00, 0x0e, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x01, 0x60, 0x0f, 0x00, 0x00, 0x00, 0x61, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0xff, 0x7f, 0x00, 0x00, 0x00, 0x02, 0x01, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x01, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x01, 0x01, 0x22, 0x00, 0x00, 0x01, 0x02, 0x00, 0x00, 0x00, 0x02, 0x33, 0x00, 0x01, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x01, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x44, 0x00, 0x02, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x44, 0x00, 0x02, 0x00, 0x02, 0x00, 0x00, 0x01, 0x00, 0x05, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x67, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x01, 0x00, 0x05, 0x00, 0x00, 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