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# $OpenBSD: files.pxa2x0,v 1.4 2005/01/04 03:47:00 drahn Exp $
# $NetBSD: files.pxa2x0,v 1.6 2004/05/01 19:09:14 thorpej Exp $
#
# Configuration info for Intel PXA2[51]0 CPU support
#
file arch/arm/arm/softintr.c # Use the generic ARM soft interrupt code.
# PXA2[51]0's integrated peripherals bus.
define pxaip { [addr=-1], [size=0], [intr=-1], [index=-1]}
device pxaip
attach pxaip at mainbus
file arch/arm/xscale/pxa2x0.c
file arch/arm/arm/irq_dispatch.S
file arch/arm/xscale/pxa2x0_space.c
#file arch/arm/xscale/pxa2x0_freqchg.S
file arch/arm/xscale/pxa2x0_dma.c
#file arch/arm/xscale/pxa2x0_i2c.c
# Cotulla integrated peripherals.
# INTC controller
device pxaintc
attach pxaintc at pxaip
file arch/arm/xscale/pxa2x0_intr.c pxaintc needs-flag
#defflag opt_pxa2x0_gpio.h PXAGPIO_HAS_GPION_INTRS
# GPIO controller
device pxagpio
attach pxagpio at pxaip
file arch/arm/xscale/pxa2x0_gpio.c pxagpio needs-flag
# clock device
# PXA2x0's built-in timer is compatible to SA-1110.
device saost
attach saost at pxaip
file arch/arm/sa11x0/sa11x0_ost.c saost needs-flag
# NS16550 compatible serial ports
attach com at pxaip with pxauart
file arch/arm/xscale/pxa2x0_com.c pxauart
file arch/arm/xscale/pxa2x0_a4x_space.c pxauart | obio
file arch/arm/xscale/pxa2x0_a4x_io.S pxauart | obio
#defflag opt_com.h FFUARTCONSOLE STUARTCONSOLE BTUARTCONSOLE
# OHCI USB Controller
attach ohci at pxaip with pxaohci
file arch/arm/xscale/pxa2x0_ohci.c pxaohci
# LCD controller
device lcd: wsemuldisplaydev, rasops16, rasops8, rasops4
file arch/arm/xscale/pxa2x0_lcd.c lcd needs-flag
include "dev/pcmcia/files.pcmcia"
# PCMCIA controller
device pxapcic: pcmciabus
attach pxapcic at pxaip
file arch/arm/xscale/pxa2x0_pcic.c pxapcic
# XXX this is a hack to use dev/pcmcia without fdc.c
device fdc
file arch/arm/xscale/pxacom.c com & pxauart needs-flag
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