summaryrefslogtreecommitdiff
path: root/sys/arch/arm32/podulebus/if_eb.c
blob: beba71bb46fe4e8e93c722e3ba25aecd168da497 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543
1544
/* $NetBSD: if_eb.c,v 1.4 1996/03/27 21:49:31 mark Exp $ */

/*
 * Copyright (c) 1995 Mark Brinicombe
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *	This product includes software developed by Mark Brinicombe.
 * 4. The name of the company nor the name of the author may be used to
 *    endorse or promote products derived from this software without specific
 *    prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * RiscBSD kernel project
 *
 * if_eb.c
 *
 * EtherB device driver
 *
 * Created      : 08/07/95
 */

/*
 * SEEQ 80C04 device driver
 */

/*
 * Bugs/possible improvements:
 *	- Does not currently support DMA
 *	- Does not currently support multicasts
 *	- Does not transmit multiple packets in one go
 */

#include <sys/types.h>
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/errno.h>
#include <sys/ioctl.h>
#include <sys/mbuf.h>
#include <sys/socket.h>
#include <sys/syslog.h>
#include <sys/device.h>

#include <net/if.h>
#include <net/if_dl.h>
#include <net/if_types.h>

#ifdef INET
#include <netinet/in.h>
#include <netinet/in_systm.h>
#include <netinet/in_var.h>
#include <netinet/ip.h>
#include <netinet/if_ether.h>
#endif

#include "bpfilter.h"
#if NBPFILTER > 0
#include <net/bpf.h>
#include <net/bpfdesc.h>
#endif

#include <machine/cpu.h>
#include <machine/katelib.h>
#include <machine/io.h>
#include <machine/irqhandler.h>
#include <machine/bootconfig.h>

#include <arm32/podulebus/if_ebreg.h>
#include <arm32/podulebus/podulebus.h>

#define ETHER_MIN_LEN	64
#define ETHER_MAX_LEN	1514
#define ETHER_ADDR_LEN	6

#ifndef EB_TIMEOUT
#define EB_TIMEOUT	60
#endif

/*#define EB_TX_DEBUG*/
/*#define EB_RX_DEBUG*/
/*#define EB_DEBUG*/
/*#define EB_PACKET_DEBUG*/

/* for debugging convenience */
#ifdef EB_DEBUG
#define dprintf(x) printf x
#else
#define dprintf(x)
#endif

#define MY_MANUFACTURER 0x53
#define MY_PODULE       0xe4

/*
 * per-line info and status
 */

struct eb_softc {
	struct device sc_dev;
	irqhandler_t sc_ih;
	int sc_irq;			/* IRQ number */
	podule_t *sc_podule;		/* Our podule */
	int sc_podule_number;		/* Our podule number */
	u_int sc_iobase;		/* base I/O addr */
	struct arpcom sc_arpcom;	/* ethernet common */
	char sc_pktbuf[EB_BUFSIZ]; 	/* frame buffer */
	int sc_config1;			/* Current config1 bits */
	int sc_config2;			/* Current config2 bits */
	int sc_command;			/* Current command bits */
	int sc_irqclaimed;		/* Whether we have an IRQ claimed */
	int sc_rx_ptr;			/* Receive buffer pointer */
	int sc_tx_ptr;			/* Transmit buffer pointer */
};

/*
 * prototypes
 */

static int ebintr __P((void *));
static int eb_init __P((struct eb_softc *));
static int eb_ioctl __P((struct ifnet *, u_long, caddr_t));
static void eb_start __P((struct ifnet *));
static void eb_watchdog __P((int));
static void eb_reinit __P((struct eb_softc *));
static void eb_chipreset __P((struct eb_softc *));
static void eb_ramtest __P((struct eb_softc *));
static int eb_stoptx __P((struct eb_softc *));
static int eb_stoprx __P((struct eb_softc *));
static void eb_stop __P((struct eb_softc *));
static void eb_writebuf __P((struct eb_softc *, u_char *, int, int));
static void eb_readbuf __P((struct eb_softc *, u_char *, int, int));
static void ebread __P((struct eb_softc *, caddr_t, int));
static struct mbuf *ebget __P((caddr_t, int, struct ifnet *));
static void eb_hardreset __P((struct eb_softc *));
static void ebgetpackets __P((struct eb_softc *));
static void ebtxpacket __P((struct eb_softc *));

int ebprobe __P((struct device *, void *, void *));
void ebattach __P((struct device *, struct device *, void *));

/* driver structure for autoconf */

struct cfattach eb_ca = {
	sizeof(struct eb_softc), ebprobe, ebattach
};

struct cfdriver eb_cd = {
	NULL, "eb", DV_IFNET
};

#if 0

/*
 * Dump the chip registers
 */

void
ebdump(iobase)
	u_int iobase;
{
	dprintf(("%08x: %04x %04x %04x %04x %04x %04x %04x %04x\n", iobase,
	    ReadShort(iobase + 0x00), ReadShort(iobase + 0x40),
	    ReadShort(iobase + 0x80), ReadShort(iobase + 0xc0),
	    ReadShort(iobase + 0x100), ReadShort(iobase + 0x140),
	    ReadShort(iobase + 0x180), ReadShort(iobase + 0x1c0)));
}
#endif

/*
 * Dump the interface buffer
 */

void
eb_dump_buffer(sc, offset)
	struct eb_softc *sc;
	int offset;
{
#ifdef EB_PACKET_DEBUG
	u_int iobase = sc->sc_iobase;
	int addr;
	int loop;
	int size;
	int ctrl;
	int ptr;
	
	addr = offset;

	do {
		WriteShort(sc->sc_iobase + EB_8004_COMMAND, sc->sc_command | EB_CMD_FIFO_READ);
		WriteShort(iobase + EB_8004_CONFIG1, sc->sc_config1 | EB_BUFCODE_LOCAL_MEM);
		WriteShort(iobase + EB_8004_DMA_ADDR, addr);

		ptr = ReadShort(iobase + EB_8004_BUFWIN);
		ctrl = ReadShort(iobase + EB_8004_BUFWIN);
		ptr = ((ptr & 0xff) << 8) | ((ptr >> 8) & 0xff);

		if (ptr == 0) break;
		size = ptr - addr;

		printf("addr=%04x size=%04x ", addr, size);
		printf("cmd=%02x st=%02x\n", ctrl & 0xff, ctrl >> 8);

		for (loop = 0; loop < size - 4; loop += 2)
			printf("%04x ", ReadShort(iobase + EB_8004_BUFWIN));
		printf("\n");
		addr = ptr;
	} while (size != 0);
#endif
}

/*
 * Probe routine.
 */

/*
 * int ebprobe(struct device *parent, void *match, void *aux)
 *
 * Probe for the ether3 podule.
 */

int
ebprobe(parent, match, aux)
	struct device *parent;
	void *match;
	void *aux;
{
	struct podule_attach_args *pa = (void *)aux;
	int podule;
	u_int iobase;
	
/*	dprintf(("Probing for SEEQ 8004... \n"));*/

/* Look for a network slot interface */

	podule = findpodule(MY_MANUFACTURER, MY_PODULE, pa->pa_podule_number);

/* Fail if we did not find it */

	if (podule == -1)
		return(0);

	iobase = podules[podule].mod_base + EB_8004_BASE;

/* Reset it  - Why here ? */

	WriteShort(iobase + EB_8004_CONFIG2, EB_CFG2_RESET);
	delay(100);

/* We found it */

	pa->pa_podule_number = podule;
	pa->pa_podule = &podules[podule];

	return(1);
}


/*
 * void ebattach(struct device *parent, struct device *dev, void *aux)
 *
 * Attach podule.
 */

void
ebattach(parent, self, aux)
	struct device *parent;
	struct device *self;
	void *aux;
{
	struct eb_softc *sc = (void *)self;
	struct podule_attach_args *pa = (void *)aux;
	struct ifnet *ifp = &sc->sc_arpcom.ac_if;
	int loop;
	int sum;
	int id;

/*	dprintf(("Attaching %s...\n", sc->sc_dev.dv_xname));*/

/* Note the podule number and validate */

	sc->sc_podule_number = pa->pa_podule_number;
	if (sc->sc_podule_number == -1)
		panic("Podule has disappeared !");

	sc->sc_podule = &podules[sc->sc_podule_number];
	podules[sc->sc_podule_number].attached = 1;

/* Set the address of the controller for easy access */
	
	sc->sc_iobase = sc->sc_podule->mod_base + EB_8004_BASE;

	sc->sc_irqclaimed = 0;

/* Set up the interrupt structure */

	sc->sc_ih.ih_func = ebintr;
	sc->sc_ih.ih_arg = sc;
	sc->sc_ih.ih_level = IPL_NET;
	sc->sc_ih.ih_name = "net: eb";

/* Claim either a network slot interrupt or a podule interrupt */

	if (sc->sc_podule_number >= MAX_PODULES)
		sc->sc_irq = IRQ_NETSLOT;
	else
		sc->sc_irq = IRQ_PODULE /*+ sc->sc_podule_number*/;

	/* Stop the board. */

	eb_chipreset(sc);
	eb_stoptx(sc);
	eb_stoprx(sc);

	/* Initialise ifnet structure. */

	ifp->if_unit = sc->sc_dev.dv_unit;
	ifp->if_name = eb_cd.cd_name;
	ifp->if_start = eb_start;
	ifp->if_ioctl = eb_ioctl;
	ifp->if_watchdog = eb_watchdog;
	ifp->if_flags = IFF_BROADCAST | IFF_NOTRAILERS;

	/* Now we can attach the interface. */

/*	dprintf(("Attaching interface...\n"));*/
	if_attach(ifp);
	ether_ifattach(ifp);

/* Read the station address - the receiver must be off */

	WriteShort(sc->sc_iobase + EB_8004_CONFIG1, EB_BUFCODE_STATION_ADDR);
	
	for (sum = 0, loop = 0; loop < ETHER_ADDR_LEN; ++loop) {
		sc->sc_arpcom.ac_enaddr[loop] =
		    ReadByte(sc->sc_iobase + EB_8004_BUFWIN);
		sum += sc->sc_arpcom.ac_enaddr[loop];
	}

/*
 * Hard code the ether address if we don't have one.
 * Build the address from the machine id.
 */

	if (sum == 0) {
		sc->sc_arpcom.ac_enaddr[0] = 0x00;
		sc->sc_arpcom.ac_enaddr[1] = 0x00;
		sc->sc_arpcom.ac_enaddr[2] = bootconfig.machine_id[3];
		sc->sc_arpcom.ac_enaddr[3] = bootconfig.machine_id[2];
		sc->sc_arpcom.ac_enaddr[4] = bootconfig.machine_id[1];
		sc->sc_arpcom.ac_enaddr[5] = bootconfig.machine_id[0];
	}

	/* Get the product ID */
	
	WriteShort(sc->sc_iobase + EB_8004_CONFIG1, EB_BUFCODE_PRODUCTID);
	id = ReadByte(sc->sc_iobase + EB_8004_BUFWIN);

	/* Print out some information for the user. */

	if ((id & 0xf0) == 0xa0)
		printf(" SEEQ80C04 rev %x address %s", id & 0x0f, ether_sprintf(sc->sc_arpcom.ac_enaddr));
	else
		printf(" SEEQ???? rev %02x address %s", id, ether_sprintf(sc->sc_arpcom.ac_enaddr));

	/* Finally, attach to bpf filter if it is present. */

#if NBPFILTER > 0
/*	dprintf(("Attaching to BPF...\n"));*/
	bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header));
#endif

	/* Should test the RAM */

	eb_ramtest(sc);
	
/*	dprintf(("ebattach() finished.\n"));*/
}


/*
 * Test the RAM on the ethernet card. This does not work yet
 */

void
eb_ramtest(sc)
	struct eb_softc *sc;
{
	register u_int iobase = sc->sc_iobase;
	register int loop;
	register u_int sum = 0;

/*	dprintf(("eb_ramtest()\n"));*/

	/*
	 * Test the buffer memory on the board.
	 * Write simple pattens to it and read them back.
	 */

	/* Set up the whole buffer RAM for writing */

	WriteShort(iobase + EB_8004_CONFIG1, EB_BUFCODE_TX_EAP);
	WriteShort(iobase + EB_8004_BUFWIN, ((EB_BUFFER_SIZE >> 8) - 1));
	WriteShort(iobase + EB_8004_TX_PTR, 0x0000);
	WriteShort(iobase + EB_8004_RX_PTR, EB_BUFFER_SIZE - 2);

	/* Set the write start address and write a pattern */

	eb_writebuf(sc, NULL, 0x0000, 0);

	for (loop = 0; loop < EB_BUFFER_SIZE; loop += 2)
		WriteShort(iobase + EB_8004_BUFWIN, loop);

	/* Set the read start address and verify the pattern */
	
	eb_readbuf(sc, NULL, 0x0000, 0);

	for (loop = 0; loop < EB_BUFFER_SIZE; loop += 2)
		if (ReadShort(iobase + EB_8004_BUFWIN) != loop)
			++sum;

	if (sum != 0)
		dprintf(("sum=%d\n", sum));

	/* Set the write start address and write a pattern */

	eb_writebuf(sc, NULL, 0x0000, 0);

	for (loop = 0; loop < EB_BUFFER_SIZE; loop += 2)
		WriteShort(iobase + EB_8004_BUFWIN, loop ^ (EB_BUFFER_SIZE - 1));

	/* Set the read start address and verify the pattern */

	eb_readbuf(sc, NULL, 0x0000, 0);

	for (loop = 0; loop < EB_BUFFER_SIZE; loop += 2)
		if (ReadShort(iobase + EB_8004_BUFWIN) != (loop ^ (EB_BUFFER_SIZE - 1)))
			++sum;

	if (sum != 0)
		dprintf(("sum=%d\n", sum));

	/* Set the write start address and write a pattern */

	eb_writebuf(sc, NULL, 0x0000, 0);

	for (loop = 0; loop < EB_BUFFER_SIZE; loop += 2)
		WriteShort(iobase + EB_8004_BUFWIN, 0xaa55);

	/* Set the read start address and verify the pattern */

	eb_readbuf(sc, NULL, 0x0000, 0);

	for (loop = 0; loop < EB_BUFFER_SIZE; loop += 2)
		if (ReadShort(iobase + EB_8004_BUFWIN) != 0xaa55)
			++sum;

	if (sum != 0)
		dprintf(("sum=%d\n", sum));

	/* Set the write start address and write a pattern */

	eb_writebuf(sc, NULL, 0x0000, 0);

	for (loop = 0; loop < EB_BUFFER_SIZE; loop += 2)
		WriteShort(iobase + EB_8004_BUFWIN, 0x55aa);

	/* Set the read start address and verify the pattern */

	eb_readbuf(sc, NULL, 0x0000, 0);

	for (loop = 0; loop < EB_BUFFER_SIZE; loop += 2)
		if (ReadShort(iobase + EB_8004_BUFWIN) != 0x55aa)
			++sum;

	if (sum != 0)
		dprintf(("sum=%d\n", sum));

	/* Report */

	if (sum == 0)
		printf(" %dK buffer RAM\n", EB_BUFFER_SIZE / 1024);
	else
		printf(" buffer RAM failed self test, %d faults\n", sum);
}


/* Claim an irq for the board */

void
eb_claimirq(sc)
	struct eb_softc *sc;
{
/* Have we claimed one already ? */

	if (sc->sc_irqclaimed) return;

/* Claim it */

	dprintf(("eb_claimirq(%d)\n", sc->sc_irq));
	if (irq_claim(sc->sc_irq, &sc->sc_ih))
		panic("Cannot install IRQ handler for IRQ %d", sc->sc_irq);

	sc->sc_irqclaimed = 1;
}


/* Release an irq */

void
eb_releaseirq(sc)
	struct eb_softc *sc;
{
/* Have we claimed one ? */

	if (!sc->sc_irqclaimed) return;

	dprintf(("eb_releaseirq(%d)\n", sc->sc_irq));
	if (irq_release(sc->sc_irq, &sc->sc_ih))
		panic("Cannot release IRQ handler for IRQ %d", sc->sc_irq);

	sc->sc_irqclaimed = 0;
}


/*
 * Stop and reinitialise the interface.
 */

static void
eb_reinit(sc)
	struct eb_softc *sc;
{
	int s;

	dprintf(("eb_reinit()\n"));

/* Stop and reinitialise the interface */

	s = splimp();
	eb_stop(sc);
	eb_init(sc);
	(void)splx(s);
}


/*
 * Stop the tx interface.
 *
 * Returns 0 if the tx was already stopped or 1 if it was active
 */

static int
eb_stoptx(sc)
	struct eb_softc *sc;
{
	u_int iobase = sc->sc_iobase;
	int timeout;
	int status;

	dprintf(("eb_stoptx()\n"));

	status = ReadShort(iobase + EB_8004_STATUS);
	if (!(status & EB_STATUS_TX_ON))
		return(0);

/* Stop any tx and wait for confirmation */

	WriteShort(iobase + EB_8004_COMMAND, sc->sc_command | EB_CMD_TX_OFF);

	timeout = 20000;
	do {
		status = ReadShort(iobase + EB_8004_STATUS);
	} while ((status & EB_STATUS_TX_ON) && --timeout > 0);
	if (timeout == 0)
		dprintf(("eb_stoptx: timeout waiting for tx termination\n"));

/* Clear any pending tx interrupt */

	WriteShort(iobase + EB_8004_COMMAND, sc->sc_command | EB_CMD_TX_INTACK);
	return(1);
}


/*
 * Stop the rx interface.
 *
 * Returns 0 if the tx was already stopped or 1 if it was active
 */

static int
eb_stoprx(sc)
	struct eb_softc *sc;
{
	u_int iobase = sc->sc_iobase;
	int timeout;
	int status;

	dprintf(("eb_stoprx()\n"));

	status = ReadShort(iobase + EB_8004_STATUS);
	if (!(status & EB_STATUS_RX_ON))
		return(0);

/* Stop any rx and wait for confirmation */

	WriteShort(iobase + EB_8004_COMMAND, sc->sc_command | EB_CMD_RX_OFF);

	timeout = 20000;
	do {
		status = ReadShort(iobase + EB_8004_STATUS);
	} while ((status & EB_STATUS_RX_ON) && --timeout > 0);
	if (timeout == 0)
		dprintf(("eb_stoprx: timeout waiting for rx termination\n"));

/* Clear any pending rx interrupt */

	WriteShort(iobase + EB_8004_COMMAND, sc->sc_command | EB_CMD_RX_INTACK);
	return(1);
}


/*
 * Stop interface.
 * Stop all IO and shut the interface down
 */

static void
eb_stop(sc)
	struct eb_softc *sc;
{
	u_int iobase = sc->sc_iobase;

	dprintf(("eb_stop()\n"));

/* Stop all IO */

	eb_stoptx(sc);
	eb_stoprx(sc);

	/* Disable rx and tx interrupts */

	sc->sc_command &= (EB_CMD_RX_INTEN | EB_CMD_TX_INTEN);

	/* Clear any pending interrupts */

	WriteShort(iobase + EB_8004_COMMAND, sc->sc_command
	    | EB_CMD_RX_INTACK | EB_CMD_TX_INTACK | EB_CMD_TEST_INTACK
	    | EB_CMD_BW_INTACK);
	dprintf(("st=%08x", ReadShort(iobase + EB_8004_STATUS)));

	/* Release the irq */

	eb_releaseirq(sc);

	/* Put the chip to sleep */

	WriteShort(iobase + EB_8004_CONFIG1, EB_BUFCODE_CONFIG3);
	WriteShort(iobase + EB_8004_BUFWIN, EB_CFG3_SLEEP);

	/* Cancel any watchdog timer */
	
	sc->sc_arpcom.ac_if.if_timer = 0;
}


/*
 * Reset the chip
 * Following this the software registers are reset
 */

static void
eb_chipreset(sc)
	struct eb_softc *sc;
{
	u_int iobase = sc->sc_iobase;

	dprintf(("eb_chipreset()\n"));

/* Reset the controller. Min of 4us delay here */

	WriteShort(iobase + EB_8004_CONFIG2, EB_CFG2_RESET);
	delay(100);

	sc->sc_command = 0;
	sc->sc_config1 = 0;
	sc->sc_config2 = 0;
}


/*
 * Do a hardware reset of the board, and upload the ethernet address again in
 * case the board forgets.
 */

static void
eb_hardreset(sc)
	struct eb_softc *sc;
{
	u_int iobase = sc->sc_iobase;
	int loop;

	dprintf(("eb_hardreset()\n"));

/* Stop any activity */

	eb_stoptx(sc);
	eb_stoprx(sc);

	eb_chipreset(sc);

/* Set up defaults for the registers */

	sc->sc_config2 = 0;
	WriteShort(iobase + EB_8004_CONFIG2, sc->sc_config2);
	sc->sc_command = 0x00;
	sc->sc_config1 = 0;
	WriteShort(iobase + EB_8004_CONFIG1, sc->sc_config1);
	WriteShort(iobase + EB_8004_COMMAND, sc->sc_command);

	WriteShort(iobase + EB_8004_CONFIG1, EB_BUFCODE_TX_EAP);
	WriteShort(iobase + EB_8004_BUFWIN, ((EB_TX_BUFFER_SIZE >> 8) - 1));

/* Write the station address - the receiver must be off */

	WriteShort(sc->sc_iobase + EB_8004_CONFIG1,
	    sc->sc_config1 | EB_BUFCODE_STATION_ADDR);
	for (loop = 0; loop < ETHER_ADDR_LEN; ++loop) {
		WriteByte(sc->sc_iobase + EB_8004_BUFWIN, sc->sc_arpcom.ac_enaddr[loop]);
	}
}


/*
 * write to the buffer memory on the interface
 *
 * If addr is within range for the interface buffer then the buffer
 * address is set to addr.
 * If len != 0 then data is copied from the address starting at buf
 * to the interface buffer.
 */

static void
eb_writebuf(sc, buf, addr, len)
	struct eb_softc *sc;
	u_char *buf;
	int addr;
	int len;
{
	u_int iobase = sc->sc_iobase;
	int loop;
	int timeout;

	dprintf(("writebuf: st=%04x\n", ReadShort(iobase + EB_8004_STATUS)));

/* If we have a valid buffer address set the buffer pointer and direction */

	if (addr >= 0 && addr < EB_BUFFER_SIZE) {
		WriteShort(iobase + EB_8004_CONFIG1, sc->sc_config1 | EB_BUFCODE_LOCAL_MEM);
		WriteShort(iobase + EB_8004_COMMAND, sc->sc_command | EB_CMD_FIFO_WRITE);

		/* Should wait here of FIFO empty flag */

		timeout = 20000;
		while ((ReadShort(iobase + EB_8004_STATUS) & EB_STATUS_FIFO_EMPTY) == 0 && --timeout > 0);


		WriteShort(iobase + EB_8004_DMA_ADDR, addr);
	}

	for (loop = 0; loop < len; loop += 2)
		WriteShort(iobase + EB_8004_BUFWIN, buf[loop] | buf[loop + 1] << 8);


/*	if (len > 0)
		outsw(iobase + EB_8004_BUFWIN, buf, len / 2);*/
}


/*
 * read from the buffer memory on the interface
 *
 * If addr is within range for the interface buffer then the buffer
 * address is set to addr.
 * If len != 0 then data is copied from the interface buffer to the
 * address starting at buf.
 */

static void
eb_readbuf(sc, buf, addr, len)
	struct eb_softc *sc;
	u_char *buf;
	int addr;
	int len;
{
	u_int iobase = sc->sc_iobase;
	int loop;
	int word;
	int timeout;

	dprintf(("readbuf: st=%04x addr=%04x len=%d\n", ReadShort(iobase + EB_8004_STATUS), addr, len));

/* If we have a valid buffer address set the buffer pointer and direction */

	if (addr >= 0 && addr < EB_BUFFER_SIZE) {
		if ((ReadShort(iobase + EB_8004_STATUS) & EB_STATUS_FIFO_DIR) == 0) {
			/* Should wait here of FIFO empty flag */

			timeout = 20000;
			while ((ReadShort(iobase + EB_8004_STATUS) & EB_STATUS_FIFO_EMPTY) == 0 && --timeout > 0);
		}
		WriteShort(iobase + EB_8004_CONFIG1, sc->sc_config1 | EB_BUFCODE_LOCAL_MEM);
		WriteShort(iobase + EB_8004_COMMAND, sc->sc_command | EB_CMD_FIFO_WRITE);

		/* Should wait here of FIFO empty flag */

		timeout = 20000;
		while ((ReadShort(iobase + EB_8004_STATUS) & EB_STATUS_FIFO_EMPTY) == 0 && --timeout > 0);

		WriteShort(iobase + EB_8004_DMA_ADDR, addr);
		WriteShort(iobase + EB_8004_COMMAND, sc->sc_command | EB_CMD_FIFO_READ);

		/* Should wait here of FIFO full flag */

		timeout = 20000;
		while ((ReadShort(iobase + EB_8004_STATUS) & EB_STATUS_FIFO_FULL) == 0 && --timeout > 0);


	}

	for (loop = 0; loop < len; loop += 2) {
		word = ReadShort(iobase + EB_8004_BUFWIN);
		buf[loop] = word & 0xff;
		buf[loop + 1] = word >> 8;
	}

/*	if (len > 0)
		insw(iobase + EB_8004_BUFWIN, buf, len / 2);*/
}


/*
 * Initialize interface.
 *
 * This should leave the interface in a state for packet reception and transmission
 */

static int
eb_init(sc)
	struct eb_softc *sc;
{
	struct ifnet *ifp = &sc->sc_arpcom.ac_if;
	u_int iobase = sc->sc_iobase;
	int s;

	dprintf(("eb_init()\n"));

	s = splimp();

/* Grab an irq */

	eb_claimirq(sc);

	/* First, reset the board. */

	eb_hardreset(sc);

/* Configure rx. */

	dprintf(("Configuring rx...\n"));
	if (ifp->if_flags & IFF_PROMISC)
		sc->sc_config1 = EB_CFG1_PROMISCUOUS;
	else
		sc->sc_config1 = EB_CFG1_BROADCAST;

	sc->sc_config1 |= 0;
	WriteShort(iobase + EB_8004_CONFIG1, sc->sc_config1);

/* Configure TX. */

	dprintf(("Configuring tx...\n"));

	WriteShort(iobase + EB_8004_CONFIG1, sc->sc_config1 | EB_BUFCODE_TX_EAP);
	WriteShort(iobase + EB_8004_BUFWIN, ((EB_TX_BUFFER_SIZE >> 8) - 1));
	WriteShort(iobase + EB_8004_TX_PTR, 0x0000);

	sc->sc_config2 |= (EB_CFG2_OUTPUT | EB_CFG2_RX_TX_DISABLE);
	WriteShort(iobase + EB_8004_CONFIG2, sc->sc_config2);

/* Place a NULL header at the beginning of the transmit area */

	eb_writebuf(sc, NULL, 0x0000, 0);
		
	WriteShort(iobase + EB_8004_BUFWIN, 0x0000);
	WriteShort(iobase + EB_8004_BUFWIN, 0x0000);

	sc->sc_command |= EB_CMD_TX_INTEN;
	WriteShort(iobase + EB_8004_COMMAND, sc->sc_command);

/* Setup the Rx pointers */

	sc->sc_rx_ptr = EB_TX_BUFFER_SIZE;

	WriteShort(iobase + EB_8004_RX_PTR, sc->sc_rx_ptr);
	WriteShort(iobase + EB_8004_RX_END, (sc->sc_rx_ptr >> 8));

/* Place a NULL header at the beginning of the receive area */

	eb_writebuf(sc, NULL, sc->sc_rx_ptr, 0);
		
	WriteShort(iobase + EB_8004_BUFWIN, 0x0000);
	WriteShort(iobase + EB_8004_BUFWIN, 0x0000);

/* Turn on Rx */

	sc->sc_command |= EB_CMD_RX_INTEN;
	WriteShort(iobase + EB_8004_COMMAND, sc->sc_command | EB_CMD_RX_ON);

	/* Set flags appropriately. */
	ifp->if_flags |= IFF_RUNNING;
	ifp->if_flags &= ~IFF_OACTIVE;

	dprintf(("init: st=%04x\n", ReadShort(iobase + EB_8004_STATUS)));

	/* And start output. */
	eb_start(ifp);

	(void)splx(s);
	return(0);
}


/*
 * Start output on interface. Get datagrams from the queue and output them,
 * giving the receiver a chance between datagrams. Call only from splimp or
 * interrupt level!
 */

static void
eb_start(ifp)
	struct ifnet *ifp;
{
	struct eb_softc *sc = eb_cd.cd_devs[ifp->if_unit];
	int s;

	s = splimp();
#ifdef EB_TX_DEBUG
	dprintf(("eb_start()...\n"));
#endif

	/* Don't do anything if output is active. */

	if (sc->sc_arpcom.ac_if.if_flags & IFF_OACTIVE)
		return;

	/* Mark interface as output active */
	
	sc->sc_arpcom.ac_if.if_flags |= IFF_OACTIVE;

	/* tx packets */

	ebtxpacket(sc);
	(void)splx(s);
}


/*
 * Transfer a packet to the interface buffer and start transmission
 *
 * Called at splimp()
 */
 
void
ebtxpacket(sc)
	struct eb_softc *sc;
{
	u_int iobase = sc->sc_iobase;
	struct mbuf *m, *m0;
	int len;

/* Dequeue the next datagram. */

	IF_DEQUEUE(&sc->sc_arpcom.ac_if.if_snd, m0);

/* If there's nothing to send, return. */

	if (!m0) {
		sc->sc_arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
		sc->sc_config2 |= EB_CFG2_OUTPUT;
		WriteShort(iobase + EB_8004_CONFIG2, sc->sc_config2);
#ifdef EB_TX_DEBUG
		dprintf(("tx finished\n"));
#endif
		return;
	}

	/* Give the packet to the bpf, if any. */
#if NBPFILTER > 0
	if (sc->sc_arpcom.ac_if.if_bpf)
		bpf_mtap(sc->sc_arpcom.ac_if.if_bpf, m0);
#endif

#ifdef EB_TX_DEBUG
	dprintf(("Tx new packet\n"));
#endif

/*
 * Copy the datagram to the temporary buffer.
 *
 * Eventually we may as well just copy straight into the interface buffer
 */

	len = 0;
	for (m = m0; m; m = m->m_next) {
		if (m->m_len == 0)
			continue;
		bcopy(mtod(m, caddr_t), sc->sc_pktbuf + len, m->m_len);
		len += m->m_len;
	}
	m_freem(m0);

/* If packet size is odd round up to the next 16 bit boundry */

	if (len % 2)
		++len;

	len = max(len, ETHER_MIN_LEN);
	
	if (len > ETHER_MAX_LEN)
		log(LOG_WARNING, "ea: oversize packet = %d bytes\n", len);

/* Ok we now have a packet len bytes long in our packet buffer */

/* Transfer datagram to board. */

#ifdef EB_TX_DEBUG
	dprintf(("eb: xfr pkt length=%d...\n", len));

	dprintf(("%s-->", ether_sprintf(sc->sc_pktbuf+6)));
	dprintf(("%s\n", ether_sprintf(sc->sc_pktbuf)));
#endif

	sc->sc_config2 &= ~EB_CFG2_OUTPUT;
	WriteShort(iobase + EB_8004_CONFIG2, sc->sc_config2);

/*	dprintf(("st=%04x\n", ReadShort(iobase + EB_8004_STATUS)));*/

/* Write the packet to the interface buffer, skipping the packet header */

	eb_writebuf(sc, sc->sc_pktbuf, 0x0004, len);

/* Follow it with a NULL packet header */

	WriteShort(iobase + EB_8004_BUFWIN, 0x00);
	WriteShort(iobase + EB_8004_BUFWIN, 0x00);

/* Write the packet header */

	eb_writebuf(sc, NULL, 0x0000, 0);

	WriteShort(iobase + EB_8004_BUFWIN, (((len+4) & 0xff00) >> 8) | (((len+4) & 0xff) << 8));
	WriteShort(iobase + EB_8004_BUFWIN, 0x00aa);

	WriteShort(iobase + EB_8004_TX_PTR, 0x0000);

/*	dprintf(("st=%04x\n", ReadShort(iobase + EB_8004_STATUS)));*/

#ifdef EB_DEBUG
	eb_dump_buffer(sc, 0);
#endif

/* Now transmit the datagram. */

/*	dprintf(("st=%04x\n", ReadShort(iobase + EB_8004_STATUS)));*/
	WriteShort(iobase + EB_8004_COMMAND, sc->sc_command | EB_CMD_TX_ON);
#ifdef EB_TX_DEBUG
	dprintf(("st=%04x\n", ReadShort(iobase + EB_8004_STATUS)));
	dprintf(("tx: queued\n"));
#endif
}


/*
 * Ethernet controller interrupt.
 */

int
ebintr(arg)
	void *arg;
{
	register struct eb_softc *sc = arg;
	u_int iobase = sc->sc_iobase;
	int status, s;
	u_int txstatus;

	dprintf(("ebintr: "));

/* Get the controller status */

	status = ReadShort(iobase + EB_8004_STATUS);
        dprintf(("st=%04x ", status));	

/* Tx interrupt ? */

	if (status & EB_STATUS_TX_INT) {
		dprintf(("txint "));

/* Acknowledge the interrupt */

		WriteShort(iobase + EB_8004_COMMAND, sc->sc_command
		    | EB_CMD_TX_INTACK);

		eb_readbuf(sc, (u_char *)&txstatus, 0x0000, 4);

#ifdef EB_TX_DEBUG		
		dprintf(("txstatus=%08x\n", txstatus));
#endif
		txstatus = (txstatus >> 24) & 0xff;

/*
 * Did it succeed ? Did we collide ?
 *
 * The exact proceedure here is not clear. We should get
 * an interrupt on a sucessfull tx or on a collision.
 * The done flag is set after successfull tx or 16 collisions
 * We should thus get a interrupt for each of collision
 * and the done bit should not be set. However it does appear
 * to be set at the same time as the collision bit ...
 *
 * So we will count collisions and output errors and will assume
 * that if the done bit is set the packet was transmitted.
 * Stats may be wrong if 16 collisions occur on a packet
 * as the done flag should be set but the packet may not have been
 * transmitted. so the output count might not require incrementing
 * if the 16 collisions flags is set. I don;t know abou this until
 * it happens.
 */

		if (txstatus & EB_TXHDR_COLLISION) {
			sc->sc_arpcom.ac_if.if_collisions++;
		} else if (txstatus & EB_TXHDR_ERROR_MASK) {
			sc->sc_arpcom.ac_if.if_oerrors++;
		}

/*		if (txstatus & EB_TXHDR_ERROR_MASK) {
			log(LOG_WARNING, "tx packet error =%02x\n", txstatus);
		}*/

		if (txstatus & EB_PKTHDR_DONE) {
			sc->sc_arpcom.ac_if.if_opackets++;

			/* Tx next packet */

			s = splimp();
			ebtxpacket(sc);
			(void)splx(s);
		}
	}

/* Rx interrupt ? */

	if (status & EB_STATUS_RX_INT) {
		dprintf(("rxint "));

/* Acknowledge the interrupt */

		WriteShort(iobase + EB_8004_COMMAND, sc->sc_command
		    | EB_CMD_RX_INTACK);

/* Install a watchdog timer needed atm to fixed rx lockups */

		sc->sc_arpcom.ac_if.if_timer = EB_TIMEOUT;

/* Processes the received packets */
		ebgetpackets(sc);

/* Make sure the receiver is on */

/*		if ((status & EB_STATUS_RX_ON) == 0) {
			WriteShort(iobase + EB_8004_COMMAND, sc->sc_command
			    | EB_CMD_RX_ON);
			printf("rxintr: rx is off st=%04x\n",status);
		}*/
	}

#ifdef EB_DEBUG
	status = ReadShort(iobase + EB_8004_STATUS);
        dprintf(("st=%04x\n", status));
#endif
	return(0);
}

void
ebgetpackets(sc)
	struct eb_softc *sc;
{
	u_int iobase = sc->sc_iobase;
	int addr;
	int len;
	int ctrl;
	int ptr;
	int pack;
	int status;
	u_int rxstatus;

/* We start from the last rx pointer position */

	addr = sc->sc_rx_ptr;
	sc->sc_config2 &= ~EB_CFG2_OUTPUT;
	WriteShort(iobase + EB_8004_CONFIG2, sc->sc_config2);

	do {
/* Read rx header */

		eb_readbuf(sc, (u_char *)&rxstatus, addr, 4);
		
/* Split the packet header */

		ptr = ((rxstatus & 0xff) << 8) | ((rxstatus >> 8) & 0xff);
		ctrl = (rxstatus >> 16) & 0xff;
		status = (rxstatus >> 24) & 0xff;

#ifdef EB_RX_DEBUG
		dprintf(("addr=%04x ptr=%04x ctrl=%02x status=%02x\n", addr, ptr, ctrl, status));
#endif

/* Zero packet ptr ? then must be null header so exit */

		if (ptr == 0) break;

/* Get packet length */
	
		len = (ptr - addr) - 4;

		if (len < 0) {
			len += EB_RX_BUFFER_SIZE;
		}

#ifdef EB_RX_DEBUG
		dprintf(("len=%04x\n", len));
#endif

/* Has the packet rx completed ? if not then exit */

		if ((status & EB_PKTHDR_DONE) == 0)
			break;

/* Did we have any errors ? then note error and go to next packet */

		if (status & 0x0f) {
			++sc->sc_arpcom.ac_if.if_ierrors;
			printf("rx packet error (%02x) - dropping packet\n", status & 0x0f);
/*			sc->sc_config2 |= EB_CFG2_OUTPUT;
			WriteShort(iobase + EB_8004_CONFIG2, sc->sc_config2);
			eb_reinit(sc);
			return; */
			addr = ptr;
			continue;
		}

/* Is the packet too big ? - this will probably be trapped above as a receive error */

		if (len > ETHER_MAX_LEN) {
			++sc->sc_arpcom.ac_if.if_ierrors;
			printf("rx packet size error len=%d\n", len);
/*			sc->sc_config2 |= EB_CFG2_OUTPUT;
			WriteShort(iobase + EB_8004_CONFIG2, sc->sc_config2);
			eb_reinit(sc);
			return;*/
			addr = ptr;
			continue;
		}

		eb_readbuf(sc, sc->sc_pktbuf, addr + 4, len);

#ifdef EB_RX_DEBUG
		dprintf(("%s-->", ether_sprintf(sc->sc_pktbuf+6)));
		dprintf(("%s\n", ether_sprintf(sc->sc_pktbuf)));
#endif
		sc->sc_arpcom.ac_if.if_ipackets++;
		/* Pass data up to upper levels. */
		ebread(sc, (caddr_t)sc->sc_pktbuf, len);

		addr = ptr;
		++pack;
	} while (len != 0);

	sc->sc_config2 |= EB_CFG2_OUTPUT;
	WriteShort(iobase + EB_8004_CONFIG2, sc->sc_config2);

#ifdef EB_RX_DEBUG
	dprintf(("new rx ptr=%04x\n", addr));
#endif

/* Store new rx pointer */

	sc->sc_rx_ptr = addr;
	WriteShort(iobase + EB_8004_RX_END, (sc->sc_rx_ptr >> 8));

/* Make sure the receiver is on */

	WriteShort(iobase + EB_8004_COMMAND, sc->sc_command
	    | EB_CMD_RX_ON);

}


/*
 * Pass a packet up to the higher levels.
 */

static void
ebread(sc, buf, len)
	struct eb_softc *sc;
	caddr_t buf;
	int len;
{
	register struct ether_header *eh;
	struct mbuf *m;

	eh = (struct ether_header *)buf;
	len -= sizeof(struct ether_header);
	if (len <= 0)
		return;

	/* Pull packet off interface. */
	m = ebget(buf, len, &sc->sc_arpcom.ac_if);
	if (m == 0)
		return;

#if NBPFILTER > 0
	/*
	 * Check if there's a BPF listener on this interface.
	 * If so, hand off the raw packet to bpf.
	 */
	if (sc->sc_arpcom.ac_if.if_bpf) {
		bpf_tap(sc->sc_arpcom.ac_if.if_bpf, buf, len + sizeof(struct ether_header));
/*		bpf_mtap(sc->sc_arpcom.ac_if.if_bpf, m);*/

	}
#endif

	ether_input(&sc->sc_arpcom.ac_if, eh, m);
}

/*
 * Pull read data off a interface.  Len is length of data, with local net
 * header stripped.  We copy the data into mbufs.  When full cluster sized
 * units are present we copy into clusters.
 */

struct mbuf *
ebget(buf, totlen, ifp)
        caddr_t buf;
        int totlen;
        struct ifnet *ifp;
{
        struct mbuf *top, **mp, *m;
        int len;
        register caddr_t cp = buf;
        char *epkt;

        buf += sizeof(struct ether_header);
        cp = buf;
        epkt = cp + totlen;

        MGETHDR(m, M_DONTWAIT, MT_DATA);
        if (m == 0)
                return 0;
        m->m_pkthdr.rcvif = ifp;
        m->m_pkthdr.len = totlen;
        m->m_len = MHLEN;
        top = 0;
        mp = &top;

        while (totlen > 0) {
                if (top) {
                        MGET(m, M_DONTWAIT, MT_DATA);
                        if (m == 0) {
                                m_freem(top);
                                return 0;
                        }
                        m->m_len = MLEN;
                }
                len = min(totlen, epkt - cp);
                if (len >= MINCLSIZE) {
                        MCLGET(m, M_DONTWAIT);
                        if (m->m_flags & M_EXT)
                                m->m_len = len = min(len, MCLBYTES);
                        else
                                len = m->m_len;
                } else {
                        /*
                         * Place initial small packet/header at end of mbuf.
                         */
                        if (len < m->m_len) {
                                if (top == 0 && len + max_linkhdr <= m->m_len)
                                        m->m_data += max_linkhdr;
                                m->m_len = len;
                        } else
                                len = m->m_len;
                }
                bcopy(cp, mtod(m, caddr_t), (unsigned)len);
                cp += len;
                *mp = m;
                mp = &m->m_next;
                totlen -= len;
                if (cp == epkt)
                        cp = buf;
        }

        return top;
}

/*
 * Process an ioctl request. This code needs some work - it looks pretty ugly.
 */
static int
eb_ioctl(ifp, cmd, data)
	register struct ifnet *ifp;
	u_long cmd;
	caddr_t data;
{
	struct eb_softc *sc = eb_cd.cd_devs[ifp->if_unit];
	struct ifaddr *ifa = (struct ifaddr *)data;
/*	struct ifreq *ifr = (struct ifreq *)data;*/
	int s, error = 0;

	s = splimp();

	if ((error = ether_ioctl(ifp, &sc->sc_arpcom, cmd, data)) > 0) {
		splx(s);
		return error;
	}

	switch (cmd) {

	case SIOCSIFADDR:
		ifp->if_flags |= IFF_UP;
		dprintf(("if_flags=%08x\n", ifp->if_flags));

		switch (ifa->ifa_addr->sa_family) {
#ifdef INET
		case AF_INET:
			arp_ifinit(&sc->sc_arpcom, ifa);
			dprintf(("Interface eb is coming up (AF_INET)\n"));
			eb_init(sc);
			break;
#endif
		default:
			dprintf(("Interface eb is coming up (default)\n"));
			eb_init(sc);
			break;
		}
		break;

	case SIOCSIFFLAGS:
		dprintf(("if_flags=%08x\n", ifp->if_flags));
		if ((ifp->if_flags & IFF_UP) == 0 &&
		    (ifp->if_flags & IFF_RUNNING) != 0) {
			/*
			 * If interface is marked down and it is running, then
			 * stop it.
			 */
			dprintf(("Interface ea is stopping\n"));
			eb_stop(sc);
			ifp->if_flags &= ~IFF_RUNNING;
		} else if ((ifp->if_flags & IFF_UP) != 0 &&
		    	   (ifp->if_flags & IFF_RUNNING) == 0) {
			/*
			 * If interface is marked up and it is stopped, then
			 * start it.
			 */
			dprintf(("Interface eb is restarting(1)\n"));
			eb_init(sc);
		} else {
			/*
			 * Some other important flag might have changed, so
			 * reset.
			 */
			dprintf(("Interface eb is reinitialising\n"));
			eb_reinit(sc);
		}
		break;

	default:
		error = EINVAL;
		break;
	}

	(void)splx(s);
	return error;
}

/*
 * Device timeout routine.
 *
 * Ok I am not sure exactly how the device timeout should work....
 * Currently what will happens is that that the device timeout is only
 * set when a packet it received. This indicates we are on an active
 * network and thus we should expect more packets. If non arrive in
 * in the timeout period then we reinitialise as we may have jammed.
 * We zero the timeout at this point so that we don't end up with
 * an endless stream of timeouts if the network goes down.
 */

static void
eb_watchdog(unit)
	int unit;
{
	struct eb_softc *sc = eb_cd.cd_devs[unit];

	log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
	sc->sc_arpcom.ac_if.if_oerrors++;
	dprintf(("eb_watchdog: "));
	dprintf(("st=%04x\n", ReadShort(sc->sc_iobase + EB_8004_STATUS)));

	/* Kick the interface */

	eb_reinit(sc);

	sc->sc_arpcom.ac_if.if_timer = 0;
}

/* End of if_ea.c */