1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
|
/* $OpenBSD: cpu.h,v 1.37 2003/07/30 21:24:19 mickey Exp $ */
/*
* Copyright (c) 2000-2002 Michael Shalayeff
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Michael Shalayeff.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Copyright (c) 1988-1994, The University of Utah and
* the Computer Systems Laboratory at the University of Utah (CSL).
* All rights reserved.
*
* Permission to use, copy, modify and distribute this software is hereby
* granted provided that (1) source code retains these copyright, permission,
* and disclaimer notices, and (2) redistributions including binaries
* reproduce the notices in supporting documentation, and (3) all advertising
* materials mentioning features or use of this software display the following
* acknowledgement: ``This product includes software developed by the
* Computer Systems Laboratory at the University of Utah.''
*
* THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS
* IS" CONDITION. THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF
* ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
*
* CSL requests users of this software to return to csl-dist@cs.utah.edu any
* improvements that they make and grant CSL redistribution rights.
*
* Utah $Hdr: cpu.h 1.19 94/12/16$
*/
#ifndef _MACHINE_CPU_H_
#define _MACHINE_CPU_H_
#include <machine/trap.h>
#include <machine/frame.h>
/*
* CPU types and features
*/
#define HPPA_FTRS_TLBU 0x00000001
#define HPPA_FTRS_BTLBU 0x00000002
#define HPPA_FTRS_HVT 0x00000004
#define HPPA_FTRS_W32B 0x00000008
#ifndef _LOCORE
/* types */
enum hppa_cpu_type {
hpcx, hpcxs, hpcxt, hpcxta, hpcxl, hpcxl2, hpcxu, hpcxu2, hpcxw
};
extern enum hppa_cpu_type cpu_type;
extern const char *cpu_typename;
extern int cpu_hvers;
#endif
/*
* COPR/SFUs
*/
#define HPPA_FPUS 0xc0
#define HPPA_FPUVER(w) (((w) & 0x003ff800) >> 11)
#define HPPA_FPU_OP(w) ((w) >> 26)
#define HPPA_FPU_UNMPL 0x9
#define HPPA_FPU_I 0x01
#define HPPA_FPU_U 0x02
#define HPPA_FPU_O 0x04
#define HPPA_FPU_Z 0x08
#define HPPA_FPU_V 0x10
#define HPPA_FPU_D 0x20
#define HPPA_FPU_T 0x40
#define HPPA_FPU_XMASK 0x7f
#define HPPA_FPU_T_POS 25
#define HPPA_FPU_RM 0x00000600
#define HPPA_FPU_CQ 0x00fff800
#define HPPA_FPU_C 0x04000000
#define HPPA_FPU_FLSH 27
#define HPPA_FPU_INIT (0)
#define HPPA_FPU_FORK(s) ((s) & ~((u_int64_t)(HPPA_FPU_XMASK)<<32))
#define HPPA_PMSFUS 0x20 /* ??? */
/*
* Exported definitions unique to hp700/PA-RISC cpu support.
*/
#define HPPA_PGALIAS 0x00100000
#define HPPA_PGAMASK 0xfff00000
#define HPPA_PGAOFF 0x000fffff
#define HPPA_IOSPACE 0xf0000000
#define HPPA_IOBCAST 0xfffc0000
#define HPPA_PDC_LOW 0xef000000
#define HPPA_PDC_HIGH 0xf1000000
#define HPPA_FPA 0xfff80000
#define HPPA_FLEX_DATA 0xfff80001
#define HPPA_DMA_ENABLE 0x00000001
#define HPPA_FLEX_MASK 0xfffc0000
#define HPPA_FLEX(a) (((a) & HPPA_FLEX_MASK) >> 18)
#define HPPA_SPA_ENABLE 0x00000020
#define HPPA_NMODSPBUS 64
#define CPU_CLOCKUPDATE() do { \
register_t __itmr; \
__asm __volatile("mfctl %%cr16, %0" : "=r" (__itmr)); \
cpu_itmr = __itmr; \
__itmr += cpu_hzticks; \
__asm __volatile("mtctl %0, %%cr16" :: "r" (__itmr)); \
} while (0)
#define clockframe trapframe
#define CLKF_PC(framep) ((framep)->tf_iioq_head)
#define CLKF_INTR(framep) ((framep)->tf_flags & TFF_INTR)
#define CLKF_USERMODE(framep) ((framep)->tf_flags & T_USER)
#define CLKF_SYSCALL(framep) ((framep)->tf_flags & TFF_SYS)
#define signotify(p) (setsoftast())
#define need_resched() (want_resched = 1, setsoftast())
#define need_proftick(p) ((p)->p_flag |= P_OWEUPC, setsoftast())
#ifndef _LOCORE
#ifdef _KERNEL
#define MD_CACHE_FLUSH 0
#define MD_CACHE_PURGE 1
#define MD_CACHE_CTL(a,s,t) \
(((t)? pdcache : fdcache) (HPPA_SID_KERNEL,(vaddr_t)(a),(s)))
extern int want_resched;
extern u_int cpu_itmr, cpu_hzticks;
#define DELAY(x) delay(x)
extern int (*cpu_desidhash)(void);
void delay(u_int us);
void hppa_init(paddr_t start);
void trap(int type, struct trapframe *frame);
int spcopy(pa_space_t ssp, const void *src,
pa_space_t dsp, void *dst, size_t size);
int spstrcpy(pa_space_t ssp, const void *src,
pa_space_t dsp, void *dst, size_t size, size_t *rsize);
int copy_on_fault(void);
void switch_trampoline(void);
int cpu_dumpsize(void);
int cpu_dump(void);
#endif
/*
* Boot arguments stuff
*/
#define BOOTARG_LEN (NBPG)
#define BOOTARG_OFF (0x10000)
/*
* CTL_MACHDEP definitions.
*/
#define CPU_CONSDEV 1 /* dev_t: console terminal device */
#define CPU_MAXID 2 /* number of valid machdep ids */
#define CTL_MACHDEP_NAMES { \
{ 0, 0 }, \
{ "console_device", CTLTYPE_STRUCT }, \
}
#endif
#endif /* _MACHINE_CPU_H_ */
|
