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/*	$OpenBSD: m88110_fp.S,v 1.3 2007/12/02 21:32:08 miod Exp $	*/

/*
 * Copyright (c) 2007, Miodrag Vallat.
 *
 * Permission to use, copy, modify, and distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice, this permission notice, and the disclaimer below
 * appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

#include "assym.h"

#include <machine/asm.h>
#include <machine/trap.h>

/* FPECR bits */
#define	FIOV_BIT	7
#define	FUNIMP_BIT	6
#define	FPRV_BIT	5
#define	FROP_BIT	4
#define	FDVZ_BIT	3
#define	FUNF_BIT	2
#define	FOVF_BIT	1
#define	FINX_BIT	0

/* FPSR and FPCR exception bits */
#define	EFINV_BIT	4
#define	EFDVZ_BIT	3
#define	EFUNF_BIT	2
#define	EFOVF_BIT	1
#define	EFINX_BIT	0

ASENTRY(m88110_fpu_exception)
	/*
	 * On entry, r30 point to the exception frame.
	 * Save our guts so that we can call other functions.
	 */
	subu	r31, r31, 16
	st	r1,  r31, 0
	st	r30, r31, 4

	/*
	 * We never saved the floating point exception and control
	 * registers. Do it now, and then decide what kind of exception
	 * we've got.
	 * Note that we can access the control registers even if the
	 * FPU is disabled.
	 */
	fldcr	r2,  FPECR
	fldcr	r3,  FPSR
	fldcr	r4,  FPCR
	st	r2,  r30, EF_FPECR * 4
	st	r3,  r30, EF_FPSR * 4
	st	r4,  r30, EF_FPCR * 4

	/*
	 * Check for floating point unimplemented bit first, as other
	 * bits are undefined if this bit is set.
	 */
	bb1	FUNIMP_BIT, r2, _ASM_LABEL(m88110_funimp)

	/*
	 * Check for the other exceptions.
	 *
	 * FOVF and FUNF need to be checked before FINX.
	 */
	bb1	FIOV_BIT, r2, _ASM_LABEL(m88110_fiov)
	bb1	FPRV_BIT, r2, _ASM_LABEL(m88110_fprv)
	bb1	FROP_BIT, r2, _ASM_LABEL(m88110_frop)
	bb1	FDVZ_BIT, r2, _ASM_LABEL(m88110_fdvz)
	bb1	FUNF_BIT, r2, _ASM_LABEL(m88110_funf)
	bb1	FOVF_BIT, r2, _ASM_LABEL(m88110_fovf)
	bb1	FINX_BIT, r2, _ASM_LABEL(m88110_finx)

	/*
	 * If control goes here, we got a floating point exception,
	 * but no cause bit is set. This shouldn't happen; if it does,
	 * just fall through the unimplemented instruction code.
	 */

ASLOCAL(m88110_funimp)
	/*
	 * Check if the fpu was enabled.
	 */
	ld	r5, r30, EF_EPSR * 4
	/* FPE_FLTINV */
	bb1	PSR_FPU_DISABLE_BIT, r5, _ASM_LABEL(m88110_fpeflt)

	/*
	 * We should check the faulting instruction here.
	 * This can be:
	 * - fsqrt (unimplemented)
	 * - any valid fp instruction operating on an odd register pair
	 * - any bogus fp instruction.
	 */

	/* XXX TBD */

	br	_ASM_LABEL(m88110_fpeflt)

/*
 * Floating-point integer overflow.
 *
 * Register it in the status register, and if this exception is allowed
 * in the control register, send a trap.
 */
ASLOCAL(m88110_fiov)
	set	r3,  r3,  1<EFINV_BIT>
	fstcr	r3,  FPSR

	/* FPE_FLTSUB */
	bb1	EFINV_BIT, r4, _ASM_LABEL(m88110_fpeflt)

	jmp.n	r1
	 addu	r31, r31, 16

/*
 * Floating-point privilege violation.
 *
 * This exception is caused by fldcr, fstcr or fxcr with either a
 * non-existing register (fcr1-fcr61), or fcr0 from userland.
 */ 
ASLOCAL(m88110_fprv)
	/* ILL_PRVREG */
	or	r2, r0, T_PRIVINFLT
	bsr.n	_C_LABEL(m88110_trap)
	 or	r3, r0, r30

	ld	r1,  r31, 0
	jmp.n	r1
	 addu	r31, r31, 16

/*
 * Floating-point reserved operand.
 */
ASLOCAL(m88110_frop)
	set	r3,  r3,  1<EFINV_BIT>
	fstcr	r3,  FPSR

	/* XXX TBD lots of analysis to do here... */

	/* FPE_FLTINV */
	bb1	EFINV_BIT, r4, _ASM_LABEL(m88110_fpeflt)

	/* XXX TBD ... and then decide on a value... */

	jmp.n	r1
	 addu	r31, r31, 16

/*
 * Floating-point divide by zero.
 *
 * Register it in the status register, and if this exception is allowed
 * in the control register, send a trap.
 */
ASLOCAL(m88110_fdvz)
	set	r3,  r3,  1<EFDVZ_BIT>
	fstcr	r3,  FPSR

	/* FPE_INTDIV */
	bb1	EFDVZ_BIT, r4, _ASM_LABEL(m88110_fpeflt)

	jmp.n	r1
	 addu	r31, r31, 16

/*
 * Floating-point underflow.
 */
ASLOCAL(m88110_funf)
	set	r3,  r3,  1<EFUNF_BIT>
	set	r3,  r3,  1<EFINX_BIT>
	fstcr	r3,  FPSR

	/* FPE_FLTUND */
	bb1	EFUNF_BIT, r4, _ASM_LABEL(m88110_fpeflt)

	/* FPE_FLTRES */
	bb1	EFINX_BIT, r4, _ASM_LABEL(m88110_fpeflt)

	/* XXX TBD check rounding mode, check destination register, write
	   default value to it/them. */

	jmp.n	r1
	 addu	r31, r31, 16


/*
 * Floating-point overflow.
 */
ASLOCAL(m88110_fovf)
	set	r3,  r3,  1<EFOVF_BIT>
	set	r3,  r3,  1<EFINX_BIT>
	fstcr	r3,  FPSR

	/* FPE_FLTOVF */
	bb1	EFOVF_BIT, r4, _ASM_LABEL(m88110_fpeflt)

	/* FPE_FLTRES */
	bb1	EFINX_BIT, r4, _ASM_LABEL(m88110_fpeflt)

	/* XXX TBD check rounding mode, check destination register, write
	   default value to it/them. */

	jmp.n	r1
	 addu	r31, r31, 16

/*
 * Floating-point inexact.
 *
 * Register it in the status register, and if this exception is allowed
 * in the control register, send a trap.
 */
ASLOCAL(m88110_finx)
	set	r3,  r3,  1<EFINX_BIT>
	fstcr	r3,  FPSR

	/* FPE_FLTRES */
	bb1	EFINX_BIT, r4, _ASM_LABEL(m88110_fpeflt)

	jmp.n	r1
	 addu	r31, r31, 16

ASLOCAL(m88110_fpeflt)
	or	r2, r0, T_FPEPFLT
	bsr.n	_C_LABEL(m88110_trap)
	 or	r3, r0, r30

	ld	r1,  r31, 0
	jmp.n	r1
	 addu	r31, r31, 16