1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
|
/* $OpenBSD: asm_macro.h,v 1.7 2001/01/14 20:25:23 smurph Exp $ */
/*
* Mach Operating System
* Copyright (c) 1993-1991 Carnegie Mellon University
* Copyright (c) 1991 OMRON Corporation
* All Rights Reserved.
*
* Permission to use, copy, modify and distribute this software and its
* documentation is hereby granted, provided that both the copyright
* notice and this permission notice appear in all copies of the
* software, derivative works or modified versions, and any portions
* thereof, and that both notices appear in supporting documentation.
*
* CARNEGIE MELLON AND OMRON ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS IS"
* CONDITION. CARNEGIE MELLON AND OMRON DISCLAIM ANY LIABILITY OF ANY KIND
* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
*
* Carnegie Mellon requests users of this software to return to
*
* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
* School of Computer Science
* Carnegie Mellon University
* Pittsburgh PA 15213-3890
*
* any improvements or extensions that they make and grant Carnegie the
* rights to redistribute these changes.
*/
#ifndef __MACHINE_M88K_ASM_MACRO_H__
#define __MACHINE_M88K_ASM_MACRO_H__
/*
** Various compiler macros used for speed and efficiency.
** Anyone can include.
*/
/*
* PSR_TYPE is the type of the Process Status Register.
*/
typedef unsigned long m88k_psr_type;
/*
* disable_interrupts_return_psr()
*
* The INTERRUPT_DISABLE bit is set in the PSR and the *PREVIOUS*
* PSR is returned. Intended to be used with set_psr() [below] as in:
*
* {
* m88k_psr_type psr;
* .
* .
* psr = disable_interrupts_return_psr();
* .
* SHORT [time-wise] CRITICAL SECTION HERE
* .
* set_psr(psr);
* .
* .
*/
static inline m88k_psr_type disable_interrupts_return_psr(void)
{
m88k_psr_type temp, oldpsr;
asm volatile ("ldcr %0, cr1" : "=r" (oldpsr));
asm volatile ("set %1, %0, 1<1>" : "=r" (oldpsr), "=r" (temp));
asm volatile ("stcr %0, cr1" : "=r" (temp));
asm volatile ("tcnd ne0, r0, 0");
return oldpsr;
}
#define disable_interrupt() (void)disable_interrupts_return_psr()
/*
* Sets the PSR. See comments above.
*/
static inline void set_psr(m88k_psr_type psr)
{
asm volatile ("stcr %0, cr1" :: "r" (psr));
}
/*
* Enables interrupts.
*/
static inline m88k_psr_type enable_interrupts_return_psr(void)
{
m88k_psr_type temp, oldpsr; /* need a temporary register */
asm volatile ("ldcr %0, cr1" : "=r" (oldpsr));
asm volatile ("clr %1, %0, 1<1>" : "=r" (oldpsr), "=r" (temp));
asm volatile ("stcr %0, cr1" : "=r" (temp));
return oldpsr;
}
#define enable_interrupt() (void)enable_interrupts_return_psr()
#define db_enable_interrupt enable_interrupt
#define db_disable_interrupt disable_interrupt
/*
* flushes the data pipeline.
*/
static inline void flush_pipeline()
{
asm volatile ("tcnd ne0, r0, 0");
}
#define db_flush_pipeline flush_pipeline
#endif __MACHINE_M88K_ASM_MACRO_H__
|
