1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
|
/* $NetBSD: cpu.h,v 1.1 1996/09/30 16:34:21 ws Exp $ */
/*
* Copyright (C) 1995, 1996 Wolfgang Solfrank.
* Copyright (C) 1995, 1996 TooLs GmbH.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by TooLs GmbH.
* 4. The name of TooLs GmbH may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _MACHINE_CPU_H_
#define _MACHINE_CPU_H_
#include <machine/frame.h>
struct machvec {
void (*splx) __P((int));
void (*irq_establish) __P((int, int, void (*)(void *), void *));
};
extern struct machvec machine_interface;
#include <machine/psl.h>
#define irq_establish(irq, level, handler, arg) \
((*machine_interface.irq_establish)((irq), (level), (handler), (arg)))
#define CLKF_USERMODE(frame) (((frame)->srr1 & PSL_PR) != 0)
#define CLKF_BASEPRI(frame) ((frame)->pri == 0)
#define CLKF_PC(frame) ((frame)->srr0)
#define CLKF_INTR(frame) ((frame)->depth != 0)
#define cpu_swapout(p)
#define cpu_wait(p)
extern void delay __P((unsigned));
#define DELAY(n) delay(n)
extern volatile int want_resched;
extern volatile int astpending;
#define need_resched() (want_resched = 1, astpending = 1)
#define need_proftick(p) ((p)->p_flag |= P_OWEUPC, astpending = 1)
#define signotify(p) (astpending = 1)
#define CACHELINESIZE 32 /* For now XXX */
extern __inline void
syncicache(from, len)
void *from;
int len;
{
int l = len;
void *p = from;
do {
asm volatile ("dcbst 0,%0" :: "r"(p));
p += CACHELINESIZE;
} while ((l -= CACHELINESIZE) > 0);
asm volatile ("sync");
do {
asm volatile ("icbi 0,%0" :: "r"(from));
from += CACHELINESIZE;
} while ((len -= CACHELINESIZE) > 0);
asm volatile ("isync");
}
extern char *bootpath;
#endif /* _MACHINE_CPU_H_ */
|