1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
|
/* $OpenBSD: cpu.h,v 1.7 2021/06/02 00:39:27 cheloha Exp $ */
/*
* Copyright (c) 2019 Mike Larkin <mlarkin@openbsd.org>
* Copyright (c) 2016 Dale Rahn <drahn@dalerahn.com>
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#ifndef _MACHINE_CPU_H_
#define _MACHINE_CPU_H_
/*
* User-visible definitions
*/
/* CTL_MACHDEP definitions. */
#define CPU_COMPATIBLE 1 /* compatible property */
#define CPU_MAXID 2 /* number of valid machdep ids */
#define CTL_MACHDEP_NAMES { \
{ 0, 0 }, \
{ "compatible", CTLTYPE_STRING }, \
}
#ifdef _KERNEL
/*
* Kernel-only definitions
*/
#include <machine/intr.h>
#include <machine/frame.h>
#include <machine/riscvreg.h>
/* All the CLKF_* macros take a struct clockframe * as an argument. */
#define clockframe trapframe
/*
* CLKF_USERMODE: Return TRUE/FALSE (1/0) depending on whether the
* frame came from USR mode or not.
*/
#define CLKF_USERMODE(frame) ((frame->tf_sstatus & SSTATUS_SPP) == 0)
/*
* CLKF_INTR: True if we took the interrupt from inside another
* interrupt handler.
*/
#define CLKF_INTR(frame) (curcpu()->ci_idepth > 1)
/*
* CLKF_PC: Extract the program counter from a clockframe
*/
#define CLKF_PC(frame) (frame->tf_sepc)
/*
* PROC_PC: Find out the program counter for the given process.
*/
#define PROC_PC(p) ((p)->p_addr->u_pcb.pcb_tf->tf_sepc)
#define PROC_STACK(p) ((p)->p_addr->u_pcb.pcb_tf->tf_sp)
#include <sys/device.h>
#include <sys/sched.h>
#include <sys/srp.h>
struct cpu_info {
struct device *ci_dev; /* Device corresponding to this CPU */
struct cpu_info *ci_next;
struct schedstate_percpu ci_schedstate; /* scheduler state */
u_int32_t ci_cpuid;
#if 0
uint64_t ci_mpidr;
u_int ci_acpi_proc_id;
#endif
int ci_node;
struct cpu_info *ci_self;
struct proc *ci_curproc;
struct pmap *ci_curpm;
#if 0
struct proc *ci_fpuproc;
#endif
u_int32_t ci_randseed;
struct pcb *ci_curpcb;
struct pcb *ci_idle_pcb;
u_int32_t ci_ctrl; /* The CPU control register */
uint64_t ci_lasttb;
uint64_t ci_nexttimerevent;
uint64_t ci_nextstatevent;
int ci_statspending;
uint32_t ci_cpl;
uint32_t ci_ipending;
uint32_t ci_idepth;
#ifdef DIAGNOSTIC
int ci_mutex_level;
#endif
int ci_want_resched;
/* currently loaded fpu proc ctx */
struct proc *ci_fpuproc;
#if 0
void (*ci_flush_bp)(void);
struct opp_table *ci_opp_table;
volatile int ci_opp_idx;
volatile int ci_opp_max;
uint32_t ci_cpu_supply;
#endif
#ifdef MULTIPROCESSOR
struct srp_hazard ci_srp_hazards[SRP_HAZARD_NUM];
volatile int ci_flags;
#if 0
uint64_t ci_ttbr1;
vaddr_t ci_el1_stkend;
#endif
volatile int ci_ddb_paused;
#define CI_DDB_RUNNING 0
#define CI_DDB_SHOULDSTOP 1
#define CI_DDB_STOPPED 2
#define CI_DDB_ENTERDDB 3
#define CI_DDB_INDDB 4
#endif
#ifdef GPROF
struct gmonparam *ci_gmon;
#endif
char ci_panicbuf[512];
};
#define CPUF_PRIMARY (1<<0)
#define CPUF_AP (1<<1)
#define CPUF_IDENTIFY (1<<2)
#define CPUF_IDENTIFIED (1<<3)
#define CPUF_PRESENT (1<<4)
#define CPUF_GO (1<<5)
#define CPUF_RUNNING (1<<6)
static inline struct cpu_info *
curcpu(void)
{
struct cpu_info *__ci = NULL;
__asm __volatile("mv %0, tp" : "=&r"(__ci));
return (__ci);
}
extern uint32_t boot_hart; /* The hart we booted on. */
extern struct cpu_info cpu_info_primary;
extern struct cpu_info *cpu_info_list;
#ifndef MULTIPROCESSOR
#define cpu_number() 0
#define CPU_IS_PRIMARY(ci) 1
#define CPU_INFO_ITERATOR int
#define CPU_INFO_FOREACH(cii, ci) \
for (cii = 0, ci = curcpu(); ci != NULL; ci = NULL)
#define CPU_INFO_UNIT(ci) 0
#define MAXCPUS 1
#define cpu_unidle(ci)
#else
#define cpu_number() (curcpu()->ci_cpuid)
#define CPU_IS_PRIMARY(ci) ((ci) == &cpu_info_primary)
#define CPU_INFO_ITERATOR int
#define CPU_INFO_FOREACH(cii, ci) for (cii = 0, ci = cpu_info_list; \
ci != NULL; ci = ci->ci_next)
#define CPU_INFO_UNIT(ci) ((ci)->ci_dev ? (ci)->ci_dev->dv_unit : 0)
#define MAXCPUS 32
extern struct cpu_info *cpu_info[MAXCPUS];
void cpu_boot_secondary_processors(void);
#endif /* !MULTIPROCESSOR */
#define CPU_BUSY_CYCLE() do {} while (0)
#define curpcb curcpu()->ci_curpcb
static inline unsigned int
cpu_rnd_messybits(void)
{
// Should do bit reversal ^ with csr_read(time);
return csr_read(time);
}
/*
* Scheduling glue
*/
#define aston(p) ((p)->p_md.md_astpending = 1)
#define setsoftast() aston(curcpu()->ci_curproc)
/*
* Notify the current process (p) that it has a signal pending,
* process as soon as possible.
*/
#ifdef MULTIPROCESSOR
void cpu_unidle(struct cpu_info *ci);
#define signotify(p) (aston(p), cpu_unidle((p)->p_cpu))
void cpu_kick(struct cpu_info *);
#else
#define cpu_kick(ci)
#define cpu_unidle(ci)
#define signotify(p) setsoftast()
#endif
/*
* Preempt the current process if in interrupt from user mode,
* or after the current trap/syscall if in system mode.
*/
void need_resched(struct cpu_info *);
#define clear_resched(ci) ((ci)->ci_want_resched = 0)
/*
* Give a profiling tick to the current process when the user profiling
* buffer pages are invalid. On the i386, request an ast to send us
* through trap(), marking the proc as needing a profiling tick.
*/
#define need_proftick(p) aston(p)
// asm code to start new kernel contexts.
void proc_trampoline(void);
void child_trampoline(void);
/*
* Random cruft
*/
void dumpconf(void);
/* cpuswitch.S */
struct pcb;
void savectx (struct pcb *pcb);
static inline void
intr_enable(void)
{
__asm __volatile("csrsi sstatus, %0" :: "i" (SSTATUS_SIE));
}
static inline u_long
intr_disable(void)
{
uint64_t ret;
__asm __volatile(
"csrrci %0, sstatus, %1"
: "=&r" (ret) : "i" (SSTATUS_SIE)
);
return (ret & (SSTATUS_SIE));
}
static inline void
intr_restore(u_long s)
{
__asm __volatile("csrs sstatus, %0" :: "r" (s));
}
void delay (unsigned);
#define DELAY(x) delay(x)
void fpu_save(struct proc *, struct trapframe *);
void fpu_load(struct proc *);
void fpu_discard(struct proc *p);
#endif /* _KERNEL */
#ifdef MULTIPROCESSOR
#include <sys/mplock.h>
#endif /* MULTIPROCESSOR */
#endif /* !_MACHINE_CPU_H_ */
|
