1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
|
/* $OpenBSD: if_qe.c,v 1.2 2002/03/14 03:16:02 millert Exp $ */
/* $NetBSD: if_qe.c,v 1.2 1999/06/30 18:19:26 ragge Exp $ */
/*
* Copyright (c) 1998 Roar Thronæs. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Roar Thronæs.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Standalone routine for the DEQNA.
*/
#include <sys/param.h>
#include <sys/types.h>
#include <netinet/in.h>
#include <netinet/in_systm.h>
#include <lib/libsa/netif.h>
#include <arch/vax/if/if_qereg.h>
int qe_probe(), qe_match(), qe_get(), qe_put();
void qe_init(), qe_end();
struct netif_stats qe_stats;
struct netif_dif qe_ifs[] = {
/* dif_unit dif_nsel dif_stats dif_private */
{ 0, 1, &qe_stats, },
};
struct netif_stats qe_stats;
struct netif_driver qe_driver = {
"qe", qe_match, qe_probe, qe_init, qe_get, qe_put, qe_end, qe_ifs, 1,
};
#define PG_V 0x80000000
#define QBAMAP 0x20088000
#define NRCV 1 /* Receive descriptors */
#define NXMT 1 /* Transmit descriptors */
#define QE_INTS (QE_RCV_INT | QE_XMIT_INT)
#define MAXPACKETSIZE 0x800 /* Because of (buggy) DEQNA */
struct qe_softc {
struct qe_ring rring[NRCV+2]; /* Receive ring descriptors */
struct qe_ring tring[NXMT+2]; /* Xmit ring descriptors */
u_char setup_pkt[16][8]; /* Setup packet */
char qein[2048], qeout[2048];/* Packet buffers */
};
static volatile struct qe_softc *sc;
static int addr;
#define QE_WCSR(csr, val) \
(*((volatile u_short *)(addr + (csr))) = (val))
#define QE_RCSR(csr) \
*((volatile u_short *)(addr + (csr)))
#define DELAY(x) {volatile int i = x;while (--i);}
#define LOWORD(x) ((int)(x) & 0xffff)
#define HIWORD(x) (((int)(x) >> 16) & 0x3f)
int
qe_match(nif, machdep_hint)
struct netif *nif;
void *machdep_hint;
{
return strcmp(machdep_hint, "qe") == 0;
}
int
qe_probe(nif, machdep_hint)
struct netif *nif;
void *machdep_hint;
{
return 0;
}
void
qe_init(desc, machdep_hint)
struct iodesc *desc;
void *machdep_hint;
{
int i,j;
u_int *qm=(u_int *) QBAMAP;
sc = (void *)alloc(sizeof(struct qe_softc));
bzero(sc,sizeof(struct qe_softc));
for(i = 0; i < 8192; i++)
qm[i] = PG_V | i;
/* XXX hardcoded addr */
addr = (0x20000000 + (0774440 & 017777));
QE_WCSR(QE_CSR_CSR, QE_RESET);
QE_WCSR(QE_CSR_CSR, QE_RCSR(QE_CSR_CSR) & ~QE_RESET);
for (i = 0; i < 6; i++) {
sc->setup_pkt[i][1] = QE_RCSR(i * 2);
sc->setup_pkt[i+8][1] = QE_RCSR(i * 2);
sc->setup_pkt[i][2] = 0xff;
sc->setup_pkt[i+8][2] = QE_RCSR(i * 2);
for (j=3; j < 8; j++) {
sc->setup_pkt[i][j] = QE_RCSR(i * 2);
sc->setup_pkt[i+8][j] = QE_RCSR(i * 2);
}
desc->myea[i] = QE_RCSR(i * 2);
}
bzero((caddr_t)sc->rring, sizeof(struct qe_ring));
sc->rring->qe_buf_len = -64;
sc->rring->qe_addr_lo = (short)((int)sc->setup_pkt);
sc->rring->qe_addr_hi = (short)((int)sc->setup_pkt >> 16);
bzero((caddr_t)sc->tring, sizeof(struct qe_ring));
sc->tring->qe_buf_len = -64;
sc->tring->qe_addr_lo = (short)((int)sc->setup_pkt);
sc->tring->qe_addr_hi = (short)((int)sc->setup_pkt >> 16);
sc->rring[0].qe_flag = sc->rring[0].qe_status1 = QE_NOTYET;
sc->rring->qe_addr_hi |= QE_VALID;
sc->tring[0].qe_flag = sc->tring[0].qe_status1 = QE_NOTYET;
sc->tring->qe_addr_hi |= QE_VALID | QE_SETUP | QE_EOMSG;
QE_WCSR(QE_CSR_CSR, QE_XMIT_INT | QE_RCV_INT);
QE_WCSR(QE_CSR_RCLL, LOWORD(sc->rring));
QE_WCSR(QE_CSR_RCLH, HIWORD(sc->rring));
QE_WCSR(QE_CSR_XMTL, LOWORD(sc->tring));
QE_WCSR(QE_CSR_XMTH, HIWORD(sc->tring));
while ((QE_RCSR(QE_CSR_CSR) & QE_INTS) != QE_INTS)
;
QE_WCSR(QE_CSR_CSR, QE_RCSR(QE_CSR_CSR) | QE_INTS);
QE_WCSR(QE_CSR_CSR, QE_RCSR(QE_CSR_CSR) & ~(QE_INT_ENABLE|QE_ELOOP));
QE_WCSR(QE_CSR_CSR, QE_RCSR(QE_CSR_CSR) | QE_ILOOP);
sc->rring[0].qe_addr_lo = (short)((int)sc->qein & 0xffff);
sc->rring[0].qe_addr_hi = (short)((int)sc->qein >> 16);
sc->rring[0].qe_buf_len=-MAXPACKETSIZE/2;
sc->rring[0].qe_addr_hi |= QE_VALID;
sc->rring[0].qe_flag=sc->rring[0].qe_status1=QE_NOTYET;
sc->rring[0].qe_status2=1;
sc->rring[1].qe_addr_lo = 0;
sc->rring[1].qe_addr_hi = 0;
sc->rring[1].qe_flag=sc->rring[1].qe_status1=QE_NOTYET;
sc->rring[1].qe_status2=1;
sc->tring[0].qe_addr_lo = (short)((int)sc->qeout & 0xffff);
sc->tring[0].qe_addr_hi = (short)((int)sc->qeout >> 16);
sc->tring[0].qe_buf_len=0;
sc->tring[0].qe_flag=sc->tring[0].qe_status1=QE_NOTYET;
sc->tring[0].qe_addr_hi |= QE_EOMSG|QE_VALID;
sc->tring[1].qe_flag=sc->tring[1].qe_status1=QE_NOTYET;
sc->tring[1].qe_addr_lo = 0;
sc->tring[1].qe_addr_hi = 0;
QE_WCSR(QE_CSR_CSR, QE_RCSR(QE_CSR_CSR) | QE_RCV_ENABLE);
QE_WCSR(QE_CSR_RCLL, LOWORD(sc->rring));
QE_WCSR(QE_CSR_RCLH, HIWORD(sc->rring));
}
int
qe_get(desc, pkt, maxlen, timeout)
struct iodesc *desc;
void *pkt;
int maxlen;
time_t timeout;
{
int len, j;
retry:
for(j = 0x10000;j && (QE_RCSR(QE_CSR_CSR) & QE_RCV_INT) == 0; j--)
;
if ((QE_RCSR(QE_CSR_CSR) & QE_RCV_INT) == 0)
goto fail;
QE_WCSR(QE_CSR_CSR, QE_RCSR(QE_CSR_CSR) & ~(QE_RCV_ENABLE|QE_XMIT_INT));
len= ((sc->rring[0].qe_status1 & QE_RBL_HI) |
(sc->rring[0].qe_status2 & QE_RBL_LO)) + 60;
if (sc->rring[0].qe_status1 & 0xc000)
goto fail;
if (len == 0)
goto retry;
bcopy((void *)sc->qein,pkt,len);
end:
sc->rring[0].qe_status2 = sc->rring[1].qe_status2 = 1;
sc->rring[0].qe_flag=sc->rring[0].qe_status1=QE_NOTYET;
sc->rring[1].qe_flag=sc->rring[1].qe_status1=QE_NOTYET;
QE_WCSR(QE_CSR_CSR, QE_RCSR(QE_CSR_CSR) | QE_RCV_ENABLE);
QE_WCSR(QE_CSR_RCLL, LOWORD(sc->rring));
QE_WCSR(QE_CSR_RCLH, HIWORD(sc->rring));
return len;
fail: len = -1;
goto end;
}
int
qe_put(desc, pkt, len)
struct iodesc *desc;
void *pkt;
int len;
{
int j;
bcopy(pkt,sc->qeout,len);
sc->tring[0].qe_buf_len=-len/2;
sc->tring[0].qe_flag=sc->tring[0].qe_status1=QE_NOTYET;
sc->tring[1].qe_flag=sc->tring[1].qe_status1=QE_NOTYET;
QE_WCSR(QE_CSR_XMTL, LOWORD(sc->tring));
QE_WCSR(QE_CSR_XMTH, HIWORD(sc->tring));
for(j = 0; (j < 0x10000) && ((QE_RCSR(QE_CSR_CSR) & QE_XMIT_INT) == 0); j++)
;
if ((QE_RCSR(QE_CSR_CSR) & QE_XMIT_INT) == 0) {
qe_init(desc,0);
return -1;
}
QE_WCSR(QE_CSR_CSR, QE_RCSR(QE_CSR_CSR) & ~QE_RCV_INT);
if (sc->tring[0].qe_status1 & 0xc000) {
qe_init(desc,0);
return -1;
}
return len;
}
void
qe_end(nif)
struct netif *nif;
{
QE_WCSR(QE_CSR_CSR, QE_RESET);
QE_WCSR(QE_CSR_CSR, QE_RCSR(QE_CSR_CSR) & ~QE_RESET);
}
|