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/* Public Domain */
#define RK3288_PLL_CPLL 3
#define RK3288_PLL_GPLL 4
#define RK3288_CLK_SDMMC 68
#define RK3288_CLK_UART0 77
#define RK3288_CLK_UART1 78
#define RK3288_CLK_UART2 79
#define RK3288_CLK_UART3 80
#define RK3288_CLK_UART4 81
#define RK3288_CLK_MAC_RX 102
#define RK3288_CLK_MAC_TX 103
#define RK3288_CLK_SDMMC_DRV 114
#define RK3288_CLK_SDMMC_SAMPLE 118
#define RK3288_CLK_MAC 151
#define RK3288_ACLK_GMAC 196
#define RK3288_PCLK_GMAC 349
#define RK3288_HCLK_HOST0 450
#define RK3288_HCLK_SDMMC 456
#define RK3399_PLL_CPLL 4
#define RK3399_PLL_GPLL 5
#define RK3399_PLL_NPLL 6
#define RK3399_CLK_SDMMC 76
#define RK3399_CLK_EMMC 78
#define RK3399_CLK_UART0 81
#define RK3399_CLK_UART1 82
#define RK3399_CLK_UART2 83
#define RK3399_CLK_UART3 84
#define RK3399_CLK_MAC_RX 103
#define RK3399_CLK_MAC_TX 104
#define RK3399_CLK_MAC 105
#define RK3399_CLK_SDMMC_DRV 154
#define RK3399_CLK_SDMMC_SAMPLE 155
#define RK3399_ACLK_GMAC 213
#define RK3399_ACLK_EMMC 240
#define RK3399_PCLK_GMAC 358
#define RK3399_HCLK_HOST0 456
#define RK3399_HCLK_HOST0_ARB 457
#define RK3399_HCLK_HOST1 458
#define RK3399_HCLK_HOST1_ARB 459
#define RK3399_HCLK_SDMMC 462
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