1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
|
/* $OpenBSD: ncr5380var.h,v 1.9 2003/02/24 00:41:51 miod Exp $ */
/* $NetBSD: ncr5380var.h,v 1.6 1996/05/10 18:04:06 gwr Exp $ */
/*
* Copyright (c) 1995 David Jones, Gordon W. Ross
* Copyright (c) 1994 Jarle Greipsland
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the authors may not be used to endorse or promote products
* derived from this software without specific prior written permission.
* 4. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by
* David Jones and Gordon Ross
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* This file defines the interface between the machine-dependent
* module and the machine-indepenedent ncr5380sbc.c module.
*/
#define SCI_CLR_INTR(sc) (*(sc)->sci_iack)
#define SCI_BUSY(sc) (*sc->sci_bus_csr & SCI_BUS_BSY)
/* These are NOT arbitrary, but map to bits in sci_tcmd */
#define PHASE_DATA_OUT 0x0
#define PHASE_DATA_IN 0x1
#define PHASE_COMMAND 0x2
#define PHASE_STATUS 0x3
#define PHASE_UNSPEC1 0x4
#define PHASE_UNSPEC2 0x5
#define PHASE_MSG_OUT 0x6
#define PHASE_MSG_IN 0x7
/*
* This illegal phase is used to prevent the 5380 from having
* a phase-match condition when we don't want one, such as
* when setting up the DMA engine or whatever...
*/
#define PHASE_INVALID PHASE_UNSPEC1
/* Per-request state. This is required in order to support reselection. */
struct sci_req {
struct scsi_xfer *sr_xs; /* Pointer to xfer struct, NULL=unused */
int sr_target, sr_lun; /* For fast access */
void *sr_dma_hand; /* Current DMA hnadle */
u_char *sr_dataptr; /* Saved data pointer */
int sr_datalen;
int sr_flags; /* Internal error code */
#define SR_IMMED 1 /* Immediate command */
#define SR_SENSE 2 /* We are getting sense */
#define SR_OVERDUE 4 /* Timeout while not current */
#define SR_ERROR 8 /* Error occurred */
int sr_status; /* Status code from last cmd */
struct timeout sr_timeout;
};
#define SCI_OPENINGS 16 /* How many commands we can enqueue. */
struct ncr5380_softc {
struct device sc_dev;
struct scsi_link sc_link;
/* Pointers to 5380 registers. See ncr5380reg.h */
volatile u_char *sci_r0;
volatile u_char *sci_r1;
volatile u_char *sci_r2;
volatile u_char *sci_r3;
volatile u_char *sci_r4;
volatile u_char *sci_r5;
volatile u_char *sci_r6;
volatile u_char *sci_r7;
/* Functions set from MD code */
int (*sc_pio_out)(struct ncr5380_softc *,
int, int, u_char *);
int (*sc_pio_in)(struct ncr5380_softc *,
int, int, u_char *);
void (*sc_dma_alloc)(struct ncr5380_softc *);
void (*sc_dma_free)(struct ncr5380_softc *);
void (*sc_dma_setup)(struct ncr5380_softc *);
void (*sc_dma_start)(struct ncr5380_softc *);
void (*sc_dma_poll)(struct ncr5380_softc *);
void (*sc_dma_eop)(struct ncr5380_softc *);
void (*sc_dma_stop)(struct ncr5380_softc *);
void (*sc_intr_on)(struct ncr5380_softc *);
void (*sc_intr_off)(struct ncr5380_softc *);
int sc_flags; /* Misc. flags and capabilities */
#define NCR5380_PERMIT_RESELECT 1 /* Allow disconnect/reselect */
#define NCR5380_FORCE_POLLING 2 /* Do not use interrupts. */
/* Set bits in this to disable disconnect per-target. */
int sc_no_disconnect;
/* Set bits in this to disable parity for some target. */
int sc_parity_disable;
int sc_min_dma_len; /* Smaller than this is done with PIO */
/* Begin MI shared data */
int sc_state;
#define NCR_IDLE 0 /* Ready for new work. */
#define NCR_WORKING 0x01 /* Some command is in progress. */
#define NCR_ABORTING 0x02 /* Bailing out */
#define NCR_DOINGDMA 0x04 /* The FIFO data path is active! */
#define NCR_DROP_MSGIN 0x10 /* Discard all msgs (parity err detected) */
/* The request that has the bus now. */
struct sci_req *sc_current;
/* Active data pointer for current SCSI command. */
u_char *sc_dataptr;
int sc_datalen;
/* Begin MI private data */
/* The number of operations in progress on the bus */
volatile int sc_ncmds;
/* Ring buffer of pending/active requests */
struct sci_req sc_ring[SCI_OPENINGS];
int sc_rr; /* Round-robin scan pointer */
/* Active requests, by target/LUN */
struct sci_req *sc_matrix[8][8];
/* Message stuff */
int sc_prevphase;
u_int sc_msgpriq; /* Messages we want to send */
u_int sc_msgoutq; /* Messages sent during last MESSAGE OUT */
u_int sc_msgout; /* Message last transmitted */
#define SEND_DEV_RESET 0x01
#define SEND_PARITY_ERROR 0x02
#define SEND_ABORT 0x04
#define SEND_REJECT 0x08
#define SEND_INIT_DET_ERR 0x10
#define SEND_IDENTIFY 0x20
#define SEND_SDTR 0x40
#define SEND_WDTR 0x80
#define NCR_MAX_MSG_LEN 8
u_char sc_omess[NCR_MAX_MSG_LEN];
u_char *sc_omp; /* Outgoing message pointer */
u_char sc_imess[NCR_MAX_MSG_LEN];
u_char *sc_imp; /* Incoming message pointer */
};
void ncr5380_init(struct ncr5380_softc *);
void ncr5380_reset_scsibus(struct ncr5380_softc *);
int ncr5380_intr(struct ncr5380_softc *);
int ncr5380_scsi_cmd(struct scsi_xfer *);
int ncr5380_pio_in(struct ncr5380_softc *, int, int, u_char *);
int ncr5380_pio_out(struct ncr5380_softc *, int, int, u_char *);
#ifdef NCR5380_DEBUG
struct ncr5380_softc *ncr5380_debug_sc;
void ncr5380_trace(char *msg, long val);
#define NCR_TRACE(msg, val) ncr5380_trace(msg, val)
#else /* NCR5380_DEBUG */
#define NCR_TRACE(msg, val) /* nada */
#endif /* NCR5380_DEBUG */
|