1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
|
/* $OpenBSD: ofw_misc.c,v 1.10 2019/09/30 20:40:54 kettenis Exp $ */
/*
* Copyright (c) 2017 Mark Kettenis
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include <sys/types.h>
#include <sys/systm.h>
#include <sys/malloc.h>
#include <machine/bus.h>
#include <dev/ofw/openfirm.h>
#include <dev/ofw/ofw_misc.h>
/*
* Register maps.
*/
struct regmap {
int rm_node;
uint32_t rm_phandle;
bus_space_tag_t rm_tag;
bus_space_handle_t rm_handle;
bus_size_t rm_size;
LIST_ENTRY(regmap) rm_list;
};
LIST_HEAD(, regmap) regmaps = LIST_HEAD_INITIALIZER(regmap);
void
regmap_register(int node, bus_space_tag_t tag, bus_space_handle_t handle,
bus_size_t size)
{
struct regmap *rm;
rm = malloc(sizeof(struct regmap), M_DEVBUF, M_WAITOK);
rm->rm_node = node;
rm->rm_phandle = OF_getpropint(node, "phandle", 0);
rm->rm_tag = tag;
rm->rm_handle = handle;
rm->rm_size = size;
LIST_INSERT_HEAD(®maps, rm, rm_list);
}
struct regmap *
regmap_bycompatible(char *compatible)
{
struct regmap *rm;
LIST_FOREACH(rm, ®maps, rm_list) {
if (OF_is_compatible(rm->rm_node, compatible))
return rm;
}
return NULL;
}
struct regmap *
regmap_bynode(int node)
{
struct regmap *rm;
LIST_FOREACH(rm, ®maps, rm_list) {
if (rm->rm_node == node)
return rm;
}
return NULL;
}
struct regmap *
regmap_byphandle(uint32_t phandle)
{
struct regmap *rm;
LIST_FOREACH(rm, ®maps, rm_list) {
if (rm->rm_phandle == phandle)
return rm;
}
return NULL;
}
void
regmap_write_4(struct regmap *rm, bus_size_t offset, uint32_t value)
{
KASSERT(offset <= rm->rm_size - sizeof(uint32_t));
bus_space_write_4(rm->rm_tag, rm->rm_handle, offset, value);
}
uint32_t
regmap_read_4(struct regmap *rm, bus_size_t offset)
{
KASSERT(offset <= rm->rm_size - sizeof(uint32_t));
return bus_space_read_4(rm->rm_tag, rm->rm_handle, offset);
}
/*
* PHY support.
*/
LIST_HEAD(, phy_device) phy_devices =
LIST_HEAD_INITIALIZER(phy_devices);
void
phy_register(struct phy_device *pd)
{
pd->pd_cells = OF_getpropint(pd->pd_node, "#phy-cells", 0);
pd->pd_phandle = OF_getpropint(pd->pd_node, "phandle", 0);
if (pd->pd_phandle == 0)
return;
LIST_INSERT_HEAD(&phy_devices, pd, pd_list);
}
int
phy_enable_cells(uint32_t *cells)
{
struct phy_device *pd;
uint32_t phandle = cells[0];
LIST_FOREACH(pd, &phy_devices, pd_list) {
if (pd->pd_phandle == phandle)
break;
}
if (pd && pd->pd_enable)
return pd->pd_enable(pd->pd_cookie, &cells[1]);
return -1;
}
uint32_t *
phy_next_phy(uint32_t *cells)
{
uint32_t phandle = cells[0];
int node, ncells;
node = OF_getnodebyphandle(phandle);
if (node == 0)
return NULL;
ncells = OF_getpropint(node, "#phy-cells", 0);
return cells + ncells + 1;
}
int
phy_enable_idx(int node, int idx)
{
uint32_t *phys;
uint32_t *phy;
int rv = -1;
int len;
len = OF_getproplen(node, "phys");
if (len <= 0)
return -1;
phys = malloc(len, M_TEMP, M_WAITOK);
OF_getpropintarray(node, "phys", phys, len);
phy = phys;
while (phy && phy < phys + (len / sizeof(uint32_t))) {
if (idx <= 0)
rv = phy_enable_cells(phy);
if (idx == 0)
break;
phy = phy_next_phy(phy);
idx--;
}
free(phys, M_TEMP, len);
return rv;
}
int
phy_enable(int node, const char *name)
{
int idx;
idx = OF_getindex(node, name, "phy-names");
if (idx == -1)
return -1;
return phy_enable_idx(node, idx);
}
/*
* I2C support.
*/
LIST_HEAD(, i2c_bus) i2c_busses =
LIST_HEAD_INITIALIZER(i2c_bus);
void
i2c_register(struct i2c_bus *ib)
{
ib->ib_phandle = OF_getpropint(ib->ib_node, "phandle", 0);
if (ib->ib_phandle == 0)
return;
LIST_INSERT_HEAD(&i2c_busses, ib, ib_list);
}
struct i2c_controller *
i2c_bynode(int node)
{
struct i2c_bus *ib;
LIST_FOREACH(ib, &i2c_busses, ib_list) {
if (ib->ib_node == node)
return ib->ib_ic;
}
return NULL;
}
struct i2c_controller *
i2c_byphandle(uint32_t phandle)
{
struct i2c_bus *ib;
LIST_FOREACH(ib, &i2c_busses, ib_list) {
if (ib->ib_phandle == phandle)
return ib->ib_ic;
}
return NULL;
}
/*
* SFP support.
*/
LIST_HEAD(, sfp_device) sfp_devices =
LIST_HEAD_INITIALIZER(sfp_devices);
void
sfp_register(struct sfp_device *sd)
{
sd->sd_phandle = OF_getpropint(sd->sd_node, "phandle", 0);
if (sd->sd_phandle == 0)
return;
LIST_INSERT_HEAD(&sfp_devices, sd, sd_list);
}
int
sfp_get_sffpage(uint32_t phandle, struct if_sffpage *sff)
{
struct sfp_device *sd;
LIST_FOREACH(sd, &sfp_devices, sd_list) {
if (sd->sd_phandle == phandle)
return sd->sd_get_sffpage(sd->sd_cookie, sff);
}
return ENXIO;
}
/*
* PWM support.
*/
LIST_HEAD(, pwm_device) pwm_devices =
LIST_HEAD_INITIALIZER(pwm_devices);
void
pwm_register(struct pwm_device *pd)
{
pd->pd_cells = OF_getpropint(pd->pd_node, "#pwm-cells", 0);
pd->pd_phandle = OF_getpropint(pd->pd_node, "phandle", 0);
if (pd->pd_phandle == 0)
return;
LIST_INSERT_HEAD(&pwm_devices, pd, pd_list);
}
int
pwm_init_state(uint32_t *cells, struct pwm_state *ps)
{
struct pwm_device *pd;
LIST_FOREACH(pd, &pwm_devices, pd_list) {
if (pd->pd_phandle == cells[0]) {
memset(ps, 0, sizeof(struct pwm_state));
pd->pd_get_state(pd->pd_cookie, &cells[1], ps);
ps->ps_pulse_width = 0;
if (pd->pd_cells > 2)
ps->ps_period = cells[2];
if (pd->pd_cells > 3)
ps->ps_flags = cells[3];
return 0;
}
}
return ENXIO;
}
int
pwm_get_state(uint32_t *cells, struct pwm_state *ps)
{
struct pwm_device *pd;
LIST_FOREACH(pd, &pwm_devices, pd_list) {
if (pd->pd_phandle == cells[0])
return pd->pd_get_state(pd->pd_cookie, &cells[1], ps);
}
return ENXIO;
}
int
pwm_set_state(uint32_t *cells, struct pwm_state *ps)
{
struct pwm_device *pd;
LIST_FOREACH(pd, &pwm_devices, pd_list) {
if (pd->pd_phandle == cells[0])
return pd->pd_set_state(pd->pd_cookie, &cells[1], ps);
}
return ENXIO;
}
|