1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613
1614
1615
1616
1617
1618
1619
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629
1630
1631
1632
1633
1634
1635
1636
1637
1638
1639
1640
1641
1642
1643
1644
1645
1646
1647
1648
1649
1650
1651
1652
1653
1654
1655
1656
1657
1658
1659
1660
1661
1662
1663
1664
1665
1666
1667
1668
1669
1670
1671
1672
1673
1674
1675
1676
1677
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688
1689
1690
1691
1692
1693
1694
1695
1696
1697
1698
1699
1700
1701
1702
1703
1704
1705
1706
1707
1708
1709
1710
1711
1712
1713
1714
1715
1716
1717
1718
1719
1720
1721
1722
1723
1724
1725
1726
1727
1728
1729
1730
1731
1732
1733
1734
1735
1736
1737
1738
1739
1740
1741
1742
1743
1744
1745
1746
1747
1748
1749
1750
1751
1752
1753
1754
1755
1756
1757
1758
1759
1760
1761
1762
1763
1764
1765
1766
1767
1768
1769
1770
1771
1772
1773
1774
1775
1776
1777
1778
1779
1780
1781
1782
1783
1784
1785
1786
1787
1788
1789
1790
1791
1792
1793
1794
1795
1796
1797
1798
1799
1800
1801
1802
1803
1804
1805
1806
1807
1808
1809
1810
1811
1812
1813
1814
1815
1816
1817
1818
1819
1820
1821
1822
1823
1824
1825
1826
1827
1828
1829
1830
1831
1832
1833
1834
1835
1836
1837
1838
1839
1840
1841
1842
1843
1844
1845
1846
1847
1848
1849
1850
1851
1852
1853
1854
1855
1856
1857
1858
1859
1860
1861
1862
1863
1864
1865
1866
1867
1868
1869
1870
1871
1872
1873
1874
1875
1876
1877
1878
1879
1880
1881
1882
1883
1884
1885
1886
1887
1888
1889
1890
1891
1892
1893
1894
1895
1896
1897
1898
1899
1900
1901
1902
1903
1904
1905
1906
1907
1908
1909
1910
1911
1912
1913
1914
1915
1916
1917
1918
1919
1920
1921
1922
1923
1924
1925
1926
1927
1928
1929
1930
1931
1932
1933
1934
1935
1936
1937
1938
1939
1940
1941
1942
1943
1944
1945
1946
1947
1948
1949
1950
1951
1952
1953
1954
1955
1956
1957
1958
1959
1960
1961
1962
1963
1964
1965
1966
1967
1968
1969
1970
1971
1972
1973
1974
1975
1976
1977
1978
1979
1980
1981
1982
1983
1984
1985
1986
1987
1988
1989
1990
1991
1992
1993
1994
1995
1996
1997
1998
1999
2000
2001
2002
2003
2004
2005
2006
2007
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
2020
2021
2022
2023
2024
2025
2026
2027
2028
2029
2030
2031
2032
2033
2034
2035
2036
2037
2038
2039
2040
2041
2042
2043
2044
2045
2046
2047
2048
2049
2050
2051
2052
2053
2054
2055
2056
2057
2058
2059
2060
2061
2062
2063
2064
2065
2066
2067
2068
2069
2070
2071
2072
2073
2074
2075
2076
2077
2078
2079
2080
2081
2082
2083
2084
2085
2086
2087
2088
2089
2090
2091
2092
2093
2094
2095
2096
2097
2098
2099
2100
2101
2102
2103
2104
2105
2106
2107
2108
2109
2110
2111
2112
2113
2114
2115
2116
2117
2118
2119
2120
2121
2122
2123
2124
2125
2126
2127
2128
2129
2130
2131
2132
2133
2134
2135
2136
2137
2138
2139
2140
2141
2142
2143
2144
2145
2146
2147
2148
2149
2150
2151
2152
2153
2154
2155
2156
2157
2158
|
/* $OpenBSD: ips.c,v 1.90 2009/03/22 18:27:41 grange Exp $ */
/*
* Copyright (c) 2006, 2007, 2009 Alexander Yurchenko <grange@openbsd.org>
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
/*
* IBM (Adaptec) ServeRAID controllers driver.
*/
#include "bio.h"
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/buf.h>
#include <sys/device.h>
#include <sys/ioctl.h>
#include <sys/kernel.h>
#include <sys/malloc.h>
#include <sys/proc.h>
#include <sys/sensors.h>
#include <sys/timeout.h>
#include <sys/queue.h>
#include <machine/bus.h>
#include <scsi/scsi_all.h>
#include <scsi/scsi_disk.h>
#include <scsi/scsiconf.h>
#include <dev/biovar.h>
#include <dev/pci/pcidevs.h>
#include <dev/pci/pcireg.h>
#include <dev/pci/pcivar.h>
/* Debug levels */
#define IPS_D_ERR 0x0001 /* errors */
#define IPS_D_INFO 0x0002 /* information */
#define IPS_D_XFER 0x0004 /* transfers */
#ifdef IPS_DEBUG
#define DPRINTF(a, b) do { if (ips_debug & (a)) printf b; } while (0)
int ips_debug = IPS_D_ERR;
#else
#define DPRINTF(a, b)
#endif
#define IPS_MAXDRIVES 8
#define IPS_MAXCHANS 4
#define IPS_MAXTARGETS 16
#define IPS_MAXCHUNKS 16
#define IPS_MAXCMDS 128
#define IPS_MAXFER (64 * 1024)
#define IPS_MAXSGS 16
#define IPS_MAXCDB 12
#define IPS_SECSZ 512
#define IPS_NVRAMPGSZ 128
#define IPS_SQSZ (IPS_MAXCMDS * sizeof(u_int32_t))
#define IPS_TIMEOUT 60000 /* ms */
/* Command codes */
#define IPS_CMD_READ 0x02
#define IPS_CMD_WRITE 0x03
#define IPS_CMD_DCDB 0x04
#define IPS_CMD_GETADAPTERINFO 0x05
#define IPS_CMD_FLUSH 0x0a
#define IPS_CMD_REBUILDSTATUS 0x0c
#define IPS_CMD_SETSTATE 0x10
#define IPS_CMD_REBUILD 0x16
#define IPS_CMD_ERRORTABLE 0x17
#define IPS_CMD_GETDRIVEINFO 0x19
#define IPS_CMD_RESETCHAN 0x1a
#define IPS_CMD_DOWNLOAD 0x20
#define IPS_CMD_RWBIOSFW 0x22
#define IPS_CMD_READCONF 0x38
#define IPS_CMD_GETSUBSYS 0x40
#define IPS_CMD_CONFIGSYNC 0x58
#define IPS_CMD_READ_SG 0x82
#define IPS_CMD_WRITE_SG 0x83
#define IPS_CMD_DCDB_SG 0x84
#define IPS_CMD_EDCDB 0x95
#define IPS_CMD_EDCDB_SG 0x96
#define IPS_CMD_RWNVRAMPAGE 0xbc
#define IPS_CMD_GETVERINFO 0xc6
#define IPS_CMD_FFDC 0xd7
#define IPS_CMD_SG 0x80
#define IPS_CMD_RWNVRAM 0xbc
/* DCDB attributes */
#define IPS_DCDB_DATAIN 0x01 /* data input */
#define IPS_DCDB_DATAOUT 0x02 /* data output */
#define IPS_DCDB_XFER64K 0x08 /* 64K transfer */
#define IPS_DCDB_TIMO10 0x10 /* 10 secs timeout */
#define IPS_DCDB_TIMO60 0x20 /* 60 secs timeout */
#define IPS_DCDB_TIMO20M 0x30 /* 20 mins timeout */
#define IPS_DCDB_NOAUTOREQSEN 0x40 /* no auto request sense */
#define IPS_DCDB_DISCON 0x80 /* disconnect allowed */
/* Register definitions */
#define IPS_REG_HIS 0x08 /* host interrupt status */
#define IPS_REG_HIS_SCE 0x01 /* status channel enqueue */
#define IPS_REG_HIS_EN 0x80 /* enable interrupts */
#define IPS_REG_CCSA 0x10 /* command channel system address */
#define IPS_REG_CCC 0x14 /* command channel control */
#define IPS_REG_CCC_SEM 0x0008 /* semaphore */
#define IPS_REG_CCC_START 0x101a /* start command */
#define IPS_REG_SQH 0x20 /* status queue head */
#define IPS_REG_SQT 0x24 /* status queue tail */
#define IPS_REG_SQE 0x28 /* status queue end */
#define IPS_REG_SQS 0x2c /* status queue start */
#define IPS_REG_OIS 0x30 /* outbound interrupt status */
#define IPS_REG_OIS_PEND 0x0008 /* interrupt is pending */
#define IPS_REG_OIM 0x34 /* outbound interrupt mask */
#define IPS_REG_OIM_DS 0x0008 /* disable interrupts */
#define IPS_REG_IQP 0x40 /* inbound queue port */
#define IPS_REG_OQP 0x44 /* outbound queue port */
/* Status word fields */
#define IPS_STAT_ID(x) (((x) >> 8) & 0xff) /* command id */
#define IPS_STAT_BASIC(x) (((x) >> 16) & 0xff) /* basic status */
#define IPS_STAT_EXT(x) (((x) >> 24) & 0xff) /* ext status */
#define IPS_STAT_GSC(x) ((x) & 0x0f)
/* Basic status codes */
#define IPS_STAT_OK 0x00 /* success */
#define IPS_STAT_RECOV 0x01 /* recovered error */
#define IPS_STAT_INVOP 0x03 /* invalid opcode */
#define IPS_STAT_INVCMD 0x04 /* invalid command block */
#define IPS_STAT_INVPARM 0x05 /* invalid parameters block */
#define IPS_STAT_BUSY 0x08 /* busy */
#define IPS_STAT_CMPLERR 0x0c /* completed with error */
#define IPS_STAT_LDERR 0x0d /* logical drive error */
#define IPS_STAT_TIMO 0x0e /* timeout */
#define IPS_STAT_PDRVERR 0x0f /* physical drive error */
/* Extended status codes */
#define IPS_ESTAT_SELTIMO 0xf0 /* select timeout */
#define IPS_ESTAT_OURUN 0xf2 /* over/underrun */
#define IPS_ESTAT_HOSTRST 0xf7 /* host reset */
#define IPS_ESTAT_DEVRST 0xf8 /* device reset */
#define IPS_ESTAT_RECOV 0xfc /* recovered error */
#define IPS_ESTAT_CKCOND 0xff /* check condition */
#define IPS_IOSIZE 128 /* max space size to map */
/* Command frame */
struct ips_cmd {
u_int8_t code;
u_int8_t id;
u_int8_t drive;
u_int8_t sgcnt;
u_int32_t lba;
u_int32_t sgaddr;
u_int16_t seccnt;
u_int8_t seg4g;
u_int8_t esg;
u_int32_t ccsar;
u_int32_t cccr;
};
/* Direct CDB (SCSI pass-through) frame */
struct ips_dcdb {
u_int8_t device;
u_int8_t attr;
u_int16_t datalen;
u_int32_t sgaddr;
u_int8_t cdblen;
u_int8_t senselen;
u_int8_t sgcnt;
u_int8_t __reserved1;
u_int8_t cdb[IPS_MAXCDB];
u_int8_t sense[64];
u_int8_t status;
u_int8_t __reserved2[3];
};
/* Scatter-gather array element */
struct ips_sg {
u_int32_t addr;
u_int32_t size;
};
/* Command block */
struct ips_cmdb {
struct ips_cmd cmd;
struct ips_dcdb dcdb;
struct ips_sg sg[IPS_MAXSGS];
};
/* Data frames */
struct ips_adapterinfo {
u_int8_t drivecnt;
u_int8_t miscflag;
u_int8_t sltflag;
u_int8_t bstflag;
u_int8_t pwrchgcnt;
u_int8_t wrongaddrcnt;
u_int8_t unidentcnt;
u_int8_t nvramdevchgcnt;
u_int8_t firmware[8];
u_int8_t bios[8];
u_int32_t drivesize[IPS_MAXDRIVES];
u_int8_t cmdcnt;
u_int8_t maxphysdevs;
u_int16_t flashrepgmcnt;
u_int8_t defunctdiskcnt;
u_int8_t rebuildflag;
u_int8_t offdrivecnt;
u_int8_t critdrivecnt;
u_int16_t confupdcnt;
u_int8_t blkflag;
u_int8_t __reserved;
u_int16_t deaddisk[IPS_MAXCHANS][IPS_MAXTARGETS];
};
struct ips_driveinfo {
u_int8_t drivecnt;
u_int8_t __reserved[3];
struct ips_drive {
u_int8_t id;
u_int8_t __reserved;
u_int8_t raid;
u_int8_t state;
#define IPS_DS_FREE 0x00
#define IPS_DS_OFFLINE 0x02
#define IPS_DS_ONLINE 0x03
#define IPS_DS_DEGRADED 0x04
#define IPS_DS_SYS 0x06
#define IPS_DS_CRS 0x24
u_int32_t seccnt;
} drive[IPS_MAXDRIVES];
};
struct ips_conf {
u_int8_t ldcnt;
u_int8_t day;
u_int8_t month;
u_int8_t year;
u_int8_t initid[4];
u_int8_t hostid[12];
u_int8_t time[8];
u_int32_t useropt;
u_int16_t userfield;
u_int8_t rebuildrate;
u_int8_t __reserved1;
struct ips_hw {
u_int8_t board[8];
u_int8_t cpu[8];
u_int8_t nchantype;
u_int8_t nhostinttype;
u_int8_t compression;
u_int8_t nvramtype;
u_int32_t nvramsize;
} hw;
struct ips_ld {
u_int16_t userfield;
u_int8_t state;
u_int8_t raidcacheparam;
u_int8_t chunkcnt;
u_int8_t stripesize;
u_int8_t params;
u_int8_t __reserved;
u_int32_t size;
struct ips_chunk {
u_int8_t channel;
u_int8_t target;
u_int16_t __reserved;
u_int32_t startsec;
u_int32_t seccnt;
} chunk[IPS_MAXCHUNKS];
} ld[IPS_MAXDRIVES];
struct ips_dev {
u_int8_t initiator;
u_int8_t params;
u_int8_t miscflag;
u_int8_t state;
#define IPS_DVS_STANDBY 0x01
#define IPS_DVS_REBUILD 0x02
#define IPS_DVS_SPARE 0x04
#define IPS_DVS_MEMBER 0x08
#define IPS_DVS_ONLINE 0x80
#define IPS_DVS_READY (IPS_DVS_STANDBY | IPS_DVS_ONLINE)
u_int32_t seccnt;
u_int8_t devid[28];
} dev[IPS_MAXCHANS][IPS_MAXTARGETS];
u_int8_t reserved[512];
};
struct ips_rblstat {
u_int8_t __unknown[20];
struct {
u_int8_t __unknown[4];
u_int32_t total;
u_int32_t remain;
} ld[IPS_MAXDRIVES];
};
struct ips_pg5 {
u_int32_t signature;
u_int8_t __reserved1;
u_int8_t slot;
u_int16_t type;
u_int8_t bioshi[4];
u_int8_t bioslo[4];
u_int16_t __reserved2;
u_int8_t __reserved3;
u_int8_t os;
u_int8_t driverhi[4];
u_int8_t driverlo[4];
u_int8_t __reserved4[100];
};
struct ips_info {
struct ips_adapterinfo adapter;
struct ips_driveinfo drive;
struct ips_conf conf;
struct ips_rblstat rblstat;
struct ips_pg5 pg5;
};
/* Command control block */
struct ips_softc;
struct ips_ccb {
struct ips_softc * c_sc; /* driver softc */
int c_id; /* command id */
int c_flags; /* SCSI_* flags */
enum {
IPS_CCB_FREE,
IPS_CCB_QUEUED,
IPS_CCB_DONE
} c_state; /* command state */
void * c_cmdbva; /* command block virt addr */
paddr_t c_cmdbpa; /* command block phys addr */
bus_dmamap_t c_dmam; /* data buffer DMA map */
struct scsi_xfer * c_xfer; /* corresponding SCSI xfer */
u_int8_t c_stat; /* status byte copy */
u_int8_t c_estat; /* ext status byte copy */
int c_error; /* completion error */
void (*c_done)(struct ips_softc *, /* cmd done */
struct ips_ccb *); /* callback */
TAILQ_ENTRY(ips_ccb) c_link; /* queue link */
};
/* CCB queue */
TAILQ_HEAD(ips_ccbq, ips_ccb);
/* DMA-able chunk of memory */
struct dmamem {
bus_dma_tag_t dm_tag;
bus_dmamap_t dm_map;
bus_dma_segment_t dm_seg;
bus_size_t dm_size;
void * dm_vaddr;
#define dm_paddr dm_seg.ds_addr
};
struct ips_softc {
struct device sc_dev;
struct scsi_link sc_scsi_link;
struct scsibus_softc * sc_scsibus;
struct ips_pt {
struct ips_softc * pt_sc;
int pt_chan;
struct scsi_link pt_link;
int pt_proctgt;
char pt_procdev[16];
} sc_pt[IPS_MAXCHANS];
struct ksensordev sc_sensordev;
struct ksensor * sc_sensors;
bus_space_tag_t sc_iot;
bus_space_handle_t sc_ioh;
bus_dma_tag_t sc_dmat;
const struct ips_chipset *sc_chip;
struct ips_info * sc_info;
struct dmamem sc_infom;
int sc_nunits;
struct dmamem sc_cmdbm;
struct ips_ccb * sc_ccb;
int sc_nccbs;
struct ips_ccbq sc_ccbq_free;
struct dmamem sc_sqm;
paddr_t sc_sqtail;
u_int32_t * sc_sqbuf;
int sc_sqidx;
};
int ips_match(struct device *, void *, void *);
void ips_attach(struct device *, struct device *, void *);
int ips_scsi_cmd(struct scsi_xfer *);
int ips_scsi_pt_cmd(struct scsi_xfer *);
int ips_scsi_ioctl(struct scsi_link *, u_long, caddr_t, int,
struct proc *);
int ips_ioctl(struct device *, u_long, caddr_t);
int ips_ioctl_inq(struct ips_softc *, struct bioc_inq *);
int ips_ioctl_vol(struct ips_softc *, struct bioc_vol *);
int ips_ioctl_disk(struct ips_softc *, struct bioc_disk *);
int ips_ioctl_setstate(struct ips_softc *, struct bioc_setstate *);
void ips_sensors(void *);
int ips_load_xs(struct ips_softc *, struct ips_ccb *, struct scsi_xfer *);
int ips_start_xs(struct ips_softc *, struct ips_ccb *, struct scsi_xfer *);
int ips_cmd(struct ips_softc *, struct ips_ccb *);
int ips_poll(struct ips_softc *, struct ips_ccb *);
void ips_done(struct ips_softc *, struct ips_ccb *);
void ips_done_xs(struct ips_softc *, struct ips_ccb *);
void ips_done_pt(struct ips_softc *, struct ips_ccb *);
void ips_done_mgmt(struct ips_softc *, struct ips_ccb *);
int ips_error(struct ips_softc *, struct ips_ccb *);
int ips_error_xs(struct ips_softc *, struct ips_ccb *);
int ips_intr(void *);
void ips_timeout(void *);
int ips_getadapterinfo(struct ips_softc *, int);
int ips_getdriveinfo(struct ips_softc *, int);
int ips_getconf(struct ips_softc *, int);
int ips_getrblstat(struct ips_softc *, int);
int ips_getpg5(struct ips_softc *, int);
int ips_setstate(struct ips_softc *, int, int, int, int);
int ips_rebuild(struct ips_softc *, int, int, int, int, int);
void ips_copperhead_exec(struct ips_softc *, struct ips_ccb *);
void ips_copperhead_intren(struct ips_softc *);
int ips_copperhead_isintr(struct ips_softc *);
u_int32_t ips_copperhead_status(struct ips_softc *);
void ips_morpheus_exec(struct ips_softc *, struct ips_ccb *);
void ips_morpheus_intren(struct ips_softc *);
int ips_morpheus_isintr(struct ips_softc *);
u_int32_t ips_morpheus_status(struct ips_softc *);
struct ips_ccb *ips_ccb_alloc(struct ips_softc *, int);
void ips_ccb_free(struct ips_softc *, struct ips_ccb *, int);
struct ips_ccb *ips_ccb_get(struct ips_softc *);
void ips_ccb_put(struct ips_softc *, struct ips_ccb *);
int ips_dmamem_alloc(struct dmamem *, bus_dma_tag_t, bus_size_t);
void ips_dmamem_free(struct dmamem *);
struct cfattach ips_ca = {
sizeof(struct ips_softc),
ips_match,
ips_attach
};
struct cfdriver ips_cd = {
NULL, "ips", DV_DULL
};
static struct scsi_adapter ips_scsi_adapter = {
ips_scsi_cmd,
scsi_minphys,
NULL,
NULL,
ips_scsi_ioctl
};
static struct scsi_device ips_scsi_device = {
NULL,
NULL,
NULL,
NULL
};
static struct scsi_adapter ips_scsi_pt_adapter = {
ips_scsi_pt_cmd,
scsi_minphys,
NULL,
NULL,
NULL
};
static struct scsi_device ips_scsi_pt_device = {
NULL,
NULL,
NULL,
NULL
};
static const struct pci_matchid ips_ids[] = {
{ PCI_VENDOR_IBM, PCI_PRODUCT_IBM_SERVERAID },
{ PCI_VENDOR_IBM, PCI_PRODUCT_IBM_SERVERAID2 },
{ PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_SERVERAID }
};
static const struct ips_chipset {
enum {
IPS_CHIP_COPPERHEAD = 0,
IPS_CHIP_MORPHEUS
} ic_id;
int ic_bar;
void (*ic_exec)(struct ips_softc *, struct ips_ccb *);
void (*ic_intren)(struct ips_softc *);
int (*ic_isintr)(struct ips_softc *);
u_int32_t (*ic_status)(struct ips_softc *);
} ips_chips[] = {
{
IPS_CHIP_COPPERHEAD,
0x14,
ips_copperhead_exec,
ips_copperhead_intren,
ips_copperhead_isintr,
ips_copperhead_status
},
{
IPS_CHIP_MORPHEUS,
0x10,
ips_morpheus_exec,
ips_morpheus_intren,
ips_morpheus_isintr,
ips_morpheus_status
}
};
#define ips_exec(s, c) (s)->sc_chip->ic_exec((s), (c))
#define ips_intren(s) (s)->sc_chip->ic_intren((s))
#define ips_isintr(s) (s)->sc_chip->ic_isintr((s))
#define ips_status(s) (s)->sc_chip->ic_status((s))
static const char *ips_names[] = {
NULL,
NULL,
"II",
"onboard",
"onboard",
"3H",
"3L",
"4H",
"4M",
"4L",
"4Mx",
"4Lx",
"5i",
"5i",
"6M",
"6i",
"7t",
"7k",
"7M"
};
int
ips_match(struct device *parent, void *match, void *aux)
{
return (pci_matchbyid(aux, ips_ids,
sizeof(ips_ids) / sizeof(ips_ids[0])));
}
void
ips_attach(struct device *parent, struct device *self, void *aux)
{
struct ips_softc *sc = (struct ips_softc *)self;
struct pci_attach_args *pa = aux;
struct ips_ccb ccb0;
struct scsibus_attach_args saa;
struct ips_adapterinfo *ai;
struct ips_driveinfo *di;
struct ips_pg5 *pg5;
pcireg_t maptype;
bus_size_t iosize;
pci_intr_handle_t ih;
const char *intrstr;
int type, i;
sc->sc_dmat = pa->pa_dmat;
/* Identify chipset */
if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_IBM_SERVERAID)
sc->sc_chip = &ips_chips[IPS_CHIP_COPPERHEAD];
else
sc->sc_chip = &ips_chips[IPS_CHIP_MORPHEUS];
/* Map registers */
maptype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, sc->sc_chip->ic_bar);
if (pci_mapreg_map(pa, sc->sc_chip->ic_bar, maptype, 0, &sc->sc_iot,
&sc->sc_ioh, NULL, &iosize, IPS_IOSIZE)) {
printf(": can't map regs\n");
return;
}
/* Allocate command buffer */
if (ips_dmamem_alloc(&sc->sc_cmdbm, sc->sc_dmat,
IPS_MAXCMDS * sizeof(struct ips_cmdb))) {
printf(": can't alloc cmd buffer\n");
goto fail1;
}
/* Allocate info buffer */
if (ips_dmamem_alloc(&sc->sc_infom, sc->sc_dmat,
sizeof(struct ips_info))) {
printf(": can't alloc info buffer\n");
goto fail2;
}
sc->sc_info = sc->sc_infom.dm_vaddr;
ai = &sc->sc_info->adapter;
di = &sc->sc_info->drive;
pg5 = &sc->sc_info->pg5;
/* Allocate status queue for the Copperhead chipset */
if (sc->sc_chip->ic_id == IPS_CHIP_COPPERHEAD) {
if (ips_dmamem_alloc(&sc->sc_sqm, sc->sc_dmat, IPS_SQSZ)) {
printf(": can't alloc status queue\n");
goto fail3;
}
sc->sc_sqtail = sc->sc_sqm.dm_paddr;
sc->sc_sqbuf = sc->sc_sqm.dm_vaddr;
sc->sc_sqidx = 0;
bus_space_write_4(sc->sc_iot, sc->sc_ioh, IPS_REG_SQS,
sc->sc_sqm.dm_paddr);
bus_space_write_4(sc->sc_iot, sc->sc_ioh, IPS_REG_SQE,
sc->sc_sqm.dm_paddr + IPS_SQSZ);
bus_space_write_4(sc->sc_iot, sc->sc_ioh, IPS_REG_SQH,
sc->sc_sqm.dm_paddr + sizeof(u_int32_t));
bus_space_write_4(sc->sc_iot, sc->sc_ioh, IPS_REG_SQT,
sc->sc_sqm.dm_paddr);
}
/* Bootstrap CCB queue */
sc->sc_nccbs = 1;
sc->sc_ccb = &ccb0;
bzero(&ccb0, sizeof(ccb0));
ccb0.c_cmdbva = sc->sc_cmdbm.dm_vaddr;
ccb0.c_cmdbpa = sc->sc_cmdbm.dm_paddr;
TAILQ_INIT(&sc->sc_ccbq_free);
TAILQ_INSERT_TAIL(&sc->sc_ccbq_free, &ccb0, c_link);
/* Get adapter info */
if (ips_getadapterinfo(sc, SCSI_NOSLEEP)) {
printf(": can't get adapter info\n");
goto fail4;
}
/* Get logical drives info */
if (ips_getdriveinfo(sc, SCSI_NOSLEEP)) {
printf(": can't get ld info\n");
goto fail4;
}
sc->sc_nunits = di->drivecnt;
/* Get configuration */
if (ips_getconf(sc, SCSI_NOSLEEP)) {
printf(": can't get config\n");
goto fail4;
}
/* Read NVRAM page 5 for additional info */
(void)ips_getpg5(sc, SCSI_NOSLEEP);
/* Initialize CCB queue */
sc->sc_nccbs = ai->cmdcnt;
if ((sc->sc_ccb = ips_ccb_alloc(sc, sc->sc_nccbs)) == NULL) {
printf(": can't alloc ccb queue\n");
goto fail4;
}
TAILQ_INIT(&sc->sc_ccbq_free);
for (i = 0; i < sc->sc_nccbs; i++)
TAILQ_INSERT_TAIL(&sc->sc_ccbq_free,
&sc->sc_ccb[i], c_link);
/* Install interrupt handler */
if (pci_intr_map(pa, &ih)) {
printf(": can't map interrupt\n");
goto fail5;
}
intrstr = pci_intr_string(pa->pa_pc, ih);
if (pci_intr_establish(pa->pa_pc, ih, IPL_BIO, ips_intr, sc,
sc->sc_dev.dv_xname) == NULL) {
printf(": can't establish interrupt");
if (intrstr != NULL)
printf(" at %s", intrstr);
printf("\n");
goto fail5;
}
printf(": %s\n", intrstr);
/* Display adapter info */
printf("%s: ServeRAID", sc->sc_dev.dv_xname);
type = letoh16(pg5->type);
if (type < sizeof(ips_names) / sizeof(ips_names[0]) && ips_names[type])
printf(" %s", ips_names[type]);
printf(", FW %c%c%c%c%c%c%c", ai->firmware[0], ai->firmware[1],
ai->firmware[2], ai->firmware[3], ai->firmware[4], ai->firmware[5],
ai->firmware[6]);
printf(", BIOS %c%c%c%c%c%c%c", ai->bios[0], ai->bios[1], ai->bios[2],
ai->bios[3], ai->bios[4], ai->bios[5], ai->bios[6]);
printf(", %d cmds, %d LD%s", sc->sc_nccbs, sc->sc_nunits,
(sc->sc_nunits == 1 ? "" : "s"));
printf("\n");
/* Attach SCSI bus */
if (sc->sc_nunits > 0)
sc->sc_scsi_link.openings = sc->sc_nccbs / sc->sc_nunits;
sc->sc_scsi_link.adapter_target = sc->sc_nunits;
sc->sc_scsi_link.adapter_buswidth = sc->sc_nunits;
sc->sc_scsi_link.device = &ips_scsi_device;
sc->sc_scsi_link.adapter = &ips_scsi_adapter;
sc->sc_scsi_link.adapter_softc = sc;
bzero(&saa, sizeof(saa));
saa.saa_sc_link = &sc->sc_scsi_link;
sc->sc_scsibus = (struct scsibus_softc *)config_found(self, &saa,
scsiprint);
/* For each channel attach SCSI pass-through bus */
bzero(&saa, sizeof(saa));
for (i = 0; i < IPS_MAXCHANS; i++) {
struct ips_pt *pt;
struct scsi_link *link;
int target, lastarget;
pt = &sc->sc_pt[i];
pt->pt_sc = sc;
pt->pt_chan = i;
pt->pt_proctgt = -1;
/* Check if channel has any devices besides disks */
for (target = 0, lastarget = -1; target < IPS_MAXTARGETS;
target++) {
struct ips_dev *dev;
int type;
dev = &sc->sc_info->conf.dev[i][target];
type = dev->params & SID_TYPE;
if (dev->state && type != T_DIRECT) {
lastarget = target;
if (type == T_PROCESSOR ||
type == T_ENCLOSURE)
/* remember enclosure address */
pt->pt_proctgt = target;
}
}
if (lastarget == -1)
continue;
link = &pt->pt_link;
link->openings = 1;
link->adapter_target = IPS_MAXTARGETS;
link->adapter_buswidth = lastarget + 1;
link->device = &ips_scsi_pt_device;
link->adapter = &ips_scsi_pt_adapter;
link->adapter_softc = pt;
saa.saa_sc_link = link;
config_found(self, &saa, scsiprint);
}
/* Enable interrupts */
ips_intren(sc);
#if NBIO > 0
/* Install ioctl handler */
if (bio_register(&sc->sc_dev, ips_ioctl))
printf("%s: no ioctl support\n", sc->sc_dev.dv_xname);
#endif
#ifndef SMALL_KERNEL
/* Add sensors */
if ((sc->sc_sensors = malloc(sizeof(struct ksensor) * sc->sc_nunits,
M_DEVBUF, M_NOWAIT | M_ZERO)) == NULL) {
printf(": can't alloc sensors\n");
return;
}
strlcpy(sc->sc_sensordev.xname, sc->sc_dev.dv_xname,
sizeof(sc->sc_sensordev.xname));
for (i = 0; i < sc->sc_nunits; i++) {
sc->sc_sensors[i].type = SENSOR_DRIVE;
sc->sc_sensors[i].status = SENSOR_S_UNKNOWN;
strlcpy(sc->sc_sensors[i].desc, ((struct device *)
sc->sc_scsibus->sc_link[i][0]->device_softc)->dv_xname,
sizeof(sc->sc_sensors[i].desc));
sensor_attach(&sc->sc_sensordev, &sc->sc_sensors[i]);
}
if (sensor_task_register(sc, ips_sensors, 10) == NULL) {
printf(": no sensors support\n");
free(sc->sc_sensors, M_DEVBUF);
return;
}
sensordev_install(&sc->sc_sensordev);
#endif /* !SMALL_KERNEL */
return;
fail5:
ips_ccb_free(sc, sc->sc_ccb, sc->sc_nccbs);
fail4:
if (sc->sc_chip->ic_id == IPS_CHIP_COPPERHEAD)
ips_dmamem_free(&sc->sc_sqm);
fail3:
ips_dmamem_free(&sc->sc_infom);
fail2:
ips_dmamem_free(&sc->sc_cmdbm);
fail1:
bus_space_unmap(sc->sc_iot, sc->sc_ioh, iosize);
}
int
ips_scsi_cmd(struct scsi_xfer *xs)
{
struct scsi_link *link = xs->sc_link;
struct ips_softc *sc = link->adapter_softc;
struct ips_driveinfo *di = &sc->sc_info->drive;
struct ips_drive *drive;
struct scsi_inquiry_data inq;
struct scsi_read_cap_data rcd;
struct scsi_sense_data sd;
struct scsi_rw *rw;
struct scsi_rw_big *rwb;
struct ips_ccb *ccb;
struct ips_cmd *cmd;
int target = link->target;
u_int32_t blkno, blkcnt;
int code, s;
DPRINTF(IPS_D_XFER, ("%s: ips_scsi_cmd: xs %p, target %d, "
"opcode 0x%02x, flags 0x%x\n", sc->sc_dev.dv_xname, xs, target,
xs->cmd->opcode, xs->flags));
if (target >= sc->sc_nunits || link->lun != 0) {
DPRINTF(IPS_D_INFO, ("%s: ips_scsi_cmd: invalid params "
"target %d, lun %d\n", sc->sc_dev.dv_xname,
target, link->lun));
xs->error = XS_DRIVER_STUFFUP;
s = splbio();
scsi_done(xs);
splx(s);
return (COMPLETE);
}
drive = &di->drive[target];
xs->error = XS_NOERROR;
/* Fake SCSI commands */
switch (xs->cmd->opcode) {
case READ_BIG:
case READ_COMMAND:
case WRITE_BIG:
case WRITE_COMMAND:
if (xs->cmdlen == sizeof(struct scsi_rw)) {
rw = (void *)xs->cmd;
blkno = _3btol(rw->addr) &
(SRW_TOPADDR << 16 | 0xffff);
blkcnt = rw->length ? rw->length : 0x100;
} else {
rwb = (void *)xs->cmd;
blkno = _4btol(rwb->addr);
blkcnt = _2btol(rwb->length);
}
if (blkno >= letoh32(drive->seccnt) || blkno + blkcnt >
letoh32(drive->seccnt)) {
DPRINTF(IPS_D_ERR, ("%s: ips_scsi_cmd: invalid params "
"blkno %u, blkcnt %u\n", sc->sc_dev.dv_xname,
blkno, blkcnt));
xs->error = XS_DRIVER_STUFFUP;
break;
}
if (xs->flags & SCSI_DATA_IN)
code = IPS_CMD_READ;
else
code = IPS_CMD_WRITE;
s = splbio();
ccb = ips_ccb_get(sc);
splx(s);
if (ccb == NULL) {
DPRINTF(IPS_D_ERR, ("%s: ips_scsi_cmd: no ccb\n",
sc->sc_dev.dv_xname));
return (NO_CCB);
}
cmd = ccb->c_cmdbva;
cmd->code = code;
cmd->drive = target;
cmd->lba = htole32(blkno);
cmd->seccnt = htole16(blkcnt);
if (ips_load_xs(sc, ccb, xs)) {
DPRINTF(IPS_D_ERR, ("%s: ips_scsi_cmd: ips_load_xs "
"failed\n", sc->sc_dev.dv_xname));
s = splbio();
ips_ccb_put(sc, ccb);
splx(s);
xs->error = XS_DRIVER_STUFFUP;
break;
}
if (cmd->sgcnt > 0)
cmd->code |= IPS_CMD_SG;
ccb->c_done = ips_done_xs;
return (ips_start_xs(sc, ccb, xs));
case INQUIRY:
bzero(&inq, sizeof(inq));
inq.device = T_DIRECT;
inq.version = 2;
inq.response_format = 2;
inq.additional_length = 32;
strlcpy(inq.vendor, "IBM", sizeof(inq.vendor));
snprintf(inq.product, sizeof(inq.product),
"LD%d RAID%d", target, drive->raid);
strlcpy(inq.revision, "1.0", sizeof(inq.revision));
memcpy(xs->data, &inq, MIN(xs->datalen, sizeof(inq)));
break;
case READ_CAPACITY:
bzero(&rcd, sizeof(rcd));
_lto4b(letoh32(drive->seccnt) - 1, rcd.addr);
_lto4b(IPS_SECSZ, rcd.length);
memcpy(xs->data, &rcd, MIN(xs->datalen, sizeof(rcd)));
break;
case REQUEST_SENSE:
bzero(&sd, sizeof(sd));
sd.error_code = SSD_ERRCODE_CURRENT;
sd.flags = SKEY_NO_SENSE;
memcpy(xs->data, &sd, MIN(xs->datalen, sizeof(sd)));
break;
case SYNCHRONIZE_CACHE:
s = splbio();
ccb = ips_ccb_get(sc);
splx(s);
if (ccb == NULL) {
DPRINTF(IPS_D_ERR, ("%s: ips_scsi_cmd: no ccb\n",
sc->sc_dev.dv_xname));
return (NO_CCB);
}
cmd = ccb->c_cmdbva;
cmd->code = IPS_CMD_FLUSH;
ccb->c_done = ips_done_xs;
return (ips_start_xs(sc, ccb, xs));
case PREVENT_ALLOW:
case START_STOP:
case TEST_UNIT_READY:
break;
default:
DPRINTF(IPS_D_INFO, ("%s: unsupported scsi command 0x%02x\n",
sc->sc_dev.dv_xname, xs->cmd->opcode));
xs->error = XS_DRIVER_STUFFUP;
}
s = splbio();
scsi_done(xs);
splx(s);
return (COMPLETE);
}
int
ips_scsi_pt_cmd(struct scsi_xfer *xs)
{
struct scsi_link *link = xs->sc_link;
struct ips_pt *pt = link->adapter_softc;
struct ips_softc *sc = pt->pt_sc;
struct device *dev = link->device_softc;
struct ips_ccb *ccb;
struct ips_cmdb *cmdb;
struct ips_cmd *cmd;
struct ips_dcdb *dcdb;
int chan = pt->pt_chan, target = link->target;
int s;
DPRINTF(IPS_D_XFER, ("%s: ips_scsi_pt_cmd: xs %p, chan %d, target %d, "
"opcode 0x%02x, flags 0x%x\n", sc->sc_dev.dv_xname, xs, chan,
target, xs->cmd->opcode, xs->flags));
if (pt->pt_procdev[0] == '\0' && target == pt->pt_proctgt && dev)
strlcpy(pt->pt_procdev, dev->dv_xname, sizeof(pt->pt_procdev));
if (xs->cmdlen > IPS_MAXCDB) {
DPRINTF(IPS_D_ERR, ("%s: cmdlen %d too big\n",
sc->sc_dev.dv_xname, xs->cmdlen));
bzero(&xs->sense, sizeof(xs->sense));
xs->sense.error_code = SSD_ERRCODE_VALID | 0x70;
xs->sense.flags = SKEY_ILLEGAL_REQUEST;
xs->sense.add_sense_code = 0x20; /* illcmd, 0x24 illfield */
xs->error = XS_SENSE;
s = splbio();
scsi_done(xs);
splx(s);
return (COMPLETE);
}
xs->error = XS_NOERROR;
s = splbio();
ccb = ips_ccb_get(sc);
splx(s);
if (ccb == NULL) {
DPRINTF(IPS_D_ERR, ("%s: ips_scsi_pt_cmd: no ccb\n",
sc->sc_dev.dv_xname));
return (NO_CCB);
}
cmdb = ccb->c_cmdbva;
cmd = &cmdb->cmd;
dcdb = &cmdb->dcdb;
cmd->code = IPS_CMD_DCDB;
dcdb->device = (chan << 4) | target;
if (xs->flags & SCSI_DATA_IN)
dcdb->attr |= IPS_DCDB_DATAIN;
if (xs->flags & SCSI_DATA_OUT)
dcdb->attr |= IPS_DCDB_DATAOUT;
/*
* Adjust timeout value to what controller supports. Make sure our
* timeout will be fired after controller gives up.
*/
if (xs->timeout <= 10000) {
dcdb->attr |= IPS_DCDB_TIMO10;
xs->timeout = 11000;
} else if (xs->timeout <= 60000) {
dcdb->attr |= IPS_DCDB_TIMO60;
xs->timeout = 61000;
} else {
dcdb->attr |= IPS_DCDB_TIMO20M;
xs->timeout = 20 * 60000 + 1000;
}
dcdb->attr |= IPS_DCDB_DISCON;
dcdb->datalen = htole16(xs->datalen);
dcdb->cdblen = xs->cmdlen;
dcdb->senselen = MIN(sizeof(xs->sense), sizeof(dcdb->sense));
memcpy(dcdb->cdb, xs->cmd, xs->cmdlen);
if (ips_load_xs(sc, ccb, xs)) {
DPRINTF(IPS_D_ERR, ("%s: ips_scsi_pt_cmd: ips_load_xs "
"failed\n", sc->sc_dev.dv_xname));
s = splbio();
ips_ccb_put(sc, ccb);
splx(s);
xs->error = XS_DRIVER_STUFFUP;
s = splbio();
scsi_done(xs);
splx(s);
return (COMPLETE);
}
if (cmd->sgcnt > 0)
cmd->code |= IPS_CMD_SG;
dcdb->sgaddr = cmd->sgaddr;
dcdb->sgcnt = cmd->sgcnt;
cmd->sgaddr = htole32(ccb->c_cmdbpa + offsetof(struct ips_cmdb, dcdb));
cmd->sgcnt = 0;
ccb->c_done = ips_done_pt;
return (ips_start_xs(sc, ccb, xs));
}
int
ips_scsi_ioctl(struct scsi_link *link, u_long cmd, caddr_t addr, int flag,
struct proc *p)
{
#if NBIO > 0
return (ips_ioctl(link->adapter_softc, cmd, addr));
#else
return (ENOTTY);
#endif
}
#if NBIO > 0
int
ips_ioctl(struct device *dev, u_long cmd, caddr_t addr)
{
struct ips_softc *sc = (struct ips_softc *)dev;
DPRINTF(IPS_D_INFO, ("%s: ips_ioctl: cmd %lu\n",
sc->sc_dev.dv_xname, cmd));
switch (cmd) {
case BIOCINQ:
return (ips_ioctl_inq(sc, (struct bioc_inq *)addr));
case BIOCVOL:
return (ips_ioctl_vol(sc, (struct bioc_vol *)addr));
case BIOCDISK:
return (ips_ioctl_disk(sc, (struct bioc_disk *)addr));
case BIOCSETSTATE:
return (ips_ioctl_setstate(sc, (struct bioc_setstate *)addr));
default:
return (ENOTTY);
}
}
int
ips_ioctl_inq(struct ips_softc *sc, struct bioc_inq *bi)
{
struct ips_conf *conf = &sc->sc_info->conf;
int i;
strlcpy(bi->bi_dev, sc->sc_dev.dv_xname, sizeof(bi->bi_dev));
bi->bi_novol = sc->sc_nunits;
for (i = 0, bi->bi_nodisk = 0; i < sc->sc_nunits; i++)
bi->bi_nodisk += conf->ld[i].chunkcnt;
DPRINTF(IPS_D_INFO, ("%s: ips_ioctl_inq: novol %d, nodisk %d\n",
bi->bi_dev, bi->bi_novol, bi->bi_nodisk));
return (0);
}
int
ips_ioctl_vol(struct ips_softc *sc, struct bioc_vol *bv)
{
struct ips_driveinfo *di = &sc->sc_info->drive;
struct ips_conf *conf = &sc->sc_info->conf;
struct ips_rblstat *rblstat = &sc->sc_info->rblstat;
struct ips_ld *ld;
int vid = bv->bv_volid;
struct device *dv;
int rebuild = 0;
u_int32_t total = 0, done = 0;
if (vid >= sc->sc_nunits)
return (EINVAL);
ld = &conf->ld[vid];
switch (ld->state) {
case IPS_DS_ONLINE:
bv->bv_status = BIOC_SVONLINE;
break;
case IPS_DS_DEGRADED:
bv->bv_status = BIOC_SVDEGRADED;
rebuild++;
break;
case IPS_DS_OFFLINE:
bv->bv_status = BIOC_SVOFFLINE;
break;
default:
bv->bv_status = BIOC_SVINVALID;
}
if (rebuild) {
total = letoh32(rblstat->ld[vid].total);
done = total - letoh32(rblstat->ld[vid].remain);
if (total && total > done) {
bv->bv_status = BIOC_SVREBUILD;
bv->bv_percent = 100 * done / total;
}
}
bv->bv_size = (u_quad_t)letoh32(ld->size) * IPS_SECSZ;
bv->bv_level = di->drive[vid].raid;
bv->bv_nodisk = ld->chunkcnt;
/* Associate all unused and spare drives with first volume */
if (vid == 0) {
struct ips_dev *dev;
int chan, target;
for (chan = 0; chan < IPS_MAXCHANS; chan++)
for (target = 0; target < IPS_MAXTARGETS; target++) {
dev = &conf->dev[chan][target];
if (dev->state && !(dev->state &
IPS_DVS_MEMBER) &&
(dev->params & SID_TYPE) == T_DIRECT)
bv->bv_nodisk++;
}
}
dv = sc->sc_scsibus->sc_link[vid][0]->device_softc;
strlcpy(bv->bv_dev, dv->dv_xname, sizeof(bv->bv_dev));
strlcpy(bv->bv_vendor, "IBM", sizeof(bv->bv_vendor));
DPRINTF(IPS_D_INFO, ("%s: ips_ioctl_vol: vid %d, state 0x%02x, "
"total %u, done %u, size %llu, level %d, nodisk %d, dev %s\n",
sc->sc_dev.dv_xname, vid, ld->state, total, done, bv->bv_size,
bv->bv_level, bv->bv_nodisk, bv->bv_dev));
return (0);
}
int
ips_ioctl_disk(struct ips_softc *sc, struct bioc_disk *bd)
{
struct ips_conf *conf = &sc->sc_info->conf;
struct ips_ld *ld;
struct ips_chunk *chunk;
struct ips_dev *dev;
int vid = bd->bd_volid, did = bd->bd_diskid;
int chan, target, i;
if (vid >= sc->sc_nunits)
return (EINVAL);
ld = &conf->ld[vid];
if (did >= ld->chunkcnt) {
/* Probably unused or spare drives */
if (vid != 0)
return (EINVAL);
i = ld->chunkcnt;
for (chan = 0; chan < IPS_MAXCHANS; chan++)
for (target = 0; target < IPS_MAXTARGETS; target++) {
dev = &conf->dev[chan][target];
if (dev->state && !(dev->state &
IPS_DVS_MEMBER) &&
(dev->params & SID_TYPE) == T_DIRECT)
if (i++ == did)
goto out;
}
} else {
chunk = &ld->chunk[did];
chan = chunk->channel;
target = chunk->target;
}
out:
if (chan >= IPS_MAXCHANS || target >= IPS_MAXTARGETS)
return (EINVAL);
dev = &conf->dev[chan][target];
bd->bd_channel = chan;
bd->bd_target = target;
bd->bd_lun = 0;
bd->bd_size = (u_quad_t)letoh32(dev->seccnt) * IPS_SECSZ;
bzero(bd->bd_vendor, sizeof(bd->bd_vendor));
memcpy(bd->bd_vendor, dev->devid, MIN(sizeof(bd->bd_vendor),
sizeof(dev->devid)));
strlcpy(bd->bd_procdev, sc->sc_pt[chan].pt_procdev,
sizeof(bd->bd_procdev));
if (dev->state & IPS_DVS_READY) {
bd->bd_status = BIOC_SDUNUSED;
if (dev->state & IPS_DVS_MEMBER)
bd->bd_status = BIOC_SDONLINE;
if (dev->state & IPS_DVS_SPARE)
bd->bd_status = BIOC_SDHOTSPARE;
if (dev->state & IPS_DVS_REBUILD)
bd->bd_status = BIOC_SDREBUILD;
} else {
bd->bd_status = BIOC_SDOFFLINE;
}
DPRINTF(IPS_D_INFO, ("%s: ips_ioctl_disk: vid %d, did %d, channel %d, "
"target %d, size %llu, state 0x%02x\n", sc->sc_dev.dv_xname,
vid, did, bd->bd_channel, bd->bd_target, bd->bd_size, dev->state));
return (0);
}
int
ips_ioctl_setstate(struct ips_softc *sc, struct bioc_setstate *bs)
{
struct ips_conf *conf = &sc->sc_info->conf;
struct ips_dev *dev;
int state;
if (bs->bs_channel >= IPS_MAXCHANS || bs->bs_target >= IPS_MAXTARGETS)
return (EINVAL);
dev = &conf->dev[bs->bs_channel][bs->bs_target];
state = dev->state;
switch (bs->bs_status) {
case BIOC_SSONLINE:
state |= IPS_DVS_READY;
break;
case BIOC_SSOFFLINE:
state &= ~IPS_DVS_READY;
break;
case BIOC_SSHOTSPARE:
state |= IPS_DVS_SPARE;
break;
case BIOC_SSREBUILD:
return (ips_rebuild(sc, bs->bs_channel, bs->bs_target,
bs->bs_channel, bs->bs_target, 0));
default:
return (EINVAL);
}
return (ips_setstate(sc, bs->bs_channel, bs->bs_target, state, 0));
}
#endif /* NBIO > 0 */
#ifndef SMALL_KERNEL
void
ips_sensors(void *arg)
{
struct ips_softc *sc = arg;
struct ips_conf *conf = &sc->sc_info->conf;
struct ips_ld *ld;
int i, rebuild = 0;
/* ips_sensors() runs from work queue thus allowed to sleep */
if (ips_getconf(sc, 0)) {
DPRINTF(IPS_D_ERR, ("%s: ips_sensors: ips_getconf failed\n",
sc->sc_dev.dv_xname));
for (i = 0; i < sc->sc_nunits; i++) {
sc->sc_sensors[i].value = 0;
sc->sc_sensors[i].status = SENSOR_S_UNKNOWN;
}
return;
}
DPRINTF(IPS_D_INFO, ("%s: ips_sensors:", sc->sc_dev.dv_xname));
for (i = 0; i < sc->sc_nunits; i++) {
ld = &conf->ld[i];
DPRINTF(IPS_D_INFO, (" ld%d.state 0x%02x", i, ld->state));
switch (ld->state) {
case IPS_DS_ONLINE:
sc->sc_sensors[i].value = SENSOR_DRIVE_ONLINE;
sc->sc_sensors[i].status = SENSOR_S_OK;
break;
case IPS_DS_DEGRADED:
sc->sc_sensors[i].value = SENSOR_DRIVE_PFAIL;
sc->sc_sensors[i].status = SENSOR_S_WARN;
rebuild++;
break;
case IPS_DS_OFFLINE:
sc->sc_sensors[i].value = SENSOR_DRIVE_FAIL;
sc->sc_sensors[i].status = SENSOR_S_CRIT;
break;
default:
sc->sc_sensors[i].value = 0;
sc->sc_sensors[i].status = SENSOR_S_UNKNOWN;
}
}
DPRINTF(IPS_D_INFO, ("\n"));
if (rebuild)
(void)ips_getrblstat(sc, 0);
}
#endif /* !SMALL_KERNEL */
int
ips_load_xs(struct ips_softc *sc, struct ips_ccb *ccb, struct scsi_xfer *xs)
{
struct ips_cmdb *cmdb = ccb->c_cmdbva;
struct ips_cmd *cmd = &cmdb->cmd;
struct ips_sg *sg = cmdb->sg;
int nsegs, i;
if (xs->datalen == 0)
return (0);
/* Map data buffer into DMA segments */
if (bus_dmamap_load(sc->sc_dmat, ccb->c_dmam, xs->data, xs->datalen,
NULL, (xs->flags & SCSI_NOSLEEP ? BUS_DMA_NOWAIT : 0)))
return (1);
bus_dmamap_sync(sc->sc_dmat, ccb->c_dmam, 0,ccb->c_dmam->dm_mapsize,
xs->flags & SCSI_DATA_IN ? BUS_DMASYNC_PREREAD :
BUS_DMASYNC_PREWRITE);
if ((nsegs = ccb->c_dmam->dm_nsegs) > IPS_MAXSGS)
return (1);
if (nsegs > 1) {
cmd->sgcnt = nsegs;
cmd->sgaddr = htole32(ccb->c_cmdbpa + offsetof(struct ips_cmdb,
sg));
/* Fill in scatter-gather array */
for (i = 0; i < nsegs; i++) {
sg[i].addr = htole32(ccb->c_dmam->dm_segs[i].ds_addr);
sg[i].size = htole32(ccb->c_dmam->dm_segs[i].ds_len);
}
} else {
cmd->sgcnt = 0;
cmd->sgaddr = htole32(ccb->c_dmam->dm_segs[0].ds_addr);
}
return (0);
}
int
ips_start_xs(struct ips_softc *sc, struct ips_ccb *ccb, struct scsi_xfer *xs)
{
ccb->c_flags = xs->flags;
ccb->c_xfer = xs;
int ispoll = xs->flags & SCSI_POLL;
if (!ispoll) {
timeout_set(&xs->stimeout, ips_timeout, ccb);
timeout_add_msec(&xs->stimeout, xs->timeout);
}
/*
* Return value not used here because ips_cmd() must complete
* scsi_xfer on any failure and SCSI layer will handle possible
* errors.
*/
(void)ips_cmd(sc, ccb);
if (ispoll)
return (COMPLETE);
else
return (SUCCESSFULLY_QUEUED);
}
int
ips_cmd(struct ips_softc *sc, struct ips_ccb *ccb)
{
struct ips_cmd *cmd = ccb->c_cmdbva;
int s, error = 0;
DPRINTF(IPS_D_XFER, ("%s: ips_cmd: id 0x%02x, flags 0x%x, xs %p, "
"code 0x%02x, drive %d, sgcnt %d, lba %d, sgaddr 0x%08x, "
"seccnt %d\n", sc->sc_dev.dv_xname, ccb->c_id, ccb->c_flags,
ccb->c_xfer, cmd->code, cmd->drive, cmd->sgcnt, letoh32(cmd->lba),
letoh32(cmd->sgaddr), letoh16(cmd->seccnt)));
cmd->id = ccb->c_id;
/* Post command to controller and optionally wait for completion */
s = splbio();
ips_exec(sc, ccb);
ccb->c_state = IPS_CCB_QUEUED;
if (ccb->c_flags & SCSI_POLL)
error = ips_poll(sc, ccb);
splx(s);
return (error);
}
int
ips_poll(struct ips_softc *sc, struct ips_ccb *ccb)
{
struct timeval tv;
int error, timo;
splassert(IPL_BIO);
if (ccb->c_flags & SCSI_NOSLEEP) {
/* busy-wait */
DPRINTF(IPS_D_XFER, ("%s: ips_poll: busy-wait\n",
sc->sc_dev.dv_xname));
for (timo = 10000; timo > 0; timo--) {
delay(100);
ips_intr(sc);
if (ccb->c_state == IPS_CCB_DONE)
break;
}
} else {
/* sleep */
timo = ccb->c_xfer ? ccb->c_xfer->timeout : IPS_TIMEOUT;
tv.tv_sec = timo / 1000;
tv.tv_usec = (timo % 1000) * 1000;
timo = tvtohz(&tv);
DPRINTF(IPS_D_XFER, ("%s: ips_poll: sleep %d hz\n",
sc->sc_dev.dv_xname, timo));
tsleep(ccb, PRIBIO + 1, "ipscmd", timo);
}
DPRINTF(IPS_D_XFER, ("%s: ips_poll: state %d\n", sc->sc_dev.dv_xname,
ccb->c_state));
if (ccb->c_state != IPS_CCB_DONE)
/*
* Command never completed. Fake hardware status byte
* to indicate timeout.
*/
ccb->c_stat = IPS_STAT_TIMO;
ips_done(sc, ccb);
error = ccb->c_error;
ips_ccb_put(sc, ccb);
return (error);
}
void
ips_done(struct ips_softc *sc, struct ips_ccb *ccb)
{
splassert(IPL_BIO);
DPRINTF(IPS_D_XFER, ("%s: ips_done: id 0x%02x, flags 0x%x, xs %p\n",
sc->sc_dev.dv_xname, ccb->c_id, ccb->c_flags, ccb->c_xfer));
ccb->c_error = ips_error(sc, ccb);
ccb->c_done(sc, ccb);
}
void
ips_done_xs(struct ips_softc *sc, struct ips_ccb *ccb)
{
struct scsi_xfer *xs = ccb->c_xfer;
if (!(xs->flags & SCSI_POLL))
timeout_del(&xs->stimeout);
if (xs->flags & (SCSI_DATA_IN | SCSI_DATA_OUT)) {
bus_dmamap_sync(sc->sc_dmat, ccb->c_dmam, 0,
ccb->c_dmam->dm_mapsize, xs->flags & SCSI_DATA_IN ?
BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
bus_dmamap_unload(sc->sc_dmat, ccb->c_dmam);
}
xs->resid = 0;
xs->error = ips_error_xs(sc, ccb);
xs->flags |= ITSDONE;
scsi_done(xs);
}
void
ips_done_pt(struct ips_softc *sc, struct ips_ccb *ccb)
{
struct scsi_xfer *xs = ccb->c_xfer;
struct ips_cmdb *cmdb = ccb->c_cmdbva;
struct ips_dcdb *dcdb = &cmdb->dcdb;
int done = letoh16(dcdb->datalen);
if (!(xs->flags & SCSI_POLL))
timeout_del(&xs->stimeout);
if (xs->flags & (SCSI_DATA_IN | SCSI_DATA_OUT)) {
bus_dmamap_sync(sc->sc_dmat, ccb->c_dmam, 0,
ccb->c_dmam->dm_mapsize, xs->flags & SCSI_DATA_IN ?
BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
bus_dmamap_unload(sc->sc_dmat, ccb->c_dmam);
}
if (done && done < xs->datalen)
xs->resid = xs->datalen - done;
else
xs->resid = 0;
xs->error = ips_error_xs(sc, ccb);
xs->status = dcdb->status;
if (xs->error == XS_SENSE)
memcpy(&xs->sense, dcdb->sense, MIN(sizeof(xs->sense),
sizeof(dcdb->sense)));
if (xs->cmd->opcode == INQUIRY && xs->error == XS_NOERROR) {
int type = ((struct scsi_inquiry_data *)xs->data)->device &
SID_TYPE;
if (type == T_DIRECT)
/* mask physical drives */
xs->error = XS_DRIVER_STUFFUP;
}
xs->flags |= ITSDONE;
scsi_done(xs);
}
void
ips_done_mgmt(struct ips_softc *sc, struct ips_ccb *ccb)
{
if (ccb->c_flags & (SCSI_DATA_IN | SCSI_DATA_OUT))
bus_dmamap_sync(sc->sc_dmat, sc->sc_infom.dm_map, 0,
sc->sc_infom.dm_map->dm_mapsize,
ccb->c_flags & SCSI_DATA_IN ? BUS_DMASYNC_POSTREAD :
BUS_DMASYNC_POSTWRITE);
}
int
ips_error(struct ips_softc *sc, struct ips_ccb *ccb)
{
struct ips_cmdb *cmdb = ccb->c_cmdbva;
struct ips_cmd *cmd = &cmdb->cmd;
struct ips_dcdb *dcdb = &cmdb->dcdb;
struct scsi_xfer *xs = ccb->c_xfer;
u_int8_t gsc = IPS_STAT_GSC(ccb->c_stat);
if (gsc == IPS_STAT_OK)
return (0);
DPRINTF(IPS_D_ERR, ("%s: ips_error: stat 0x%02x, estat 0x%02x, "
"cmd code 0x%02x, drive %d, sgcnt %d, lba %u, seccnt %d",
sc->sc_dev.dv_xname, ccb->c_stat, ccb->c_estat, cmd->code,
cmd->drive, cmd->sgcnt, letoh32(cmd->lba), letoh16(cmd->seccnt)));
if (cmd->code == IPS_CMD_DCDB || cmd->code == IPS_CMD_DCDB_SG) {
int i;
DPRINTF(IPS_D_ERR, (", dcdb device 0x%02x, attr 0x%02x, "
"datalen %d, sgcnt %d, status 0x%02x",
dcdb->device, dcdb->attr, letoh16(dcdb->datalen),
dcdb->sgcnt, dcdb->status));
DPRINTF(IPS_D_ERR, (", cdb"));
for (i = 0; i < dcdb->cdblen; i++)
DPRINTF(IPS_D_ERR, (" %x", dcdb->cdb[i]));
if (ccb->c_estat == IPS_ESTAT_CKCOND) {
DPRINTF(IPS_D_ERR, (", sense"));
for (i = 0; i < dcdb->senselen; i++)
DPRINTF(IPS_D_ERR, (" %x", dcdb->sense[i]));
}
}
DPRINTF(IPS_D_ERR, ("\n"));
switch (gsc) {
case IPS_STAT_RECOV:
return (0);
case IPS_STAT_INVOP:
case IPS_STAT_INVCMD:
case IPS_STAT_INVPARM:
return (EINVAL);
case IPS_STAT_BUSY:
return (EBUSY);
case IPS_STAT_TIMO:
return (ETIMEDOUT);
case IPS_STAT_PDRVERR:
switch (ccb->c_estat) {
case IPS_ESTAT_SELTIMO:
return (ENODEV);
case IPS_ESTAT_OURUN:
if (xs && letoh16(dcdb->datalen) < xs->datalen)
/* underrun */
return (0);
break;
case IPS_ESTAT_RECOV:
return (0);
}
break;
}
return (EIO);
}
int
ips_error_xs(struct ips_softc *sc, struct ips_ccb *ccb)
{
struct ips_cmdb *cmdb = ccb->c_cmdbva;
struct ips_dcdb *dcdb = &cmdb->dcdb;
struct scsi_xfer *xs = ccb->c_xfer;
u_int8_t gsc = IPS_STAT_GSC(ccb->c_stat);
/* Map hardware error codes to SCSI ones */
switch (gsc) {
case IPS_STAT_OK:
case IPS_STAT_RECOV:
return (XS_NOERROR);
case IPS_STAT_BUSY:
return (XS_BUSY);
case IPS_STAT_TIMO:
return (XS_TIMEOUT);
case IPS_STAT_PDRVERR:
switch (ccb->c_estat) {
case IPS_ESTAT_SELTIMO:
return (XS_SELTIMEOUT);
case IPS_ESTAT_OURUN:
if (xs && letoh16(dcdb->datalen) < xs->datalen)
/* underrun */
return (XS_NOERROR);
break;
case IPS_ESTAT_HOSTRST:
case IPS_ESTAT_DEVRST:
return (XS_RESET);
case IPS_ESTAT_RECOV:
return (XS_NOERROR);
case IPS_ESTAT_CKCOND:
return (XS_SENSE);
}
break;
}
return (XS_DRIVER_STUFFUP);
}
int
ips_intr(void *arg)
{
struct ips_softc *sc = arg;
struct ips_ccb *ccb;
u_int32_t status;
int id;
DPRINTF(IPS_D_XFER, ("%s: ips_intr", sc->sc_dev.dv_xname));
if (!ips_isintr(sc)) {
DPRINTF(IPS_D_XFER, (": not ours\n"));
return (0);
}
DPRINTF(IPS_D_XFER, ("\n"));
/* Process completed commands */
while ((status = ips_status(sc)) != 0xffffffff) {
DPRINTF(IPS_D_XFER, ("%s: ips_intr: status 0x%08x\n",
sc->sc_dev.dv_xname, status));
id = IPS_STAT_ID(status);
if (id >= sc->sc_nccbs) {
DPRINTF(IPS_D_ERR, ("%s: ips_intr: invalid id %d\n",
sc->sc_dev.dv_xname, id));
continue;
}
ccb = &sc->sc_ccb[id];
if (ccb->c_state != IPS_CCB_QUEUED) {
DPRINTF(IPS_D_ERR, ("%s: ips_intr: cmd 0x%02x not "
"queued, state %d, status 0x%08x\n",
sc->sc_dev.dv_xname, ccb->c_id, ccb->c_state,
status));
continue;
}
ccb->c_state = IPS_CCB_DONE;
ccb->c_stat = IPS_STAT_BASIC(status);
ccb->c_estat = IPS_STAT_EXT(status);
if (ccb->c_flags & SCSI_POLL) {
wakeup(ccb);
} else {
ips_done(sc, ccb);
ips_ccb_put(sc, ccb);
}
}
return (1);
}
void
ips_timeout(void *arg)
{
struct ips_ccb *ccb = arg;
struct ips_softc *sc = ccb->c_sc;
struct scsi_xfer *xs = ccb->c_xfer;
int s;
s = splbio();
if (xs)
sc_print_addr(xs->sc_link);
else
printf("%s: ", sc->sc_dev.dv_xname);
printf("timeout\n");
/*
* Command never completed. Fake hardware status byte
* to indicate timeout.
* XXX: need to remove command from controller.
*/
ccb->c_stat = IPS_STAT_TIMO;
ips_done(sc, ccb);
ips_ccb_put(sc, ccb);
splx(s);
}
int
ips_getadapterinfo(struct ips_softc *sc, int flags)
{
struct ips_ccb *ccb;
struct ips_cmd *cmd;
int s;
s = splbio();
ccb = ips_ccb_get(sc);
splx(s);
if (ccb == NULL)
return (1);
ccb->c_flags = SCSI_DATA_IN | SCSI_POLL | flags;
ccb->c_done = ips_done_mgmt;
cmd = ccb->c_cmdbva;
cmd->code = IPS_CMD_GETADAPTERINFO;
cmd->sgaddr = htole32(sc->sc_infom.dm_paddr + offsetof(struct ips_info,
adapter));
return (ips_cmd(sc, ccb));
}
int
ips_getdriveinfo(struct ips_softc *sc, int flags)
{
struct ips_ccb *ccb;
struct ips_cmd *cmd;
int s;
s = splbio();
ccb = ips_ccb_get(sc);
splx(s);
if (ccb == NULL)
return (1);
ccb->c_flags = SCSI_DATA_IN | SCSI_POLL | flags;
ccb->c_done = ips_done_mgmt;
cmd = ccb->c_cmdbva;
cmd->code = IPS_CMD_GETDRIVEINFO;
cmd->sgaddr = htole32(sc->sc_infom.dm_paddr + offsetof(struct ips_info,
drive));
return (ips_cmd(sc, ccb));
}
int
ips_getconf(struct ips_softc *sc, int flags)
{
struct ips_ccb *ccb;
struct ips_cmd *cmd;
int s;
s = splbio();
ccb = ips_ccb_get(sc);
splx(s);
if (ccb == NULL)
return (1);
ccb->c_flags = SCSI_DATA_IN | SCSI_POLL | flags;
ccb->c_done = ips_done_mgmt;
cmd = ccb->c_cmdbva;
cmd->code = IPS_CMD_READCONF;
cmd->sgaddr = htole32(sc->sc_infom.dm_paddr + offsetof(struct ips_info,
conf));
return (ips_cmd(sc, ccb));
}
#ifndef SMALL_KERNEL
int
ips_getrblstat(struct ips_softc *sc, int flags)
{
struct ips_ccb *ccb;
struct ips_cmd *cmd;
int s;
s = splbio();
ccb = ips_ccb_get(sc);
splx(s);
if (ccb == NULL)
return (1);
ccb->c_flags = SCSI_DATA_IN | SCSI_POLL | flags;
ccb->c_done = ips_done_mgmt;
cmd = ccb->c_cmdbva;
cmd->code = IPS_CMD_REBUILDSTATUS;
cmd->sgaddr = htole32(sc->sc_infom.dm_paddr + offsetof(struct ips_info,
rblstat));
return (ips_cmd(sc, ccb));
}
#endif /* !SMALL_KERNEL */
int
ips_getpg5(struct ips_softc *sc, int flags)
{
struct ips_ccb *ccb;
struct ips_cmd *cmd;
int s;
s = splbio();
ccb = ips_ccb_get(sc);
splx(s);
if (ccb == NULL)
return (1);
ccb->c_flags = SCSI_DATA_IN | SCSI_POLL | flags;
ccb->c_done = ips_done_mgmt;
cmd = ccb->c_cmdbva;
cmd->code = IPS_CMD_RWNVRAM;
cmd->drive = 5;
cmd->sgaddr = htole32(sc->sc_infom.dm_paddr + offsetof(struct ips_info,
pg5));
return (ips_cmd(sc, ccb));
}
#if NBIO > 0
int
ips_setstate(struct ips_softc *sc, int chan, int target, int state, int flags)
{
struct ips_ccb *ccb;
struct ips_cmd *cmd;
int s;
s = splbio();
ccb = ips_ccb_get(sc);
splx(s);
if (ccb == NULL)
return (1);
ccb->c_flags = SCSI_POLL | flags;
ccb->c_done = ips_done_mgmt;
cmd = ccb->c_cmdbva;
cmd->code = IPS_CMD_SETSTATE;
cmd->drive = chan;
cmd->sgcnt = target;
cmd->seg4g = state;
return (ips_cmd(sc, ccb));
}
int
ips_rebuild(struct ips_softc *sc, int chan, int target, int nchan,
int ntarget, int flags)
{
struct ips_ccb *ccb;
struct ips_cmd *cmd;
int s;
s = splbio();
ccb = ips_ccb_get(sc);
splx(s);
if (ccb == NULL)
return (1);
ccb->c_flags = SCSI_POLL | flags;
ccb->c_done = ips_done_mgmt;
cmd = ccb->c_cmdbva;
cmd->code = IPS_CMD_REBUILD;
cmd->drive = chan;
cmd->sgcnt = target;
cmd->seccnt = htole16(ntarget << 8 | nchan);
return (ips_cmd(sc, ccb));
}
#endif /* NBIO > 0 */
void
ips_copperhead_exec(struct ips_softc *sc, struct ips_ccb *ccb)
{
u_int32_t reg;
int timeout;
for (timeout = 100; timeout-- > 0; delay(100)) {
reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IPS_REG_CCC);
if ((reg & IPS_REG_CCC_SEM) == 0)
break;
}
if (timeout < 0) {
printf("%s: semaphore timeout\n", sc->sc_dev.dv_xname);
return;
}
bus_space_write_4(sc->sc_iot, sc->sc_ioh, IPS_REG_CCSA, ccb->c_cmdbpa);
bus_space_write_2(sc->sc_iot, sc->sc_ioh, IPS_REG_CCC,
IPS_REG_CCC_START);
}
void
ips_copperhead_intren(struct ips_softc *sc)
{
bus_space_write_1(sc->sc_iot, sc->sc_ioh, IPS_REG_HIS, IPS_REG_HIS_EN);
}
int
ips_copperhead_isintr(struct ips_softc *sc)
{
u_int8_t reg;
reg = bus_space_read_1(sc->sc_iot, sc->sc_ioh, IPS_REG_HIS);
bus_space_write_1(sc->sc_iot, sc->sc_ioh, IPS_REG_HIS, reg);
if (reg != 0xff && (reg & IPS_REG_HIS_SCE))
return (1);
return (0);
}
u_int32_t
ips_copperhead_status(struct ips_softc *sc)
{
u_int32_t sqhead, sqtail, status;
sqhead = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IPS_REG_SQH);
DPRINTF(IPS_D_XFER, ("%s: sqhead 0x%08x, sqtail 0x%08x\n",
sc->sc_dev.dv_xname, sqhead, sc->sc_sqtail));
sqtail = sc->sc_sqtail + sizeof(u_int32_t);
if (sqtail == sc->sc_sqm.dm_paddr + IPS_SQSZ)
sqtail = sc->sc_sqm.dm_paddr;
if (sqtail == sqhead)
return (0xffffffff);
sc->sc_sqtail = sqtail;
if (++sc->sc_sqidx == IPS_MAXCMDS)
sc->sc_sqidx = 0;
status = letoh32(sc->sc_sqbuf[sc->sc_sqidx]);
bus_space_write_4(sc->sc_iot, sc->sc_ioh, IPS_REG_SQT, sqtail);
return (status);
}
void
ips_morpheus_exec(struct ips_softc *sc, struct ips_ccb *ccb)
{
bus_space_write_4(sc->sc_iot, sc->sc_ioh, IPS_REG_IQP, ccb->c_cmdbpa);
}
void
ips_morpheus_intren(struct ips_softc *sc)
{
u_int32_t reg;
reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IPS_REG_OIM);
reg &= ~IPS_REG_OIM_DS;
bus_space_write_4(sc->sc_iot, sc->sc_ioh, IPS_REG_OIM, reg);
}
int
ips_morpheus_isintr(struct ips_softc *sc)
{
return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, IPS_REG_OIS) &
IPS_REG_OIS_PEND);
}
u_int32_t
ips_morpheus_status(struct ips_softc *sc)
{
u_int32_t reg;
reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IPS_REG_OQP);
DPRINTF(IPS_D_XFER, ("%s: status 0x%08x\n", sc->sc_dev.dv_xname, reg));
return (reg);
}
struct ips_ccb *
ips_ccb_alloc(struct ips_softc *sc, int n)
{
struct ips_ccb *ccb;
int i;
if ((ccb = malloc(n * sizeof(*ccb), M_DEVBUF,
M_NOWAIT | M_ZERO)) == NULL)
return (NULL);
for (i = 0; i < n; i++) {
ccb[i].c_sc = sc;
ccb[i].c_id = i;
ccb[i].c_cmdbva = (char *)sc->sc_cmdbm.dm_vaddr +
i * sizeof(struct ips_cmdb);
ccb[i].c_cmdbpa = sc->sc_cmdbm.dm_paddr +
i * sizeof(struct ips_cmdb);
if (bus_dmamap_create(sc->sc_dmat, IPS_MAXFER, IPS_MAXSGS,
IPS_MAXFER, 0, BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW,
&ccb[i].c_dmam))
goto fail;
}
return (ccb);
fail:
for (; i > 0; i--)
bus_dmamap_destroy(sc->sc_dmat, ccb[i - 1].c_dmam);
free(ccb, M_DEVBUF);
return (NULL);
}
void
ips_ccb_free(struct ips_softc *sc, struct ips_ccb *ccb, int n)
{
int i;
for (i = 0; i < n; i++)
bus_dmamap_destroy(sc->sc_dmat, ccb[i - 1].c_dmam);
free(ccb, M_DEVBUF);
}
struct ips_ccb *
ips_ccb_get(struct ips_softc *sc)
{
struct ips_ccb *ccb;
splassert(IPL_BIO);
if ((ccb = TAILQ_FIRST(&sc->sc_ccbq_free)) != NULL) {
TAILQ_REMOVE(&sc->sc_ccbq_free, ccb, c_link);
ccb->c_flags = 0;
ccb->c_xfer = NULL;
bzero(ccb->c_cmdbva, sizeof(struct ips_cmdb));
}
return (ccb);
}
void
ips_ccb_put(struct ips_softc *sc, struct ips_ccb *ccb)
{
splassert(IPL_BIO);
ccb->c_state = IPS_CCB_FREE;
TAILQ_INSERT_TAIL(&sc->sc_ccbq_free, ccb, c_link);
}
int
ips_dmamem_alloc(struct dmamem *dm, bus_dma_tag_t tag, bus_size_t size)
{
int nsegs;
dm->dm_tag = tag;
dm->dm_size = size;
if (bus_dmamap_create(tag, size, 1, size, 0,
BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &dm->dm_map))
return (1);
if (bus_dmamem_alloc(tag, size, 0, 0, &dm->dm_seg, 1, &nsegs,
BUS_DMA_NOWAIT))
goto fail1;
if (bus_dmamem_map(tag, &dm->dm_seg, 1, size, (caddr_t *)&dm->dm_vaddr,
BUS_DMA_NOWAIT))
goto fail2;
if (bus_dmamap_load(tag, dm->dm_map, dm->dm_vaddr, size, NULL,
BUS_DMA_NOWAIT))
goto fail3;
return (0);
fail3:
bus_dmamem_unmap(tag, dm->dm_vaddr, size);
fail2:
bus_dmamem_free(tag, &dm->dm_seg, 1);
fail1:
bus_dmamap_destroy(tag, dm->dm_map);
return (1);
}
void
ips_dmamem_free(struct dmamem *dm)
{
bus_dmamap_unload(dm->dm_tag, dm->dm_map);
bus_dmamem_unmap(dm->dm_tag, dm->dm_vaddr, dm->dm_size);
bus_dmamem_free(dm->dm_tag, &dm->dm_seg, 1);
bus_dmamap_destroy(dm->dm_tag, dm->dm_map);
}
|