Import Mesa 17.3.9

9 files changed, 545 insertions, 490 deletions

diff --git a/lib/mesa/src/gallium/drivers/swr/rasterizer/codegen/templates/gen_knobs.h b/lib/mesa/src/gallium/drivers/swr/rasterizer/codegen/templates/gen_knobs.h
index 8b88a1170..d81f7d019 100644
--- a/lib/mesa/src/gallium/drivers/swr/rasterizer/codegen/templates/gen_knobs.h
+++ b/lib/mesa/src/gallium/drivers/swr/rasterizer/codegen/templates/gen_knobs.h
@@ -1,36 +1,35 @@
 /******************************************************************************
- * Copyright (C) 2015-2018 Intel Corporation.   All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- *
- * @file ${filename}.h
- *
- * @brief Dynamic Knobs for Core.
- *
- * ======================= AUTO GENERATED: DO NOT EDIT !!! ====================
- *
- * Generation Command Line:
- *  ${'\n *    '.join(cmdline)}
- *
- ******************************************************************************/
-// clang-format off
+* Copyright (C) 2015-2017 Intel Corporation.   All Rights Reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a
+* copy of this software and associated documentation files (the "Software"),
+* to deal in the Software without restriction, including without limitation
+* the rights to use, copy, modify, merge, publish, distribute, sublicense,
+* and/or sell copies of the Software, and to permit persons to whom the
+* Software is furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice (including the next
+* paragraph) shall be included in all copies or substantial portions of the
+* Software.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+* IN THE SOFTWARE.
+*
+* @file ${filename}.h
+*
+* @brief Dynamic Knobs for Core.
+*
+* ======================= AUTO GENERATED: DO NOT EDIT !!! ====================
+*
+* Generation Command Line:
+*  ${'\n*    '.join(cmdline)}
+*
+******************************************************************************/
 <% calc_max_knob_len(knobs) %>
 #pragma once
 #include <string>
@@ -39,11 +38,11 @@ struct KnobBase
 {
 private:
     // Update the input string.
-    static void autoExpandEnvironmentVariables(std::string& text);
+    static void autoExpandEnvironmentVariables(std::string &text);
 
 protected:
     // Leave input alone and return new string.
-    static std::string expandEnvironmentVariables(std::string const& input)
+    static std::string expandEnvironmentVariables(std::string const &input)
     {
         std::string text = input;
         autoExpandEnvironmentVariables(text);
@@ -51,7 +50,7 @@ protected:
     }
 
     template <typename T>
-    static T expandEnvironmentVariables(T const& input)
+    static T expandEnvironmentVariables(T const &input)
     {
         return input;
     }
@@ -61,8 +60,8 @@ template <typename T>
 struct Knob : KnobBase
 {
 public:
-    const T& Value() const { return m_Value; }
-    const T& Value(T const& newValue)
+    const   T&  Value() const               { return m_Value; }
+    const   T&  Value(T const &newValue)
     {
         m_Value = expandEnvironmentVariables(newValue);
         return Value();
@@ -72,7 +71,7 @@ private:
     T m_Value;
 };
 
-#define DEFINE_KNOB(_name, _type)                               \\
+#define DEFINE_KNOB(_name, _type, _default)                     \\
 
     struct Knob_##_name : Knob<_type>                           \\
 
@@ -80,11 +79,7 @@ private:
 
         static const char* Name() { return "KNOB_" #_name; }    \\
 
-        static _type DefaultValue() { return (m_default); }     \\
-
-    private:                                                    \\
-
-        static _type m_default;                                 \\
+        static _type DefaultValue() { return (_default); }      \\
 
     } _name;
 
@@ -109,7 +104,11 @@ struct GlobalKnobs
     % endfor
     % endif
     //
-    DEFINE_KNOB(${knob[0]}, ${knob[1]['type']});
+    % if knob[1]['type'] == 'std::string':
+    DEFINE_KNOB(${knob[0]}, ${knob[1]['type']}, "${repr(knob[1]['default'])[1:-1]}");
+    % else:
+    DEFINE_KNOB(${knob[0]}, ${knob[1]['type']}, ${knob[1]['default']});
+    % endif
 
     % endfor
 
@@ -151,4 +150,3 @@ extern GlobalKnobs g_GlobalKnobs;
         name_len = len(name)
         return ' '*(max_len - name_len)
 %>
-// clang-format on
diff --git a/lib/mesa/src/gallium/drivers/swr/rasterizer/common/simdlib_128_avx512_core.inl b/lib/mesa/src/gallium/drivers/swr/rasterizer/common/simdlib_128_avx512_core.inl
index 16e59c4de..a4ecd09f1 100644
--- a/lib/mesa/src/gallium/drivers/swr/rasterizer/common/simdlib_128_avx512_core.inl
+++ b/lib/mesa/src/gallium/drivers/swr/rasterizer/common/simdlib_128_avx512_core.inl
@@ -1,25 +1,25 @@
 /****************************************************************************
- * Copyright (C) 2017 Intel Corporation.   All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- ****************************************************************************/
+* Copyright (C) 2017 Intel Corporation.   All Rights Reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a
+* copy of this software and associated documentation files (the "Software"),
+* to deal in the Software without restriction, including without limitation
+* the rights to use, copy, modify, merge, publish, distribute, sublicense,
+* and/or sell copies of the Software, and to permit persons to whom the
+* Software is furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice (including the next
+* paragraph) shall be included in all copies or substantial portions of the
+* Software.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+* IN THE SOFTWARE.
+****************************************************************************/
 #if !defined(__SIMD_LIB_AVX512_HPP__)
 #error Do not include this file directly, use "simdlib.hpp" instead.
 #endif
@@ -33,118 +33,114 @@
 // register set.
 //============================================================================
 
-#define SIMD_WRAPPER_1_(op, intrin, mask)                        \
-    static SIMDINLINE Float SIMDCALL op(Float a)                 \
-    {                                                            \
-        return __conv(_mm512_maskz_##intrin((mask), __conv(a))); \
+#define SIMD_WRAPPER_1_(op, intrin, mask)  \
+    static SIMDINLINE Float SIMDCALL op(Float a)   \
+    {\
+        return __conv(_mm512_maskz_##intrin((mask), __conv(a)));\
     }
-#define SIMD_WRAPPER_1(op) SIMD_WRAPPER_1_(op, op, __mmask16(0xf))
+#define SIMD_WRAPPER_1(op)  SIMD_WRAPPER_1_(op, op, __mmask16(0xf))
 
-#define SIMD_WRAPPER_1I_(op, intrin, mask)                             \
-    template <int ImmT>                                                \
-    static SIMDINLINE Float SIMDCALL op(Float a)                       \
-    {                                                                  \
-        return __conv(_mm512_maskz_##intrin((mask), __conv(a), ImmT)); \
+#define SIMD_WRAPPER_1I_(op, intrin, mask)  \
+    template<int ImmT> \
+    static SIMDINLINE Float SIMDCALL op(Float a)   \
+    {\
+        return __conv(_mm512_maskz_##intrin((mask), __conv(a), ImmT));\
     }
-#define SIMD_WRAPPER_1I(op) SIMD_WRAPPER_1I_(op, op, __mmask16(0xf))
+#define SIMD_WRAPPER_1I(op)  SIMD_WRAPPER_1I_(op, op, __mmask16(0xf))
 
-#define SIMD_WRAPPER_2_(op, intrin, mask)                                   \
-    static SIMDINLINE Float SIMDCALL op(Float a, Float b)                   \
-    {                                                                       \
-        return __conv(_mm512_maskz_##intrin((mask), __conv(a), __conv(b))); \
+#define SIMD_WRAPPER_2_(op, intrin, mask)  \
+    static SIMDINLINE Float SIMDCALL op(Float a, Float b)   \
+    {\
+        return __conv(_mm512_maskz_##intrin((mask), __conv(a), __conv(b)));\
     }
-#define SIMD_WRAPPER_2(op) SIMD_WRAPPER_2_(op, op, __mmask16(0xf))
+#define SIMD_WRAPPER_2(op)  SIMD_WRAPPER_2_(op, op, __mmask16(0xf))
 
-#define SIMD_WRAPPER_2I(op)                                                \
-    template <int ImmT>                                                    \
-    static SIMDINLINE Float SIMDCALL op(Float a, Float b)                  \
-    {                                                                      \
-        return __conv(_mm512_maskz_##op(0xf, __conv(a), __conv(b), ImmT)); \
+#define SIMD_WRAPPER_2I(op)  \
+    template<int ImmT>\
+    static SIMDINLINE Float SIMDCALL op(Float a, Float b)   \
+    {\
+        return __conv(_mm512_maskz_##op(0xf, __conv(a), __conv(b), ImmT));\
     }
 
-#define SIMD_WRAPPER_3_(op, intrin, mask)                                              \
-    static SIMDINLINE Float SIMDCALL op(Float a, Float b, Float c)                     \
-    {                                                                                  \
-        return __conv(_mm512_maskz_##intrin((mask), __conv(a), __conv(b), __conv(c))); \
+#define SIMD_WRAPPER_3_(op, intrin, mask)  \
+    static SIMDINLINE Float SIMDCALL op(Float a, Float b, Float c)   \
+    {\
+        return __conv(_mm512_maskz_##intrin((mask), __conv(a), __conv(b), __conv(c)));\
     }
-#define SIMD_WRAPPER_3(op) SIMD_WRAPPER_3_(op, op, __mmask16(0xf))
+#define SIMD_WRAPPER_3(op)  SIMD_WRAPPER_3_(op, op, __mmask16(0xf))
 
-#define SIMD_DWRAPPER_1_(op, intrin, mask)                       \
-    static SIMDINLINE Double SIMDCALL op(Double a)               \
-    {                                                            \
-        return __conv(_mm512_maskz_##intrin((mask), __conv(a))); \
+#define SIMD_DWRAPPER_1_(op, intrin, mask)  \
+    static SIMDINLINE Double SIMDCALL op(Double a)   \
+    {\
+        return __conv(_mm512_maskz_##intrin((mask), __conv(a)));\
     }
-#define SIMD_DWRAPPER_1(op) SIMD_DWRAPPER_1_(op, op, __mmask8(0x3))
+#define SIMD_DWRAPPER_1(op)  SIMD_DWRAPPER_1_(op, op, __mmask8(0x3))
 
-#define SIMD_DWRAPPER_1I_(op, intrin, mask)                            \
-    template <int ImmT>                                                \
-    static SIMDINLINE Double SIMDCALL op(Double a)                     \
-    {                                                                  \
-        return __conv(_mm512_maskz_##intrin((mask), __conv(a), ImmT)); \
+#define SIMD_DWRAPPER_1I_(op, intrin, mask)  \
+    template<int ImmT> \
+    static SIMDINLINE Double SIMDCALL op(Double a)   \
+    {\
+        return __conv(_mm512_maskz_##intrin((mask), __conv(a), ImmT));\
     }
-#define SIMD_DWRAPPER_1I(op) SIMD_DWRAPPER_1I_(op, op, __mmask8(0x3))
+#define SIMD_DWRAPPER_1I(op)  SIMD_DWRAPPER_1I_(op, op, __mmask8(0x3))
 
-#define SIMD_DWRAPPER_2_(op, intrin, mask)                                  \
-    static SIMDINLINE Double SIMDCALL op(Double a, Double b)                \
-    {                                                                       \
-        return __conv(_mm512_maskz_##intrin((mask), __conv(a), __conv(b))); \
+#define SIMD_DWRAPPER_2_(op, intrin, mask)  \
+    static SIMDINLINE Double SIMDCALL op(Double a, Double b)   \
+    {\
+        return __conv(_mm512_maskz_##intrin((mask), __conv(a), __conv(b)));\
     }
-#define SIMD_DWRAPPER_2(op) SIMD_DWRAPPER_2_(op, op, __mmask8(0x3))
+#define SIMD_DWRAPPER_2(op)  SIMD_DWRAPPER_2_(op, op, __mmask8(0x3))
 
-#define SIMD_DWRAPPER_2I(op)                                               \
-    template <int ImmT>                                                    \
-    static SIMDINLINE Double SIMDCALL op(Double a, Double b)               \
-    {                                                                      \
-        return __conv(_mm512_maskz_##op(0x3, __conv(a), __conv(b), ImmT)); \
+#define SIMD_DWRAPPER_2I(op)  \
+    template<int ImmT>\
+    static SIMDINLINE Double SIMDCALL op(Double a, Double b)   \
+    {\
+        return __conv(_mm512_maskz_##op(0x3, __conv(a), __conv(b), ImmT));\
     }
 
-#define SIMD_IWRAPPER_1_(op, intrin, mask)                       \
-    static SIMDINLINE Integer SIMDCALL op(Integer a)             \
-    {                                                            \
-        return __conv(_mm512_maskz_##intrin((mask), __conv(a))); \
+#define SIMD_IWRAPPER_1_(op, intrin, mask)  \
+    static SIMDINLINE Integer SIMDCALL op(Integer a)   \
+    {\
+        return __conv(_mm512_maskz_##intrin((mask), __conv(a)));\
     }
-#define SIMD_IWRAPPER_1_8(op) SIMD_IWRAPPER_1_(op, op, __mmask64(0xffffull))
-#define SIMD_IWRAPPER_1_16(op) SIMD_IWRAPPER_1_(op, op, __mmask32(0xff))
-#define SIMD_IWRAPPER_1_64(op) SIMD_IWRAPPER_1_(op, op, __mmask8(0x3))
-
-#define SIMD_IWRAPPER_1I_(op, intrin, mask)                            \
-    template <int ImmT>                                                \
-    static SIMDINLINE Integer SIMDCALL op(Integer a)                   \
-    {                                                                  \
-        return __conv(_mm512_maskz_##intrin((mask), __conv(a), ImmT)); \
+#define SIMD_IWRAPPER_1_8(op)   SIMD_IWRAPPER_1_(op, op, __mmask64(0xffffull))
+#define SIMD_IWRAPPER_1_16(op)  SIMD_IWRAPPER_1_(op, op, __mmask32(0xff))
+#define SIMD_IWRAPPER_1_64(op)  SIMD_IWRAPPER_1_(op, op, __mmask8(0x3))
+
+#define SIMD_IWRAPPER_1I_(op, intrin, mask)  \
+    template<int ImmT> \
+    static SIMDINLINE Integer SIMDCALL op(Integer a)   \
+    {\
+        return __conv(_mm512_maskz_##intrin((mask), __conv(a), ImmT));\
     }
-#define SIMD_IWRAPPER_1I_8(op) SIMD_IWRAPPER_1I_(op, op, __mmask64(0xffffull))
-#define SIMD_IWRAPPER_1I_16(op) SIMD_IWRAPPER_1I_(op, op, __mmask32(0xff))
-#define SIMD_IWRAPPER_1I_64(op) SIMD_IWRAPPER_1I_(op, op, __mmask8(0x3))
-
-#define SIMD_IWRAPPER_2_(op, intrin, mask)                                  \
-    static SIMDINLINE Integer SIMDCALL op(Integer a, Integer b)             \
-    {                                                                       \
-        return __conv(_mm512_maskz_##intrin((mask), __conv(a), __conv(b))); \
+#define SIMD_IWRAPPER_1I_8(op)   SIMD_IWRAPPER_1I_(op, op, __mmask64(0xffffull))
+#define SIMD_IWRAPPER_1I_16(op)  SIMD_IWRAPPER_1I_(op, op, __mmask32(0xff))
+#define SIMD_IWRAPPER_1I_64(op)  SIMD_IWRAPPER_1I_(op, op, __mmask8(0x3))
+
+#define SIMD_IWRAPPER_2_(op, intrin, mask)  \
+    static SIMDINLINE Integer SIMDCALL op(Integer a, Integer b)   \
+    {\
+        return __conv(_mm512_maskz_##intrin((mask), __conv(a), __conv(b)));\
     }
-#define SIMD_IWRAPPER_2_8(op) SIMD_IWRAPPER_2_(op, op, __mmask64(0xffffull))
-#define SIMD_IWRAPPER_2_16(op) SIMD_IWRAPPER_2_(op, op, __mmask32(0xff))
-#define SIMD_IWRAPPER_2_64(op) SIMD_IWRAPPER_2_(op, op, __mmask8(0x3))
-
-#define SIMD_IWRAPPER_2I(op)                                               \
-    template <int ImmT>                                                    \
-    static SIMDINLINE Integer SIMDCALL op(Integer a, Integer b)            \
-    {                                                                      \
-        return __conv(_mm512_maskz_##op(0xf, __conv(a), __conv(b), ImmT)); \
+#define SIMD_IWRAPPER_2_8(op)   SIMD_IWRAPPER_2_(op, op, __mmask64(0xffffull))
+#define SIMD_IWRAPPER_2_16(op)  SIMD_IWRAPPER_2_(op, op, __mmask32(0xff))
+#define SIMD_IWRAPPER_2_64(op)  SIMD_IWRAPPER_2_(op, op, __mmask8(0x3))
+
+#define SIMD_IWRAPPER_2I(op)  \
+    template<int ImmT>\
+    static SIMDINLINE Integer SIMDCALL op(Integer a, Integer b)   \
+    {\
+        return __conv(_mm512_maskz_##op(0xf, __conv(a), __conv(b), ImmT));\
     }
 
-SIMD_IWRAPPER_2_8(add_epi8);      // return a + b (int8)
-SIMD_IWRAPPER_2_8(adds_epu8);     // return ((a + b) > 0xff) ? 0xff : (a + b) (uint8)
-SIMD_IWRAPPER_2_64(sub_epi64);    // return a - b (int64)
-SIMD_IWRAPPER_2_8(subs_epu8);     // return (b > a) ? 0 : (a - b) (uint8)
-SIMD_IWRAPPER_2_8(packs_epi16);   // int16 --> int8    See documentation for _mm256_packs_epi16 and
-                                  // _mm512_packs_epi16
-SIMD_IWRAPPER_2_16(packs_epi32);  // int32 --> int16   See documentation for _mm256_packs_epi32 and
-                                  // _mm512_packs_epi32
-SIMD_IWRAPPER_2_8(packus_epi16);  // uint16 --> uint8  See documentation for _mm256_packus_epi16 and
-                                  // _mm512_packus_epi16
-SIMD_IWRAPPER_2_16(packus_epi32); // uint32 --> uint16 See documentation for _mm256_packus_epi32 and
-                                  // _mm512_packus_epi32
+SIMD_IWRAPPER_2_8(add_epi8);    // return a + b (int8)
+SIMD_IWRAPPER_2_8(adds_epu8);   // return ((a + b) > 0xff) ? 0xff : (a + b) (uint8) 
+SIMD_IWRAPPER_2_64(sub_epi64);  // return a - b (int64)
+SIMD_IWRAPPER_2_8(subs_epu8);   // return (b > a) ? 0 : (a - b) (uint8)
+SIMD_IWRAPPER_2_8(packs_epi16);     // int16 --> int8    See documentation for _mm256_packs_epi16 and _mm512_packs_epi16
+SIMD_IWRAPPER_2_16(packs_epi32);    // int32 --> int16   See documentation for _mm256_packs_epi32 and _mm512_packs_epi32
+SIMD_IWRAPPER_2_8(packus_epi16);    // uint16 --> uint8  See documentation for _mm256_packus_epi16 and _mm512_packus_epi16
+SIMD_IWRAPPER_2_16(packus_epi32);   // uint32 --> uint16 See documentation for _mm256_packus_epi32 and _mm512_packus_epi32
 SIMD_IWRAPPER_2_16(unpackhi_epi16);
 SIMD_IWRAPPER_2_64(unpackhi_epi64);
 SIMD_IWRAPPER_2_8(unpackhi_epi8);
@@ -155,7 +151,8 @@ SIMD_IWRAPPER_2_8(unpacklo_epi8);
 static SIMDINLINE uint32_t SIMDCALL movemask_epi8(Integer a)
 {
     __mmask64 m = 0xffffull;
-    return static_cast<uint32_t>(_mm512_mask_test_epi8_mask(m, __conv(a), _mm512_set1_epi8(0x80)));
+    return static_cast<uint32_t>(
+        _mm512_mask_test_epi8_mask(m, __conv(a), _mm512_set1_epi8(0x80)));
 }
 
 #undef SIMD_WRAPPER_1_
diff --git a/lib/mesa/src/gallium/drivers/swr/rasterizer/common/simdlib_128_avx512_knights.inl b/lib/mesa/src/gallium/drivers/swr/rasterizer/common/simdlib_128_avx512_knights.inl
index 1b6592e20..b0cae5034 100644
--- a/lib/mesa/src/gallium/drivers/swr/rasterizer/common/simdlib_128_avx512_knights.inl
+++ b/lib/mesa/src/gallium/drivers/swr/rasterizer/common/simdlib_128_avx512_knights.inl
@@ -1,25 +1,25 @@
 /****************************************************************************
- * Copyright (C) 2017 Intel Corporation.   All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- ****************************************************************************/
+* Copyright (C) 2017 Intel Corporation.   All Rights Reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a
+* copy of this software and associated documentation files (the "Software"),
+* to deal in the Software without restriction, including without limitation
+* the rights to use, copy, modify, merge, publish, distribute, sublicense,
+* and/or sell copies of the Software, and to permit persons to whom the
+* Software is furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice (including the next
+* paragraph) shall be included in all copies or substantial portions of the
+* Software.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+* IN THE SOFTWARE.
+****************************************************************************/
 #if !defined(__SIMD_LIB_AVX512_HPP__)
 #error Do not include this file directly, use "simdlib.hpp" instead.
 #endif
@@ -32,3 +32,4 @@
 // These use native AVX512 instructions with masking to enable a larger
 // register set.
 //============================================================================
+
diff --git a/lib/mesa/src/gallium/drivers/swr/rasterizer/common/simdlib_256_avx512_core.inl b/lib/mesa/src/gallium/drivers/swr/rasterizer/common/simdlib_256_avx512_core.inl
index 1acdc7e07..6ffe7c2a0 100644
--- a/lib/mesa/src/gallium/drivers/swr/rasterizer/common/simdlib_256_avx512_core.inl
+++ b/lib/mesa/src/gallium/drivers/swr/rasterizer/common/simdlib_256_avx512_core.inl
@@ -1,25 +1,25 @@
 /****************************************************************************
- * Copyright (C) 2017 Intel Corporation.   All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- ****************************************************************************/
+* Copyright (C) 2017 Intel Corporation.   All Rights Reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a
+* copy of this software and associated documentation files (the "Software"),
+* to deal in the Software without restriction, including without limitation
+* the rights to use, copy, modify, merge, publish, distribute, sublicense,
+* and/or sell copies of the Software, and to permit persons to whom the
+* Software is furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice (including the next
+* paragraph) shall be included in all copies or substantial portions of the
+* Software.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+* IN THE SOFTWARE.
+****************************************************************************/
 #if !defined(__SIMD_LIB_AVX512_HPP__)
 #error Do not include this file directly, use "simdlib.hpp" instead.
 #endif
@@ -33,68 +33,65 @@
 // register set.
 //============================================================================
 
-#define SIMD_DWRAPPER_1_(op, intrin, mask)                       \
-    static SIMDINLINE Double SIMDCALL op(Double a)               \
-    {                                                            \
-        return __conv(_mm512_maskz_##intrin((mask), __conv(a))); \
+#define SIMD_DWRAPPER_1_(op, intrin, mask)  \
+    static SIMDINLINE Double SIMDCALL op(Double a)   \
+    {\
+        return __conv(_mm512_maskz_##intrin((mask), __conv(a)));\
     }
-#define SIMD_DWRAPPER_1(op) SIMD_DWRAPPER_1_(op, op, __mmask8(0xf))
+#define SIMD_DWRAPPER_1(op)  SIMD_DWRAPPER_1_(op, op, __mmask8(0xf))
 
-#define SIMD_DWRAPPER_1I_(op, intrin, mask)                            \
-    template <int ImmT>                                                \
-    static SIMDINLINE Double SIMDCALL op(Double a)                     \
-    {                                                                  \
-        return __conv(_mm512_maskz_##intrin((mask), __conv(a), ImmT)); \
+#define SIMD_DWRAPPER_1I_(op, intrin, mask)  \
+    template<int ImmT> \
+    static SIMDINLINE Double SIMDCALL op(Double a)   \
+    {\
+        return __conv(_mm512_maskz_##intrin((mask), __conv(a), ImmT));\
     }
-#define SIMD_DWRAPPER_1I(op) SIMD_DWRAPPER_1I_(op, op, __mmask8(0xf))
+#define SIMD_DWRAPPER_1I(op)  SIMD_DWRAPPER_1I_(op, op, __mmask8(0xf))
 
-#define SIMD_DWRAPPER_2_(op, intrin, mask)                                  \
-    static SIMDINLINE Double SIMDCALL op(Double a, Double b)                \
-    {                                                                       \
-        return __conv(_mm512_maskz_##intrin((mask), __conv(a), __conv(b))); \
+#define SIMD_DWRAPPER_2_(op, intrin, mask)  \
+    static SIMDINLINE Double SIMDCALL op(Double a, Double b)   \
+    {\
+        return __conv(_mm512_maskz_##intrin((mask), __conv(a), __conv(b)));\
     }
-#define SIMD_DWRAPPER_2(op) SIMD_DWRAPPER_2_(op, op, __mmask8(0xf))
+#define SIMD_DWRAPPER_2(op)  SIMD_DWRAPPER_2_(op, op, __mmask8(0xf))
 
-#define SIMD_IWRAPPER_1_(op, intrin, mask)                       \
-    static SIMDINLINE Integer SIMDCALL op(Integer a)             \
-    {                                                            \
-        return __conv(_mm512_maskz_##intrin((mask), __conv(a))); \
+#define SIMD_IWRAPPER_1_(op, intrin, mask)  \
+    static SIMDINLINE Integer SIMDCALL op(Integer a)   \
+    {\
+        return __conv(_mm512_maskz_##intrin((mask), __conv(a)));\
     }
-#define SIMD_IWRAPPER_1_8(op) SIMD_IWRAPPER_1_(op, op, __mmask64(0xffffffffull))
-#define SIMD_IWRAPPER_1_16(op) SIMD_IWRAPPER_1_(op, op, __mmask32(0xffff))
-#define SIMD_IWRAPPER_1_64(op) SIMD_IWRAPPER_1_(op, op, __mmask8(0xf))
+#define SIMD_IWRAPPER_1_8(op)   SIMD_IWRAPPER_1_(op, op, __mmask64(0xffffffffull))
+#define SIMD_IWRAPPER_1_16(op)  SIMD_IWRAPPER_1_(op, op, __mmask32(0xffff))
+#define SIMD_IWRAPPER_1_64(op)  SIMD_IWRAPPER_1_(op, op, __mmask8(0xf))
 
-#define SIMD_IWRAPPER_1I_(op, intrin, mask)                            \
-    template <int ImmT>                                                \
-    static SIMDINLINE Integer SIMDCALL op(Integer a)                   \
-    {                                                                  \
-        return __conv(_mm512_maskz_##intrin((mask), __conv(a), ImmT)); \
+#define SIMD_IWRAPPER_1I_(op, intrin, mask)  \
+    template<int ImmT> \
+    static SIMDINLINE Integer SIMDCALL op(Integer a)   \
+    {\
+        return __conv(_mm512_maskz_##intrin((mask), __conv(a), ImmT));\
     }
-#define SIMD_IWRAPPER_1I_8(op) SIMD_IWRAPPER_1I_(op, op, __mmask64(0xffffffffull))
-#define SIMD_IWRAPPER_1I_16(op) SIMD_IWRAPPER_1I_(op, op, __mmask32(0xffff))
-#define SIMD_IWRAPPER_1I_64(op) SIMD_IWRAPPER_1I_(op, op, __mmask8(0xf))
+#define SIMD_IWRAPPER_1I_8(op)   SIMD_IWRAPPER_1I_(op, op, __mmask64(0xffffffffull))
+#define SIMD_IWRAPPER_1I_16(op)  SIMD_IWRAPPER_1I_(op, op, __mmask32(0xffff))
+#define SIMD_IWRAPPER_1I_64(op)  SIMD_IWRAPPER_1I_(op, op, __mmask8(0xf))
 
-#define SIMD_IWRAPPER_2_(op, intrin, mask)                                  \
-    static SIMDINLINE Integer SIMDCALL op(Integer a, Integer b)             \
-    {                                                                       \
-        return __conv(_mm512_maskz_##intrin((mask), __conv(a), __conv(b))); \
+#define SIMD_IWRAPPER_2_(op, intrin, mask)  \
+    static SIMDINLINE Integer SIMDCALL op(Integer a, Integer b)   \
+    {\
+        return __conv(_mm512_maskz_##intrin((mask), __conv(a), __conv(b)));\
     }
-#define SIMD_IWRAPPER_2_8(op) SIMD_IWRAPPER_2_(op, op, __mmask64(0xffffffffull))
-#define SIMD_IWRAPPER_2_16(op) SIMD_IWRAPPER_2_(op, op, __mmask32(0xffff))
-#define SIMD_IWRAPPER_2_64(op) SIMD_IWRAPPER_2_(op, op, __mmask8(0xf))
+#define SIMD_IWRAPPER_2_8(op)   SIMD_IWRAPPER_2_(op, op, __mmask64(0xffffffffull))
+#define SIMD_IWRAPPER_2_16(op)  SIMD_IWRAPPER_2_(op, op, __mmask32(0xffff))
+#define SIMD_IWRAPPER_2_64(op)  SIMD_IWRAPPER_2_(op, op, __mmask8(0xf))
 
-SIMD_IWRAPPER_2_8(add_epi8);      // return a + b (int8)
-SIMD_IWRAPPER_2_8(adds_epu8);     // return ((a + b) > 0xff) ? 0xff : (a + b) (uint8)
-SIMD_IWRAPPER_2_64(sub_epi64);    // return a - b (int64)
-SIMD_IWRAPPER_2_8(subs_epu8);     // return (b > a) ? 0 : (a - b) (uint8)
-SIMD_IWRAPPER_2_8(packs_epi16);   // int16 --> int8    See documentation for _mm256_packs_epi16 and
-                                  // _mm512_packs_epi16
-SIMD_IWRAPPER_2_16(packs_epi32);  // int32 --> int16   See documentation for _mm256_packs_epi32 and
-                                  // _mm512_packs_epi32
-SIMD_IWRAPPER_2_8(packus_epi16);  // uint16 --> uint8  See documentation for _mm256_packus_epi16 and
-                                  // _mm512_packus_epi16
-SIMD_IWRAPPER_2_16(packus_epi32); // uint32 --> uint16 See documentation for _mm256_packus_epi32 and
-                                  // _mm512_packus_epi32
+
+SIMD_IWRAPPER_2_8(add_epi8);    // return a + b (int8)
+SIMD_IWRAPPER_2_8(adds_epu8);   // return ((a + b) > 0xff) ? 0xff : (a + b) (uint8) 
+SIMD_IWRAPPER_2_64(sub_epi64);  // return a - b (int64)
+SIMD_IWRAPPER_2_8(subs_epu8);   // return (b > a) ? 0 : (a - b) (uint8)
+SIMD_IWRAPPER_2_8(packs_epi16);     // int16 --> int8    See documentation for _mm256_packs_epi16 and _mm512_packs_epi16
+SIMD_IWRAPPER_2_16(packs_epi32);    // int32 --> int16   See documentation for _mm256_packs_epi32 and _mm512_packs_epi32
+SIMD_IWRAPPER_2_8(packus_epi16);    // uint16 --> uint8  See documentation for _mm256_packus_epi16 and _mm512_packus_epi16
+SIMD_IWRAPPER_2_16(packus_epi32);   // uint32 --> uint16 See documentation for _mm256_packus_epi32 and _mm512_packus_epi32
 SIMD_IWRAPPER_2_16(unpackhi_epi16);
 SIMD_IWRAPPER_2_64(unpackhi_epi64);
 SIMD_IWRAPPER_2_8(unpackhi_epi8);
@@ -105,7 +102,8 @@ SIMD_IWRAPPER_2_8(unpacklo_epi8);
 static SIMDINLINE uint32_t SIMDCALL movemask_epi8(Integer a)
 {
     __mmask64 m = 0xffffffffull;
-    return static_cast<uint32_t>(_mm512_mask_test_epi8_mask(m, __conv(a), _mm512_set1_epi8(0x80)));
+    return static_cast<uint32_t>(
+        _mm512_mask_test_epi8_mask(m, __conv(a), _mm512_set1_epi8(0x80)));
 }
 
 #undef SIMD_DWRAPPER_1_
diff --git a/lib/mesa/src/gallium/drivers/swr/rasterizer/common/simdlib_256_avx512_knights.inl b/lib/mesa/src/gallium/drivers/swr/rasterizer/common/simdlib_256_avx512_knights.inl
index 52b6ca2b6..acd8ffd96 100644
--- a/lib/mesa/src/gallium/drivers/swr/rasterizer/common/simdlib_256_avx512_knights.inl
+++ b/lib/mesa/src/gallium/drivers/swr/rasterizer/common/simdlib_256_avx512_knights.inl
@@ -1,25 +1,25 @@
 /****************************************************************************
- * Copyright (C) 2017 Intel Corporation.   All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- ****************************************************************************/
+* Copyright (C) 2017 Intel Corporation.   All Rights Reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a
+* copy of this software and associated documentation files (the "Software"),
+* to deal in the Software without restriction, including without limitation
+* the rights to use, copy, modify, merge, publish, distribute, sublicense,
+* and/or sell copies of the Software, and to permit persons to whom the
+* Software is furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice (including the next
+* paragraph) shall be included in all copies or substantial portions of the
+* Software.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+* IN THE SOFTWARE.
+****************************************************************************/
 #if !defined(__SIMD_LIB_AVX512_HPP__)
 #error Do not include this file directly, use "simdlib.hpp" instead.
 #endif
@@ -32,3 +32,4 @@
 // These use native AVX512 instructions with masking to enable a larger
 // register set.
 //============================================================================
+
diff --git a/lib/mesa/src/gallium/drivers/swr/rasterizer/common/simdlib_512_avx512_core.inl b/lib/mesa/src/gallium/drivers/swr/rasterizer/common/simdlib_512_avx512_core.inl
index 82aa2bb41..fed6307f4 100644
--- a/lib/mesa/src/gallium/drivers/swr/rasterizer/common/simdlib_512_avx512_core.inl
+++ b/lib/mesa/src/gallium/drivers/swr/rasterizer/common/simdlib_512_avx512_core.inl
@@ -1,25 +1,25 @@
 /****************************************************************************
- * Copyright (C) 2017 Intel Corporation.   All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- ****************************************************************************/
+* Copyright (C) 2017 Intel Corporation.   All Rights Reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a
+* copy of this software and associated documentation files (the "Software"),
+* to deal in the Software without restriction, including without limitation
+* the rights to use, copy, modify, merge, publish, distribute, sublicense,
+* and/or sell copies of the Software, and to permit persons to whom the
+* Software is furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice (including the next
+* paragraph) shall be included in all copies or substantial portions of the
+* Software.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+* IN THE SOFTWARE.
+****************************************************************************/
 #if !defined(__SIMD_LIB_AVX512_HPP__)
 #error Do not include this file directly, use "simdlib.hpp" instead.
 #endif
@@ -29,111 +29,139 @@
 //
 //============================================================================
 
-#define SIMD_WRAPPER_1_(op, intrin) \
-    static SIMDINLINE Float SIMDCALL op(Float a) { return intrin(a); }
+#define SIMD_WRAPPER_1_(op, intrin)  \
+    static SIMDINLINE Float SIMDCALL op(Float a)   \
+    {\
+        return intrin(a);\
+    }
 
-#define SIMD_WRAPPER_1(op) SIMD_WRAPPER_1_(op, _mm512_##op)
+#define SIMD_WRAPPER_1(op)  \
+    SIMD_WRAPPER_1_(op, _mm512_##op)
 
-#define SIMD_WRAPPER_2_(op, intrin) \
-    static SIMDINLINE Float SIMDCALL op(Float a, Float b) { return _mm512_##intrin(a, b); }
+#define SIMD_WRAPPER_2_(op, intrin)  \
+    static SIMDINLINE Float SIMDCALL op(Float a, Float b)   \
+    {\
+        return _mm512_##intrin(a, b);\
+    }
 #define SIMD_WRAPPER_2(op) SIMD_WRAPPER_2_(op, op)
 
-#define SIMD_WRAPPERI_2_(op, intrin)                                          \
-    static SIMDINLINE Float SIMDCALL op(Float a, Float b)                     \
-    {                                                                         \
-        return _mm512_castsi512_ps(                                           \
-            _mm512_##intrin(_mm512_castps_si512(a), _mm512_castps_si512(b))); \
+#define SIMD_WRAPPERI_2_(op, intrin)  \
+    static SIMDINLINE Float SIMDCALL op(Float a, Float b)   \
+    {\
+        return _mm512_castsi512_ps(_mm512_##intrin(\
+            _mm512_castps_si512(a), _mm512_castps_si512(b)));\
     }
 
-#define SIMD_DWRAPPER_2(op) \
-    static SIMDINLINE Double SIMDCALL op(Double a, Double b) { return _mm512_##op(a, b); }
+#define SIMD_DWRAPPER_2(op)  \
+    static SIMDINLINE Double SIMDCALL op(Double a, Double b)   \
+    {\
+        return _mm512_##op(a, b);\
+    }
 
-#define SIMD_WRAPPER_2I_(op, intrin)                      \
-    template <int ImmT>                                   \
-    static SIMDINLINE Float SIMDCALL op(Float a, Float b) \
-    {                                                     \
-        return _mm512_##intrin(a, b, ImmT);               \
+#define SIMD_WRAPPER_2I_(op, intrin)  \
+    template<int ImmT>\
+    static SIMDINLINE Float SIMDCALL op(Float a, Float b)   \
+    {\
+        return _mm512_##intrin(a, b, ImmT);\
     }
-#define SIMD_WRAPPER_2I(op) SIMD_WRAPPER_2I_(op, op)
+#define SIMD_WRAPPER_2I(op)  SIMD_WRAPPER_2I_(op, op)
 
-#define SIMD_DWRAPPER_2I_(op, intrin)                        \
-    template <int ImmT>                                      \
-    static SIMDINLINE Double SIMDCALL op(Double a, Double b) \
-    {                                                        \
-        return _mm512_##intrin(a, b, ImmT);                  \
+#define SIMD_DWRAPPER_2I_(op, intrin)  \
+    template<int ImmT>\
+    static SIMDINLINE Double SIMDCALL op(Double a, Double b)   \
+    {\
+        return _mm512_##intrin(a, b, ImmT);\
     }
-#define SIMD_DWRAPPER_2I(op) SIMD_DWRAPPER_2I_(op, op)
+#define SIMD_DWRAPPER_2I(op)  SIMD_DWRAPPER_2I_(op, op)
 
-#define SIMD_WRAPPER_3(op) \
-    static SIMDINLINE Float SIMDCALL op(Float a, Float b, Float c) { return _mm512_##op(a, b, c); }
+#define SIMD_WRAPPER_3(op)  \
+    static SIMDINLINE Float SIMDCALL op(Float a, Float b, Float c)   \
+    {\
+        return _mm512_##op(a, b, c);\
+    }
 
-#define SIMD_IWRAPPER_1(op) \
-    static SIMDINLINE Integer SIMDCALL op(Integer a) { return _mm512_##op(a); }
-#define SIMD_IWRAPPER_1_8(op) \
-    static SIMDINLINE Integer SIMDCALL op(SIMD256Impl::Integer a) { return _mm512_##op(a); }
+#define SIMD_IWRAPPER_1(op)  \
+    static SIMDINLINE Integer SIMDCALL op(Integer a)   \
+    {\
+        return _mm512_##op(a);\
+    }
+#define SIMD_IWRAPPER_1_8(op)  \
+    static SIMDINLINE Integer SIMDCALL op(SIMD256Impl::Integer a)   \
+    {\
+        return _mm512_##op(a);\
+    }
 
-#define SIMD_IWRAPPER_1_4(op) \
-    static SIMDINLINE Integer SIMDCALL op(SIMD128Impl::Integer a) { return _mm512_##op(a); }
+#define SIMD_IWRAPPER_1_4(op)  \
+    static SIMDINLINE Integer SIMDCALL op(SIMD128Impl::Integer a)   \
+    {\
+        return _mm512_##op(a);\
+    }
 
-#define SIMD_IWRAPPER_1I_(op, intrin)                \
-    template <int ImmT>                              \
-    static SIMDINLINE Integer SIMDCALL op(Integer a) \
-    {                                                \
-        return intrin(a, ImmT);                      \
+#define SIMD_IWRAPPER_1I_(op, intrin)  \
+    template<int ImmT> \
+    static SIMDINLINE Integer SIMDCALL op(Integer a)   \
+    {\
+        return intrin(a, ImmT);\
     }
 #define SIMD_IWRAPPER_1I(op) SIMD_IWRAPPER_1I_(op, _mm512_##op)
 
-#define SIMD_IWRAPPER_2_(op, intrin) \
-    static SIMDINLINE Integer SIMDCALL op(Integer a, Integer b) { return _mm512_##intrin(a, b); }
-#define SIMD_IWRAPPER_2(op) SIMD_IWRAPPER_2_(op, op)
+#define SIMD_IWRAPPER_2_(op, intrin)  \
+    static SIMDINLINE Integer SIMDCALL op(Integer a, Integer b)   \
+    {\
+        return _mm512_##intrin(a, b);\
+    }
+#define SIMD_IWRAPPER_2(op)  SIMD_IWRAPPER_2_(op, op)
 
-#define SIMD_IWRAPPER_2_CMP(op, cmp) \
-    static SIMDINLINE Integer SIMDCALL op(Integer a, Integer b) { return cmp(a, b); }
+#define SIMD_IWRAPPER_2_CMP(op, cmp)  \
+    static SIMDINLINE Integer SIMDCALL op(Integer a, Integer b)   \
+    {\
+        return cmp(a, b);\
+    }
 
-#define SIMD_IFWRAPPER_2(op, intrin)                                   \
-    static SIMDINLINE Integer SIMDCALL op(Integer a, Integer b)        \
-    {                                                                  \
-        return castps_si(_mm512_##intrin(castsi_ps(a), castsi_ps(b))); \
+#define SIMD_IFWRAPPER_2(op, intrin)  \
+    static SIMDINLINE Integer SIMDCALL op(Integer a, Integer b)   \
+    {\
+        return castps_si(_mm512_##intrin(castsi_ps(a), castsi_ps(b)) );\
     }
 
-#define SIMD_IWRAPPER_2I_(op, intrin)                           \
-    template <int ImmT>                                         \
-    static SIMDINLINE Integer SIMDCALL op(Integer a, Integer b) \
-    {                                                           \
-        return _mm512_##intrin(a, b, ImmT);                     \
+#define SIMD_IWRAPPER_2I_(op, intrin)  \
+    template<int ImmT>\
+    static SIMDINLINE Integer SIMDCALL op(Integer a, Integer b)   \
+    {\
+        return _mm512_##intrin(a, b, ImmT);\
     }
 #define SIMD_IWRAPPER_2I(op) SIMD_IWRAPPER_2I_(op, op)
 
 private:
-static SIMDINLINE Integer vmask(__mmask32 m)
-{
-    return _mm512_maskz_set1_epi16(m, -1);
-}
-static SIMDINLINE Integer vmask(__mmask64 m)
-{
-    return _mm512_maskz_set1_epi8(m, -1);
-}
-
+    static SIMDINLINE Integer vmask(__mmask32 m)
+    {
+        return _mm512_maskz_set1_epi16(m, -1);
+    }
+    static SIMDINLINE Integer vmask(__mmask64 m)
+    {
+        return _mm512_maskz_set1_epi8(m, -1);
+    }
 public:
-SIMD_IWRAPPER_2(add_epi8);  // return a + b (int8)
-SIMD_IWRAPPER_2(adds_epu8); // return ((a + b) > 0xff) ? 0xff : (a + b) (uint8)
-SIMD_IWRAPPER_2(subs_epu8); // return (b > a) ? 0 : (a - b) (uint8)
 
-SIMD_WRAPPER_2(and_ps);    // return a & b       (float treated as int)
-SIMD_WRAPPER_2(andnot_ps); // return (~a) & b    (float treated as int)
-SIMD_WRAPPER_2(or_ps);     // return a | b       (float treated as int)
-SIMD_WRAPPER_2(xor_ps);    // return a ^ b       (float treated as int)
+SIMD_IWRAPPER_2(add_epi8);                  // return a + b (int8)
+SIMD_IWRAPPER_2(adds_epu8);                 // return ((a + b) > 0xff) ? 0xff : (a + b) (uint8) 
+SIMD_IWRAPPER_2(subs_epu8);                 // return (b > a) ? 0 : (a - b) (uint8)
+
+SIMD_WRAPPER_2(and_ps);                     // return a & b       (float treated as int)
+SIMD_WRAPPER_2(andnot_ps);                  // return (~a) & b    (float treated as int)
+SIMD_WRAPPER_2(or_ps);                      // return a | b       (float treated as int)
+SIMD_WRAPPER_2(xor_ps);                     // return a ^ b       (float treated as int)
 
-SIMD_IWRAPPER_1_8(cvtepu8_epi16); // return (int16)a    (uint8 --> int16)
+SIMD_IWRAPPER_1_8(cvtepu8_epi16);           // return (int16)a    (uint8 --> int16)
 
-template <CompareTypeInt CmpTypeT>
+template<CompareTypeInt CmpTypeT>
 static SIMDINLINE Integer SIMDCALL cmp_epi8(Integer a, Integer b)
 {
     // Legacy vector mask generator
     __mmask64 result = _mm512_cmp_epi8_mask(a, b, static_cast<const int>(CmpTypeT));
     return vmask(result);
 }
-template <CompareTypeInt CmpTypeT>
+template<CompareTypeInt CmpTypeT>
 static SIMDINLINE Integer SIMDCALL cmp_epi16(Integer a, Integer b)
 {
     // Legacy vector mask generator
@@ -141,19 +169,19 @@ static SIMDINLINE Integer SIMDCALL cmp_epi16(Integer a, Integer b)
     return vmask(result);
 }
 
-SIMD_IWRAPPER_2_CMP(cmpeq_epi8, cmp_epi8<CompareTypeInt::EQ>);   // return a == b (int8)
-SIMD_IWRAPPER_2_CMP(cmpeq_epi16, cmp_epi16<CompareTypeInt::EQ>); // return a == b (int16)
-SIMD_IWRAPPER_2_CMP(cmpgt_epi8, cmp_epi8<CompareTypeInt::GT>);   // return a > b (int8)
-SIMD_IWRAPPER_2_CMP(cmpgt_epi16, cmp_epi16<CompareTypeInt::GT>); // return a > b (int16)
+SIMD_IWRAPPER_2_CMP(cmpeq_epi8,  cmp_epi8<CompareTypeInt::EQ>);    // return a == b (int8)
+SIMD_IWRAPPER_2_CMP(cmpeq_epi16, cmp_epi16<CompareTypeInt::EQ>);   // return a == b (int16)
+SIMD_IWRAPPER_2_CMP(cmpgt_epi8,  cmp_epi8<CompareTypeInt::GT>);    // return a > b (int8)
+SIMD_IWRAPPER_2_CMP(cmpgt_epi16, cmp_epi16<CompareTypeInt::GT>);   // return a > b (int16)
 
-SIMD_IWRAPPER_2(packs_epi16);  // See documentation for _mm512_packs_epi16
-SIMD_IWRAPPER_2(packs_epi32);  // See documentation for _mm512_packs_epi32
-SIMD_IWRAPPER_2(packus_epi16); // See documentation for _mm512_packus_epi16
-SIMD_IWRAPPER_2(packus_epi32); // See documentation for _mm512_packus_epi32
+SIMD_IWRAPPER_2(packs_epi16);               // See documentation for _mm512_packs_epi16
+SIMD_IWRAPPER_2(packs_epi32);               // See documentation for _mm512_packs_epi32
+SIMD_IWRAPPER_2(packus_epi16);              // See documentation for _mm512_packus_epi16
+SIMD_IWRAPPER_2(packus_epi32);              // See documentation for _mm512_packus_epi32
 
-SIMD_IWRAPPER_2(unpackhi_epi8);  // See documentation for _mm512_unpackhi_epi8
-SIMD_IWRAPPER_2(unpacklo_epi16); // See documentation for _mm512_unpacklo_epi16
-SIMD_IWRAPPER_2(unpacklo_epi8);  // See documentation for _mm512_unpacklo_epi8
+SIMD_IWRAPPER_2(unpackhi_epi8);             // See documentation for _mm512_unpackhi_epi8
+SIMD_IWRAPPER_2(unpacklo_epi16);            // See documentation for _mm512_unpacklo_epi16
+SIMD_IWRAPPER_2(unpacklo_epi8);             // See documentation for _mm512_unpacklo_epi8
 
 SIMD_IWRAPPER_2(shuffle_epi8);
 
@@ -163,6 +191,8 @@ static SIMDINLINE uint64_t SIMDCALL movemask_epi8(Integer a)
     return static_cast<uint64_t>(m);
 }
 
+
+
 #undef SIMD_WRAPPER_1_
 #undef SIMD_WRAPPER_1
 #undef SIMD_WRAPPER_2
@@ -184,3 +214,4 @@ static SIMDINLINE uint64_t SIMDCALL movemask_epi8(Integer a)
 #undef SIMD_IWRAPPER_2
 #undef SIMD_IWRAPPER_2_
 #undef SIMD_IWRAPPER_2I
+
diff --git a/lib/mesa/src/gallium/drivers/swr/rasterizer/common/simdlib_512_avx512_knights.inl b/lib/mesa/src/gallium/drivers/swr/rasterizer/common/simdlib_512_avx512_knights.inl
index 9ec3ff6c6..690ab386b 100644
--- a/lib/mesa/src/gallium/drivers/swr/rasterizer/common/simdlib_512_avx512_knights.inl
+++ b/lib/mesa/src/gallium/drivers/swr/rasterizer/common/simdlib_512_avx512_knights.inl
@@ -1,25 +1,25 @@
 /****************************************************************************
- * Copyright (C) 2017 Intel Corporation.   All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- ****************************************************************************/
+* Copyright (C) 2017 Intel Corporation.   All Rights Reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a
+* copy of this software and associated documentation files (the "Software"),
+* to deal in the Software without restriction, including without limitation
+* the rights to use, copy, modify, merge, publish, distribute, sublicense,
+* and/or sell copies of the Software, and to permit persons to whom the
+* Software is furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice (including the next
+* paragraph) shall be included in all copies or substantial portions of the
+* Software.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+* IN THE SOFTWARE.
+****************************************************************************/
 #if !defined(__SIMD_LIB_AVX512_HPP__)
 #error Do not include this file directly, use "simdlib.hpp" instead.
 #endif
@@ -29,85 +29,113 @@
 //
 //============================================================================
 
-#define SIMD_WRAPPER_1_(op, intrin) \
-    static SIMDINLINE Float SIMDCALL op(Float a) { return intrin(a); }
+#define SIMD_WRAPPER_1_(op, intrin)  \
+    static SIMDINLINE Float SIMDCALL op(Float a)   \
+    {\
+        return intrin(a);\
+    }
 
-#define SIMD_WRAPPER_1(op) SIMD_WRAPPER_1_(op, _mm512_##op)
+#define SIMD_WRAPPER_1(op)  \
+    SIMD_WRAPPER_1_(op, _mm512_##op)
 
-#define SIMD_WRAPPER_2_(op, intrin) \
-    static SIMDINLINE Float SIMDCALL op(Float a, Float b) { return _mm512_##intrin(a, b); }
+#define SIMD_WRAPPER_2_(op, intrin)  \
+    static SIMDINLINE Float SIMDCALL op(Float a, Float b)   \
+    {\
+        return _mm512_##intrin(a, b);\
+    }
 #define SIMD_WRAPPER_2(op) SIMD_WRAPPER_2_(op, op)
 
-#define SIMD_WRAPPERI_2_(op, intrin)                                          \
-    static SIMDINLINE Float SIMDCALL op(Float a, Float b)                     \
-    {                                                                         \
-        return _mm512_castsi512_ps(                                           \
-            _mm512_##intrin(_mm512_castps_si512(a), _mm512_castps_si512(b))); \
+#define SIMD_WRAPPERI_2_(op, intrin)  \
+    static SIMDINLINE Float SIMDCALL op(Float a, Float b)   \
+    {\
+        return _mm512_castsi512_ps(_mm512_##intrin(\
+            _mm512_castps_si512(a), _mm512_castps_si512(b)));\
     }
 
-#define SIMD_DWRAPPER_2(op) \
-    static SIMDINLINE Double SIMDCALL op(Double a, Double b) { return _mm512_##op(a, b); }
+#define SIMD_DWRAPPER_2(op)  \
+    static SIMDINLINE Double SIMDCALL op(Double a, Double b)   \
+    {\
+        return _mm512_##op(a, b);\
+    }
 
-#define SIMD_WRAPPER_2I_(op, intrin)                      \
-    template <int ImmT>                                   \
-    static SIMDINLINE Float SIMDCALL op(Float a, Float b) \
-    {                                                     \
-        return _mm512_##intrin(a, b, ImmT);               \
+#define SIMD_WRAPPER_2I_(op, intrin)  \
+    template<int ImmT>\
+    static SIMDINLINE Float SIMDCALL op(Float a, Float b)   \
+    {\
+        return _mm512_##intrin(a, b, ImmT);\
     }
-#define SIMD_WRAPPER_2I(op) SIMD_WRAPPER_2I_(op, op)
+#define SIMD_WRAPPER_2I(op)  SIMD_WRAPPER_2I_(op, op)
 
-#define SIMD_DWRAPPER_2I_(op, intrin)                        \
-    template <int ImmT>                                      \
-    static SIMDINLINE Double SIMDCALL op(Double a, Double b) \
-    {                                                        \
-        return _mm512_##intrin(a, b, ImmT);                  \
+#define SIMD_DWRAPPER_2I_(op, intrin)  \
+    template<int ImmT>\
+    static SIMDINLINE Double SIMDCALL op(Double a, Double b)   \
+    {\
+        return _mm512_##intrin(a, b, ImmT);\
     }
-#define SIMD_DWRAPPER_2I(op) SIMD_DWRAPPER_2I_(op, op)
+#define SIMD_DWRAPPER_2I(op)  SIMD_DWRAPPER_2I_(op, op)
 
-#define SIMD_WRAPPER_3(op) \
-    static SIMDINLINE Float SIMDCALL op(Float a, Float b, Float c) { return _mm512_##op(a, b, c); }
+#define SIMD_WRAPPER_3(op)  \
+    static SIMDINLINE Float SIMDCALL op(Float a, Float b, Float c)   \
+    {\
+        return _mm512_##op(a, b, c);\
+    }
 
-#define SIMD_IWRAPPER_1(op) \
-    static SIMDINLINE Integer SIMDCALL op(Integer a) { return _mm512_##op(a); }
-#define SIMD_IWRAPPER_1_8(op) \
-    static SIMDINLINE Integer SIMDCALL op(SIMD256Impl::Integer a) { return _mm512_##op(a); }
+#define SIMD_IWRAPPER_1(op)  \
+    static SIMDINLINE Integer SIMDCALL op(Integer a)   \
+    {\
+        return _mm512_##op(a);\
+    }
+#define SIMD_IWRAPPER_1_8(op)  \
+    static SIMDINLINE Integer SIMDCALL op(SIMD256Impl::Integer a)   \
+    {\
+        return _mm512_##op(a);\
+    }
 
-#define SIMD_IWRAPPER_1_4(op) \
-    static SIMDINLINE Integer SIMDCALL op(SIMD128Impl::Integer a) { return _mm512_##op(a); }
+#define SIMD_IWRAPPER_1_4(op)  \
+    static SIMDINLINE Integer SIMDCALL op(SIMD128Impl::Integer a)   \
+    {\
+        return _mm512_##op(a);\
+    }
 
-#define SIMD_IWRAPPER_1I_(op, intrin)                \
-    template <int ImmT>                              \
-    static SIMDINLINE Integer SIMDCALL op(Integer a) \
-    {                                                \
-        return intrin(a, ImmT);                      \
+#define SIMD_IWRAPPER_1I_(op, intrin)  \
+    template<int ImmT> \
+    static SIMDINLINE Integer SIMDCALL op(Integer a)   \
+    {\
+        return intrin(a, ImmT);\
     }
 #define SIMD_IWRAPPER_1I(op) SIMD_IWRAPPER_1I_(op, _mm512_##op)
 
-#define SIMD_IWRAPPER_2_(op, intrin) \
-    static SIMDINLINE Integer SIMDCALL op(Integer a, Integer b) { return _mm512_##intrin(a, b); }
-#define SIMD_IWRAPPER_2(op) SIMD_IWRAPPER_2_(op, op)
+#define SIMD_IWRAPPER_2_(op, intrin)  \
+    static SIMDINLINE Integer SIMDCALL op(Integer a, Integer b)   \
+    {\
+        return _mm512_##intrin(a, b);\
+    }
+#define SIMD_IWRAPPER_2(op)  SIMD_IWRAPPER_2_(op, op)
 
-#define SIMD_IWRAPPER_2_CMP(op, cmp) \
-    static SIMDINLINE Integer SIMDCALL op(Integer a, Integer b) { return cmp(a, b); }
+#define SIMD_IWRAPPER_2_CMP(op, cmp)  \
+    static SIMDINLINE Integer SIMDCALL op(Integer a, Integer b)   \
+    {\
+        return cmp(a, b);\
+    }
 
-#define SIMD_IFWRAPPER_2(op, intrin)                                   \
-    static SIMDINLINE Integer SIMDCALL op(Integer a, Integer b)        \
-    {                                                                  \
-        return castps_si(_mm512_##intrin(castsi_ps(a), castsi_ps(b))); \
+#define SIMD_IFWRAPPER_2(op, intrin)  \
+    static SIMDINLINE Integer SIMDCALL op(Integer a, Integer b)   \
+    {\
+        return castps_si(_mm512_##intrin(castsi_ps(a), castsi_ps(b)) );\
     }
 
-#define SIMD_IWRAPPER_2I_(op, intrin)                           \
-    template <int ImmT>                                         \
-    static SIMDINLINE Integer SIMDCALL op(Integer a, Integer b) \
-    {                                                           \
-        return _mm512_##intrin(a, b, ImmT);                     \
+#define SIMD_IWRAPPER_2I_(op, intrin)  \
+    template<int ImmT>\
+    static SIMDINLINE Integer SIMDCALL op(Integer a, Integer b)   \
+    {\
+        return _mm512_##intrin(a, b, ImmT);\
     }
 #define SIMD_IWRAPPER_2I(op) SIMD_IWRAPPER_2I_(op, op)
 
-SIMD_WRAPPERI_2_(and_ps, and_epi32);       // return a & b       (float treated as int)
-SIMD_WRAPPERI_2_(andnot_ps, andnot_epi32); // return (~a) & b    (float treated as int)
-SIMD_WRAPPERI_2_(or_ps, or_epi32);         // return a | b       (float treated as int)
-SIMD_WRAPPERI_2_(xor_ps, xor_epi32);       // return a ^ b       (float treated as int)
+SIMD_WRAPPERI_2_(and_ps, and_epi32);          // return a & b       (float treated as int)
+SIMD_WRAPPERI_2_(andnot_ps, andnot_epi32);    // return (~a) & b    (float treated as int)
+SIMD_WRAPPERI_2_(or_ps, or_epi32);            // return a | b       (float treated as int)
+SIMD_WRAPPERI_2_(xor_ps, xor_epi32);          // return a ^ b       (float treated as int)
 
 #undef SIMD_WRAPPER_1_
 #undef SIMD_WRAPPER_1
@@ -130,3 +158,4 @@ SIMD_WRAPPERI_2_(xor_ps, xor_epi32);       // return a ^ b       (float treated
 #undef SIMD_IWRAPPER_2
 #undef SIMD_IWRAPPER_2_
 #undef SIMD_IWRAPPER_2I
+
diff --git a/lib/mesa/src/gallium/drivers/swr/rasterizer/common/simdlib_512_avx512_masks_core.inl b/lib/mesa/src/gallium/drivers/swr/rasterizer/common/simdlib_512_avx512_masks_core.inl
index f9d4b8c39..3e36ce5bd 100644
--- a/lib/mesa/src/gallium/drivers/swr/rasterizer/common/simdlib_512_avx512_masks_core.inl
+++ b/lib/mesa/src/gallium/drivers/swr/rasterizer/common/simdlib_512_avx512_masks_core.inl
@@ -1,25 +1,25 @@
 /****************************************************************************
- * Copyright (C) 2017 Intel Corporation.   All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- ****************************************************************************/
+* Copyright (C) 2017 Intel Corporation.   All Rights Reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a
+* copy of this software and associated documentation files (the "Software"),
+* to deal in the Software without restriction, including without limitation
+* the rights to use, copy, modify, merge, publish, distribute, sublicense,
+* and/or sell copies of the Software, and to permit persons to whom the
+* Software is furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice (including the next
+* paragraph) shall be included in all copies or substantial portions of the
+* Software.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+* IN THE SOFTWARE.
+****************************************************************************/
 #if !defined(__SIMD_LIB_AVX512_HPP__)
 #error Do not include this file directly, use "simdlib.hpp" instead.
 #endif
diff --git a/lib/mesa/src/gallium/drivers/swr/rasterizer/common/simdlib_512_avx512_masks_knights.inl b/lib/mesa/src/gallium/drivers/swr/rasterizer/common/simdlib_512_avx512_masks_knights.inl
index f9d4b8c39..3e36ce5bd 100644
--- a/lib/mesa/src/gallium/drivers/swr/rasterizer/common/simdlib_512_avx512_masks_knights.inl
+++ b/lib/mesa/src/gallium/drivers/swr/rasterizer/common/simdlib_512_avx512_masks_knights.inl
@@ -1,25 +1,25 @@
 /****************************************************************************
- * Copyright (C) 2017 Intel Corporation.   All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- ****************************************************************************/
+* Copyright (C) 2017 Intel Corporation.   All Rights Reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a
+* copy of this software and associated documentation files (the "Software"),
+* to deal in the Software without restriction, including without limitation
+* the rights to use, copy, modify, merge, publish, distribute, sublicense,
+* and/or sell copies of the Software, and to permit persons to whom the
+* Software is furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice (including the next
+* paragraph) shall be included in all copies or substantial portions of the
+* Software.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+* IN THE SOFTWARE.
+****************************************************************************/
 #if !defined(__SIMD_LIB_AVX512_HPP__)
 #error Do not include this file directly, use "simdlib.hpp" instead.
 #endif