diff options
| author | Matthieu Herrb <matthieu@cvs.openbsd.org> | 2015-04-14 19:55:50 +0000 |
|---|---|---|
| committer | Matthieu Herrb <matthieu@cvs.openbsd.org> | 2015-04-14 19:55:50 +0000 |
| commit | acb6dfc9793de58d6c0ed4a8ede246e4cdba4563 (patch) | |
| tree | b17adcf30d72b20d9df605557550a39e35682177 | |
| parent | c8134a388be5c5bccf15ee4db0fe249d63c0c0fe (diff) | |
Update to xf86-video-ati 7.5.0. Discussed with jsg@
28 files changed, 1049 insertions, 1086 deletions
diff --git a/driver/xf86-video-ati/ChangeLog b/driver/xf86-video-ati/ChangeLog index 913ec9b13..a45a8d809 100644 --- a/driver/xf86-video-ati/ChangeLog +++ b/driver/xf86-video-ati/ChangeLog @@ -1,3 +1,501 @@ +commit 068a59e010ce6bfcd54f5a18cc08c55c54b8618d +Author: Alex Deucher <alexander.deucher@amd.com> +Date: Wed Oct 1 23:38:52 2014 -0400 + + radeon: bump version for release + + Signed-off-by: Alex Deucher <alexander.deucher@amd.com> + +commit 5fee565e420d3efbf72fdf4f63c3d5d93d8ceddb +Author: Alex Deucher <alexander.deucher@amd.com> +Date: Wed Oct 1 23:36:31 2014 -0400 + + radeon: require libdrm_radeon 2.4.58 for latest SI/CI pci ids + + Signed-off-by: Alex Deucher <alexander.deucher@amd.com> + +commit 56c7fb8ada4cd9cf096c6b06a8d368d286d74e68 +Author: Thomas DeRensis <tderensis@gmail.com> +Date: Wed Sep 10 21:20:32 2014 -0400 + + radeon: fix build warnings regarding const qualifier + + Signed-off-by: Thomas DeRensis <tderensis@gmail.com> + +commit b9a9b244336ed50d7df4f36135f875a3bb6ca948 +Author: Thomas DeRensis <tderensis@gmail.com> +Date: Thu Sep 4 21:45:19 2014 -0400 + + radeon: fix a leak in radeon_vbo_get_bo() + + The dma_bo struct was never freed in the error path. Reported by cppcheck. + + Signed-off-by: Thomas DeRensis <tderensis@gmail.com> + Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> + +commit ba5fcc4d6b6eae3f2c55c6229a53d24d160789c1 +Author: Alex Deucher <alexander.deucher@amd.com> +Date: Thu Aug 21 11:32:45 2014 -0400 + + radeon/kms: fix mullins pci id + + strange errant change from: + 39fef269f521c92a2a31c80447e9401bacb3797a + + Signed-off-by: Alex Deucher <alexander.deucher@amd.com> + +commit efef34930650d6d80f7b527f4cee76d9e5954ace +Author: Alex Deucher <alexander.deucher@amd.com> +Date: Thu Aug 21 11:30:17 2014 -0400 + + radeon/kms: add new SI pci ids + + Signed-off-by: Alex Deucher <alexander.deucher@amd.com> + +commit 39fef269f521c92a2a31c80447e9401bacb3797a +Author: Alex Deucher <alexander.deucher@amd.com> +Date: Thu Aug 21 11:27:49 2014 -0400 + + radeon/kms: add new CIK pci ids + + Signed-off-by: Alex Deucher <alexander.deucher@amd.com> + +commit 7dab6b2fe9cf690b0dae1c127d0374322bd8278e +Author: Michel Dänzer <michel.daenzer@amd.com> +Date: Wed Aug 20 17:51:35 2014 +0900 + + Revert "glamor: Set environment variable RADEON_THREAD=0" + + This reverts commit 4b5060f357a3cb248c9359c92c1e9c42ef6434c8. + + Further testing shows that disabling the thread is only a moderate win in + some cases, but a much bigger loss in some other cases. + + Reviewed-by: Alex Deucher <alexander.deucher@amd.com> + +commit 1ff383360886c5cee1bb75abcc20675aca0336a6 +Author: Alex Deucher <alexander.deucher@amd.com> +Date: Tue Aug 12 12:27:12 2014 -0400 + + radeon: fix warnings when building against older xservers + + Signed-off-by: Alex Deucher <alexander.deucher@amd.com> + +commit 94202cbfbca05a503acdc1cca2f8409d141173af +Author: Alex Deucher <alexdeucher@gmail.com> +Date: Fri Aug 1 21:55:40 2014 +0200 + + radeon: enable hawaii accel conditionally (v3) + + Only if the kernel has the new CP firmware. + + v2: check value of ACCEL_WORKING2 + v3 (Andreas Boll): + - check for value 2 or 3 of ACCEL_WORKING2 + - update man page + + Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> (v2) + Signed-off-by: Alex Deucher <alexander.deucher@amd.com> + Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com> + +commit 03930edd49f6b8a8d79910c7be5408b47db9649b +Author: Andreas Boll <andreas.boll.dev@gmail.com> +Date: Mon Aug 4 16:23:13 2014 +0200 + + radeon: remove definitions already present in radeon_drm.h + + Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com> + +commit 91849fba0742ef61ba327e71fc3ce8f754af0a6f +Author: Andreas Boll <andreas.boll.dev@gmail.com> +Date: Mon Aug 4 16:23:12 2014 +0200 + + radeon: drop radeon_drm.h + + Now we use libdrm's radeon_drm.h. + + Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com> + +commit b4658901bf1d619f8ff9b5f94344894f935ee6c8 +Author: Andreas Boll <andreas.boll.dev@gmail.com> +Date: Mon Aug 4 16:23:11 2014 +0200 + + radeon: move RADEON_TILING_{MASK, LINEAR} from radeon_drm.h to radeon.h + + This allows us to drop radeon_drm.h from xf86-video-ati and use instead + radeon_drm.h from libdrm. + + Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com> + +commit 656bae7361c1e018553ef6d6d8c9efad616a4513 +Author: Andreas Boll <andreas.boll.dev@gmail.com> +Date: Mon Aug 4 16:23:10 2014 +0200 + + radeon: drop redundant radeon_drm.h includes + + Already included via radeon.h. + + Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com> + +commit fbf575cb010e558a87fad0de45660738c8180896 +Author: Michel Dänzer <michel.daenzer@amd.com> +Date: Wed Jul 30 17:03:24 2014 +0900 + + Add Emacs .dir-local.el file + + Based on the one from the Gallium radeon winsys, but enabling tabs for + indentation. + +commit 4b5060f357a3cb248c9359c92c1e9c42ef6434c8 +Author: Michel Dänzer <michel.daenzer@amd.com> +Date: Thu Jun 19 18:27:59 2014 +0900 + + glamor: Set environment variable RADEON_THREAD=0 + + Reviewed-by: Marek Olšák <marek.olsak@amd.com> + +commit 9b54caf6509a9c02dd17c9c43d6be8f7ddc98054 +Author: Hans de Goede <hdegoede@redhat.com> +Date: Mon Jul 28 15:55:12 2014 +0200 + + configure: Include xorg-server.h before
glamor.h + + glamor.h cannot be included without first including xorg-server.h, this also + applies to including it from configure snippets. + + Without this the configure glamor checks fail on systems with the latest + glibc, throwing this error: + + In file included from /usr/include/xorg/misc.h:115:0, + from /usr/include/xorg/screenint.h:50, + from /usr/include/xorg/scrnintstr.h:50, + from /usr/include/xorg/glamor.h:32, + from conftest.c:61: + /usr/include/xorg/os.h:579:2: error: expected identifier or '(' before + '__exten + strndup(const char *str, size_t n); + ^ + + This is caused by HAVE_STRNDUP not being set (it is set from xorg-server.h), + causing os.h to redefine it. + + Signed-off-by: Hans de Goede <hdegoede@redhat.com> + +commit c4ae0e2cbcc0e2ebf9f13ee92d59b5120254a1dc +Author: Michel Dänzer <michel.daenzer@amd.com> +Date: Mon Jun 30 10:20:12 2014 +0900 + + Handle CRTC DPMS from output DPMS hooks + + This fixes at least two issues: + + The CRTC DPMS hook isn't called after a modeset, so the vertical blank + interrupt emulation code considered the CRTC disabled after a modeset. As + a side effect, page flipping was no longer used after a modeset. + + This change also makes sure the vertical blank interrupt emulation code + runs before the hardware CRTC is disabled and after it's enabled from the + output DPMS hook. The wrong order could cause gnome-shell to hang after + a suspend/resume and/or DPMS off/on cycle. + + Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> + Reviewed-by: Alex Deucher <alexander.deucher@amd.com> + +commit c0c3cac8613e31e310242695d0955b452f116e25 +Author: Maarten Lankhorst <maarten.lankhorst@canonical.com> +Date: Wed Jun 25 16:21:57 2014 +0200 + + bump version post release + +commit 906a0ec9224146098bb4581486129d2934d36495 +Author: Maarten Lankhorst <maarten.lankhorst@canonical.com> +Date: Wed Jun 25 16:10:21 2014 +0200 + + bump version for release + +commit cc615d06db0332fc6e673b55632bcc7bf957b44b +Author: Michel Dänzer <michel.daenzer@amd.com> +Date: Wed Jun 4 16:58:53 2014 +0900 + + Rename Option "NoAccel" to "Accel" + + Removes the need for a double negation when forcing acceleration on. + + Note that this change is backwards compatible, as the option parser + automagically handles the 'No' prefix. + + Reviewed-by: Alex Deucher <alexander.deucher@amd.com> + +commit 851b2cf8714618843725f6d067915375485ade9d +Author: Adam Jackson <ajax@redhat.com> +Date: Wed May 21 09:34:32 2014 -0400 + + kms: Use own thunk function instead of shadowUpdatePackedWeak + + I plan to delete the Weak functions from a future server. + + Signed-off-by: Adam Jackson <ajax@redhat.com> + +commit b2dba2906f0b2284f17f53fd5251ba0f03d52a8b +Author: Michel Dänzer <michel.daenzer@amd.com> +Date: Thu May 15 16:07:53 2014 +0900 + + Don't disable acceleration on >= SI on attempts to force EXA + + Also make this case clear in the log file: + + (WW) RADEON(0): EXA not supported, using glamor + + Reviewed-by: Alex Deucher <alexander.deucher@amd.com> + +commit be1469cc23aba46daf3293b3d09c5f2e792e7f42 +Author: Alex Deucher <alexander.deucher@amd.com> +Date: Fri May 2 17:48:07 2014 -0400 + + radeon: enable tiling for mullins + + Signed-off-by: Alex Deucher <alexander.deucher@amd.com> + +commit 2ae8e4b8d12f5c9bab6655eb8cd3c5c1d5cfb10e +Author: Samuel Li <samuel.li@amd.com> +Date: Tue Nov 12 15:30:42 2013 -0500 + + radeon: add Mullins pci ids. + + Signed-off-by: Samuel Li <samuel.li@amd.com> + Signed-off-by: Alex Deucher <alexander.deucher@amd.com> + Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> + +commit 5c86a3461597647224c33d5190b4531aeeb2655f +Author: Samuel Li <samuel.li@amd.com> +Date: Thu Apr 17 15:17:28 2014 -0400 + + radeon: add support for Mullins. + + Signed-off-by: Samuel Li <samuel.li@amd.com> + Signed-off-by: Alex Deucher <alexander.deucher@amd.com> + Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> + +commit fdb90ffc50acbb7d5ba0598470f9feeac6ce55fc +Author: Alex Deucher <alexander.deucher@amd.com> +Date: Fri May 2 17:45:45 2014 -0400 + + radeon: require libdrm_radeon 2.4.54 for mullins support + + Signed-off-by: Alex Deucher <alexander.deucher@amd.com> + +commit 06e3c8c53ef4bd159f5864eabf726438d008b49a +Author: Dave Airlie <airlied@redhat.com> +Date: Wed Apr 23 13:39:42 2014 +1000 + + radeon: fix use-after-free in modesetting cleanup + + noticed while looking at something else. + + Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> + Signed-off-by: Dave Airlie <airlied@redhat.com> + +commit dbac18c361f9e514ecb40d0617f9d68b65a542e0 +Author: Michel Dänzer <michel.daenzer@amd.com> +Date: Mon Apr 28 17:51:56 2014 +0900 + + Revert "Adapt to load_cursor_argb signature change in xserver 1.15.99.902" + + This reverts commit 48d3dbc8a0d3bfde88f46e402e530438f9317715. + + xserver Git has been updated to be backwards compatible with the + previous API. + +commit c84230d686c078aac1dc98d82153f8b02521b2e1 +Author: Michel Dänzer <michel.daenzer@amd.com> +Date: Fri Apr 25 09:17:51 2014 +0900 + + dri2: Handle PRIME for source buffer as well in radeon_dri2_copy_region2 + + Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77810 + + Reviewed-by: Alex Deucher <alexander.deucher@amd.com> + +commit 48d3dbc8a0d3bfde88f46e402e530438f9317715 +Author: Michel Dänzer <michel.daenzer@amd.com> +Date: Tue Apr 15 17:45:35 2014 +0900 + + Adapt to load_cursor_argb signature change in xserver 1.15.99.902 + + Apart from the compiler warning below, not doing this may result in + accidentally using software cursors. + + ../../src/drmmode_display.c:808:5: warning: initialization from incompatible pointer type [enabled by default] + .load_cursor_argb = drmmode_load_cursor_argb, + ^ + ../../src/drmmode_display.c:808:5: warning: (near initialization for 'drmmode_crtc_funcs.load_cursor_argb') [enabled by default] + + Reviewed-by: Alex Deucher <alexander.deucher@amd.com> + +commit 409786a8f780d78a83bf0bddea5d37117ff6fa39 +Author: Michel Dänzer <michel.daenzer@amd.com> +Date: Thu Apr 10 11:43:04 2014 +0900 + + glamor: Fix test for creating shared pixmaps + + The pixmap usage hint is not a bitmask in general. The test for + CREATE_PIXMAP_USAGE_SHARED was incorrectly triggering for a glamor internal + usage hint being added in the xserver tree. + + Tested-by: Ed Tomlinson <edtoml@gmail.com> + +commit aecf1c4e5f4718adcfb85836830d065d3f4f97a5 +Author: Michel Dänzer <michel.daenzer@amd.com> +Date: Thu Apr 10 15:10:56 2014 +0900 + + dri2: Fix conflicting CreatePixmap usage flag definitions + + RADEON_CREATE_PIXMAP_TILING_MICRO_SQUARE was the same as + RADEON_CREATE_PIXMAP_DRI2. + + Disambiguate the definitions and rearrange them to try and prevent this + from happening again. + + Tested-by: Ed Tomlinson <edtoml@gmail.com> + +commit b50da3b96c212086cb58501dbe988d64f1f35b6d +Author: Hans de Goede <hdegoede@redhat.com> +Date: Fri Apr 11 09:44:37 2014 +0200 + + Fix building on older servers without xf86platformBus.h + + Signed-off-by: Hans de Goede <hdegoede@redhat.com> + +commit ed0cfbb4fe77146b0b38f777bc28f3a4ea6da07f +Author: Hans de Goede <hdegoede@redhat.com> +Date: Fri Mar 7 13:27:30 2014 +0100 + + Add support for server managed fds + + Signed-off-by: Hans de Goede <hdegoede@redhat.com> + +commit 3d7861fe112f25874319d4cdc12b745fbcd359cf +Author: Hans de Goede <hdegoede@redhat.com> +Date: Mon Mar 17 10:38:13 2014 +0100 + + Add radeon_get_drm_master_fd helper function + + This is a preparation patch for adding server-managed-fd support without it + turning into a goto fest. + + Signed-off-by: Hans de Goede <hdegoede@redhat.com> + +commit a63342ad15408071437c80b411d14196f3288aed +Author: Hans de Goede <hdegoede@redhat.com> +Date: Mon Mar 17 10:36:55 2014 +0100 + + radeon_open_drm_master get rid of unnecessary goto + + Signed-off-by: Hans de Goede <hdegoede@redhat.com> + +commit bdc412044f6ced056cd57320d1b2ee0d967c2191 +Author: Michel Dänzer <michel.daenzer@amd.com> +Date: Thu Mar 13 16:40:19 2014 +0900 + + Build against glamor in the xserver tree if available + +commit 921a153f9964ca452e1241f76c7f7d653f42ceaf +Author: Alex Deucher <alexander.deucher@amd.com> +Date: Tue Mar 11 12:24:13 2014 -0400 + + update man page to reflect tiling changes for CI parts + + Signed-off-by: Alex Deucher <alexander.deucher@amd.com> + +commit 5eee8a4d5c86bb1cc34d8caf2f2b64b53c241fa5 +Author: Alex Deucher <alexander.deucher@amd.com> +Date: Mon Mar 10 16:20:09 2014 -0400 + + radeon: enable tiling by default on CIK + + Now that mesa 10.1 is released, we can enable this by + default for CIK parts. Tiling improves memory bandwidth + utilization. + + Signed-off-by: Alex Deucher <alexander.deucher@amd.com> + Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> + +commit 691ec3d99c30111a4789830dfccb6eb5d3c40187 +Author: Alex Deucher <alexander.deucher@amd.com> +Date: Mon Mar 10 16:17:34 2014 -0400 + + radeon: require libdrm 2.4.51 + + Required for proper tiling support on CIK parts. + + Signed-off-by: Alex Deucher <alexander.deucher@amd.com> + Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> + +commit 515bcf14d514f9dcaaf30fd0bf1ef6dd6ba9a0cd +Author: Michel Dänzer <michel.daenzer@amd.com> +Date: Tue Mar 4 12:34:26 2014 +0900 + + Allow enabling glamor on R500 (and R300) class 3D engines as well. + + Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75709 + + Reviewed-by: Alex Deucher <alexander.deucher@amd.com> + +commit ea6d0affe52d82becadab6fb1c87f9261b0605a2 +Author: Michel Dänzer <michel.daenzer@amd.com> +Date: Mon Feb 24 13:12:21 2014 +0900 + + Only log debugging output about initializing colormaps when we're doing so + + Reviewed-by: Alex Deucher <alexander.deucher@amd.com> + +commit 8da17f30c70f4494ce22ad781a1cee17041812f3 +Author: Jérôme Glisse <jglisse@redhat.com> +Date: Mon Feb 24 14:50:25 2014 -0500 + + evergreen: fix shader constant upload on ppc + + The number of dword we have to swap is (16*4) ie 16 vectors of + 4 floats each not 16 floats. Never hit this issue before because + we never had more than 4 constant vector. + + Signed-off-by: Jérôme Glisse <jglisse@redhat.com> + +commit cadb6b493942a84bfeb298751dce0dee39257a06 +Author: Alex Deucher <alexander.deucher@amd.com> +Date: Fri Feb 21 08:33:21 2014 -0500 + + radeon: don't install colormap handling if there are no crtcs + + Fixes a crash on cards with 0 crtcs. + + Discussion: + http://lists.freedesktop.org/archives/dri-devel/2014-February/054186.html + + Signed-off-by: Alex Deucher <alexander.deucher@amd.com> + +commit 7cd972a85705341dd8306eefc558ed9e5def05d7 +Author: Maarten Lankhorst <maarten.lankhorst@canonical.com> +Date: Thu Feb 20 11:14:03 2014 +0100 + + return immediately in preinit when called with PROBE_DETECT + + This fixes a crash with Xorg -configure. + + Bug: + https://bugs.launchpad.net/ubuntu/+source/xorg/+bug/1278046 + + Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> + Reviewed-by: Alex Deucher <alexander.deucher@amd.com> + +commit 8de6f7b2f476d3baa9c7e2bb3544e4bafaad46b7 +Author: Alex Deucher <alexander.deucher@amd.com> +Date: Fri Jan 24 11:04:30 2014 -0500 + + bump version post release + + Signed-off-by: Alex Deucher <alexander.deucher@amd.com> + commit 0333f5bda27dc0ec2edc180c7a4dc9a432f13f97 Author: Alex Deucher <alexander.deucher@amd.com> Date: Fri Jan 24 10:19:49 2014 -0500 diff --git a/driver/xf86-video-ati/aclocal.m4 b/driver/xf86-video-ati/aclocal.m4 index 9b80f049b..292fd77b9 100644 --- a/driver/xf86-video-ati/aclocal.m4 +++ b/driver/xf86-video-ati/aclocal.m4 @@ -9898,7 +9898,7 @@ dnl DEALINGS IN THE SOFTWARE. # See the "minimum version" comment for each macro you use to see what # version you require. m4_defun([XORG_MACROS_VERSION],[ -m4_define([vers_have], [1.17.1]) +m4_define([vers_have], [1.19.0]) m4_define([maj_have], m4_substr(vers_have, 0, m4_index(vers_have, [.]))) m4_define([maj_needed], m4_substr([$1], 0, m4_index([$1], [.]))) m4_if(m4_cmp(maj_have, maj_needed), 0,, @@ -9948,6 +9948,7 @@ if test `${RAWCPP} < conftest.$ac_ext | grep -c 'preserve \"'` -eq 1 ; then AC_MSG_RESULT([no]) else if test `${RAWCPP} -traditional < conftest.$ac_ext | grep -c 'preserve \"'` -eq 1 ; then + TRADITIONALCPPFLAGS="-traditional" RAWCPPFLAGS="${RAWCPPFLAGS} -traditional" AC_MSG_RESULT([yes]) else @@ -9956,6 +9957,7 @@ else fi rm -f conftest.$ac_ext AC_SUBST(RAWCPPFLAGS) +AC_SUBST(TRADITIONALCPPFLAGS) ]) # XORG_PROG_RAWCPP # XORG_MANPAGE_SECTIONS() @@ -10480,9 +10482,10 @@ AM_CONDITIONAL([HAVE_ASCIIDOC], [test "$have_asciidoc" = yes]) ]) # XORG_WITH_ASCIIDOC # XORG_WITH_DOXYGEN([MIN-VERSION], [DEFAULT]) -# -------------------------------- +# ------------------------------------------- # Minimum version: 1.5.0 # Minimum version for optional DEFAULT argument: 1.11.0 +# Minimum version for optional DOT checking: 1.18.0 # # Documentation tools are not always available on all platforms and sometimes # not at the appropriate level. This macro enables a module to test for the @@ -10502,6 +10505,7 @@ AM_CONDITIONAL([HAVE_ASCIIDOC], [test "$have_asciidoc" = yes]) # AC_DEFUN([XORG_WITH_DOXYGEN],[ AC_ARG_VAR([DOXYGEN], [Path to doxygen command]) +AC_ARG_VAR([DOT], [Path to the dot graphics utility]) m4_define([_defopt], m4_default([$2], [auto])) AC_ARG_WITH(doxygen, AS_HELP_STRING([--with-doxygen], @@ -10545,6 +10549,20 @@ m4_ifval([$1], AC_MSG_ERROR([doxygen version $doxygen_version found, but $1 needed]) fi]) fi]) + +dnl Check for DOT if we have doxygen. The caller decides if it is mandatory +dnl HAVE_DOT is a variable that can be used in your doxygen.in config file: +dnl HAVE_DOT = @HAVE_DOT@ +HAVE_DOT=no +if test "x$have_doxygen" = "xyes"; then + AC_PATH_PROG([DOT], [dot]) + if test "x$DOT" != "x"; then + HAVE_DOT=yes + fi +fi + +AC_SUBST([HAVE_DOT]) +AM_CONDITIONAL([HAVE_DOT], [test "$HAVE_DOT" = "yes"]) AM_CONDITIONAL([HAVE_DOXYGEN], [test "$have_doxygen" = yes]) ]) # XORG_WITH_DOXYGEN @@ -10727,6 +10745,29 @@ fi]) AM_CONDITIONAL([HAVE_FOP], [test "$have_fop" = yes]) ]) # XORG_WITH_FOP +# XORG_WITH_M4([MIN-VERSION]) +# --------------------------- +# Minimum version: 1.19.0 +# +# This macro attempts to locate an m4 macro processor which supports +# -I option and is only useful for modules relying on M4 in order to +# expand macros in source code files. +# +# Interface to module: +# M4: returns the path of the m4 program found +# returns the path set by the user in the environment +# +AC_DEFUN([XORG_WITH_M4], [ +AC_CACHE_CHECK([for m4 that supports -I option], [ac_cv_path_M4], + [AC_PATH_PROGS_FEATURE_CHECK([M4], [m4 gm4], + [[$ac_path_M4 -I. /dev/null > /dev/null 2>&1 && \ + ac_cv_path_M4=$ac_path_M4 ac_path_M4_found=:]], + [AC_MSG_ERROR([could not find m4 that supports -I option])], + [$PATH:/usr/gnu/bin])]) + +AC_SUBST([M4], [$ac_cv_path_M4]) +]) # XORG_WITH_M4 + # XORG_WITH_PS2PDF([DEFAULT]) # ---------------- # Minimum version: 1.6.0 @@ -11181,7 +11222,8 @@ AC_ARG_ENABLE(malloc0returnsnull, AC_MSG_CHECKING([whether malloc(0) returns NULL]) if test "x$MALLOC_ZERO_RETURNS_NULL" = xauto; then - AC_RUN_IFELSE([AC_LANG_PROGRAM([ +AC_CACHE_VAL([xorg_cv_malloc0_returns_null], + [AC_RUN_IFELSE([AC_LANG_PROGRAM([ #include <stdlib.h> ],[ char *m0, *r0, *c0, *p; @@ -11191,9 +11233,9 @@ if test "x$MALLOC_ZERO_RETURNS_NULL" = xauto; then c0 = calloc(0,10); exit((m0 == 0 || r0 == 0 || c0 == 0) ? 0 : 1); ])], - [MALLOC_ZERO_RETURNS_NULL=yes], - [MALLOC_ZERO_RETURNS_NULL=no], - [MALLOC_ZERO_RETURNS_NULL=yes]) + [xorg_cv_malloc0_returns_null=yes], + [xorg_cv_malloc0_returns_null=no])]) +MALLOC_ZERO_RETURNS_NULL=$xorg_cv_malloc0_returns_null fi AC_MSG_RESULT([$MALLOC_ZERO_RETURNS_NULL]) @@ -11482,7 +11524,7 @@ AC_LANG_CASE( XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Wmissing-prototypes]) XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Wnested-externs]) XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Wbad-function-cast]) - XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Wold-style-definition]) + XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Wold-style-definition], [-fd]) XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Wdeclaration-after-statement]) ] ) @@ -11491,16 +11533,17 @@ AC_LANG_CASE( XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Wunused]) XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Wuninitialized]) XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Wshadow]) -XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Wcast-qual]) XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Wmissing-noreturn]) XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Wmissing-format-attribute]) +# XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Wredundant-decls]) +XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Wlogical-op]) # These are currently disabled because they are noisy. They will be enabled # in the future once the codebase is sufficiently modernized to silence # them. For now, I don't want them to drown out the other warnings. -# XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Wlogical-op]) # XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Wparentheses]) # XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Wcast-align]) +# XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Wcast-qual]) # Turn some warnings into errors, so we don't accidently get successful builds # when there are problems that should be fixed. diff --git a/driver/xf86-video-ati/config.h.in b/driver/xf86-video-ati/config.h.in index ce3fab0f1..f8b7f7890 100644 --- a/driver/xf86-video-ati/config.h.in +++ b/driver/xf86-video-ati/config.h.in @@ -8,6 +8,9 @@ /* Define to 1 if you have the <dlfcn.h> header file. */ #undef HAVE_DLFCN_H +/* Define to 1 if you have the <glamor.h> header file. */ +#undef HAVE_GLAMOR_H + /* Define to 1 if you have the <inttypes.h> header file. */ #undef HAVE_INTTYPES_H diff --git a/driver/xf86-video-ati/configure b/driver/xf86-video-ati/configure index c03b89133..3dffa8907 100644 --- a/driver/xf86-video-ati/configure +++ b/driver/xf86-video-ati/configure @@ -1,6 +1,6 @@ #! /bin/sh # Guess values for system-dependent variables and create Makefiles. -# Generated by GNU Autoconf 2.69 for xf86-video-ati 7.3.0. +# Generated by GNU Autoconf 2.69 for xf86-video-ati 7.5.0. # # Report bugs to <https://bugs.freedesktop.org/enter_bug.cgi?product=xorg>. # @@ -591,8 +591,8 @@ MAKEFLAGS= # Identity of this package. PACKAGE_NAME='xf86-video-ati' PACKAGE_TARNAME='xf86-video-ati' -PACKAGE_VERSION='7.3.0' -PACKAGE_STRING='xf86-video-ati 7.3.0' +PACKAGE_VERSION='7.5.0' +PACKAGE_STRING='xf86-video-ati 7.5.0' PACKAGE_BUGREPORT='https://bugs.freedesktop.org/enter_bug.cgi?product=xorg' PACKAGE_URL='' @@ -641,12 +641,12 @@ DRIVER_NAME moduledir PCIACCESS_LIBS PCIACCESS_CFLAGS +GLAMOR_FALSE +GLAMOR_TRUE LIBGLAMOR_EGL_LIBS LIBGLAMOR_EGL_CFLAGS LIBGLAMOR_LIBS LIBGLAMOR_CFLAGS -GLAMOR_FALSE -GLAMOR_TRUE LIBUDEV_FALSE LIBUDEV_TRUE LIBUDEV_LIBS @@ -1386,7 +1386,7 @@ if test "$ac_init_help" = "long"; then # Omit some internal or obsolete options to make the list less imposing. # This message is too long to be a string in the A/UX 3.1 sh. cat <<_ACEOF -\`configure' configures xf86-video-ati 7.3.0 to adapt to many kinds of systems. +\`configure' configures xf86-video-ati 7.5.0 to adapt to many kinds of systems. Usage: $0 [OPTION]... [VAR=VALUE]... @@ -1456,7 +1456,7 @@ fi if test -n "$ac_init_help"; then case $ac_init_help in - short | recursive ) echo "Configuration of xf86-video-ati 7.3.0:";; + short | recursive ) echo "Configuration of xf86-video-ati 7.5.0:";; esac cat <<\_ACEOF @@ -1609,7 +1609,7 @@ fi test -n "$ac_init_help" && exit $ac_status if $ac_init_version; then cat <<\_ACEOF -xf86-video-ati configure 7.3.0 +xf86-video-ati configure 7.5.0 generated by GNU Autoconf 2.69 Copyright (C) 2012 Free Software Foundation, Inc. @@ -2024,7 +2024,7 @@ cat >config.log <<_ACEOF This file contains any messages produced by compilers while running configure, to aid debugging if configure makes a mistake. -It was created by xf86-video-ati $as_me 7.3.0, which was +It was created by xf86-video-ati $as_me 7.5.0, which was generated by GNU Autoconf 2.69. Invocation command line was $ $0 $@ @@ -2855,7 +2855,7 @@ fi # Define the identity of the package. PACKAGE='xf86-video-ati' - VERSION='7.3.0' + VERSION='7.5.0' cat >>confdefs.h <<_ACEOF @@ -6115,6 +6115,55 @@ $as_echo "$supported" >&6; } fi fi + if test $found = "no" ; then + if test "x$xorg_testset_cc_unknown_warning_option" = "xyes" ; then + CFLAGS="$CFLAGS -Werror=unknown-warning-option" + fi + + if test "x$xorg_testset_cc_unused_command_line_argument" = "xyes" ; then + CFLAGS="$CFLAGS -Werror=unused-command-line-argument" + fi + + CFLAGS="$CFLAGS -fd" + + { $as_echo "$as_me:${as_lineno-$LINENO}: checking if $CC supports -fd" >&5 +$as_echo_n "checking if $CC supports -fd... " >&6; } + cacheid=xorg_cv_cc_flag__fd + if eval \${$cacheid+:} false; then : + $as_echo_n "(cached) " >&6 +else + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ +int i; +int +main () +{ + + ; + return 0; +} +_ACEOF +if ac_fn_c_try_link "$LINENO"; then : + eval $cacheid=yes +else + eval $cacheid=no +fi +rm -f core conftest.err conftest.$ac_objext \ + conftest$ac_exeext conftest.$ac_ext +fi + + + CFLAGS="$xorg_testset_save_CFLAGS" + + eval supported=\$$cacheid + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $supported" >&5 +$as_echo "$supported" >&6; } + if test "$supported" = "yes" ; then + BASE_CFLAGS="$BASE_CFLAGS -fd" + found="yes" + fi + fi + @@ -6669,11 +6718,11 @@ found="no" CFLAGS="$CFLAGS -Werror=unused-command-line-argument" fi - CFLAGS="$CFLAGS -Wcast-qual" + CFLAGS="$CFLAGS -Wmissing-noreturn" - { $as_echo "$as_me:${as_lineno-$LINENO}: checking if $CC supports -Wcast-qual" >&5 -$as_echo_n "checking if $CC supports -Wcast-qual... " >&6; } - cacheid=xorg_cv_cc_flag__Wcast_qual + { $as_echo "$as_me:${as_lineno-$LINENO}: checking if $CC supports -Wmissing-noreturn" >&5 +$as_echo_n "checking if $CC supports -Wmissing-noreturn... " >&6; } + cacheid=xorg_cv_cc_flag__Wmissing_noreturn if eval \${$cacheid+:} false; then : $as_echo_n "(cached) " >&6 else @@ -6704,7 +6753,7 @@ fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $supported" >&5 $as_echo "$supported" >&6; } if test "$supported" = "yes" ; then - BASE_CFLAGS="$BASE_CFLAGS -Wcast-qual" + BASE_CFLAGS="$BASE_CFLAGS -Wmissing-noreturn" found="yes" fi fi @@ -6787,11 +6836,11 @@ found="no" CFLAGS="$CFLAGS -Werror=unused-command-line-argument" fi - CFLAGS="$CFLAGS -Wmissing-noreturn" + CFLAGS="$CFLAGS -Wmissing-format-attribute" - { $as_echo "$as_me:${as_lineno-$LINENO}: checking if $CC supports -Wmissing-noreturn" >&5 -$as_echo_n "checking if $CC supports -Wmissing-noreturn... " >&6; } - cacheid=xorg_cv_cc_flag__Wmissing_noreturn + { $as_echo "$as_me:${as_lineno-$LINENO}: checking if $CC supports -Wmissing-format-attribute" >&5 +$as_echo_n "checking if $CC supports -Wmissing-format-attribute... " >&6; } + cacheid=xorg_cv_cc_flag__Wmissing_format_attribute if eval \${$cacheid+:} false; then : $as_echo_n "(cached) " >&6 else @@ -6822,12 +6871,13 @@ fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $supported" >&5 $as_echo "$supported" >&6; } if test "$supported" = "yes" ; then - BASE_CFLAGS="$BASE_CFLAGS -Wmissing-noreturn" + BASE_CFLAGS="$BASE_CFLAGS -Wmissing-format-attribute" found="yes" fi fi +# XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Wredundant-decls]) @@ -6905,11 +6955,11 @@ found="no" CFLAGS="$CFLAGS -Werror=unused-command-line-argument" fi - CFLAGS="$CFLAGS -Wmissing-format-attribute" + CFLAGS="$CFLAGS -Wlogical-op" - { $as_echo "$as_me:${as_lineno-$LINENO}: checking if $CC supports -Wmissing-format-attribute" >&5 -$as_echo_n "checking if $CC supports -Wmissing-format-attribute... " >&6; } - cacheid=xorg_cv_cc_flag__Wmissing_format_attribute + { $as_echo "$as_me:${as_lineno-$LINENO}: checking if $CC supports -Wlogical-op" >&5 +$as_echo_n "checking if $CC supports -Wlogical-op... " >&6; } + cacheid=xorg_cv_cc_flag__Wlogical_op if eval \${$cacheid+:} false; then : $as_echo_n "(cached) " >&6 else @@ -6940,7 +6990,7 @@ fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $supported" >&5 $as_echo "$supported" >&6; } if test "$supported" = "yes" ; then - BASE_CFLAGS="$BASE_CFLAGS -Wmissing-format-attribute" + BASE_CFLAGS="$BASE_CFLAGS -Wlogical-op" found="yes" fi fi @@ -6950,9 +7000,9 @@ $as_echo "$supported" >&6; } # These are currently disabled because they are noisy. They will be enabled # in the future once the codebase is sufficiently modernized to silence # them. For now, I don't want them to drown out the other warnings. -# XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Wlogical-op]) # XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Wparentheses]) # XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Wcast-align]) +# XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Wcast-qual]) # Turn some warnings into errors, so we don't accidently get successful builds # when there are problems that should be fixed. @@ -18204,12 +18254,12 @@ if test -n "$LIBDRM_CFLAGS"; then pkg_cv_LIBDRM_CFLAGS="$LIBDRM_CFLAGS" elif test -n "$PKG_CONFIG"; then if test -n "$PKG_CONFIG" && \ - { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libdrm >= 2.4.46\""; } >&5 - ($PKG_CONFIG --exists --print-errors "libdrm >= 2.4.46") 2>&5 + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libdrm >= 2.4.58\""; } >&5 + ($PKG_CONFIG --exists --print-errors "libdrm >= 2.4.58") 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then - pkg_cv_LIBDRM_CFLAGS=`$PKG_CONFIG --cflags "libdrm >= 2.4.46" 2>/dev/null` + pkg_cv_LIBDRM_CFLAGS=`$PKG_CONFIG --cflags "libdrm >= 2.4.58" 2>/dev/null` test "x$?" != "x0" && pkg_failed=yes else pkg_failed=yes @@ -18221,12 +18271,12 @@ if test -n "$LIBDRM_LIBS"; then pkg_cv_LIBDRM_LIBS="$LIBDRM_LIBS" elif test -n "$PKG_CONFIG"; then if test -n "$PKG_CONFIG" && \ - { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libdrm >= 2.4.46\""; } >&5 - ($PKG_CONFIG --exists --print-errors "libdrm >= 2.4.46") 2>&5 + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libdrm >= 2.4.58\""; } >&5 + ($PKG_CONFIG --exists --print-errors "libdrm >= 2.4.58") 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then - pkg_cv_LIBDRM_LIBS=`$PKG_CONFIG --libs "libdrm >= 2.4.46" 2>/dev/null` + pkg_cv_LIBDRM_LIBS=`$PKG_CONFIG --libs "libdrm >= 2.4.58" 2>/dev/null` test "x$?" != "x0" && pkg_failed=yes else pkg_failed=yes @@ -18247,14 +18297,14 @@ else _pkg_short_errors_supported=no fi if test $_pkg_short_errors_supported = yes; then - LIBDRM_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "libdrm >= 2.4.46" 2>&1` + LIBDRM_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "libdrm >= 2.4.58" 2>&1` else - LIBDRM_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "libdrm >= 2.4.46" 2>&1` + LIBDRM_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "libdrm >= 2.4.58" 2>&1` fi # Put the nasty error message in config.log where it belongs echo "$LIBDRM_PKG_ERRORS" >&5 - as_fn_error $? "Package requirements (libdrm >= 2.4.46) were not met: + as_fn_error $? "Package requirements (libdrm >= 2.4.58) were not met: $LIBDRM_PKG_ERRORS @@ -18660,17 +18710,37 @@ else GLAMOR=yes fi -{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $GLAMOR" >&5 -$as_echo "$GLAMOR" >&6; } - if test x$GLAMOR != xno; then - GLAMOR_TRUE= - GLAMOR_FALSE='#' + +if test "x$GLAMOR" != "xno"; then + for ac_header in glamor.h +do : + ac_fn_c_check_header_compile "$LINENO" "glamor.h" "ac_cv_header_glamor_h" "#include \"xorg-server.h\" +" +if test "x$ac_cv_header_glamor_h" = xyes; then : + cat >>confdefs.h <<_ACEOF +#define HAVE_GLAMOR_H 1 +_ACEOF + GLAMOR_H="yes" else - GLAMOR_TRUE='#' - GLAMOR_FALSE= + GLAMOR_H="no" fi -if test "x$GLAMOR" != "xno"; then +done + + + if test "x$GLAMOR_H" = xyes; then + ac_fn_c_check_decl "$LINENO" "GLAMOR_NO_DRI3" "ac_cv_have_decl_GLAMOR_NO_DRI3" "#include \"xorg-server.h\" + #include \"glamor.h\" +" +if test "x$ac_cv_have_decl_GLAMOR_NO_DRI3" = xyes; then : + GLAMOR_XSERVER="yes" +else + GLAMOR_XSERVER="no" +fi + + fi + + if test "x$GLAMOR_XSERVER" != xyes; then pkg_failed=no { $as_echo "$as_me:${as_lineno-$LINENO}: checking for LIBGLAMOR" >&5 @@ -18853,11 +18923,23 @@ else $as_echo "yes" >&6; } fi + fi $as_echo "#define USE_GLAMOR 1" >>confdefs.h +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $GLAMOR" >&5 +$as_echo "$GLAMOR" >&6; } +fi + if test x$GLAMOR != xno; then + GLAMOR_TRUE= + GLAMOR_FALSE='#' +else + GLAMOR_TRUE='#' + GLAMOR_FALSE= fi + for ac_header in list.h do : ac_fn_c_check_header_compile "$LINENO" "list.h" "ac_cv_header_list_h" "#include <X11/Xdefs.h> @@ -19680,7 +19762,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 # report actual input values of CONFIG_FILES etc. instead of their # values after options handling. ac_log=" -This file was extended by xf86-video-ati $as_me 7.3.0, which was +This file was extended by xf86-video-ati $as_me 7.5.0, which was generated by GNU Autoconf 2.69. Invocation command line was CONFIG_FILES = $CONFIG_FILES @@ -19746,7 +19828,7 @@ _ACEOF cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 ac_cs_config="`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`" ac_cs_version="\\ -xf86-video-ati config.status 7.3.0 +xf86-video-ati config.status 7.5.0 configured by $0, generated by GNU Autoconf 2.69, with options \\"\$ac_cs_config\\" diff --git a/driver/xf86-video-ati/configure.ac b/driver/xf86-video-ati/configure.ac index 9c444f08b..d30efafa7 100644 --- a/driver/xf86-video-ati/configure.ac +++ b/driver/xf86-video-ati/configure.ac @@ -23,7 +23,7 @@ # Initialize Autoconf AC_PREREQ([2.60]) AC_INIT([xf86-video-ati], - [7.3.0], + [7.5.0], [https://bugs.freedesktop.org/enter_bug.cgi?product=xorg], [xf86-video-ati]) @@ -71,7 +71,7 @@ XORG_DRIVER_CHECK_EXT(XV, videoproto) XORG_DRIVER_CHECK_EXT(DPMSExtension, xextproto) # Checks for libraries. -PKG_CHECK_MODULES(LIBDRM, [libdrm >= 2.4.46]) +PKG_CHECK_MODULES(LIBDRM, [libdrm >= 2.4.58]) PKG_CHECK_MODULES(LIBDRM_RADEON, [libdrm_radeon]) # Obtain compiler/linker options for the driver dependencies @@ -104,13 +104,26 @@ AC_ARG_ENABLE(glamor, [Disable glamor, a new GL-based acceleration [default=enabled]]), [GLAMOR="$enableval"], [GLAMOR=yes]) -AC_MSG_RESULT([$GLAMOR]) -AM_CONDITIONAL(GLAMOR, test x$GLAMOR != xno) + if test "x$GLAMOR" != "xno"; then - PKG_CHECK_MODULES(LIBGLAMOR, [glamor >= 0.6.0]) - PKG_CHECK_MODULES(LIBGLAMOR_EGL, [glamor-egl]) + AC_CHECK_HEADERS([glamor.h], [GLAMOR_H="yes"], [GLAMOR_H="no"], [#include "xorg-server.h"]) + + if test "x$GLAMOR_H" = xyes; then + AC_CHECK_DECL(GLAMOR_NO_DRI3, + [GLAMOR_XSERVER="yes"], [GLAMOR_XSERVER="no"], + [#include "xorg-server.h" + #include "glamor.h"]) + fi + + if test "x$GLAMOR_XSERVER" != xyes; then + PKG_CHECK_MODULES(LIBGLAMOR, [glamor >= 0.6.0]) + PKG_CHECK_MODULES(LIBGLAMOR_EGL, [glamor-egl]) + fi AC_DEFINE(USE_GLAMOR, 1, [Enable glamor acceleration]) +else + AC_MSG_RESULT([$GLAMOR]) fi +AM_CONDITIONAL(GLAMOR, test x$GLAMOR != xno) AC_CHECK_HEADERS([list.h], [have_list_h="yes"], [have_list_h="no"], diff --git a/driver/xf86-video-ati/man/radeon.man b/driver/xf86-video-ati/man/radeon.man index 1363d8b4b..7dde04005 100644 --- a/driver/xf86-video-ati/man/radeon.man +++ b/driver/xf86-video-ati/man/radeon.man @@ -208,6 +208,9 @@ KABINI APUs .TP 12 .B HAWAII Radeon R9 series +.TP 12 +.B MULLINS +MULLINS APUs .PD .SH CONFIGURATION DETAILS Please refer to __xconfigfile__(__filemansuffix__) for general configuration @@ -222,12 +225,11 @@ are supported: Selects software cursor. The default is .B off. .TP -.BI "Option \*qNoAccel\*q \*q" boolean \*q +.BI "Option \*qAccel\*q \*q" boolean \*q Enables or disables all hardware acceleration. .br -The default is to -.B enable -hardware acceleration. +The default is +.B on. .TP .BI "Option \*qZaphodHeads\*q \*q" string \*q Specify the RandR output(s) to use with zaphod mode for a particular driver @@ -248,7 +250,7 @@ this enables 1D tiling mode. The default value is .B on for R/RV3XX, R/RV4XX, R/RV5XX, RS6XX, RS740, R/RV6XX, R/RV7XX, RS780, RS880, -EVERGREEN, CAYMAN, ARUBA, and Southern Islands and +EVERGREEN, CAYMAN, ARUBA, Southern Islands, and Sea Islands and .B off for R/RV/RS1XX, R/RV/RS2XX, RS3XX, and RS690/RS780/RS880 when fast fb feature is enabled. .TP @@ -257,11 +259,13 @@ The framebuffer can be addressed either in linear, 1D, or 2D tiled modes. 2D til provide significant performance benefits over 1D tiling with 3D applications. Tiling will be disabled if the drm module is too old or if the current display configuration does not support it. KMS ColorTiling2D is only supported on R600 and newer chips and requires -Mesa 9.0 or newer for R6xx-ARUBA and Mesa 9.2 or newer for Southern Islands. +Mesa 9.0 or newer for R6xx-ARUBA, Mesa 9.2 or newer for Southern Islands, and Mesa +10.1 or newer for Sea Islands. .br The default value is .B on -for R/RV6XX, R/RV7XX, RS780, RS880, EVERGREEN, CAYMAN, ARUBA, and Southern Islands. +for R/RV6XX, R/RV7XX, RS780, RS880, EVERGREEN, CAYMAN, ARUBA, Southern Islands, and +Sea Islands. .TP .BI "Option \*qEnablePageFlip\*q \*q" boolean \*q Enable DRI2 page flipping. The default is @@ -271,9 +275,9 @@ Pageflipping is supported on all radeon hardware. .BI "Option \*qAccelMethod\*q \*q" "string" \*q Chooses between available acceleration architectures. Valid values are .B EXA -and -.B glamor. -The default is +(for pre-TAHITI GPUs) and +.B glamor +(for R300 or higher). The default is .B glamor as of TAHITI, otherwise .B EXA. diff --git a/driver/xf86-video-ati/src/Makefile.am b/driver/xf86-video-ati/src/Makefile.am index e23dc1df6..9ff1ffba0 100644 --- a/driver/xf86-video-ati/src/Makefile.am +++ b/driver/xf86-video-ati/src/Makefile.am @@ -88,7 +88,6 @@ EXTRA_DIST = \ bicubic_table.h \ bicubic_table.py \ radeon_bo_helper.h \ - radeon_drm.h \ radeon_exa_render.c \ radeon_exa_funcs.c \ radeon_exa_shared.h \ diff --git a/driver/xf86-video-ati/src/Makefile.in b/driver/xf86-video-ati/src/Makefile.in index 424e0605b..a84f7d64b 100644 --- a/driver/xf86-video-ati/src/Makefile.in +++ b/driver/xf86-video-ati/src/Makefile.in @@ -406,7 +406,6 @@ EXTRA_DIST = \ bicubic_table.h \ bicubic_table.py \ radeon_bo_helper.h \ - radeon_drm.h \ radeon_exa_render.c \ radeon_exa_funcs.c \ radeon_exa_shared.h \ diff --git a/driver/xf86-video-ati/src/ati_pciids_gen.h b/driver/xf86-video-ati/src/ati_pciids_gen.h index eb57992c1..d867fa71e 100644 --- a/driver/xf86-video-ati/src/ati_pciids_gen.h +++ b/driver/xf86-video-ati/src/ati_pciids_gen.h @@ -668,6 +668,7 @@ #define PCI_CHIP_VERDE_6829 0x6829 #define PCI_CHIP_VERDE_682A 0x682A #define PCI_CHIP_VERDE_682B 0x682B +#define PCI_CHIP_VERDE_682C 0x682C #define PCI_CHIP_VERDE_682D 0x682D #define PCI_CHIP_VERDE_682F 0x682F #define PCI_CHIP_VERDE_6830 0x6830 @@ -683,8 +684,11 @@ #define PCI_CHIP_OLAND_6601 0x6601 #define PCI_CHIP_OLAND_6602 0x6602 #define PCI_CHIP_OLAND_6603 0x6603 +#define PCI_CHIP_OLAND_6604 0x6604 +#define PCI_CHIP_OLAND_6605 0x6605 #define PCI_CHIP_OLAND_6606 0x6606 #define PCI_CHIP_OLAND_6607 0x6607 +#define PCI_CHIP_OLAND_6608 0x6608 #define PCI_CHIP_OLAND_6610 0x6610 #define PCI_CHIP_OLAND_6611 0x6611 #define PCI_CHIP_OLAND_6613 0x6613 @@ -700,6 +704,8 @@ #define PCI_CHIP_HAINAN_666F 0x666F #define PCI_CHIP_BONAIRE_6640 0x6640 #define PCI_CHIP_BONAIRE_6641 0x6641 +#define PCI_CHIP_BONAIRE_6646 0x6646 +#define PCI_CHIP_BONAIRE_6647 0x6647 #define PCI_CHIP_BONAIRE_6649 0x6649 #define PCI_CHIP_BONAIRE_6650 0x6650 #define PCI_CHIP_BONAIRE_6651 0x6651 @@ -722,6 +728,22 @@ #define PCI_CHIP_KABINI_983D 0x983D #define PCI_CHIP_KABINI_983E 0x983E #define PCI_CHIP_KABINI_983F 0x983F +#define PCI_CHIP_MULLINS_9850 0x9850 +#define PCI_CHIP_MULLINS_9851 0x9851 +#define PCI_CHIP_MULLINS_9852 0x9852 +#define PCI_CHIP_MULLINS_9853 0x9853 +#define PCI_CHIP_MULLINS_9854 0x9854 +#define PCI_CHIP_MULLINS_9855 0x9855 +#define PCI_CHIP_MULLINS_9856 0x9856 +#define PCI_CHIP_MULLINS_9857 0x9857 +#define PCI_CHIP_MULLINS_9858 0x9858 +#define PCI_CHIP_MULLINS_9859 0x9859 +#define PCI_CHIP_MULLINS_985A 0x985A +#define PCI_CHIP_MULLINS_985B 0x985B +#define PCI_CHIP_MULLINS_985C 0x985C +#define PCI_CHIP_MULLINS_985D 0x985D +#define PCI_CHIP_MULLINS_985E 0x985E +#define PCI_CHIP_MULLINS_985F 0x985F #define PCI_CHIP_KAVERI_1304 0x1304 #define PCI_CHIP_KAVERI_1305 0x1305 #define PCI_CHIP_KAVERI_1306 0x1306 @@ -740,6 +762,7 @@ #define PCI_CHIP_KAVERI_1315 0x1315 #define PCI_CHIP_KAVERI_1316 0x1316 #define PCI_CHIP_KAVERI_1317 0x1317 +#define PCI_CHIP_KAVERI_1318 0x1318 #define PCI_CHIP_KAVERI_131B 0x131B #define PCI_CHIP_KAVERI_131C 0x131C #define PCI_CHIP_KAVERI_131D 0x131D diff --git a/driver/xf86-video-ati/src/cayman_accel.c b/driver/xf86-video-ati/src/cayman_accel.c index c1f74cbd5..a754610ac 100644 --- a/driver/xf86-video-ati/src/cayman_accel.c +++ b/driver/xf86-video-ati/src/cayman_accel.c @@ -36,7 +36,6 @@ #include "cayman_reg.h" #include "evergreen_state.h" -#include "radeon_drm.h" #include "radeon_vbo.h" #include "radeon_exa_shared.h" diff --git a/driver/xf86-video-ati/src/drmmode_display.c b/driver/xf86-video-ati/src/drmmode_display.c index ffb158ae8..c8f060a76 100644 --- a/driver/xf86-video-ati/src/drmmode_display.c +++ b/driver/xf86-video-ati/src/drmmode_display.c @@ -36,7 +36,6 @@ #include "xf86cmap.h" #include "radeon.h" #include "radeon_reg.h" -#include "radeon_drm.h" #include "sarea.h" #include "drmmode_display.h" @@ -247,7 +246,7 @@ int drmmode_get_current_ust(int drm_fd, CARD64 *ust) } static void -drmmode_crtc_dpms(xf86CrtcPtr crtc, int mode) +drmmode_do_crtc_dpms(xf86CrtcPtr crtc, int mode) { drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private; ScrnInfoPtr scrn = crtc->scrn; @@ -308,6 +307,12 @@ drmmode_crtc_dpms(xf86CrtcPtr crtc, int mode) drmmode_crtc->dpms_mode = mode; } +static void +drmmode_crtc_dpms(xf86CrtcPtr crtc, int mode) +{ + /* Nothing to do. drmmode_do_crtc_dpms() is called as appropriate */ +} + static PixmapPtr create_pixmap_for_fbcon(drmmode_ptr drmmode, ScrnInfoPtr pScrn, int fbcon_id) @@ -958,8 +963,8 @@ drmmode_output_destroy(xf86OutputPtr output) } for (i = 0; i < drmmode_output->mode_output->count_encoders; i++) { drmModeFreeEncoder(drmmode_output->mode_encoders[i]); - free(drmmode_output->mode_encoders); } + free(drmmode_output->mode_encoders); free(drmmode_output->props); drmModeFreeConnector(drmmode_output->mode_output); free(drmmode_output); @@ -973,9 +978,14 @@ drmmode_output_dpms(xf86OutputPtr output, int mode) drmModeConnectorPtr koutput = drmmode_output->mode_output; drmmode_ptr drmmode = drmmode_output->drmmode; + if (mode != DPMSModeOn && output->crtc) + drmmode_do_crtc_dpms(output->crtc, mode); + drmModeConnectorSetProperty(drmmode->fd, koutput->connector_id, drmmode_output->dpms_enum_id, mode); - return; + + if (mode == DPMSModeOn && output->crtc) + drmmode_do_crtc_dpms(output->crtc, mode); } @@ -1833,6 +1843,7 @@ Bool drmmode_set_desired_modes(ScrnInfoPtr pScrn, drmmode_ptr drmmode) /* Skip disabled CRTCs */ if (!crtc->enabled) { + drmmode_do_crtc_dpms(crtc, DPMSModeOff); drmModeSetCrtc(drmmode->fd, drmmode_crtc->mode_crtc->crtc_id, 0, 0, 0, NULL, 0, NULL); continue; @@ -1939,19 +1950,23 @@ static void drmmode_load_palette(ScrnInfoPtr pScrn, int numColors, Bool drmmode_setup_colormap(ScreenPtr pScreen, ScrnInfoPtr pScrn) { - xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, - "Initializing kms color map\n"); - if (!miCreateDefColormap(pScreen)) - return FALSE; - /* all radeons support 10 bit CLUTs */ - if (!xf86HandleColormaps(pScreen, 256, 10, - drmmode_load_palette, NULL, - CMAP_PALETTED_TRUECOLOR + xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); + + if (xf86_config->num_crtc) { + xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, + "Initializing kms color map\n"); + if (!miCreateDefColormap(pScreen)) + return FALSE; + /* all radeons support 10 bit CLUTs */ + if (!xf86HandleColormaps(pScreen, 256, 10, + drmmode_load_palette, NULL, + CMAP_PALETTED_TRUECOLOR #if 0 /* This option messes up text mode! (eich@suse.de) */ - | CMAP_LOAD_EVEN_IF_OFFSCREEN + | CMAP_LOAD_EVEN_IF_OFFSCREEN #endif - | CMAP_RELOAD_ON_MODE_SWITCH)) - return FALSE; + | CMAP_RELOAD_ON_MODE_SWITCH)) + return FALSE; + } return TRUE; } diff --git a/driver/xf86-video-ati/src/evergreen_accel.c b/driver/xf86-video-ati/src/evergreen_accel.c index e25010b8e..41ebc1a9f 100644 --- a/driver/xf86-video-ati/src/evergreen_accel.c +++ b/driver/xf86-video-ati/src/evergreen_accel.c @@ -37,7 +37,6 @@ #include "evergreen_reg.h" #include "evergreen_state.h" -#include "radeon_drm.h" #include "radeon_vbo.h" #include "radeon_exa_shared.h" @@ -561,7 +560,7 @@ evergreen_set_alu_consts(ScrnInfoPtr pScrn, const_config_t *const_conf, uint32_t #if X_BYTE_ORDER == X_BIG_ENDIAN { - uint32_t count = size << 4, *p = const_conf->cpu_ptr; + uint32_t count = size << 6, *p = const_conf->cpu_ptr; while(count--) { *p = cpu_to_le32(*p); diff --git a/driver/xf86-video-ati/src/pcidb/ati_pciids.csv b/driver/xf86-video-ati/src/pcidb/ati_pciids.csv index 8469a2a59..1c92f5b52 100644 --- a/driver/xf86-video-ati/src/pcidb/ati_pciids.csv +++ b/driver/xf86-video-ati/src/pcidb/ati_pciids.csv @@ -669,6 +669,7 @@ "0x6829","VERDE_6829","VERDE",,,,,,"VERDE" "0x682A","VERDE_682A","VERDE",1,,,,,"VERDE" "0x682B","VERDE_682B","VERDE",1,,,,,"VERDE" +"0x682C","VERDE_682C","VERDE",,,,,,"VERDE" "0x682D","VERDE_682D","VERDE",1,,,,,"VERDE" "0x682F","VERDE_682F","VERDE",1,,,,,"VERDE" "0x6830","VERDE_6830","VERDE",1,,,,,"VERDE" @@ -684,8 +685,11 @@ "0x6601","OLAND_6601","OLAND",1,,,,,"OLAND" "0x6602","OLAND_6602","OLAND",1,,,,,"OLAND" "0x6603","OLAND_6603","OLAND",1,,,,,"OLAND" +"0x6604","OLAND_6604","OLAND",1,,,,,"OLAND" +"0x6605","OLAND_6605","OLAND",1,,,,,"OLAND" "0x6606","OLAND_6606","OLAND",1,,,,,"OLAND" "0x6607","OLAND_6607","OLAND",1,,,,,"OLAND" +"0x6608","OLAND_6608","OLAND",,,,,,"OLAND" "0x6610","OLAND_6610","OLAND",,,,,,"OLAND" "0x6611","OLAND_6611","OLAND",,,,,,"OLAND" "0x6613","OLAND_6613","OLAND",,,,,,"OLAND" @@ -701,6 +705,8 @@ "0x666F","HAINAN_666F","HAINAN",1,,,,,"HAINAN" "0x6640","BONAIRE_6640","BONAIRE",1,,,,,"BONAIRE" "0x6641","BONAIRE_6641","BONAIRE",1,,,,,"BONAIRE" +"0x6646","BONAIRE_6646","BONAIRE",1,,,,,"BONAIRE" +"0x6647","BONAIRE_6647","BONAIRE",1,,,,,"BONAIRE" "0x6649","BONAIRE_6649","BONAIRE",,,,,,"BONAIRE" "0x6650","BONAIRE_6650","BONAIRE",,,,,,"BONAIRE" "0x6651","BONAIRE_6651","BONAIRE",,,,,,"BONAIRE" @@ -723,6 +729,22 @@ "0x983D","KABINI_983D","KABINI",,1,,,1,"KABINI" "0x983E","KABINI_983E","KABINI",,1,,,1,"KABINI" "0x983F","KABINI_983F","KABINI",,1,,,1,"KABINI" +"0x9850","MULLINS_9850","MULLINS",1,1,,,1,"MULLINS" +"0x9851","MULLINS_9851","MULLINS",1,1,,,1,"MULLINS" +"0x9852","MULLINS_9852","MULLINS",1,1,,,1,"MULLINS" +"0x9853","MULLINS_9853","MULLINS",1,1,,,1,"MULLINS" +"0x9854","MULLINS_9854","MULLINS",1,1,,,1,"MULLINS" +"0x9855","MULLINS_9855","MULLINS",1,1,,,1,"MULLINS" +"0x9856","MULLINS_9856","MULLINS",1,1,,,1,"MULLINS" +"0x9857","MULLINS_9857","MULLINS",1,1,,,1,"MULLINS" +"0x9858","MULLINS_9858","MULLINS",1,1,,,1,"MULLINS" +"0x9859","MULLINS_9859","MULLINS",1,1,,,1,"MULLINS" +"0x985A","MULLINS_985A","MULLINS",1,1,,,1,"MULLINS" +"0x985B","MULLINS_985B","MULLINS",1,1,,,1,"MULLINS" +"0x985C","MULLINS_985C","MULLINS",1,1,,,1,"MULLINS" +"0x985D","MULLINS_985D","MULLINS",1,1,,,1,"MULLINS" +"0x985E","MULLINS_985E","MULLINS",1,1,,,1,"MULLINS" +"0x985F","MULLINS_985F","MULLINS",1,1,,,1,"MULLINS" "0x1304","KAVERI_1304","KAVERI",1,1,,,1,"KAVERI" "0x1305","KAVERI_1305","KAVERI",,1,,,1,"KAVERI" "0x1306","KAVERI_1306","KAVERI",1,1,,,1,"KAVERI" @@ -741,6 +763,7 @@ "0x1315","KAVERI_1315","KAVERI",,1,,,1,"KAVERI" "0x1316","KAVERI_1316","KAVERI",,1,,,1,"KAVERI" "0x1317","KAVERI_1317","KAVERI",1,1,,,1,"KAVERI" +"0x1318","KAVERI_1318","KAVERI",1,1,,,1,"KAVERI" "0x131B","KAVERI_131B","KAVERI",,1,,,1,"KAVERI" "0x131C","KAVERI_131C","KAVERI",,1,,,1,"KAVERI" "0x131D","KAVERI_131D","KAVERI",,1,,,1,"KAVERI" diff --git a/driver/xf86-video-ati/src/r6xx_accel.c b/driver/xf86-video-ati/src/r6xx_accel.c index 6bbf66374..a97c84b3e 100644 --- a/driver/xf86-video-ati/src/r6xx_accel.c +++ b/driver/xf86-video-ati/src/r6xx_accel.c @@ -37,7 +37,6 @@ #include "r600_reg.h" #include "r600_state.h" -#include "radeon_drm.h" #include "radeon_vbo.h" #include "radeon_exa_shared.h" diff --git a/driver/xf86-video-ati/src/radeon.h b/driver/xf86-video-ati/src/radeon.h index f1817e741..6123cc26a 100644 --- a/driver/xf86-video-ati/src/radeon.h +++ b/driver/xf86-video-ati/src/radeon.h @@ -135,7 +135,7 @@ #endif typedef enum { - OPTION_NOACCEL, + OPTION_ACCEL, OPTION_SW_CURSOR, OPTION_PAGE_FLIP, OPTION_EXA_PIXMAPS, @@ -786,14 +786,21 @@ static __inline__ void RADEON_SYNC(RADEONInfoPtr info, ScrnInfoPtr pScrn) } enum { - RADEON_CREATE_PIXMAP_DRI2 = 0x08000000, - RADEON_CREATE_PIXMAP_TILING_MACRO = 0x10000000, - RADEON_CREATE_PIXMAP_TILING_MICRO = 0x20000000, - RADEON_CREATE_PIXMAP_DEPTH = 0x40000000, /* for r200 */ - RADEON_CREATE_PIXMAP_SZBUFFER = 0x80000000, /* for eg */ - RADEON_CREATE_PIXMAP_TILING_MICRO_SQUARE = 0x8000000, + RADEON_CREATE_PIXMAP_DRI2 = 0x04000000, + RADEON_CREATE_PIXMAP_TILING_MICRO_SQUARE = 0x08000000, + RADEON_CREATE_PIXMAP_TILING_MACRO = 0x10000000, + RADEON_CREATE_PIXMAP_TILING_MICRO = 0x20000000, + RADEON_CREATE_PIXMAP_DEPTH = 0x40000000, /* for r200 */ + RADEON_CREATE_PIXMAP_SZBUFFER = 0x80000000, /* for eg */ }; +#define RADEON_CREATE_PIXMAP_TILING_FLAGS \ + (RADEON_CREATE_PIXMAP_TILING_MICRO_SQUARE | \ + RADEON_CREATE_PIXMAP_TILING_MACRO | \ + RADEON_CREATE_PIXMAP_TILING_MICRO | \ + RADEON_CREATE_PIXMAP_DEPTH | \ + RADEON_CREATE_PIXMAP_SZBUFFER) + /* Compute log base 2 of val. */ static __inline__ int @@ -813,5 +820,7 @@ RADEONLog2(int val) #endif } +#define RADEON_TILING_MASK 0xff +#define RADEON_TILING_LINEAR 0x0 #endif /* _RADEON_H_ */ diff --git a/driver/xf86-video-ati/src/radeon_chipinfo_gen.h b/driver/xf86-video-ati/src/radeon_chipinfo_gen.h index fc9474b9e..40577c9eb 100644 --- a/driver/xf86-video-ati/src/radeon_chipinfo_gen.h +++ b/driver/xf86-video-ati/src/radeon_chipinfo_gen.h @@ -588,6 +588,7 @@ static RADEONCardInfo RADEONCards[] = { { 0x6829, CHIP_FAMILY_VERDE, 0, 0, 0, 0, 0 }, { 0x682A, CHIP_FAMILY_VERDE, 1, 0, 0, 0, 0 }, { 0x682B, CHIP_FAMILY_VERDE, 1, 0, 0, 0, 0 }, + { 0x682C, CHIP_FAMILY_VERDE, 0, 0, 0, 0, 0 }, { 0x682D, CHIP_FAMILY_VERDE, 1, 0, 0, 0, 0 }, { 0x682F, CHIP_FAMILY_VERDE, 1, 0, 0, 0, 0 }, { 0x6830, CHIP_FAMILY_VERDE, 1, 0, 0, 0, 0 }, @@ -603,8 +604,11 @@ static RADEONCardInfo RADEONCards[] = { { 0x6601, CHIP_FAMILY_OLAND, 1, 0, 0, 0, 0 }, { 0x6602, CHIP_FAMILY_OLAND, 1, 0, 0, 0, 0 }, { 0x6603, CHIP_FAMILY_OLAND, 1, 0, 0, 0, 0 }, + { 0x6604, CHIP_FAMILY_OLAND, 1, 0, 0, 0, 0 }, + { 0x6605, CHIP_FAMILY_OLAND, 1, 0, 0, 0, 0 }, { 0x6606, CHIP_FAMILY_OLAND, 1, 0, 0, 0, 0 }, { 0x6607, CHIP_FAMILY_OLAND, 1, 0, 0, 0, 0 }, + { 0x6608, CHIP_FAMILY_OLAND, 0, 0, 0, 0, 0 }, { 0x6610, CHIP_FAMILY_OLAND, 0, 0, 0, 0, 0 }, { 0x6611, CHIP_FAMILY_OLAND, 0, 0, 0, 0, 0 }, { 0x6613, CHIP_FAMILY_OLAND, 0, 0, 0, 0, 0 }, @@ -620,6 +624,8 @@ static RADEONCardInfo RADEONCards[] = { { 0x666F, CHIP_FAMILY_HAINAN, 1, 0, 0, 0, 0 }, { 0x6640, CHIP_FAMILY_BONAIRE, 1, 0, 0, 0, 0 }, { 0x6641, CHIP_FAMILY_BONAIRE, 1, 0, 0, 0, 0 }, + { 0x6646, CHIP_FAMILY_BONAIRE, 1, 0, 0, 0, 0 }, + { 0x6647, CHIP_FAMILY_BONAIRE, 1, 0, 0, 0, 0 }, { 0x6649, CHIP_FAMILY_BONAIRE, 0, 0, 0, 0, 0 }, { 0x6650, CHIP_FAMILY_BONAIRE, 0, 0, 0, 0, 0 }, { 0x6651, CHIP_FAMILY_BONAIRE, 0, 0, 0, 0, 0 }, @@ -642,6 +648,22 @@ static RADEONCardInfo RADEONCards[] = { { 0x983D, CHIP_FAMILY_KABINI, 0, 1, 0, 0, 1 }, { 0x983E, CHIP_FAMILY_KABINI, 0, 1, 0, 0, 1 }, { 0x983F, CHIP_FAMILY_KABINI, 0, 1, 0, 0, 1 }, + { 0x9850, CHIP_FAMILY_MULLINS, 1, 1, 0, 0, 1 }, + { 0x9851, CHIP_FAMILY_MULLINS, 1, 1, 0, 0, 1 }, + { 0x9852, CHIP_FAMILY_MULLINS, 1, 1, 0, 0, 1 }, + { 0x9853, CHIP_FAMILY_MULLINS, 1, 1, 0, 0, 1 }, + { 0x9854, CHIP_FAMILY_MULLINS, 1, 1, 0, 0, 1 }, + { 0x9855, CHIP_FAMILY_MULLINS, 1, 1, 0, 0, 1 }, + { 0x9856, CHIP_FAMILY_MULLINS, 1, 1, 0, 0, 1 }, + { 0x9857, CHIP_FAMILY_MULLINS, 1, 1, 0, 0, 1 }, + { 0x9858, CHIP_FAMILY_MULLINS, 1, 1, 0, 0, 1 }, + { 0x9859, CHIP_FAMILY_MULLINS, 1, 1, 0, 0, 1 }, + { 0x985A, CHIP_FAMILY_MULLINS, 1, 1, 0, 0, 1 }, + { 0x985B, CHIP_FAMILY_MULLINS, 1, 1, 0, 0, 1 }, + { 0x985C, CHIP_FAMILY_MULLINS, 1, 1, 0, 0, 1 }, + { 0x985D, CHIP_FAMILY_MULLINS, 1, 1, 0, 0, 1 }, + { 0x985E, CHIP_FAMILY_MULLINS, 1, 1, 0, 0, 1 }, + { 0x985F, CHIP_FAMILY_MULLINS, 1, 1, 0, 0, 1 }, { 0x1304, CHIP_FAMILY_KAVERI, 1, 1, 0, 0, 1 }, { 0x1305, CHIP_FAMILY_KAVERI, 0, 1, 0, 0, 1 }, { 0x1306, CHIP_FAMILY_KAVERI, 1, 1, 0, 0, 1 }, @@ -660,6 +682,7 @@ static RADEONCardInfo RADEONCards[] = { { 0x1315, CHIP_FAMILY_KAVERI, 0, 1, 0, 0, 1 }, { 0x1316, CHIP_FAMILY_KAVERI, 0, 1, 0, 0, 1 }, { 0x1317, CHIP_FAMILY_KAVERI, 1, 1, 0, 0, 1 }, + { 0x1318, CHIP_FAMILY_KAVERI, 1, 1, 0, 0, 1 }, { 0x131B, CHIP_FAMILY_KAVERI, 0, 1, 0, 0, 1 }, { 0x131C, CHIP_FAMILY_KAVERI, 0, 1, 0, 0, 1 }, { 0x131D, CHIP_FAMILY_KAVERI, 0, 1, 0, 0, 1 }, diff --git a/driver/xf86-video-ati/src/radeon_chipset_gen.h b/driver/xf86-video-ati/src/radeon_chipset_gen.h index afab6b000..e3f23b6c9 100644 --- a/driver/xf86-video-ati/src/radeon_chipset_gen.h +++ b/driver/xf86-video-ati/src/radeon_chipset_gen.h @@ -588,6 +588,7 @@ SymTabRec RADEONChipsets[] = { { PCI_CHIP_VERDE_6829, "VERDE" }, { PCI_CHIP_VERDE_682A, "VERDE" }, { PCI_CHIP_VERDE_682B, "VERDE" }, + { PCI_CHIP_VERDE_682C, "VERDE" }, { PCI_CHIP_VERDE_682D, "VERDE" }, { PCI_CHIP_VERDE_682F, "VERDE" }, { PCI_CHIP_VERDE_6830, "VERDE" }, @@ -603,8 +604,11 @@ SymTabRec RADEONChipsets[] = { { PCI_CHIP_OLAND_6601, "OLAND" }, { PCI_CHIP_OLAND_6602, "OLAND" }, { PCI_CHIP_OLAND_6603, "OLAND" }, + { PCI_CHIP_OLAND_6604, "OLAND" }, + { PCI_CHIP_OLAND_6605, "OLAND" }, { PCI_CHIP_OLAND_6606, "OLAND" }, { PCI_CHIP_OLAND_6607, "OLAND" }, + { PCI_CHIP_OLAND_6608, "OLAND" }, { PCI_CHIP_OLAND_6610, "OLAND" }, { PCI_CHIP_OLAND_6611, "OLAND" }, { PCI_CHIP_OLAND_6613, "OLAND" }, @@ -620,6 +624,8 @@ SymTabRec RADEONChipsets[] = { { PCI_CHIP_HAINAN_666F, "HAINAN" }, { PCI_CHIP_BONAIRE_6640, "BONAIRE" }, { PCI_CHIP_BONAIRE_6641, "BONAIRE" }, + { PCI_CHIP_BONAIRE_6646, "BONAIRE" }, + { PCI_CHIP_BONAIRE_6647, "BONAIRE" }, { PCI_CHIP_BONAIRE_6649, "BONAIRE" }, { PCI_CHIP_BONAIRE_6650, "BONAIRE" }, { PCI_CHIP_BONAIRE_6651, "BONAIRE" }, @@ -642,6 +648,22 @@ SymTabRec RADEONChipsets[] = { { PCI_CHIP_KABINI_983D, "KABINI" }, { PCI_CHIP_KABINI_983E, "KABINI" }, { PCI_CHIP_KABINI_983F, "KABINI" }, + { PCI_CHIP_MULLINS_9850, "MULLINS" }, + { PCI_CHIP_MULLINS_9851, "MULLINS" }, + { PCI_CHIP_MULLINS_9852, "MULLINS" }, + { PCI_CHIP_MULLINS_9853, "MULLINS" }, + { PCI_CHIP_MULLINS_9854, "MULLINS" }, + { PCI_CHIP_MULLINS_9855, "MULLINS" }, + { PCI_CHIP_MULLINS_9856, "MULLINS" }, + { PCI_CHIP_MULLINS_9857, "MULLINS" }, + { PCI_CHIP_MULLINS_9858, "MULLINS" }, + { PCI_CHIP_MULLINS_9859, "MULLINS" }, + { PCI_CHIP_MULLINS_985A, "MULLINS" }, + { PCI_CHIP_MULLINS_985B, "MULLINS" }, + { PCI_CHIP_MULLINS_985C, "MULLINS" }, + { PCI_CHIP_MULLINS_985D, "MULLINS" }, + { PCI_CHIP_MULLINS_985E, "MULLINS" }, + { PCI_CHIP_MULLINS_985F, "MULLINS" }, { PCI_CHIP_KAVERI_1304, "KAVERI" }, { PCI_CHIP_KAVERI_1305, "KAVERI" }, { PCI_CHIP_KAVERI_1306, "KAVERI" }, @@ -660,6 +682,7 @@ SymTabRec RADEONChipsets[] = { { PCI_CHIP_KAVERI_1315, "KAVERI" }, { PCI_CHIP_KAVERI_1316, "KAVERI" }, { PCI_CHIP_KAVERI_1317, "KAVERI" }, + { PCI_CHIP_KAVERI_1318, "KAVERI" }, { PCI_CHIP_KAVERI_131B, "KAVERI" }, { PCI_CHIP_KAVERI_131C, "KAVERI" }, { PCI_CHIP_KAVERI_131D, "KAVERI" }, diff --git a/driver/xf86-video-ati/src/radeon_dri2.c b/driver/xf86-video-ati/src/radeon_dri2.c index d47b03500..9a9918b0f 100644 --- a/driver/xf86-video-ati/src/radeon_dri2.c +++ b/driver/xf86-video-ati/src/radeon_dri2.c @@ -409,7 +409,14 @@ radeon_dri2_copy_region2(ScreenPtr pScreen, dst_drawable = &dst_private->pixmap->drawable; if (src_private->attachment == DRI2BufferFrontLeft) { - src_drawable = drawable; +#ifdef USE_DRI2_PRIME + if (drawable->pScreen != pScreen) { + src_drawable = DRI2UpdatePrime(drawable, src_buffer); + if (!src_drawable) + return; + } else +#endif + src_drawable = drawable; } if (dst_private->attachment == DRI2BufferFrontLeft) { #ifdef USE_DRI2_PRIME diff --git a/driver/xf86-video-ati/src/radeon_drm.h b/driver/xf86-video-ati/src/radeon_drm.h deleted file mode 100644 index 2bbd8fa3d..000000000 --- a/driver/xf86-video-ati/src/radeon_drm.h +++ /dev/null @@ -1,920 +0,0 @@ -/* radeon_drm.h -- Public header for the radeon driver -*- linux-c -*- - * - * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Fremont, California. - * Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Kevin E. Martin <martin@valinux.com> - * Gareth Hughes <gareth@valinux.com> - * Keith Whitwell <keith@tungstengraphics.com> - */ - -#ifndef __RADEON_DRM_H__ -#define __RADEON_DRM_H__ - -/* WARNING: If you change any of these defines, make sure to change the - * defines in the X server file (radeon_sarea.h) - */ -#ifndef __RADEON_SAREA_DEFINES__ -#define __RADEON_SAREA_DEFINES__ - -/* Old style state flags, required for sarea interface (1.1 and 1.2 - * clears) and 1.2 drm_vertex2 ioctl. - */ -#define RADEON_UPLOAD_CONTEXT 0x00000001 -#define RADEON_UPLOAD_VERTFMT 0x00000002 -#define RADEON_UPLOAD_LINE 0x00000004 -#define RADEON_UPLOAD_BUMPMAP 0x00000008 -#define RADEON_UPLOAD_MASKS 0x00000010 -#define RADEON_UPLOAD_VIEWPORT 0x00000020 -#define RADEON_UPLOAD_SETUP 0x00000040 -#define RADEON_UPLOAD_TCL 0x00000080 -#define RADEON_UPLOAD_MISC 0x00000100 -#define RADEON_UPLOAD_TEX0 0x00000200 -#define RADEON_UPLOAD_TEX1 0x00000400 -#define RADEON_UPLOAD_TEX2 0x00000800 -#define RADEON_UPLOAD_TEX0IMAGES 0x00001000 -#define RADEON_UPLOAD_TEX1IMAGES 0x00002000 -#define RADEON_UPLOAD_TEX2IMAGES 0x00004000 -#define RADEON_UPLOAD_CLIPRECTS 0x00008000 /* handled client-side */ -#define RADEON_REQUIRE_QUIESCENCE 0x00010000 -#define RADEON_UPLOAD_ZBIAS 0x00020000 /* version 1.2 and newer */ -#define RADEON_UPLOAD_ALL 0x003effff -#define RADEON_UPLOAD_CONTEXT_ALL 0x003e01ff - -/* New style per-packet identifiers for use in cmd_buffer ioctl with - * the RADEON_EMIT_PACKET command. Comments relate new packets to old - * state bits and the packet size: - */ -#define RADEON_EMIT_PP_MISC 0 /* context/7 */ -#define RADEON_EMIT_PP_CNTL 1 /* context/3 */ -#define RADEON_EMIT_RB3D_COLORPITCH 2 /* context/1 */ -#define RADEON_EMIT_RE_LINE_PATTERN 3 /* line/2 */ -#define RADEON_EMIT_SE_LINE_WIDTH 4 /* line/1 */ -#define RADEON_EMIT_PP_LUM_MATRIX 5 /* bumpmap/1 */ -#define RADEON_EMIT_PP_ROT_MATRIX_0 6 /* bumpmap/2 */ -#define RADEON_EMIT_RB3D_STENCILREFMASK 7 /* masks/3 */ -#define RADEON_EMIT_SE_VPORT_XSCALE 8 /* viewport/6 */ -#define RADEON_EMIT_SE_CNTL 9 /* setup/2 */ -#define RADEON_EMIT_SE_CNTL_STATUS 10 /* setup/1 */ -#define RADEON_EMIT_RE_MISC 11 /* misc/1 */ -#define RADEON_EMIT_PP_TXFILTER_0 12 /* tex0/6 */ -#define RADEON_EMIT_PP_BORDER_COLOR_0 13 /* tex0/1 */ -#define RADEON_EMIT_PP_TXFILTER_1 14 /* tex1/6 */ -#define RADEON_EMIT_PP_BORDER_COLOR_1 15 /* tex1/1 */ -#define RADEON_EMIT_PP_TXFILTER_2 16 /* tex2/6 */ -#define RADEON_EMIT_PP_BORDER_COLOR_2 17 /* tex2/1 */ -#define RADEON_EMIT_SE_ZBIAS_FACTOR 18 /* zbias/2 */ -#define RADEON_EMIT_SE_TCL_OUTPUT_VTX_FMT 19 /* tcl/11 */ -#define RADEON_EMIT_SE_TCL_MATERIAL_EMMISSIVE_RED 20 /* material/17 */ -#define R200_EMIT_PP_TXCBLEND_0 21 /* tex0/4 */ -#define R200_EMIT_PP_TXCBLEND_1 22 /* tex1/4 */ -#define R200_EMIT_PP_TXCBLEND_2 23 /* tex2/4 */ -#define R200_EMIT_PP_TXCBLEND_3 24 /* tex3/4 */ -#define R200_EMIT_PP_TXCBLEND_4 25 /* tex4/4 */ -#define R200_EMIT_PP_TXCBLEND_5 26 /* tex5/4 */ -#define R200_EMIT_PP_TXCBLEND_6 27 /* /4 */ -#define R200_EMIT_PP_TXCBLEND_7 28 /* /4 */ -#define R200_EMIT_TCL_LIGHT_MODEL_CTL_0 29 /* tcl/7 */ -#define R200_EMIT_TFACTOR_0 30 /* tf/7 */ -#define R200_EMIT_VTX_FMT_0 31 /* vtx/5 */ -#define R200_EMIT_VAP_CTL 32 /* vap/1 */ -#define R200_EMIT_MATRIX_SELECT_0 33 /* msl/5 */ -#define R200_EMIT_TEX_PROC_CTL_2 34 /* tcg/5 */ -#define R200_EMIT_TCL_UCP_VERT_BLEND_CTL 35 /* tcl/1 */ -#define R200_EMIT_PP_TXFILTER_0 36 /* tex0/6 */ -#define R200_EMIT_PP_TXFILTER_1 37 /* tex1/6 */ -#define R200_EMIT_PP_TXFILTER_2 38 /* tex2/6 */ -#define R200_EMIT_PP_TXFILTER_3 39 /* tex3/6 */ -#define R200_EMIT_PP_TXFILTER_4 40 /* tex4/6 */ -#define R200_EMIT_PP_TXFILTER_5 41 /* tex5/6 */ -#define R200_EMIT_PP_TXOFFSET_0 42 /* tex0/1 */ -#define R200_EMIT_PP_TXOFFSET_1 43 /* tex1/1 */ -#define R200_EMIT_PP_TXOFFSET_2 44 /* tex2/1 */ -#define R200_EMIT_PP_TXOFFSET_3 45 /* tex3/1 */ -#define R200_EMIT_PP_TXOFFSET_4 46 /* tex4/1 */ -#define R200_EMIT_PP_TXOFFSET_5 47 /* tex5/1 */ -#define R200_EMIT_VTE_CNTL 48 /* vte/1 */ -#define R200_EMIT_OUTPUT_VTX_COMP_SEL 49 /* vtx/1 */ -#define R200_EMIT_PP_TAM_DEBUG3 50 /* tam/1 */ -#define R200_EMIT_PP_CNTL_X 51 /* cst/1 */ -#define R200_EMIT_RB3D_DEPTHXY_OFFSET 52 /* cst/1 */ -#define R200_EMIT_RE_AUX_SCISSOR_CNTL 53 /* cst/1 */ -#define R200_EMIT_RE_SCISSOR_TL_0 54 /* cst/2 */ -#define R200_EMIT_RE_SCISSOR_TL_1 55 /* cst/2 */ -#define R200_EMIT_RE_SCISSOR_TL_2 56 /* cst/2 */ -#define R200_EMIT_SE_VAP_CNTL_STATUS 57 /* cst/1 */ -#define R200_EMIT_SE_VTX_STATE_CNTL 58 /* cst/1 */ -#define R200_EMIT_RE_POINTSIZE 59 /* cst/1 */ -#define R200_EMIT_TCL_INPUT_VTX_VECTOR_ADDR_0 60 /* cst/4 */ -#define R200_EMIT_PP_CUBIC_FACES_0 61 -#define R200_EMIT_PP_CUBIC_OFFSETS_0 62 -#define R200_EMIT_PP_CUBIC_FACES_1 63 -#define R200_EMIT_PP_CUBIC_OFFSETS_1 64 -#define R200_EMIT_PP_CUBIC_FACES_2 65 -#define R200_EMIT_PP_CUBIC_OFFSETS_2 66 -#define R200_EMIT_PP_CUBIC_FACES_3 67 -#define R200_EMIT_PP_CUBIC_OFFSETS_3 68 -#define R200_EMIT_PP_CUBIC_FACES_4 69 -#define R200_EMIT_PP_CUBIC_OFFSETS_4 70 -#define R200_EMIT_PP_CUBIC_FACES_5 71 -#define R200_EMIT_PP_CUBIC_OFFSETS_5 72 -#define RADEON_EMIT_PP_TEX_SIZE_0 73 -#define RADEON_EMIT_PP_TEX_SIZE_1 74 -#define RADEON_EMIT_PP_TEX_SIZE_2 75 -#define R200_EMIT_RB3D_BLENDCOLOR 76 -#define R200_EMIT_TCL_POINT_SPRITE_CNTL 77 -#define RADEON_EMIT_PP_CUBIC_FACES_0 78 -#define RADEON_EMIT_PP_CUBIC_OFFSETS_T0 79 -#define RADEON_EMIT_PP_CUBIC_FACES_1 80 -#define RADEON_EMIT_PP_CUBIC_OFFSETS_T1 81 -#define RADEON_EMIT_PP_CUBIC_FACES_2 82 -#define RADEON_EMIT_PP_CUBIC_OFFSETS_T2 83 -#define R200_EMIT_PP_TRI_PERF_CNTL 84 -#define R200_EMIT_PP_AFS_0 85 -#define R200_EMIT_PP_AFS_1 86 -#define R200_EMIT_ATF_TFACTOR 87 -#define R200_EMIT_PP_TXCTLALL_0 88 -#define R200_EMIT_PP_TXCTLALL_1 89 -#define R200_EMIT_PP_TXCTLALL_2 90 -#define R200_EMIT_PP_TXCTLALL_3 91 -#define R200_EMIT_PP_TXCTLALL_4 92 -#define R200_EMIT_PP_TXCTLALL_5 93 -#define R200_EMIT_VAP_PVS_CNTL 94 -#define RADEON_MAX_STATE_PACKETS 95 - -/* Commands understood by cmd_buffer ioctl. More can be added but - * obviously these can't be removed or changed: - */ -#define RADEON_CMD_PACKET 1 /* emit one of the register packets above */ -#define RADEON_CMD_SCALARS 2 /* emit scalar data */ -#define RADEON_CMD_VECTORS 3 /* emit vector data */ -#define RADEON_CMD_DMA_DISCARD 4 /* discard current dma buf */ -#define RADEON_CMD_PACKET3 5 /* emit hw packet */ -#define RADEON_CMD_PACKET3_CLIP 6 /* emit hw packet wrapped in cliprects */ -#define RADEON_CMD_SCALARS2 7 /* r200 stopgap */ -#define RADEON_CMD_WAIT 8 /* emit hw wait commands -- note: - * doesn't make the cpu wait, just - * the graphics hardware */ -#define RADEON_CMD_VECLINEAR 9 /* another r200 stopgap */ - -typedef union { - int i; - struct { - unsigned char cmd_type, pad0, pad1, pad2; - } header; - struct { - unsigned char cmd_type, packet_id, pad0, pad1; - } packet; - struct { - unsigned char cmd_type, offset, stride, count; - } scalars; - struct { - unsigned char cmd_type, offset, stride, count; - } vectors; - struct { - unsigned char cmd_type, addr_lo, addr_hi, count; - } veclinear; - struct { - unsigned char cmd_type, buf_idx, pad0, pad1; - } dma; - struct { - unsigned char cmd_type, flags, pad0, pad1; - } wait; -} drm_radeon_cmd_header_t; - -#define RADEON_WAIT_2D 0x1 -#define RADEON_WAIT_3D 0x2 - -/* Allowed parameters for R300_CMD_PACKET3 - */ -#define R300_CMD_PACKET3_CLEAR 0 -#define R300_CMD_PACKET3_RAW 1 - -/* Commands understood by cmd_buffer ioctl for R300. - * The interface has not been stabilized, so some of these may be removed - * and eventually reordered before stabilization. - */ -#define R300_CMD_PACKET0 1 -#define R300_CMD_VPU 2 /* emit vertex program upload */ -#define R300_CMD_PACKET3 3 /* emit a packet3 */ -#define R300_CMD_END3D 4 /* emit sequence ending 3d rendering */ -#define R300_CMD_CP_DELAY 5 -#define R300_CMD_DMA_DISCARD 6 -#define R300_CMD_WAIT 7 -# define R300_WAIT_2D 0x1 -# define R300_WAIT_3D 0x2 -/* these two defines are DOING IT WRONG - however - * we have userspace which relies on using these. - * The wait interface is backwards compat new - * code should use the NEW_WAIT defines below - * THESE ARE NOT BIT FIELDS - */ -# define R300_WAIT_2D_CLEAN 0x3 -# define R300_WAIT_3D_CLEAN 0x4 - -# define R300_NEW_WAIT_2D_3D 0x3 -# define R300_NEW_WAIT_2D_2D_CLEAN 0x4 -# define R300_NEW_WAIT_3D_3D_CLEAN 0x6 -# define R300_NEW_WAIT_2D_2D_CLEAN_3D_3D_CLEAN 0x8 - -#define R300_CMD_SCRATCH 8 -#define R300_CMD_R500FP 9 - -typedef union { - unsigned int u; - struct { - unsigned char cmd_type, pad0, pad1, pad2; - } header; - struct { - unsigned char cmd_type, count, reglo, reghi; - } packet0; - struct { - unsigned char cmd_type, count, adrlo, adrhi; - } vpu; - struct { - unsigned char cmd_type, packet, pad0, pad1; - } packet3; - struct { - unsigned char cmd_type, packet; - unsigned short count; /* amount of packet2 to emit */ - } delay; - struct { - unsigned char cmd_type, buf_idx, pad0, pad1; - } dma; - struct { - unsigned char cmd_type, flags, pad0, pad1; - } wait; - struct { - unsigned char cmd_type, reg, n_bufs, flags; - } scratch; - struct { - unsigned char cmd_type, count, adrlo, adrhi_flags; - } r500fp; -} drm_r300_cmd_header_t; - -#define RADEON_FRONT 0x1 -#define RADEON_BACK 0x2 -#define RADEON_DEPTH 0x4 -#define RADEON_STENCIL 0x8 -#define RADEON_CLEAR_FASTZ 0x80000000 -#define RADEON_USE_HIERZ 0x40000000 -#define RADEON_USE_COMP_ZBUF 0x20000000 - -#define R500FP_CONSTANT_TYPE (1 << 1) -#define R500FP_CONSTANT_CLAMP (1 << 2) - -/* Primitive types - */ -#define RADEON_POINTS 0x1 -#define RADEON_LINES 0x2 -#define RADEON_LINE_STRIP 0x3 -#define RADEON_TRIANGLES 0x4 -#define RADEON_TRIANGLE_FAN 0x5 -#define RADEON_TRIANGLE_STRIP 0x6 - -/* Vertex/indirect buffer size - */ -#define RADEON_BUFFER_SIZE 65536 - -/* Byte offsets for indirect buffer data - */ -#define RADEON_INDEX_PRIM_OFFSET 20 - -#define RADEON_SCRATCH_REG_OFFSET 32 -#define R600_SCRATCH_REG_OFFSET 256 - -#define RADEON_NR_SAREA_CLIPRECTS 12 - -/* There are 2 heaps (local/GART). Each region within a heap is a - * minimum of 64k, and there are at most 64 of them per heap. - */ -#define RADEON_LOCAL_TEX_HEAP 0 -#define RADEON_GART_TEX_HEAP 1 -#define RADEON_NR_TEX_HEAPS 2 -#define RADEON_NR_TEX_REGIONS 64 -#define RADEON_LOG_TEX_GRANULARITY 16 - -#define RADEON_MAX_TEXTURE_LEVELS 12 -#define RADEON_MAX_TEXTURE_UNITS 3 - -#define RADEON_MAX_SURFACES 8 - -/* Blits have strict offset rules. All blit offset must be aligned on - * a 1K-byte boundary. - */ -#define RADEON_OFFSET_SHIFT 10 -#define RADEON_OFFSET_ALIGN (1 << RADEON_OFFSET_SHIFT) -#define RADEON_OFFSET_MASK (RADEON_OFFSET_ALIGN - 1) - -#endif /* __RADEON_SAREA_DEFINES__ */ - -typedef struct { - unsigned int red; - unsigned int green; - unsigned int blue; - unsigned int alpha; -} radeon_color_regs_t; - -typedef struct { - /* Context state */ - unsigned int pp_misc; /* 0x1c14 */ - unsigned int pp_fog_color; - unsigned int re_solid_color; - unsigned int rb3d_blendcntl; - unsigned int rb3d_depthoffset; - unsigned int rb3d_depthpitch; - unsigned int rb3d_zstencilcntl; - - unsigned int pp_cntl; /* 0x1c38 */ - unsigned int rb3d_cntl; - unsigned int rb3d_coloroffset; - unsigned int re_width_height; - unsigned int rb3d_colorpitch; - unsigned int se_cntl; - - /* Vertex format state */ - unsigned int se_coord_fmt; /* 0x1c50 */ - - /* Line state */ - unsigned int re_line_pattern; /* 0x1cd0 */ - unsigned int re_line_state; - - unsigned int se_line_width; /* 0x1db8 */ - - /* Bumpmap state */ - unsigned int pp_lum_matrix; /* 0x1d00 */ - - unsigned int pp_rot_matrix_0; /* 0x1d58 */ - unsigned int pp_rot_matrix_1; - - /* Mask state */ - unsigned int rb3d_stencilrefmask; /* 0x1d7c */ - unsigned int rb3d_ropcntl; - unsigned int rb3d_planemask; - - /* Viewport state */ - unsigned int se_vport_xscale; /* 0x1d98 */ - unsigned int se_vport_xoffset; - unsigned int se_vport_yscale; - unsigned int se_vport_yoffset; - unsigned int se_vport_zscale; - unsigned int se_vport_zoffset; - - /* Setup state */ - unsigned int se_cntl_status; /* 0x2140 */ - - /* Misc state */ - unsigned int re_top_left; /* 0x26c0 */ - unsigned int re_misc; -} drm_radeon_context_regs_t; - -typedef struct { - /* Zbias state */ - unsigned int se_zbias_factor; /* 0x1dac */ - unsigned int se_zbias_constant; -} drm_radeon_context2_regs_t; - -/* Setup registers for each texture unit - */ -typedef struct { - unsigned int pp_txfilter; - unsigned int pp_txformat; - unsigned int pp_txoffset; - unsigned int pp_txcblend; - unsigned int pp_txablend; - unsigned int pp_tfactor; - unsigned int pp_border_color; -} drm_radeon_texture_regs_t; - -typedef struct { - unsigned int start; - unsigned int finish; - unsigned int prim:8; - unsigned int stateidx:8; - unsigned int numverts:16; /* overloaded as offset/64 for elt prims */ - unsigned int vc_format; /* vertex format */ -} drm_radeon_prim_t; - -typedef struct { - drm_radeon_context_regs_t context; - drm_radeon_texture_regs_t tex[RADEON_MAX_TEXTURE_UNITS]; - drm_radeon_context2_regs_t context2; - unsigned int dirty; -} drm_radeon_state_t; - -typedef struct { - /* The channel for communication of state information to the - * kernel on firing a vertex buffer with either of the - * obsoleted vertex/index ioctls. - */ - drm_radeon_context_regs_t context_state; - drm_radeon_texture_regs_t tex_state[RADEON_MAX_TEXTURE_UNITS]; - unsigned int dirty; - unsigned int vertsize; - unsigned int vc_format; - - /* The current cliprects, or a subset thereof. - */ - struct drm_clip_rect boxes[RADEON_NR_SAREA_CLIPRECTS]; - unsigned int nbox; - - /* Counters for client-side throttling of rendering clients. - */ - unsigned int last_frame; - unsigned int last_dispatch; - unsigned int last_clear; - - struct drm_tex_region tex_list[RADEON_NR_TEX_HEAPS][RADEON_NR_TEX_REGIONS + - 1]; - unsigned int tex_age[RADEON_NR_TEX_HEAPS]; - int ctx_owner; - int pfState; /* number of 3d windows (0,1,2ormore) */ - int pfCurrentPage; /* which buffer is being displayed? */ - int crtc2_base; /* CRTC2 frame offset */ - int tiling_enabled; /* set by drm, read by 2d + 3d clients */ -} drm_radeon_sarea_t; - -/* WARNING: If you change any of these defines, make sure to change the - * defines in the Xserver file (xf86drmRadeon.h) - * - * KW: actually it's illegal to change any of this (backwards compatibility). - */ - -/* Radeon specific ioctls - * The device specific ioctl range is 0x40 to 0x79. - */ -#define DRM_RADEON_CP_INIT 0x00 -#define DRM_RADEON_CP_START 0x01 -#define DRM_RADEON_CP_STOP 0x02 -#define DRM_RADEON_CP_RESET 0x03 -#define DRM_RADEON_CP_IDLE 0x04 -#define DRM_RADEON_RESET 0x05 -#define DRM_RADEON_FULLSCREEN 0x06 -#define DRM_RADEON_SWAP 0x07 -#define DRM_RADEON_CLEAR 0x08 -#define DRM_RADEON_VERTEX 0x09 -#define DRM_RADEON_INDICES 0x0A -#define DRM_RADEON_NOT_USED -#define DRM_RADEON_STIPPLE 0x0C -#define DRM_RADEON_INDIRECT 0x0D -#define DRM_RADEON_TEXTURE 0x0E -#define DRM_RADEON_VERTEX2 0x0F -#define DRM_RADEON_CMDBUF 0x10 -#define DRM_RADEON_GETPARAM 0x11 -#define DRM_RADEON_FLIP 0x12 -#define DRM_RADEON_ALLOC 0x13 -#define DRM_RADEON_FREE 0x14 -#define DRM_RADEON_INIT_HEAP 0x15 -#define DRM_RADEON_IRQ_EMIT 0x16 -#define DRM_RADEON_IRQ_WAIT 0x17 -#define DRM_RADEON_CP_RESUME 0x18 -#define DRM_RADEON_SETPARAM 0x19 -#define DRM_RADEON_SURF_ALLOC 0x1a -#define DRM_RADEON_SURF_FREE 0x1b -/* KMS ioctl */ -#define DRM_RADEON_GEM_INFO 0x1c -#define DRM_RADEON_GEM_CREATE 0x1d -#define DRM_RADEON_GEM_MMAP 0x1e -#define DRM_RADEON_GEM_PREAD 0x21 -#define DRM_RADEON_GEM_PWRITE 0x22 -#define DRM_RADEON_GEM_SET_DOMAIN 0x23 -#define DRM_RADEON_GEM_WAIT_IDLE 0x24 -#define DRM_RADEON_CS 0x26 -#define DRM_RADEON_INFO 0x27 -#define DRM_RADEON_GEM_SET_TILING 0x28 -#define DRM_RADEON_GEM_GET_TILING 0x29 - -#define DRM_IOCTL_RADEON_CP_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CP_INIT, drm_radeon_init_t) -#define DRM_IOCTL_RADEON_CP_START DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_START) -#define DRM_IOCTL_RADEON_CP_STOP DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CP_STOP, drm_radeon_cp_stop_t) -#define DRM_IOCTL_RADEON_CP_RESET DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_RESET) -#define DRM_IOCTL_RADEON_CP_IDLE DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_IDLE) -#define DRM_IOCTL_RADEON_RESET DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_RESET) -#define DRM_IOCTL_RADEON_FULLSCREEN DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_FULLSCREEN, drm_radeon_fullscreen_t) -#define DRM_IOCTL_RADEON_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_SWAP) -#define DRM_IOCTL_RADEON_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CLEAR, drm_radeon_clear_t) -#define DRM_IOCTL_RADEON_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_VERTEX, drm_radeon_vertex_t) -#define DRM_IOCTL_RADEON_INDICES DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_INDICES, drm_radeon_indices_t) -#define DRM_IOCTL_RADEON_STIPPLE DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_STIPPLE, drm_radeon_stipple_t) -#define DRM_IOCTL_RADEON_INDIRECT DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_INDIRECT, drm_radeon_indirect_t) -#define DRM_IOCTL_RADEON_TEXTURE DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_TEXTURE, drm_radeon_texture_t) -#define DRM_IOCTL_RADEON_VERTEX2 DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_VERTEX2, drm_radeon_vertex2_t) -#define DRM_IOCTL_RADEON_CMDBUF DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CMDBUF, drm_radeon_cmd_buffer_t) -#define DRM_IOCTL_RADEON_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GETPARAM, drm_radeon_getparam_t) -#define DRM_IOCTL_RADEON_FLIP DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_FLIP) -#define DRM_IOCTL_RADEON_ALLOC DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_ALLOC, drm_radeon_mem_alloc_t) -#define DRM_IOCTL_RADEON_FREE DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_FREE, drm_radeon_mem_free_t) -#define DRM_IOCTL_RADEON_INIT_HEAP DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_INIT_HEAP, drm_radeon_mem_init_heap_t) -#define DRM_IOCTL_RADEON_IRQ_EMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_IRQ_EMIT, drm_radeon_irq_emit_t) -#define DRM_IOCTL_RADEON_IRQ_WAIT DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_IRQ_WAIT, drm_radeon_irq_wait_t) -#define DRM_IOCTL_RADEON_CP_RESUME DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_RESUME) -#define DRM_IOCTL_RADEON_SETPARAM DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_SETPARAM, drm_radeon_setparam_t) -#define DRM_IOCTL_RADEON_SURF_ALLOC DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_SURF_ALLOC, drm_radeon_surface_alloc_t) -#define DRM_IOCTL_RADEON_SURF_FREE DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_SURF_FREE, drm_radeon_surface_free_t) -/* KMS */ -#define DRM_IOCTL_RADEON_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_INFO, struct drm_radeon_gem_info) -#define DRM_IOCTL_RADEON_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_CREATE, struct drm_radeon_gem_create) -#define DRM_IOCTL_RADEON_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_MMAP, struct drm_radeon_gem_mmap) -#define DRM_IOCTL_RADEON_GEM_PREAD DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_PREAD, struct drm_radeon_gem_pread) -#define DRM_IOCTL_RADEON_GEM_PWRITE DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_PWRITE, struct drm_radeon_gem_pwrite) -#define DRM_IOCTL_RADEON_GEM_SET_DOMAIN DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_SET_DOMAIN, struct drm_radeon_gem_set_domain) -#define DRM_IOCTL_RADEON_GEM_WAIT_IDLE DRM_IOW(DRM_COMMAND_BASE + DRM_RADEON_GEM_WAIT_IDLE, struct drm_radeon_gem_wait_idle) -#define DRM_IOCTL_RADEON_CS DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_CS, struct drm_radeon_cs) -#define DRM_IOCTL_RADEON_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_INFO, struct drm_radeon_info) -#define DRM_IOCTL_RADEON_SET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_SET_TILING, struct drm_radeon_gem_set_tiling) -#define DRM_IOCTL_RADEON_GET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_GET_TILING, struct drm_radeon_gem_get_tiling) - -typedef struct drm_radeon_init { - enum { - RADEON_INIT_CP = 0x01, - RADEON_CLEANUP_CP = 0x02, - RADEON_INIT_R200_CP = 0x03, - RADEON_INIT_R300_CP = 0x04, - RADEON_INIT_R600_CP = 0x05 - } func; - unsigned long sarea_priv_offset; - int is_pci; /* for overriding only */ - int cp_mode; - int gart_size; - int ring_size; - int usec_timeout; - - unsigned int fb_bpp; - unsigned int front_offset, front_pitch; - unsigned int back_offset, back_pitch; - unsigned int depth_bpp; - unsigned int depth_offset, depth_pitch; - - /* DEPRECATED commented out below to allow for -Werror build */ - unsigned long fb_offset; /* deprecated, driver asks hardware */ - unsigned long mmio_offset; /* deprecated, driver asks hardware */ - unsigned long ring_offset; - unsigned long ring_rptr_offset; - unsigned long buffers_offset; - unsigned long gart_textures_offset; -} drm_radeon_init_t; - -typedef struct drm_radeon_cp_stop { - int flush; - int idle; -} drm_radeon_cp_stop_t; - -typedef struct drm_radeon_fullscreen { - enum { - RADEON_INIT_FULLSCREEN = 0x01, - RADEON_CLEANUP_FULLSCREEN = 0x02 - } func; -} drm_radeon_fullscreen_t; - -#define CLEAR_X1 0 -#define CLEAR_Y1 1 -#define CLEAR_X2 2 -#define CLEAR_Y2 3 -#define CLEAR_DEPTH 4 - -typedef union drm_radeon_clear_rect { - float f[5]; - unsigned int ui[5]; -} drm_radeon_clear_rect_t; - -typedef struct drm_radeon_clear { - unsigned int flags; - unsigned int clear_color; - unsigned int clear_depth; - unsigned int color_mask; - unsigned int depth_mask; /* misnamed field: should be stencil */ - drm_radeon_clear_rect_t *depth_boxes; -} drm_radeon_clear_t; - -typedef struct drm_radeon_vertex { - int prim; - int idx; /* Index of vertex buffer */ - int count; /* Number of vertices in buffer */ - int discard; /* Client finished with buffer? */ -} drm_radeon_vertex_t; - -typedef struct drm_radeon_indices { - int prim; - int idx; - int start; - int end; - int discard; /* Client finished with buffer? */ -} drm_radeon_indices_t; - -/* v1.2 - obsoletes drm_radeon_vertex and drm_radeon_indices - * - allows multiple primitives and state changes in a single ioctl - * - supports driver change to emit native primitives - */ -typedef struct drm_radeon_vertex2 { - int idx; /* Index of vertex buffer */ - int discard; /* Client finished with buffer? */ - int nr_states; - drm_radeon_state_t *state; - int nr_prims; - drm_radeon_prim_t *prim; -} drm_radeon_vertex2_t; - -/* v1.3 - obsoletes drm_radeon_vertex2 - * - allows arbitarily large cliprect list - * - allows updating of tcl packet, vector and scalar state - * - allows memory-efficient description of state updates - * - allows state to be emitted without a primitive - * (for clears, ctx switches) - * - allows more than one dma buffer to be referenced per ioctl - * - supports tcl driver - * - may be extended in future versions with new cmd types, packets - */ -typedef struct drm_radeon_cmd_buffer { - int bufsz; - char *buf; - int nbox; - struct drm_clip_rect *boxes; -} drm_radeon_cmd_buffer_t; - -typedef struct drm_radeon_tex_image { - unsigned int x, y; /* Blit coordinates */ - unsigned int width, height; - const void *data; -} drm_radeon_tex_image_t; - -typedef struct drm_radeon_texture { - unsigned int offset; - int pitch; - int format; - int width; /* Texture image coordinates */ - int height; - drm_radeon_tex_image_t *image; -} drm_radeon_texture_t; - -typedef struct drm_radeon_stipple { - unsigned int *mask; -} drm_radeon_stipple_t; - -typedef struct drm_radeon_indirect { - int idx; - int start; - int end; - int discard; -} drm_radeon_indirect_t; - -#define RADEON_INDIRECT_DISCARD (1 << 0) -#define RADEON_INDIRECT_NOFLUSH (1 << 1) - -/* enum for card type parameters */ -#define RADEON_CARD_PCI 0 -#define RADEON_CARD_AGP 1 -#define RADEON_CARD_PCIE 2 - -/* 1.3: An ioctl to get parameters that aren't available to the 3d - * client any other way. - */ -#define RADEON_PARAM_GART_BUFFER_OFFSET 1 /* card offset of 1st GART buffer */ -#define RADEON_PARAM_LAST_FRAME 2 -#define RADEON_PARAM_LAST_DISPATCH 3 -#define RADEON_PARAM_LAST_CLEAR 4 -/* Added with DRM version 1.6. */ -#define RADEON_PARAM_IRQ_NR 5 -#define RADEON_PARAM_GART_BASE 6 /* card offset of GART base */ -/* Added with DRM version 1.8. */ -#define RADEON_PARAM_REGISTER_HANDLE 7 /* for drmMap() */ -#define RADEON_PARAM_STATUS_HANDLE 8 -#define RADEON_PARAM_SAREA_HANDLE 9 -#define RADEON_PARAM_GART_TEX_HANDLE 10 -#define RADEON_PARAM_SCRATCH_OFFSET 11 -#define RADEON_PARAM_CARD_TYPE 12 -#define RADEON_PARAM_VBLANK_CRTC 13 /* VBLANK CRTC */ -#define RADEON_PARAM_FB_LOCATION 14 /* FB location */ -#define RADEON_PARAM_NUM_GB_PIPES 15 /* num GB pipes */ - -typedef struct drm_radeon_getparam { - int param; - void *value; -} drm_radeon_getparam_t; - -/* 1.6: Set up a memory manager for regions of shared memory: - */ -#define RADEON_MEM_REGION_GART 1 -#define RADEON_MEM_REGION_FB 2 - -typedef struct drm_radeon_mem_alloc { - int region; - int alignment; - int size; - int *region_offset; /* offset from start of fb or GART */ -} drm_radeon_mem_alloc_t; - -typedef struct drm_radeon_mem_free { - int region; - int region_offset; -} drm_radeon_mem_free_t; - -typedef struct drm_radeon_mem_init_heap { - int region; - int size; - int start; -} drm_radeon_mem_init_heap_t; - -/* 1.6: Userspace can request & wait on irq's: - */ -typedef struct drm_radeon_irq_emit { - int *irq_seq; -} drm_radeon_irq_emit_t; - -typedef struct drm_radeon_irq_wait { - int irq_seq; -} drm_radeon_irq_wait_t; - -/* 1.10: Clients tell the DRM where they think the framebuffer is located in - * the card's address space, via a new generic ioctl to set parameters - */ - -typedef struct drm_radeon_setparam { - unsigned int param; - int64_t value; -} drm_radeon_setparam_t; - -#define RADEON_SETPARAM_FB_LOCATION 1 /* determined framebuffer location */ -#define RADEON_SETPARAM_SWITCH_TILING 2 /* enable/disable color tiling */ -#define RADEON_SETPARAM_PCIGART_LOCATION 3 /* PCI Gart Location */ - -#define RADEON_SETPARAM_NEW_MEMMAP 4 /* Use new memory map */ -#define RADEON_SETPARAM_PCIGART_TABLE_SIZE 5 /* PCI GART Table Size */ -#define RADEON_SETPARAM_VBLANK_CRTC 6 /* VBLANK CRTC */ -/* 1.14: Clients can allocate/free a surface - */ -typedef struct drm_radeon_surface_alloc { - unsigned int address; - unsigned int size; - unsigned int flags; -} drm_radeon_surface_alloc_t; - -typedef struct drm_radeon_surface_free { - unsigned int address; -} drm_radeon_surface_free_t; - -#define DRM_RADEON_VBLANK_CRTC1 1 -#define DRM_RADEON_VBLANK_CRTC2 2 - -/* - * Kernel modesetting world below. - */ -#define RADEON_GEM_DOMAIN_CPU 0x1 -#define RADEON_GEM_DOMAIN_GTT 0x2 -#define RADEON_GEM_DOMAIN_VRAM 0x4 - -struct drm_radeon_gem_info { - uint64_t gart_size; - uint64_t vram_size; - uint64_t vram_visible; -}; - -#define RADEON_GEM_NO_BACKING_STORE 1 - -struct drm_radeon_gem_create { - uint64_t size; - uint64_t alignment; - uint32_t handle; - uint32_t initial_domain; - uint32_t flags; -}; - -#define RADEON_TILING_MASK 0xff -#define RADEON_TILING_LINEAR 0x0 -#define RADEON_TILING_MACRO 0x1 -#define RADEON_TILING_MICRO 0x2 -#define RADEON_TILING_SWAP_16BIT 0x4 -#define RADEON_TILING_SWAP_32BIT 0x8 -/* this object requires a surface when mapped - i.e. front buffer */ -#define RADEON_TILING_SURFACE 0x10 -#define RADEON_TILING_MICRO_SQUARE 0x20 -#define RADEON_TILING_EG_BANKW_SHIFT 8 -#define RADEON_TILING_EG_BANKW_MASK 0xf -#define RADEON_TILING_EG_BANKH_SHIFT 12 -#define RADEON_TILING_EG_BANKH_MASK 0xf -#define RADEON_TILING_EG_MACRO_TILE_ASPECT_SHIFT 16 -#define RADEON_TILING_EG_MACRO_TILE_ASPECT_MASK 0xf -#define RADEON_TILING_EG_TILE_SPLIT_SHIFT 24 -#define RADEON_TILING_EG_TILE_SPLIT_MASK 0xf -#define RADEON_TILING_EG_STENCIL_TILE_SPLIT_SHIFT 28 -#define RADEON_TILING_EG_STENCIL_TILE_SPLIT_MASK 0xf - -struct drm_radeon_gem_set_tiling { - uint32_t handle; - uint32_t tiling_flags; - uint32_t pitch; -}; - -struct drm_radeon_gem_get_tiling { - uint32_t handle; - uint32_t tiling_flags; - uint32_t pitch; -}; - -struct drm_radeon_gem_mmap { - uint32_t handle; - uint32_t pad; - uint64_t offset; - uint64_t size; - uint64_t addr_ptr; -}; - -struct drm_radeon_gem_set_domain { - uint32_t handle; - uint32_t read_domains; - uint32_t write_domain; -}; - -struct drm_radeon_gem_wait_idle { - uint32_t handle; - uint32_t pad; -}; - -struct drm_radeon_gem_busy { - uint32_t handle; - uint32_t busy; -}; - -struct drm_radeon_gem_pread { - /** Handle for the object being read. */ - uint32_t handle; - uint32_t pad; - /** Offset into the object to read from */ - uint64_t offset; - /** Length of data to read */ - uint64_t size; - /** Pointer to write the data into. */ - /* void *, but pointers are not 32/64 compatible */ - uint64_t data_ptr; -}; - -struct drm_radeon_gem_pwrite { - /** Handle for the object being written to. */ - uint32_t handle; - uint32_t pad; - /** Offset into the object to write to */ - uint64_t offset; - /** Length of data to write */ - uint64_t size; - /** Pointer to read the data from. */ - /* void *, but pointers are not 32/64 compatible */ - uint64_t data_ptr; -}; - -#define RADEON_CHUNK_ID_RELOCS 0x01 -#define RADEON_CHUNK_ID_IB 0x02 - -struct drm_radeon_cs_chunk { - uint32_t chunk_id; - uint32_t length_dw; - uint64_t chunk_data; -}; - -struct drm_radeon_cs_reloc { - uint32_t handle; - uint32_t read_domains; - uint32_t write_domain; - uint32_t flags; -}; - -struct drm_radeon_cs { - uint32_t num_chunks; - uint32_t cs_id; - /* this points to uint64_t * which point to cs chunks */ - uint64_t chunks; - /* updates to the limits after this CS ioctl */ - uint64_t gart_limit; - uint64_t vram_limit; -}; - -#define RADEON_INFO_DEVICE_ID 0x00 -#define RADEON_INFO_NUM_GB_PIPES 0x01 - -struct drm_radeon_info { - uint32_t request; - uint32_t pad; - uint64_t value; -}; - -#endif diff --git a/driver/xf86-video-ati/src/radeon_exa.c b/driver/xf86-video-ati/src/radeon_exa.c index cf368d5bf..0d6cd2400 100644 --- a/driver/xf86-video-ati/src/radeon_exa.c +++ b/driver/xf86-video-ati/src/radeon_exa.c @@ -36,7 +36,6 @@ #include "radeon.h" #include "radeon_reg.h" #include "r600_reg.h" -#include "radeon_drm.h" #include "radeon_bo_helper.h" #include "radeon_probe.h" #include "radeon_version.h" diff --git a/driver/xf86-video-ati/src/radeon_glamor.c b/driver/xf86-video-ati/src/radeon_glamor.c index 1d666d191..210ddcf27 100644 --- a/driver/xf86-video-ati/src/radeon_glamor.c +++ b/driver/xf86-video-ati/src/radeon_glamor.c @@ -90,15 +90,25 @@ radeon_glamor_pre_init(ScrnInfoPtr scrn) if (s == NULL && info->ChipFamily < CHIP_FAMILY_TAHITI) return FALSE; - if (s && strcasecmp(s, "glamor") != 0) - return FALSE; + if (s && strcasecmp(s, "glamor") != 0) { + if (info->ChipFamily >= CHIP_FAMILY_TAHITI) + xf86DrvMsg(scrn->scrnIndex, X_WARNING, + "EXA not supported, using glamor\n"); + else + return FALSE; + } - if (info->ChipFamily < CHIP_FAMILY_R600) { - xf86DrvMsg(scrn->scrnIndex, s ? X_ERROR : X_WARNING, - "glamor requires R600 or newer GPU, disabling.\n"); + if (info->ChipFamily < CHIP_FAMILY_R300) { + xf86DrvMsg(scrn->scrnIndex, X_ERROR, + "glamor requires R300 or higher GPU, disabling.\n"); return FALSE; } + if (info->ChipFamily < CHIP_FAMILY_RV515) { + xf86DrvMsg(scrn->scrnIndex, X_WARNING, + "glamor may not work (well) with GPUs < RV515.\n"); + } + if (scrn->depth < 24) { xf86DrvMsg(scrn->scrnIndex, s ? X_ERROR : X_WARNING, "glamor requires depth >= 24, disabling.\n"); @@ -167,12 +177,14 @@ Bool radeon_glamor_pixmap_is_offscreen(PixmapPtr pixmap) return priv && priv->bo; } -#ifdef CREATE_PIXMAP_USAGE_SHARED -#define RADEON_CREATE_PIXMAP_SHARED (CREATE_PIXMAP_USAGE_SHARED | RADEON_CREATE_PIXMAP_DRI2) -#else -#define RADEON_CREATE_PIXMAP_SHARED RADEON_CREATE_PIXMAP_DRI2 +#ifndef CREATE_PIXMAP_USAGE_SHARED +#define CREATE_PIXMAP_USAGE_SHARED RADEON_CREATE_PIXMAP_DRI2 #endif +#define RADEON_CREATE_PIXMAP_SHARED(usage) \ + (((usage) & ~RADEON_CREATE_PIXMAP_TILING_FLAGS) == RADEON_CREATE_PIXMAP_DRI2 || \ + (usage) == CREATE_PIXMAP_USAGE_SHARED) + static PixmapPtr radeon_glamor_create_pixmap(ScreenPtr screen, int w, int h, int depth, unsigned usage) @@ -181,7 +193,7 @@ radeon_glamor_create_pixmap(ScreenPtr screen, int w, int h, int depth, struct radeon_pixmap *priv; PixmapPtr pixmap, new_pixmap = NULL; - if (!(usage & RADEON_CREATE_PIXMAP_SHARED)) { + if (!RADEON_CREATE_PIXMAP_SHARED(usage)) { pixmap = glamor_create_pixmap(screen, w, h, depth, usage); if (pixmap) return pixmap; @@ -224,7 +236,7 @@ radeon_glamor_create_pixmap(ScreenPtr screen, int w, int h, int depth, return pixmap; fallback_glamor: - if (usage & RADEON_CREATE_PIXMAP_SHARED) { + if (RADEON_CREATE_PIXMAP_SHARED(usage)) { /* XXX need further work to handle the DRI2 failure case. * Glamor don't know how to handle a BO only pixmap. Put * a warning indicator here. @@ -318,6 +330,9 @@ radeon_glamor_init(ScreenPtr screen) ScrnInfoPtr scrn = xf86ScreenToScrn(screen); if (!glamor_init(screen, GLAMOR_INVERTED_Y_AXIS | GLAMOR_USE_EGL_SCREEN | +#ifdef GLAMOR_NO_DRI3 + GLAMOR_NO_DRI3 | +#endif GLAMOR_USE_SCREEN | GLAMOR_USE_PICTURE_SCREEN)) { xf86DrvMsg(scrn->scrnIndex, X_ERROR, "Failed to initialize glamor.\n"); diff --git a/driver/xf86-video-ati/src/radeon_kms.c b/driver/xf86-video-ati/src/radeon_kms.c index 21a420f30..1703349f1 100644 --- a/driver/xf86-video-ati/src/radeon_kms.c +++ b/driver/xf86-video-ati/src/radeon_kms.c @@ -59,7 +59,7 @@ extern SymTabRec RADEONChipsets[]; static Bool radeon_setup_kernel_mem(ScreenPtr pScreen); const OptionInfoRec RADEONOptions_KMS[] = { - { OPTION_NOACCEL, "NoAccel", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_ACCEL, "Accel", OPTV_BOOLEAN, {0}, FALSE }, { OPTION_SW_CURSOR, "SWcursor", OPTV_BOOLEAN, {0}, FALSE }, { OPTION_PAGE_FLIP, "EnablePageFlip", OPTV_BOOLEAN, {0}, FALSE }, { OPTION_COLOR_TILING, "ColorTiling", OPTV_BOOLEAN, {0}, FALSE }, @@ -180,7 +180,11 @@ static void RADEONFreeRec(ScrnInfoPtr pScrn) pRADEONEnt = pPriv->ptr; pRADEONEnt->fd_ref--; if (!pRADEONEnt->fd_ref) { - drmClose(pRADEONEnt->fd); +#ifdef XF86_PDEV_SERVER_FD + if (!(pRADEONEnt->platform_dev && + pRADEONEnt->platform_dev->flags & XF86_PDEV_SERVER_FD)) +#endif + drmClose(pRADEONEnt->fd); pRADEONEnt->fd = 0; } } @@ -208,6 +212,12 @@ radeonShadowWindow(ScreenPtr screen, CARD32 row, CARD32 offset, int mode, return ((uint8_t *)info->front_bo->ptr + row * stride + offset); } +static void +radeonUpdatePacked(ScreenPtr pScreen, shadowBufPtr pBuf) +{ + shadowUpdatePacked(pScreen, pBuf); +} + static Bool RADEONCreateScreenResources_KMS(ScreenPtr pScreen) { ScrnInfoPtr pScrn = xf86ScreenToScrn(pScreen); @@ -228,7 +238,7 @@ static Bool RADEONCreateScreenResources_KMS(ScreenPtr pScreen) if (info->r600_shadow_fb) { pixmap = pScreen->GetScreenPixmap(pScreen); - if (!shadowAdd(pScreen, pixmap, shadowUpdatePackedWeak(), + if (!shadowAdd(pScreen, pixmap, radeonUpdatePacked, radeonShadowWindow, 0, NULL)) return FALSE; } @@ -323,9 +333,6 @@ static Bool RADEONIsFastFBWorking(ScrnInfoPtr pScrn) int r; uint32_t tmp = 0; -#ifndef RADEON_INFO_FASTFB_WORKING -#define RADEON_INFO_FASTFB_WORKING 0x14 -#endif memset(&ginfo, 0, sizeof(ginfo)); ginfo.request = RADEON_INFO_FASTFB_WORKING; ginfo.value = (uintptr_t)&tmp; @@ -345,9 +352,6 @@ static Bool RADEONIsFusionGARTWorking(ScrnInfoPtr pScrn) int r; uint32_t tmp; -#ifndef RADEON_INFO_FUSION_GART_WORKING -#define RADEON_INFO_FUSION_GART_WORKING 0x0c -#endif memset(&ginfo, 0, sizeof(ginfo)); ginfo.request = RADEON_INFO_FUSION_GART_WORKING; ginfo.value = (uintptr_t)&tmp; @@ -367,13 +371,6 @@ static Bool RADEONIsAccelWorking(ScrnInfoPtr pScrn) int r; uint32_t tmp; -#ifndef RADEON_INFO_ACCEL_WORKING -#define RADEON_INFO_ACCEL_WORKING 0x03 -#endif -#ifndef RADEON_INFO_ACCEL_WORKING2 -#define RADEON_INFO_ACCEL_WORKING2 0x05 -#endif - memset(&ginfo, 0, sizeof(ginfo)); if (info->dri2.pKernelDRMVersion->version_minor >= 5) ginfo.request = RADEON_INFO_ACCEL_WORKING2; @@ -390,8 +387,12 @@ static Bool RADEONIsAccelWorking(ScrnInfoPtr pScrn) } return FALSE; } - if (tmp) + if (info->ChipFamily == CHIP_FAMILY_HAWAII) { + if (tmp == 2 || tmp == 3) + return TRUE; + } else if (tmp) { return TRUE; + } return FALSE; } @@ -489,8 +490,7 @@ static Bool RADEONPreInitAccel_KMS(ScrnInfoPtr pScrn) info->is_fast_fb = TRUE; } - if (xf86ReturnOptValBool(info->Options, OPTION_NOACCEL, - info->ChipFamily == CHIP_FAMILY_HAWAII) || + if (!xf86ReturnOptValBool(info->Options, OPTION_ACCEL, TRUE) || (!RADEONIsAccelWorking(pScrn))) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "GPU accel disabled or not working, using shadowfb for KMS\n"); @@ -581,23 +581,24 @@ static Bool RADEONPreInitChipType_KMS(ScrnInfoPtr pScrn) return TRUE; } -static Bool radeon_open_drm_master(ScrnInfoPtr pScrn) +static int radeon_get_drm_master_fd(ScrnInfoPtr pScrn) { RADEONInfoPtr info = RADEONPTR(pScrn); +#ifdef XF86_PDEV_SERVER_FD RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn); +#endif struct pci_device *dev = info->PciInfo; char *busid; - drmSetVersion sv; - int err; - - if (pRADEONEnt->fd) { - xf86DrvMsg(pScrn->scrnIndex, X_INFO, - " reusing fd for second head\n"); + int fd; - info->dri2.drm_fd = pRADEONEnt->fd; - pRADEONEnt->fd_ref++; - goto out; +#ifdef XF86_PDEV_SERVER_FD + if (pRADEONEnt->platform_dev) { + fd = xf86_get_platform_device_int_attrib(pRADEONEnt->platform_dev, + ODEV_ATTRIB_FD, -1); + if (fd != -1) + return fd; } +#endif #if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,9,99,901,0) XNFasprintf(&busid, "pci:%04x:%02x:%02x.%d", @@ -607,16 +608,35 @@ static Bool radeon_open_drm_master(ScrnInfoPtr pScrn) dev->domain, dev->bus, dev->dev, dev->func); #endif - info->dri2.drm_fd = drmOpen(NULL, busid); - if (info->dri2.drm_fd == -1) { - + fd = drmOpen(NULL, busid); + if (fd == -1) xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "[drm] Failed to open DRM device for %s: %s\n", busid, strerror(errno)); - free(busid); - return FALSE; - } + free(busid); + return fd; +} + +static Bool radeon_open_drm_master(ScrnInfoPtr pScrn) +{ + RADEONInfoPtr info = RADEONPTR(pScrn); + RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn); + drmSetVersion sv; + int err; + + if (pRADEONEnt->fd) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + " reusing fd for second head\n"); + + info->drmmode.fd = info->dri2.drm_fd = pRADEONEnt->fd; + pRADEONEnt->fd_ref++; + return TRUE; + } + + info->dri2.drm_fd = radeon_get_drm_master_fd(pScrn); + if (info->dri2.drm_fd == -1) + return FALSE; /* Check that what we opened was a master or a master-capable FD, * by setting the version of the interface we'll use to talk to it. @@ -638,7 +658,6 @@ static Bool radeon_open_drm_master(ScrnInfoPtr pScrn) pRADEONEnt->fd = info->dri2.drm_fd; pRADEONEnt->fd_ref = 1; - out: info->drmmode.fd = info->dri2.drm_fd; return TRUE; } @@ -653,10 +672,6 @@ static Bool r600_get_tile_config(ScrnInfoPtr pScrn) if (info->ChipFamily < CHIP_FAMILY_R600) return FALSE; -#ifndef RADEON_INFO_TILING_CONFIG -#define RADEON_INFO_TILING_CONFIG 0x6 -#endif - memset(&ginfo, 0, sizeof(ginfo)); ginfo.request = RADEON_INFO_TILING_CONFIG; ginfo.value = (uintptr_t)&tmp; @@ -781,6 +796,9 @@ Bool RADEONPreInit_KMS(ScrnInfoPtr pScrn, int flags) uint32_t tiling = 0; int cpp; + if (flags & PROBE_DETECT) + return TRUE; + xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, "RADEONPreInit_KMS\n"); if (pScrn->numEntities != 1) return FALSE; @@ -865,13 +883,13 @@ Bool RADEONPreInit_KMS(ScrnInfoPtr pScrn, int flags) * with proper bit, in the meantime you need to set tiling option in * xorg configuration files */ - info->ChipFamily <= CHIP_FAMILY_HAINAN && + info->ChipFamily <= CHIP_FAMILY_MULLINS && !info->is_fast_fb; /* 2D color tiling */ if (info->ChipFamily >= CHIP_FAMILY_R600) { info->allowColorTiling2D = xf86ReturnOptValBool(info->Options, OPTION_COLOR_TILING_2D, - info->ChipFamily <= CHIP_FAMILY_HAINAN); + info->ChipFamily <= CHIP_FAMILY_MULLINS); } if (info->ChipFamily >= CHIP_FAMILY_R600) { @@ -1097,6 +1115,41 @@ static Bool RADEONSaveScreen_KMS(ScreenPtr pScreen, int mode) return TRUE; } +static Bool radeon_set_drm_master(ScrnInfoPtr pScrn) +{ + RADEONInfoPtr info = RADEONPTR(pScrn); +#ifdef XF86_PDEV_SERVER_FD + RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn); +#endif + int err; + +#ifdef XF86_PDEV_SERVER_FD + if (pRADEONEnt->platform_dev && + (pRADEONEnt->platform_dev->flags & XF86_PDEV_SERVER_FD)) + return TRUE; +#endif + + err = drmSetMaster(info->dri2.drm_fd); + if (err) + ErrorF("Unable to retrieve master\n"); + + return err == 0; +} + +static void radeon_drop_drm_master(ScrnInfoPtr pScrn) +{ + RADEONInfoPtr info = RADEONPTR(pScrn); +#ifdef XF86_PDEV_SERVER_FD + RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn); + + if (pRADEONEnt->platform_dev && + (pRADEONEnt->platform_dev->flags & XF86_PDEV_SERVER_FD)) + return; +#endif + + drmDropMaster(info->dri2.drm_fd); +} + /* Called at the end of each server generation. Restore the original * text mode, unmap video memory, and unwrap and call the saved * CloseScreen function. @@ -1123,7 +1176,7 @@ static Bool RADEONCloseScreen_KMS(CLOSE_SCREEN_ARGS_DECL) if (info->accel_state->use_vbos) radeon_vbo_free_lists(pScrn); - drmDropMaster(info->dri2.drm_fd); + radeon_drop_drm_master(pScrn); drmmode_fini(pScrn, &info->drmmode); if (info->dri2.enabled) @@ -1156,9 +1209,8 @@ Bool RADEONScreenInit_KMS(SCREEN_INIT_ARGS_DECL) ScrnInfoPtr pScrn = xf86ScreenToScrn(pScreen); RADEONInfoPtr info = RADEONPTR(pScrn); int subPixelOrder = SubPixelUnknown; - char* s; + const char *s; void *front_ptr; - int ret; pScrn->fbOffset = 0; @@ -1169,11 +1221,9 @@ Bool RADEONScreenInit_KMS(SCREEN_INIT_ARGS_DECL) pScrn->defaultVisual)) return FALSE; miSetPixmapDepths (); - ret = drmSetMaster(info->dri2.drm_fd); - if (ret) { - ErrorF("Unable to retrieve master\n"); + if (!radeon_set_drm_master(pScrn)) return FALSE; - } + info->directRenderingEnabled = FALSE; if (info->r600_shadow_fb == FALSE) info->directRenderingEnabled = radeon_dri2_screen_init(pScreen); @@ -1386,15 +1436,12 @@ Bool RADEONEnterVT_KMS(VT_FUNC_ARGS_DECL) { SCRN_INFO_PTR(arg); RADEONInfoPtr info = RADEONPTR(pScrn); - int ret; xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, "RADEONEnterVT_KMS\n"); + radeon_set_drm_master(pScrn); - ret = drmSetMaster(info->dri2.drm_fd); - if (ret) - ErrorF("Unable to retrieve master\n"); info->accel_state->XInited3D = FALSE; info->accel_state->engineMode = EXA_ENGINEMODE_UNKNOWN; @@ -1415,7 +1462,7 @@ void RADEONLeaveVT_KMS(VT_FUNC_ARGS_DECL) xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, "RADEONLeaveVT_KMS\n"); - drmDropMaster(info->dri2.drm_fd); + radeon_drop_drm_master(pScrn); xf86RotateFreeShadow(pScrn); diff --git a/driver/xf86-video-ati/src/radeon_pci_chipset_gen.h b/driver/xf86-video-ati/src/radeon_pci_chipset_gen.h index da4440bfb..bd689201f 100644 --- a/driver/xf86-video-ati/src/radeon_pci_chipset_gen.h +++ b/driver/xf86-video-ati/src/radeon_pci_chipset_gen.h @@ -588,6 +588,7 @@ static PciChipsets RADEONPciChipsets[] = { { PCI_CHIP_VERDE_6829, PCI_CHIP_VERDE_6829, RES_SHARED_VGA }, { PCI_CHIP_VERDE_682A, PCI_CHIP_VERDE_682A, RES_SHARED_VGA }, { PCI_CHIP_VERDE_682B, PCI_CHIP_VERDE_682B, RES_SHARED_VGA }, + { PCI_CHIP_VERDE_682C, PCI_CHIP_VERDE_682C, RES_SHARED_VGA }, { PCI_CHIP_VERDE_682D, PCI_CHIP_VERDE_682D, RES_SHARED_VGA }, { PCI_CHIP_VERDE_682F, PCI_CHIP_VERDE_682F, RES_SHARED_VGA }, { PCI_CHIP_VERDE_6830, PCI_CHIP_VERDE_6830, RES_SHARED_VGA }, @@ -603,8 +604,11 @@ static PciChipsets RADEONPciChipsets[] = { { PCI_CHIP_OLAND_6601, PCI_CHIP_OLAND_6601, RES_SHARED_VGA }, { PCI_CHIP_OLAND_6602, PCI_CHIP_OLAND_6602, RES_SHARED_VGA }, { PCI_CHIP_OLAND_6603, PCI_CHIP_OLAND_6603, RES_SHARED_VGA }, + { PCI_CHIP_OLAND_6604, PCI_CHIP_OLAND_6604, RES_SHARED_VGA }, + { PCI_CHIP_OLAND_6605, PCI_CHIP_OLAND_6605, RES_SHARED_VGA }, { PCI_CHIP_OLAND_6606, PCI_CHIP_OLAND_6606, RES_SHARED_VGA }, { PCI_CHIP_OLAND_6607, PCI_CHIP_OLAND_6607, RES_SHARED_VGA }, + { PCI_CHIP_OLAND_6608, PCI_CHIP_OLAND_6608, RES_SHARED_VGA }, { PCI_CHIP_OLAND_6610, PCI_CHIP_OLAND_6610, RES_SHARED_VGA }, { PCI_CHIP_OLAND_6611, PCI_CHIP_OLAND_6611, RES_SHARED_VGA }, { PCI_CHIP_OLAND_6613, PCI_CHIP_OLAND_6613, RES_SHARED_VGA }, @@ -620,6 +624,8 @@ static PciChipsets RADEONPciChipsets[] = { { PCI_CHIP_HAINAN_666F, PCI_CHIP_HAINAN_666F, RES_SHARED_VGA }, { PCI_CHIP_BONAIRE_6640, PCI_CHIP_BONAIRE_6640, RES_SHARED_VGA }, { PCI_CHIP_BONAIRE_6641, PCI_CHIP_BONAIRE_6641, RES_SHARED_VGA }, + { PCI_CHIP_BONAIRE_6646, PCI_CHIP_BONAIRE_6646, RES_SHARED_VGA }, + { PCI_CHIP_BONAIRE_6647, PCI_CHIP_BONAIRE_6647, RES_SHARED_VGA }, { PCI_CHIP_BONAIRE_6649, PCI_CHIP_BONAIRE_6649, RES_SHARED_VGA }, { PCI_CHIP_BONAIRE_6650, PCI_CHIP_BONAIRE_6650, RES_SHARED_VGA }, { PCI_CHIP_BONAIRE_6651, PCI_CHIP_BONAIRE_6651, RES_SHARED_VGA }, @@ -642,6 +648,22 @@ static PciChipsets RADEONPciChipsets[] = { { PCI_CHIP_KABINI_983D, PCI_CHIP_KABINI_983D, RES_SHARED_VGA }, { PCI_CHIP_KABINI_983E, PCI_CHIP_KABINI_983E, RES_SHARED_VGA }, { PCI_CHIP_KABINI_983F, PCI_CHIP_KABINI_983F, RES_SHARED_VGA }, + { PCI_CHIP_MULLINS_9850, PCI_CHIP_MULLINS_9850, RES_SHARED_VGA }, + { PCI_CHIP_MULLINS_9851, PCI_CHIP_MULLINS_9851, RES_SHARED_VGA }, + { PCI_CHIP_MULLINS_9852, PCI_CHIP_MULLINS_9852, RES_SHARED_VGA }, + { PCI_CHIP_MULLINS_9853, PCI_CHIP_MULLINS_9853, RES_SHARED_VGA }, + { PCI_CHIP_MULLINS_9854, PCI_CHIP_MULLINS_9854, RES_SHARED_VGA }, + { PCI_CHIP_MULLINS_9855, PCI_CHIP_MULLINS_9855, RES_SHARED_VGA }, + { PCI_CHIP_MULLINS_9856, PCI_CHIP_MULLINS_9856, RES_SHARED_VGA }, + { PCI_CHIP_MULLINS_9857, PCI_CHIP_MULLINS_9857, RES_SHARED_VGA }, + { PCI_CHIP_MULLINS_9858, PCI_CHIP_MULLINS_9858, RES_SHARED_VGA }, + { PCI_CHIP_MULLINS_9859, PCI_CHIP_MULLINS_9859, RES_SHARED_VGA }, + { PCI_CHIP_MULLINS_985A, PCI_CHIP_MULLINS_985A, RES_SHARED_VGA }, + { PCI_CHIP_MULLINS_985B, PCI_CHIP_MULLINS_985B, RES_SHARED_VGA }, + { PCI_CHIP_MULLINS_985C, PCI_CHIP_MULLINS_985C, RES_SHARED_VGA }, + { PCI_CHIP_MULLINS_985D, PCI_CHIP_MULLINS_985D, RES_SHARED_VGA }, + { PCI_CHIP_MULLINS_985E, PCI_CHIP_MULLINS_985E, RES_SHARED_VGA }, + { PCI_CHIP_MULLINS_985F, PCI_CHIP_MULLINS_985F, RES_SHARED_VGA }, { PCI_CHIP_KAVERI_1304, PCI_CHIP_KAVERI_1304, RES_SHARED_VGA }, { PCI_CHIP_KAVERI_1305, PCI_CHIP_KAVERI_1305, RES_SHARED_VGA }, { PCI_CHIP_KAVERI_1306, PCI_CHIP_KAVERI_1306, RES_SHARED_VGA }, @@ -660,6 +682,7 @@ static PciChipsets RADEONPciChipsets[] = { { PCI_CHIP_KAVERI_1315, PCI_CHIP_KAVERI_1315, RES_SHARED_VGA }, { PCI_CHIP_KAVERI_1316, PCI_CHIP_KAVERI_1316, RES_SHARED_VGA }, { PCI_CHIP_KAVERI_1317, PCI_CHIP_KAVERI_1317, RES_SHARED_VGA }, + { PCI_CHIP_KAVERI_1318, PCI_CHIP_KAVERI_1318, RES_SHARED_VGA }, { PCI_CHIP_KAVERI_131B, PCI_CHIP_KAVERI_131B, RES_SHARED_VGA }, { PCI_CHIP_KAVERI_131C, PCI_CHIP_KAVERI_131C, RES_SHARED_VGA }, { PCI_CHIP_KAVERI_131D, PCI_CHIP_KAVERI_131D, RES_SHARED_VGA }, diff --git a/driver/xf86-video-ati/src/radeon_pci_device_match_gen.h b/driver/xf86-video-ati/src/radeon_pci_device_match_gen.h index d4b3763cf..eaf280a28 100644 --- a/driver/xf86-video-ati/src/radeon_pci_device_match_gen.h +++ b/driver/xf86-video-ati/src/radeon_pci_device_match_gen.h @@ -588,6 +588,7 @@ static const struct pci_id_match radeon_device_match[] = { ATI_DEVICE_MATCH( PCI_CHIP_VERDE_6829, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_VERDE_682A, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_VERDE_682B, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_VERDE_682C, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_VERDE_682D, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_VERDE_682F, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_VERDE_6830, 0 ), @@ -603,8 +604,11 @@ static const struct pci_id_match radeon_device_match[] = { ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6601, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6602, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6603, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6604, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6605, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6606, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6607, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6608, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6610, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6611, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6613, 0 ), @@ -620,6 +624,8 @@ static const struct pci_id_match radeon_device_match[] = { ATI_DEVICE_MATCH( PCI_CHIP_HAINAN_666F, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_BONAIRE_6640, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_BONAIRE_6641, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_BONAIRE_6646, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_BONAIRE_6647, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_BONAIRE_6649, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_BONAIRE_6650, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_BONAIRE_6651, 0 ), @@ -642,6 +648,22 @@ static const struct pci_id_match radeon_device_match[] = { ATI_DEVICE_MATCH( PCI_CHIP_KABINI_983D, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_KABINI_983E, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_KABINI_983F, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_MULLINS_9850, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_MULLINS_9851, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_MULLINS_9852, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_MULLINS_9853, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_MULLINS_9854, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_MULLINS_9855, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_MULLINS_9856, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_MULLINS_9857, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_MULLINS_9858, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_MULLINS_9859, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_MULLINS_985A, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_MULLINS_985B, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_MULLINS_985C, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_MULLINS_985D, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_MULLINS_985E, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_MULLINS_985F, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_1304, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_1305, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_1306, 0 ), @@ -660,6 +682,7 @@ static const struct pci_id_match radeon_device_match[] = { ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_1315, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_1316, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_1317, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_1318, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_131B, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_131C, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_131D, 0 ), diff --git a/driver/xf86-video-ati/src/radeon_probe.c b/driver/xf86-video-ati/src/radeon_probe.c index 2d3c58e82..ad1e96ea9 100644 --- a/driver/xf86-video-ati/src/radeon_probe.c +++ b/driver/xf86-video-ati/src/radeon_probe.c @@ -202,6 +202,10 @@ RADEONDriverFunc(ScrnInfoPtr scrn, xorgDriverFuncOp op, void *data) flag = (CARD32 *)data; (*flag) = 0; return TRUE; +#if XORG_VERSION_CURRENT > XORG_VERSION_NUMERIC(1,15,99,0,0) + case SUPPORTS_SERVER_FDS: + return TRUE; +#endif default: return FALSE; } @@ -272,6 +276,7 @@ radeon_platform_probe(DriverPtr pDriver, pRADEONEnt = pPriv->ptr; pRADEONEnt->HasSecondary = TRUE; } + pRADEONEnt->platform_dev = dev; } free(pEnt); diff --git a/driver/xf86-video-ati/src/radeon_probe.h b/driver/xf86-video-ati/src/radeon_probe.h index cea669561..3fe4644c3 100644 --- a/driver/xf86-video-ati/src/radeon_probe.h +++ b/driver/xf86-video-ati/src/radeon_probe.h @@ -37,12 +37,17 @@ #define _RADEON_PROBE_H_ 1 #include <stdint.h> +#include "xorg-server.h" #include "xf86str.h" #include "xf86DDC.h" #include "randrstr.h" #include "xf86Crtc.h" +#ifdef XSERVER_PLATFORM_BUS +#include "xf86platformBus.h" +#endif + #include "compat-api.h" #include "exa.h" @@ -111,6 +116,7 @@ typedef enum { CHIP_FAMILY_KAVERI, CHIP_FAMILY_KABINI, CHIP_FAMILY_HAWAII, + CHIP_FAMILY_MULLINS, CHIP_FAMILY_LAST } RADEONChipFamily; @@ -136,6 +142,9 @@ typedef struct int fd_ref; unsigned long fd_wakeup_registered; /* server generation for which fd has been registered for wakeup handling */ int fd_wakeup_ref; +#ifdef XSERVER_PLATFORM_BUS + struct xf86_platform_device *platform_dev; +#endif } RADEONEntRec, *RADEONEntPtr; extern const OptionInfoRec *RADEONOptionsWeak(void); diff --git a/driver/xf86-video-ati/src/radeon_vbo.c b/driver/xf86-video-ati/src/radeon_vbo.c index 1924772ff..6b0d278ad 100644 --- a/driver/xf86-video-ati/src/radeon_vbo.c +++ b/driver/xf86-video-ati/src/radeon_vbo.c @@ -185,6 +185,7 @@ again_alloc: if (!dma_bo->bo) { ErrorF("failure to allocate DMA BO\n"); + free(dma_bo); return NULL; } insert_at_head(&accel_state->bo_reserved, dma_bo); diff --git a/driver/xf86-video-ati/src/radeon_video.c b/driver/xf86-video-ati/src/radeon_video.c index 5349d113d..cbfd554b2 100644 --- a/driver/xf86-video-ati/src/radeon_video.c +++ b/driver/xf86-video-ati/src/radeon_video.c @@ -188,7 +188,7 @@ void RADEONInitVideo(ScreenPtr pScreen) xf86XVScreenInit(pScreen, adaptors, num_adaptors); if(texturedAdaptor) { - XF86MCAdaptorPtr xvmcAdaptor = RADEONCreateAdaptorXvMC(pScreen, texturedAdaptor->name); + XF86MCAdaptorPtr xvmcAdaptor = RADEONCreateAdaptorXvMC(pScreen, (char *)texturedAdaptor->name); if(xvmcAdaptor) { if(!xf86XvMCScreenInit(pScreen, 1, &xvmcAdaptor)) xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "[XvMC] Failed to initialize extension.\n"); |