diff options
| author | Matthieu Herrb <matthieu@cvs.openbsd.org> | 2006-11-26 20:07:33 +0000 |
|---|---|---|
| committer | Matthieu Herrb <matthieu@cvs.openbsd.org> | 2006-11-26 20:07:33 +0000 |
| commit | b10a48d72c3e4014d3f6fe8a863a7eb3fadc3f87 (patch) | |
| tree | 15eebd587c35d8b21530d56b15a6cde99c26f283 /driver/xf86-video-mga/src | |
| parent | 573aef6078efe13b8644f7825ff0c042bfe1e84f (diff) | |
Importing xf86-video-mga 1.4.4
Diffstat (limited to 'driver/xf86-video-mga/src')
34 files changed, 34034 insertions, 0 deletions
diff --git a/driver/xf86-video-mga/src/Makefile.am b/driver/xf86-video-mga/src/Makefile.am new file mode 100644 index 000000000..17211bb1b --- /dev/null +++ b/driver/xf86-video-mga/src/Makefile.am @@ -0,0 +1,76 @@ +# Copyright 2005 Adam Jackson. +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# on the rights to use, copy, modify, merge, publish, distribute, sub +# license, and/or sell copies of the Software, and to permit persons to whom +# the Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice (including the next +# paragraph) shall be included in all copies or substantial portions of the +# Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +# ADAM JACKSON BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER +# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN +# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + +# this is obnoxious: +# -module lets us name the module exactly how we want +# -avoid-version prevents gratuitous .0.0.0 version numbers on the end +# _ladir passes a dummy rpath to libtool so the thing will actually link +# TODO: -nostdlib/-Bstatic/-lgcc platform magic, not installing the .a, etc. +AM_CFLAGS = @XORG_CFLAGS@ @DRI_CFLAGS@ +mga_drv_la_LTLIBRARIES = mga_drv.la +mga_drv_la_LDFLAGS = -module -avoid-version +mga_drv_ladir = @moduledir@/drivers +mga_drv_la_LIBADD = $(noinst_LTLIBRARIES) + +mga_drv_la_SOURCES = \ + binding.h \ + client.h \ + clientlx.c \ + mga_arc.c \ + mga_bios.c \ + mga_common.h \ + mga_dac3026.c \ + mga_dacG.c \ + mga_dga.c \ + mga_dh.c \ + mga_driver.c \ + mga_esc.c \ + mga_g450pll.c \ + mga.h \ + mga_halmod.c \ + mga_hwcurs.c \ + mga_macros.h \ + mga_maven.h \ + mga_merge.c \ + mga_merge.h \ + mgareg_flags.h \ + mga_reg.h \ + mga_sarea.h \ + mga_shadow.c \ + mga_ucode.h \ + mga_vga.c \ + mga_video.c + +if DRI +mga_drv_la_SOURCES += \ + mga_dri.c \ + mga_dri.h \ + mga_dripriv.h +endif + +if USE_EXA +mga_drv_la_SOURCES += \ + mga_exa.c +endif + +if USE_XAA +mga_drv_la_SOURCES += \ + mga_storm.c +endif diff --git a/driver/xf86-video-mga/src/Makefile.in b/driver/xf86-video-mga/src/Makefile.in new file mode 100644 index 000000000..c9d4c24fb --- /dev/null +++ b/driver/xf86-video-mga/src/Makefile.in @@ -0,0 +1,556 @@ +# Makefile.in generated by automake 1.9.6 from Makefile.am. +# @configure_input@ + +# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, +# 2003, 2004, 2005 Free Software Foundation, Inc. +# This Makefile.in is free software; the Free Software Foundation +# gives unlimited permission to copy and/or distribute it, +# with or without modifications, as long as this notice is preserved. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY, to the extent permitted by law; without +# even the implied warranty of MERCHANTABILITY or FITNESS FOR A +# PARTICULAR PURPOSE. + +@SET_MAKE@ + +# Copyright 2005 Adam Jackson. +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# on the rights to use, copy, modify, merge, publish, distribute, sub +# license, and/or sell copies of the Software, and to permit persons to whom +# the Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice (including the next +# paragraph) shall be included in all copies or substantial portions of the +# Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +# ADAM JACKSON BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER +# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN +# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + +srcdir = @srcdir@ +top_srcdir = @top_srcdir@ +VPATH = @srcdir@ +pkgdatadir = $(datadir)/@PACKAGE@ +pkglibdir = $(libdir)/@PACKAGE@ +pkgincludedir = $(includedir)/@PACKAGE@ +top_builddir = .. +am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd +INSTALL = @INSTALL@ +install_sh_DATA = $(install_sh) -c -m 644 +install_sh_PROGRAM = $(install_sh) -c +install_sh_SCRIPT = $(install_sh) -c +INSTALL_HEADER = $(INSTALL_DATA) +transform = $(program_transform_name) +NORMAL_INSTALL = : +PRE_INSTALL = : +POST_INSTALL = : +NORMAL_UNINSTALL = : +PRE_UNINSTALL = : +POST_UNINSTALL = : +build_triplet = @build@ +host_triplet = @host@ +@DRI_TRUE@am__append_1 = \ +@DRI_TRUE@ mga_dri.c \ +@DRI_TRUE@ mga_dri.h \ +@DRI_TRUE@ mga_dripriv.h + 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installdirs maintainer-clean \ + maintainer-clean-generic mostlyclean mostlyclean-compile \ + mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \ + tags uninstall uninstall-am uninstall-info-am \ + uninstall-mga_drv_laLTLIBRARIES + +# Tell versions [3.59,3.63) of GNU make to not export all variables. +# Otherwise a system limit (for SysV at least) may be exceeded. +.NOEXPORT: diff --git a/driver/xf86-video-mga/src/binding.h b/driver/xf86-video-mga/src/binding.h new file mode 100644 index 000000000..6dcd1e910 --- /dev/null +++ b/driver/xf86-video-mga/src/binding.h @@ -0,0 +1,254 @@ +/************************************************************************************** + + @doc MGA MGA_STRUCT + + @module MGA Structures | Structure of The MGA Layer + @normal Copyright © 1997, Matrox Graphics Inc. + + All Rights Reserved. + + @head3 MGA Structures | + @index struct | MGA_STRUCT + + @end + +***************************************************************************************/ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/HALlib/binding.h,v 1.3 2000/10/24 22:45:08 dawes Exp $ */ + +#ifndef _BINDING +#define _BINDING + +#ifndef _INTERNALBINDING + +#define BINDING_NOERROR 0x00000000 +#define BINDING_ERROR 0x90000000 +#define FAR +#define DECL + +typedef void VOID; +typedef void FAR *LPVOID; +typedef void FAR *LPBOARDHANDLE; + +typedef long LONG; +typedef unsigned long ULONG; +typedef unsigned long FLONG; +typedef unsigned long FAR *LPULONG; + +typedef char CHAR; +typedef unsigned char UCHAR; +typedef unsigned char FAR*LPUCHAR; + +typedef struct TAGCLIENTTABLE{ + ULONG (DECL *ClientReadConfigSpaceByte )(LPVOID , ULONG, LPVOID ); + ULONG (DECL *ClientReadConfigSpaceDword )(LPVOID , ULONG, LPVOID ); + ULONG (DECL *ClientWriteConfigSpaceByte )(LPVOID , ULONG, UCHAR); + ULONG (DECL *ClientWriteConfigSpaceDword )(LPVOID , ULONG, ULONG); + ULONG (DECL *ClientOpenRegisterBase )(LPVOID , ULONG, ULONG); + ULONG (DECL *ClientCloseRegisterBase )(LPVOID ); + ULONG (DECL *ClientReadRegisterByte )(LPVOID , ULONG, LPVOID ); + ULONG (DECL *ClientReadRegisterDword )(LPVOID , ULONG, LPVOID ); + ULONG (DECL *ClientWriteRegisterByte )(LPVOID , ULONG, UCHAR); + ULONG (DECL *ClientWriteRegisterDword )(LPVOID , ULONG, ULONG); + ULONG (DECL *ClientOpenMemoryBase )(LPVOID , ULONG, ULONG); + ULONG (DECL *ClientCloseMemoryBase )(LPVOID ); + ULONG (DECL *ClientReadMemoryByte )(LPVOID , ULONG, LPVOID ); + ULONG (DECL *ClientReadMemoryDword )(LPVOID , ULONG, LPVOID ); + ULONG (DECL *ClientWriteMemoryByte )(LPVOID , ULONG, UCHAR); + ULONG (DECL *ClientWriteMemoryDword )(LPVOID , ULONG, ULONG); + ULONG (DECL *ClientOpenSystemDevice )(LPVOID , ULONG, ULONG); + ULONG (DECL *ClientCloseSystemDevice )(LPVOID ); + ULONG (DECL *ClientReadSystemDeviceByte )(LPVOID , ULONG, LPVOID ); + ULONG (DECL *ClientReadSystemDeviceDword )(LPVOID , ULONG, LPVOID ); + ULONG (DECL *ClientWriteSystemDeviceByte )(LPVOID , ULONG, UCHAR); + ULONG (DECL *ClientWriteSystemDeviceDword )(LPVOID , ULONG, ULONG); + ULONG (DECL *ClientWait )(LPVOID , ULONG); + ULONG (DECL *ClientGetBiosInfo ) (LPVOID, LPVOID, LPVOID); + ULONG (DECL *ClientReadDDCEdid ) (LPVOID, LPVOID, ULONG); +#ifdef DEBUG + ULONG (DECL *ClientDebug ) (LPVOID, ULONG, LPVOID, ULONG, LPVOID); +#endif +} CLIENTTABLE, FAR *LPCLIENTTABLE; + +#endif /* _INTERNALBINDING */ + +/*************************************************************************************************** + MGAHWINFO STRUCTURE + *************************************************************************************************** + @struct MGAHWINFO | Public MGA Board Information + @field OUT ULONG | ulCapsFirstOutput | Capabilities of firts output + @flag Bit 0 | Analog output supported on primary CRTC + @flag Bit 1 | Digital output supported on primary CRTC + @flag Bit 2 | TV output supported on primary CRTC + @flag Bit 3 | Analog output supported on second CRTC + @flag Bit 4 | Digital output supported on second CRTC + @flag Bit 5 | TV output supported on second CRTC + @flag Bit 6 | VGA output supported + @field OUT ULONG | ulCapsSecondOutput | Capabilities of second output + @flag Bit 0 | Analog output supported on primary CRTC + @flag Bit 1 | Digital output supported on primary CRTC + @flag Bit 2 | TV output supported on primary CRTC + @flag Bit 3 | Analog output supported on second CRTC + @flag Bit 4 | Digital output supported on second CRTC + @flag Bit 5 | TV output supported on second CRTC + @flag Bit 6 | VGA output supported + @field OUT ULONG | ulVideoMemory | Total number of video memory in bytes + @end + **************************************************************************************************/ +typedef struct TAGMGAHWINFO { + ULONG ulCapsFirstOutput; + ULONG ulCapsSecondOutput; + ULONG ulVideoMemory; +} MGAHWINFO, FAR *LPMGAHWINFO; + +/*************************************************************************************************** + MGAMODEINFO STRUCTURE + *************************************************************************************************** + @struct MGAMODEINFO | Mode Information + @field IN FLONG | flOutput | Where we want to apply this parameters + @flag Bit 0 | Use second CRTC + @flag Bit 1 | Use primary analog output + @flag Bit 2 | Use secondary analog output + @flag Bit 3 | Use primary digital output + @flag Bit 4 | Use secondary digital output + @flag Bit 5 | Force a particular frame buffer pitch + @flag Bit 6 | Force a particular display origin + @flag Bit 7-31 | Reserved + @field IN ULONG | ulDispWidth | Display Width in pixels + @field IN ULONG | ulDispHeight | Display Height in pixels + @field IN ULONG | ulDeskWidth | Desktop Width in pixels + @field IN ULONG | ulDeskHeight | Desktop Height in pixels + @field IN OUT ULONG | ulFBPitch | Frame Buffer Pitch in pixel + @field IN ULONG | ulBpp | Bits Per Pixels and input format + @flag lower 16 bit | Bits per pixel + <nl><tab> 8, 15, 16, 24 or 32 + @flag upper 16 bit | Input format + <nl><tab> 0 RGB + <nl><tab> 1 RGBA + <nl><tab> 2 YcbCr 4:2:0 3 Planes + <nl><tab> 3 YcbCr 4:2:0 4 Planes + <nl><tab> 4 YcbCr 4:2:2-UYVY + <nl><tab> 5 YcbCr 4:2:2-YUY2 + <nl><tab> 6-10 none interleave mode + <nl><tab> 6 NI RGBA + <nl><tab> 7 NI YcbCr 4:2:0 3 Planes + <nl><tab> 8 NI YcbCr 4:2:0 4 Planes + <nl><tab> 9 NI YcbCr 4:2:2-UYVY + <nl><tab> 10 NI YcbCr 4:2:2-YUY2 + @field IN ULONG | ulZoom | Zoom factor + @flag 1x (1), 2x (2) or 4x (4)| + @field IN OUT FLONG | flSignalMode | Signal Mode + @flag Bit 0 | Interlace (0 : Non-interlace / 1: Interlace) + @flag Bit 1 | Overscan (0 : No Overscan / 1 : Overscan) + @flag Bit 2 | Horizontal Sync Polarity (0 : Negative / 1 : Positive) + @flag Bit 3 | Vertical Sync Polarity (0 : Negative / 1 : Positive) + @flag Bit 4-7 | Standard TV output + <nl><tab>000 - PAL B G H + <nl><tab>001 - NTSC M + <nl><tab>010..111 - Reserved + @flag Bit 8-31 | Reserved for future use + @field IN OUT ULONG | ulRefreshRate | Vertical Refresh Rate in Hz + @field IN OUT ULONG | ulHorizRate | Horizontal Refresh Rate in KHz + @field IN OUT ULONG | ulPixClock | Pixel Clock in kHz + @field IN OUT ULONG | ulHFPorch | Horizontal front porch in pixels + @field IN OUT ULONG | ulHSync | Horizontal Sync in pixels + @field IN OUT ULONG | ulHBPorch | Horizontal back porch in pixels + @field IN OUT ULONG | ulVFPorch | Vertical front porch in lines + @field IN OUT ULONG | ulVSync | Vertical Sync in lines + @field IN OUT ULONG | ulVBPorch | Vertical back Porch in lines + @field IN OUT ULONG | ulDisplayOrg | Origin of the display Offset(pixels) + @field IN OUT ULONG | ulDstOrg | Origin of the drawing Offset in the frame (pixels) + @field IN OUT ULONG | ulPanXGran | Panning in X granularity in pixel + @field IN OUT ULONG | ulPanYGran | Panning in Y granularity in pixel + @field IN OUT ULONG | ulTVStandard | TV Standard + @field IN OUT ULONG | ulCableType | Cable Type + @end + **************************************************************************************************/ +typedef struct TAGMAGMODEINFO { + FLONG flOutput; /* Where we want to apply this parameters */ + ULONG ulDispWidth; /* Display Width in pixels */ + ULONG ulDispHeight; /* Display Height in pixels */ + ULONG ulDeskWidth; /* Desktop Width in pixels */ + ULONG ulDeskHeight; /* Desktop Height in pixels */ + ULONG ulFBPitch; /* Frame Buffer Pitch in pixel */ + ULONG ulBpp; /* Bits Per Pixels / input format */ + ULONG ulZoom; /* Zoom factor */ + FLONG flSignalMode; /* Signal Mode */ + ULONG ulRefreshRate; /* Vertical Refresh Rate in Hz */ + ULONG ulHorizRate; /* Horizontal Refresh Rate in KHz */ + ULONG ulPixClock; /* Pixel Clock in kHz */ + ULONG ulHFPorch; /* Horizontal front porch in pixels */ + ULONG ulHSync; /* Horizontal Sync in pixels */ + ULONG ulHBPorch; /* Horizontal back porch in pixels */ + ULONG ulVFPorch; /* Vertical front porch in lines */ + ULONG ulVSync; /* Vertical Sync in lines */ + ULONG ulVBPorch; /* Vertical back Porch in lines */ + ULONG ulDisplayOrg; /* Origin of the display Offset(bytes) */ + ULONG ulDstOrg; /* Origin of the drawing Offset in the frame (bytes) */ + ULONG ulPanXGran; /* Panning in X granularity in pixel */ + ULONG ulPanYGran; /* Panning in Y granularity in pixel */ + ULONG ulTVStandard; /* TV Standard */ + ULONG ulCableType; /* Cable Type */ +} MGAMODEINFO, FAR *LPMGAMODEINFO; + +#define MGAHWINFOCAPS_CRTC1_ANALOG 1L +#define MGAHWINFOCAPS_CRTC1_DIGITAL (1L << 1) +#define MGAHWINFOCAPS_CRTC1_TV (1L << 2) +#define MGAHWINFOCAPS_CRTC2_ANALOG (1L << 3) +#define MGAHWINFOCAPS_CRTC2_DIGITAL (1L << 4) +#define MGAHWINFOCAPS_CRTC2_TV (1L << 5) +#define MGAHWINFOCAPS_OUTPUT_VGA (1L << 6) +#define MGAHWINFOCAPS_CRTC2 (MGAHWINFOCAPS_CRTC2_ANALOG | MGAHWINFOCAPS_CRTC2_DIGITAL | MGAHWINFOCAPS_CRTC2_TV) +#define MGAHWINFOCAPS_OUTPUT_ANALOG (MGAHWINFOCAPS_CRTC1_ANALOG | MGAHWINFOCAPS_CRTC2_ANALOG) +#define MGAHWINFOCAPS_OUTPUT_DIGITAL (MGAHWINFOCAPS_CRTC1_DIGITAL | MGAHWINFOCAPS_CRTC2_DIGITAL) +#define MGAHWINFOCAPS_OUTPUT_TV (MGAHWINFOCAPS_CRTC1_TV | MGAHWINFOCAPS_CRTC2_TV) + +#define MGAMODEINFO_SECOND_CRTC 1L +#define MGAMODEINFO_ANALOG1 (1L << 1) +#define MGAMODEINFO_ANALOG2 (1L << 2) +#define MGAMODEINFO_DIGITAL1 (1L << 3) +#define MGAMODEINFO_DIGITAL2 (1L << 4) +#define MGAMODEINFO_FORCE_PITCH (1L << 5) +#define MGAMODEINFO_FORCE_DISPLAYORG (1L << 6) +#define MGAMODEINFO_TV (1L << 7) +#define MGAMODEINFO_TESTONLY 0x80000000 + +/* Cable Type */ +#define TV_YC_COMPOSITE 0 +#define TV_SCART_RGB 1 +#define TV_SCART_COMPOSITE 2 +#define TV_SCART_TYPE2 3 + +/* TV Standard */ + +#define TV_PAL 0 +#define TV_NTSC 1 + +#if defined(__cplusplus) + extern "C" { +#endif + +ULONG MGACloseLibrary(LPBOARDHANDLE pBoard); +ULONG MGAValidateMode(LPBOARDHANDLE pBoard, LPMGAMODEINFO pMgaModeInfo); +ULONG MGAValidateVideoParameters(LPBOARDHANDLE pBoard, LPMGAMODEINFO pMgaModeInfo); +ULONG MGASetMode(LPBOARDHANDLE pBoard, LPMGAMODEINFO pMgaModeInfo); +ULONG MGASetTVMode(LPBOARDHANDLE pBoard, LPMGAMODEINFO pMgaModeInfo); +ULONG MGASetVgaMode(LPBOARDHANDLE pBoard); +ULONG MGASaveVgaState(LPBOARDHANDLE pBoard); +ULONG MGARestoreVgaState(LPBOARDHANDLE pBoard); +ULONG MGAInitHardware(LPBOARDHANDLE pBoard); +ULONG MGAGetVideoParameters(LPBOARDHANDLE pBoard, LPMGAMODEINFO pMgaModeInfo, ULONG ulRefresh); +ULONG MGAGetHardwareInfo(LPBOARDHANDLE pBoard, LPMGAHWINFO pMgaHwInfo); +LPVOID MGAGetClientPointer(LPBOARDHANDLE pBoard); +ULONG MGAOpenLibrary(LPBOARDHANDLE pBoard, LPVOID lpClient, ULONG ulClientSize); +ULONG MGAGetBOARDHANDLESize(void); +ULONG MGASetTVStandard(LPBOARDHANDLE pBoard, ULONG ulTVStandard); +ULONG MGASetTVCableType(LPBOARDHANDLE pBoard, ULONG ulCableType); +ULONG HALSetDisplayStart(LPBOARDHANDLE pBoard, ULONG x, ULONG y, ULONG crtc); + +#if defined(__cplusplus) + } +#endif + +#endif /* _BINDING */ + + diff --git a/driver/xf86-video-mga/src/client.h b/driver/xf86-video-mga/src/client.h new file mode 100644 index 000000000..8348b6498 --- /dev/null +++ b/driver/xf86-video-mga/src/client.h @@ -0,0 +1,68 @@ +#ifndef _CLIENT +#define _CLIENT + +#include "binding.h" + +#if defined(__cplusplus) + extern "C" { +#endif + +typedef void* LPBIOSREGS; +#define ASSERT_HANDLER(pBoard) + +typedef struct TAGCLIENTDATA +{ + ULONG ulFrameBufferBase; + ULONG ulRegisterBase; + pointer pMga; +} CLIENTDATA, *LPCLIENTDATA; + +extern ULONG DECL ClientReadConfigSpaceByte(LPBOARDHANDLE, ULONG, LPUCHAR); +extern ULONG DECL ClientReadConfigSpaceDword(LPBOARDHANDLE , ULONG, LPULONG ); +extern ULONG DECL ClientWriteConfigSpaceByte (LPBOARDHANDLE , ULONG, UCHAR); +extern ULONG DECL ClientWriteConfigSpaceDword(LPBOARDHANDLE , ULONG, ULONG); +extern ULONG DECL ClientOpenRegisterBase(LPBOARDHANDLE , ULONG, ULONG); +extern ULONG DECL ClientCloseRegisterBase (LPBOARDHANDLE ); +extern ULONG DECL ClientReadRegisterByte(LPBOARDHANDLE , ULONG, LPUCHAR ); +extern ULONG DECL ClientReadRegisterDword(LPBOARDHANDLE , ULONG, LPULONG ); +extern ULONG DECL ClientWriteRegisterByte (LPBOARDHANDLE , ULONG, UCHAR); +extern ULONG DECL ClientWriteRegisterDword(LPBOARDHANDLE , ULONG, ULONG); +extern ULONG DECL ClientOpenMemoryBase(LPBOARDHANDLE , ULONG, ULONG); +extern ULONG DECL ClientCloseMemoryBase(LPBOARDHANDLE ); +extern ULONG DECL ClientReadMemoryByte(LPBOARDHANDLE , ULONG, LPUCHAR ); +extern ULONG DECL ClientReadMemoryDword (LPBOARDHANDLE , ULONG, LPULONG ); +extern ULONG DECL ClientWriteMemoryByte(LPBOARDHANDLE , ULONG, UCHAR); +extern ULONG DECL ClientWriteMemoryDword (LPBOARDHANDLE , ULONG, ULONG); +extern ULONG DECL ClientOpenSystemDevice (LPBOARDHANDLE , ULONG, ULONG); +extern ULONG DECL ClientCloseSystemDevice (LPBOARDHANDLE ); +extern ULONG DECL ClientReadSystemDeviceByte(LPBOARDHANDLE , ULONG, LPUCHAR ); +extern ULONG DECL ClientReadSystemDeviceDword(LPBOARDHANDLE , ULONG, LPULONG ); +extern ULONG DECL ClientWriteSystemDeviceByte(LPBOARDHANDLE , ULONG, UCHAR); +extern ULONG DECL ClientWriteSystemDeviceDword (LPBOARDHANDLE , ULONG, ULONG); +extern ULONG DECL ClientWait (LPBOARDHANDLE , ULONG); +extern ULONG DECL ClientLocateFirstTwisterOfQuad(ULONG); +extern ULONG DECL ClientSearchDevNode(ULONG, UCHAR, UCHAR); +extern ULONG DECL ClientGetBiosInfo(LPBOARDHANDLE, LPUCHAR, LPULONG ); +extern ULONG DECL ClientDebug (LPBOARDHANDLE , ULONG, LPUCHAR, ULONG, LPVOID); +extern ULONG DECL ClientCallBiosInt10(LPBOARDHANDLE, LPBIOSREGS); +extern ULONG DECL ClientReadDDCEdid(LPBOARDHANDLE, LPUCHAR, ULONG); +extern ULONG DECL ClientCustomCall(LPBOARDHANDLE, ULONG, LPVOID, LPVOID); +extern ULONG DECL ClientApplyEpromPatch(LPBOARDHANDLE); +extern ULONG DECL ClientDetectHostInterface(LPBOARDHANDLE, LPULONG); +extern ULONG DECL ClientHSLPatchFunction(LPBOARDHANDLE, ULONG, ULONG, LPUCHAR); +extern ULONG DECL InitClientFunctions(LPBOARDHANDLE, ULONG); +extern ULONG DECL ClientInitTimeBase(LPBOARDHANDLE); +extern ULONG DECL ClientOpenDMABase(LPBOARDHANDLE, ULONG, ULONG); +extern ULONG DECL ClientReadDMAByte(LPBOARDHANDLE, ULONG, LPUCHAR); +extern ULONG DECL ClientReadBIOS(LPBOARDHANDLE, ULONG, ULONG, ULONG, ULONG, LPUCHAR); +extern ULONG DECL ClientWriteBIOS(LPBOARDHANDLE, ULONG, ULONG, ULONG, ULONG); + +#if defined(__cplusplus) + } +#endif + +#define ESC_CUSTOM_SET_FUNCTION_PTR 0x80000200 +#define ESC_CUSTOM_GET_FUNCTION_PTR 0x80000201 +#define ESC_CUSTOM_PATCH_HSL 0x80000202 + +#endif diff --git a/driver/xf86-video-mga/src/clientlx.c b/driver/xf86-video-mga/src/clientlx.c new file mode 100644 index 000000000..306d3ed34 --- /dev/null +++ b/driver/xf86-video-mga/src/clientlx.c @@ -0,0 +1,832 @@ +/******************************************************************************\ + + clientlx.c + + Copyright © 1997, Matrox Graphics Inc. + + All Rights Reserved. + +\******************************************************************************/ +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include "xf86_OSproc.h" +#include "xf86Pci.h" +#include "client.h" +#include "mga.h" + +CLIENTTABLE ClientFunctions = { + (ULONG (DECL *)(LPVOID,ULONG,LPVOID)) ClientReadConfigSpaceByte, + (ULONG (DECL *)(LPVOID,ULONG,LPVOID)) ClientReadConfigSpaceDword, + (ULONG (DECL *)(LPVOID,ULONG,UCHAR)) ClientWriteConfigSpaceByte, + (ULONG (DECL *)(LPVOID,ULONG,ULONG)) ClientWriteConfigSpaceDword, + (ULONG (DECL *)(LPVOID,ULONG,ULONG)) ClientOpenRegisterBase, + (ULONG (DECL *)(LPVOID)) ClientCloseRegisterBase, + (ULONG (DECL *)(LPVOID,ULONG,LPVOID)) ClientReadRegisterByte, + (ULONG (DECL *)(LPVOID,ULONG,LPVOID)) ClientReadRegisterDword, + (ULONG (DECL *)(LPVOID,ULONG,UCHAR)) ClientWriteRegisterByte, + (ULONG (DECL *)(LPVOID,ULONG,ULONG)) ClientWriteRegisterDword, + (ULONG (DECL *)(LPVOID,ULONG,ULONG)) ClientOpenMemoryBase, + (ULONG (DECL *)(LPVOID)) ClientCloseMemoryBase, + (ULONG (DECL *)(LPVOID,ULONG,LPVOID)) ClientReadMemoryByte, + (ULONG (DECL *)(LPVOID,ULONG,LPVOID)) ClientReadMemoryDword, + (ULONG (DECL *)(LPVOID,ULONG,UCHAR)) ClientWriteMemoryByte, + (ULONG (DECL *)(LPVOID,ULONG,ULONG)) ClientWriteMemoryDword, + (ULONG (DECL *)(LPVOID,ULONG,ULONG)) ClientOpenSystemDevice, + (ULONG (DECL *)(LPVOID)) ClientCloseSystemDevice, + (ULONG (DECL *)(LPVOID,ULONG,LPVOID)) ClientReadSystemDeviceByte, + (ULONG (DECL *)(LPVOID,ULONG,LPVOID)) ClientReadSystemDeviceDword, + (ULONG (DECL *)(LPVOID,ULONG,UCHAR)) ClientWriteSystemDeviceByte, + (ULONG (DECL *)(LPVOID,ULONG,ULONG)) ClientWriteSystemDeviceDword, + (ULONG (DECL *)(LPVOID,ULONG)) ClientWait, + (ULONG (DECL *)(LPVOID,LPVOID,LPVOID)) ClientGetBiosInfo, + (ULONG (DECL *)(LPVOID,LPVOID,ULONG)) ClientReadDDCEdid +}; + +/******************************************************************************\ + + Function : ClientReadConfigSpaceByte + + Description : Read a Byte from the configuration space. + + I/O Desc. : LPBOARDHANDLE pBoard | Handle to the board structure + containing all the information about a specifib board. + ULONG ulOffset | Offset of the Byte to be read. + UCHAR *pucByte | pointer to a byte that will receive + the data + + Return Val : ULONG + +\******************************************************************************/ +ULONG ClientReadConfigSpaceByte(LPBOARDHANDLE pBoard, ULONG ulOffset, + UCHAR *pucByte) +{ + LPCLIENTDATA pClientStruct = MGAGetClientPointer(pBoard); + MGAPtr pMga = (MGAPtr)pClientStruct->pMga; + + ASSERT_HANDLER(pBoard); + + *pucByte = pciReadByte(pMga->PciTag,ulOffset); + + return 0; +} + + +/******************************************************************************\ + + Function : ClientReadConfigSpaceDword + + Description : Read a Dword from the configuration space. + + I/O Desc. : LPBOARDHANDLE pBoard | Handle to the board structure + containing all the information about a specific board. + ULONG ulOffset | Offset of the Byte to be read. + ULONG *pulDword | Dword to receive the data + + Return Val : ULONG + +\******************************************************************************/ +ULONG ClientReadConfigSpaceDword(LPBOARDHANDLE pBoard, ULONG ulOffset, + ULONG *pulDword) +{ + LPCLIENTDATA pClientStruct = MGAGetClientPointer(pBoard); + MGAPtr pMga = (MGAPtr)pClientStruct->pMga; + + ASSERT_HANDLER(pBoard); + + *pulDword = pciReadLong(pMga->PciTag,ulOffset); + + return 0; +} + + +/******************************************************************************\ + + Function : ClientWriteConfigSpaceByte + + Description : Write a Byte from the configuration space. + + I/O Desc. : LPBOARDHANDLE pBoard | Handle to the board structure + containing all the information about a specific board. + ULONG ulOffset | Offset of the Byte to be read. + UCHAR ucByte | Byte to receive the data + + Return Val : ULONG + +\******************************************************************************/ +ULONG ClientWriteConfigSpaceByte(LPBOARDHANDLE pBoard, ULONG ulOffset, + UCHAR ucByte) +{ + LPCLIENTDATA pClientStruct = MGAGetClientPointer(pBoard); + MGAPtr pMga = (MGAPtr)pClientStruct->pMga; + + ASSERT_HANDLER(pBoard); + + pciWriteByte(pMga->PciTag,ulOffset, ucByte); + + return 0; +} + + +/******************************************************************************\ + + Function : ClientWriteConfigSpaceDword + + Description : Write a Dword from the configuration space. + + I/O Desc. : LPBOARDHANDLE pBoard | Handle to the board structure + containing all the information about a specific board. + ULONG ulOffset | Offset of the Byte to be read. + ULONG ulDword | Dword containing the data to be written + + Return Val : ULONG + +\******************************************************************************/ +ULONG ClientWriteConfigSpaceDword(LPBOARDHANDLE pBoard, ULONG ulOffset, + ULONG ulDword) +{ + LPCLIENTDATA pClientStruct = MGAGetClientPointer(pBoard); + MGAPtr pMga = (MGAPtr)pClientStruct->pMga; + + ASSERT_HANDLER(pBoard); + + pciWriteLong(pMga->PciTag,ulOffset, ulDword); + + return 0; +} + + +/******************************************************************************\ + + Function : ClientOpenRegisterBase + + Description : Map the register base for future call to ClientReadRegisterX + and ClientWriteRegisterX. + + I/O Desc. : LPBOARDHANDLE pBoard | Handle to the board structure + containing all the information about a specific board. + ULONG ulAddress | Physical address of the Register aperture + ULONG ulSize | Size in Byte of the Register Aperture + + Return Val : ULONG + +\******************************************************************************/ +ULONG ClientOpenRegisterBase(LPBOARDHANDLE pBoard, ULONG ulAddress, ULONG ulSize) +{ + LPCLIENTDATA pClientStruct = MGAGetClientPointer(pBoard); + MGAPtr pMga = (MGAPtr)pClientStruct->pMga; + + ASSERT_HANDLER(pBoard); + + pClientStruct->ulRegisterBase = (ULONG) pMga->IOBase; + + return 0; +} + + +/******************************************************************************\ + + Function : ClientCloseRegisterBase + + Description : Unmap the register base address and free resources needed + to address it. + + I/O Desc. : LPBOARDHANDLE pBoard | Handle to the board structure + containing all the information about a specific board. + + Return Val : ULONG + +\******************************************************************************/ +ULONG ClientCloseRegisterBase(LPBOARDHANDLE pBoard) +{ + ASSERT_HANDLER(pBoard); + return 0; +} + + +/******************************************************************************\ + + Function : ClientReadRegisterByte + + Description : Read a byte from the Register space. + + I/O Desc. : LPBOARDHANDLE pBoard | Handle to the board structure. + containing all the information about a specific board. + ULONG ulOffset | Offset of the Byte to be read. + UCHAR *pucByte | pointer to the byte that will receive + the data. + + Return Val : ULONG + +\******************************************************************************/ +ULONG ClientReadRegisterByte(LPBOARDHANDLE pBoard, ULONG ulOffset, + UCHAR *pucByte) +{ + LPCLIENTDATA pClientStruct = MGAGetClientPointer(pBoard); + + ASSERT_HANDLER(pBoard); + + *pucByte = *((UCHAR *)(pClientStruct->ulRegisterBase + ulOffset)); + + return 0; +} + + +/******************************************************************************\ + + Function : ClientReadRegisterDword + + Description : Read a Dword from the Register space. + + I/O Desc. : LPBOARDHANDLE pBoard | Handle to the board structure + containing all the information about a specific board. + ULONG ulOffset | Offset of the Byte to be read. + ULONG *pulDword | pointer to the dword that will receive + the data. + + Return Val : ULONG + +\******************************************************************************/ +ULONG ClientReadRegisterDword(LPBOARDHANDLE pBoard, ULONG ulOffset, + ULONG *pulDword) +{ + LPCLIENTDATA pClientStruct = MGAGetClientPointer(pBoard); + + ASSERT_HANDLER(pBoard); + + *pulDword = *((ULONG *)(pClientStruct->ulRegisterBase + ulOffset)); + + return 0; +} + + +/******************************************************************************\ + + Function : ClientWriteRegisterByte + + Description : Write a Byte from the Register space. + + I/O Desc. : LPBOARDHANDLE pBoard | Handle to the board structure + containing all the information about a specific board. + ULONG ulOffset | Offset of the Byte to be read. + UCHAR ucByte | CHAR to receive the data. + + Return Val : ULONG + +\******************************************************************************/ +ULONG ClientWriteRegisterByte(LPBOARDHANDLE pBoard, ULONG ulOffset, + UCHAR ucByte) +{ + LPCLIENTDATA pClientStruct = MGAGetClientPointer(pBoard); + + ASSERT_HANDLER(pBoard); + + *((UCHAR *)(pClientStruct->ulRegisterBase + ulOffset)) = ucByte; + + return 0; +} + + +/******************************************************************************\ + + Function : ClientWriteRegisterSpaceDword + + Description : Write a Dword from the Register space. + + I/O Desc. : LPBOARDHANDLE *| pBoard | Handle to the board structure + containing all the information about a specific board. + ULONG ulOffset | Offset of the Byte to be read. + ULONG ulDword | Dword to receive the data + + Return Val : ULONG + +\******************************************************************************/ +ULONG ClientWriteRegisterDword(LPBOARDHANDLE pBoard, ULONG ulOffset, + ULONG ulDword) +{ + LPCLIENTDATA pClientStruct = MGAGetClientPointer(pBoard); + + ASSERT_HANDLER(pBoard); + + *((ULONG *)(pClientStruct->ulRegisterBase + ulOffset)) = ulDword; + + return 0; +} + + +/******************************************************************************\ + + Function : ClientOpenMemoryBase + + Description : Map the Memory base for future call to ClientReadMemoryX + and ClientWriteMemoryX. + + I/O Desc. : LPBOARDHANDLE pBoard | Handle to the board structure + containing all the information about a specific board. + ULONG ulAddress | Physical address of the Register aperture + ULONG ulSize | Size in Byte of the Register Aperture + Return Val : ULONG + +\******************************************************************************/ +ULONG ClientOpenMemoryBase(LPBOARDHANDLE pBoard, ULONG ulAddress, ULONG ulSize) +{ + LPCLIENTDATA pClientStruct = MGAGetClientPointer(pBoard); + MGAPtr pMga = (MGAPtr) pClientStruct->pMga; + + ASSERT_HANDLER(pBoard); + + pClientStruct->ulFrameBufferBase = (ULONG) pMga->FbBase; + + return 0; +} + + +/******************************************************************************\ + + Function : ClientCloseMemoryBase + + Description : Unmap the Frame Buffer aperture and free resources + needed to address it. + + I/O Desc. : LPBOARDHANDLE pBoard | Handle to the board structure + containing all the information about a specific board. + + Return Val : ULONG + +\******************************************************************************/ +ULONG ClientCloseMemoryBase(LPBOARDHANDLE pBoard) +{ + ASSERT_HANDLER(pBoard); + return 0; +} + + +/******************************************************************************\ + + Function : ClientReadMemoryByte + + Description : Read a Byte from the Frame Buffer space. + + I/O Desc. : LPBOARDHANDLE pBoard | Handle to the board structure + containing all the information about a specific board. + ULONG ulOffset | Offset of the Byte to be read. + UCHAR *ucByte | CHAR to receive the data + + Return Val : ULONG +\******************************************************************************/ +ULONG ClientReadMemoryByte(LPBOARDHANDLE pBoard, ULONG ulOffset, UCHAR *pucByte) +{ + LPCLIENTDATA pClientStruct = MGAGetClientPointer(pBoard); + + ASSERT_HANDLER(pBoard); + + *pucByte = *((UCHAR *)(pClientStruct->ulFrameBufferBase + ulOffset)); + + return 0; +} + + +/******************************************************************************\ + + Function : ClientReadMemoryDword + + Description : Read a Dword from the Frame Buffer Space. + + I/O Desc. : LPBOARDHANDLE pBoard | Handle to the board structure + containing all the information about a specific board. + ULONG ulOffset | Offset of the Byte to be read. + ULONG *uDword | Dword to receive the data + + Return Val : ULONG + +\******************************************************************************/ +ULONG ClientReadMemoryDword(LPBOARDHANDLE pBoard, ULONG ulOffset, + ULONG *pulDword) +{ + LPCLIENTDATA pClientStruct = MGAGetClientPointer(pBoard); + + ASSERT_HANDLER(pBoard); + + *pulDword = *((ULONG *)(pClientStruct->ulFrameBufferBase + ulOffset)); + + return 0; +} + + +/******************************************************************************\ + + Function : ClientWriteMemoryByte + + Description : Write a Byte from the Frame Buffer space. + + I/O Desc. : LPBOARDHANDLE pBoard | Handle to the board structure + containing all the information about a specific board. + ULONG ulOffset | Offset of the Byte to be read. + UCHAR ucByte | CHAR to receive the data + + Return Val : ULONG + +\******************************************************************************/ +ULONG ClientWriteMemoryByte(LPBOARDHANDLE pBoard, ULONG ulOffset, UCHAR ucByte) +{ + LPCLIENTDATA pClientStruct = MGAGetClientPointer(pBoard); + + ASSERT_HANDLER(pBoard); + + *((UCHAR *)(pClientStruct->ulFrameBufferBase + ulOffset)) = ucByte; + + return 0; +} + + +/******************************************************************************\ + + Function : ClientWriteMemoryDword + + Description : Write a Dword from the Frame Buffer space. + + I/O desc. : LPBOARDHANDLE pBoard | Handle to the board structure + containing all the information about a specific board. + ULONG ulOffset | Offset of the Byte to be read. + ULONG ulDword | Dword to receive the data + + Return Val : ULONG + +\******************************************************************************/ +ULONG ClientWriteMemoryDword(LPBOARDHANDLE pBoard, ULONG ulOffset, + ULONG ulDword) +{ + LPCLIENTDATA pClientStruct = MGAGetClientPointer(pBoard); + + ASSERT_HANDLER(pBoard); + + *((ULONG *)(pClientStruct->ulFrameBufferBase + ulOffset)) = ulDword; + + return 0; +} + + +/******************************************************************************\ + + Function : ClientOpenSystemDevice + + Description : Map a System device aperture for future call to + ClientReadSystemDeviceX and ClientWriteSystemDeviceX. + + I/O Desc. : LPBOARDHANDLE pBoard | Handle to the board structure + containing all the information about a specific board. + ULONG ulAddress | Physical address of the Register aperture + ULONG ulSize | Size in Byte of the Register Aperture + + Return Val : ULONG + +\******************************************************************************/ +ULONG ClientOpenSystemDevice(LPBOARDHANDLE pBoard, ULONG ulAddress, + ULONG ulSize) +{ + return 1; +} + + +/******************************************************************************\ + + Function : ClientCloseSystemDevice + + Description : Unmap the System Device aperture address and free + resources needed to address it. + + I/O Desc. : LPBOARDHANDLE pBoard | Handle to the board structure + containing all the information about a specific board. + + Return Val : ULONG + +\******************************************************************************/ +ULONG ClientCloseSystemDevice (LPBOARDHANDLE pBoard) +{ + return 1; +} + + +/******************************************************************************\ + + Function : ClientReadSystemDeviceByte + + Description : Read a Byte from the device Space. + + I/O Desc. : LPBOARDHANDLE pBoard | Handle to the board structure + containing all the information about a specific board. + ULONG ulOffset | Offset of the Byte to be read. + ULONG pucByte | Byte to read the data + + Return Val : ULONG + +\******************************************************************************/ +ULONG ClientReadSystemDeviceByte(LPBOARDHANDLE pBoard, ULONG ulOffset, + UCHAR *pucByte) +{ + return 1; +} + + +/******************************************************************************\ + + Function : ClientReadSystemDeviceDword + + Description : Read a Dword from the Frame Buffer Space + + I/O Desc. : LPBOARDHANDLE pBoard | Handle to the board structure + containing all the information about a specific board. + ULONG ulOffset | Offset of the Byte to be read. + ULONG ulDword | Dword to Read the data + + Return Val : ULONG + +\******************************************************************************/ +ULONG ClientReadSystemDeviceDword(LPBOARDHANDLE pBoard, ULONG ulOffset, + ULONG *pulDword) +{ + return 1; +} + + +/******************************************************************************\ + + Function : ClientWriteSystemByte + + Description : Write a Byte from the System Device Aperture + + I/O Desc. : LPBOARDHANDLE pBoard | Handle to the board structure + containing all the information about a specific board. + ULONG ulOffset | Offset of the Byte to be read. + UCHAR ucByte | Byte to receive the data + Return Val : ULONG + +\******************************************************************************/ +ULONG ClientWriteSystemDeviceByte(LPBOARDHANDLE pBoard, ULONG ulOffset, + UCHAR ucByte) +{ + return 1; +} + + +/******************************************************************************\ + + Function : ClientWriteSystemDword + + Description : Write a Dword from the System Device Aperture. + + I/O Desc. : LPBOARDHANDLE pBoard | Handle to the board structure + containing all the information about a specific board. + ULONG ulOffset | Offset of the Byte to be read. + ULONG uDword | Dword to receive the data + + Return Val : ULONG + +\******************************************************************************/ +ULONG ClientWriteSystemDeviceDword(LPBOARDHANDLE pBoard, ULONG ulOffset, + ULONG ulDword) +{ + return 1; +} + + +/******************************************************************************\ + + Function : ClientWait + + Description : Wait for ulDelayus micro-seconds. + + I/O Desc. : LPBOARDHANDLE pBoard | Handle to the board structure + containing all the information about a specific board. + ULONG ulDelayus | Delay in uSec + + Return Val : ULONG + +\******************************************************************************/ +ULONG ClientWait (LPBOARDHANDLE pBoard, ULONG ulDelayus) +{ + int i; + ULONG ulTmp; + + ASSERT_HANDLER(pBoard); + + for(i = 0; i < ulDelayus * 3; i++) + { + ClientReadRegisterDword(pBoard,0x1e14,&ulTmp); + } + + return 0; +} + + +/******************************************************************************\ + + Function : ClientGetBiosInfo + + Description : This function will be call if no PINS can be found + in physical EEPROM. + + I/O Desc. : LPBOARDHANDLE pBoard | Handle to the board structure + containing all the information about a specific board. + LPUCHAR | Buffer where we copy bios pins. + ULONG | Bios version + + Return Val : ULONG + +\******************************************************************************/ +ULONG ClientGetBiosInfo(LPBOARDHANDLE pBoard, LPUCHAR pucPins,LPULONG pulBIOSVersion) +{ + Bool bNotFound = TRUE; + UCHAR ucBIOS[32768]; + UCHAR ucTmpByte; + UCHAR ucCheckSum; + UCHAR ucPinsIndex; + UCHAR ucPinsSize; + ULONG ulTmpDword; + ULONG ulPinsOffset = 0; + ULONG ulPCIINFOffset; + + ASSERT_HANDLER(pBoard); + + xf86ReadBIOS(0xc0000,0,ucBIOS,32768); + + if(ucBIOS[0] == 0x55) + { + if(ucBIOS[1] == 0xaa) + { + while((ulPinsOffset < 0x10000) && bNotFound) + { + ulTmpDword = *(ULONG *)(ucBIOS + ulPinsOffset); + ucPinsSize = (UCHAR) (ulTmpDword >> 16); + if(((ulTmpDword & 0x0000ffff) == 0x0000412e) + && ucPinsSize <= 128) + { + ucCheckSum = 0; + for(ucPinsIndex = 0;ucPinsIndex < ucPinsSize; ucPinsIndex++) + { + pucPins[ucPinsIndex] = ucBIOS[ulPinsOffset + + ucPinsIndex]; + ucCheckSum += pucPins[ucPinsIndex]; + } + if(ucCheckSum == 0) + { + bNotFound = FALSE; + } + } + ulPinsOffset++; + } + + if(bNotFound) + { + return 1; + } + + ulPCIINFOffset = *(ULONG *)(ucBIOS + 0x18); + ulPCIINFOffset &= 0x0000ffff; + ulTmpDword = *(ULONG *)(ucBIOS + ulPCIINFOffset); + + if(ulTmpDword == 0x52494350) /* "PCIR" */ + { + ulPCIINFOffset += 0x12; + ulTmpDword = *(ULONG *)(ucBIOS + ulPCIINFOffset); + *pulBIOSVersion = ((ULONG) ((ulTmpDword & 0xf0) >> 4) << 16) | + ((ulTmpDword &0xf) << 12) | ((ulTmpDword >> 8) + & 0xff); + } + else + { + return 1; + } + } + else + { + return 1; + } + } + else + { + return 1; + } + + if(!*pulBIOSVersion) + { + ucTmpByte = ucBIOS[5]; + *pulBIOSVersion = ((ULONG) (ucTmpByte >> 4) << 16) | ((ULONG) + (ucTmpByte & 0x0f) << 12); + } + + return 0; +} + +/******************************************************************************\ + + Function : ClientCallBiosInt10 + + Description : Call the BIOS Int10h with specified parameters. + + I/O Desc. : LPBOARDHANDLE pBoard | Handle to the board structure + containing all the information about a specific board. + LPBIOSREGS pBiosRegs | Pointor to the Bios register + structure. + + Return Val : ULONG + +\******************************************************************************/ +ULONG ClientCallBiosInt10(LPBOARDHANDLE pBoard, LPBIOSREGS pBiosRegs) +{ + ASSERT_HANDLER(pBoard); + + return 1; +} + + +/******************************************************************************\ + + Function : ClientReadDDCEdid + + Description : Not implemented. + + I/O Desc. : LPBOARDHANDLE pBoard | Handle to the board structure + containing all the information about a specific board. + LPBIOSREGS pBiosRegs | Pointor to the Bios register + structure. + + Return Val : ULONG + +\******************************************************************************/ +ULONG ClientReadDDCEdid(LPBOARDHANDLE pBoard, LPUCHAR pEdid, + ULONG ulMonitorIndex) +{ + ASSERT_HANDLER(pBoard); + + return 1; +} + + +/******************************************************************************\ + + Function : ClientCustomCall + + Description : Not implemented. + + I/O Desc. : LPBOARDHANDLE pBoard | Handle to the board structure + containing all the information about a specific board. + LPBIOSREGS pBiosRegs | Pointor to the Bios register + structure. + + Return Val : ULONG + +\******************************************************************************/ +ULONG ClientCustomCall(LPBOARDHANDLE pBoard, ULONG ulServiceNumber, + LPVOID pInData, LPVOID pOutData) +{ + ASSERT_HANDLER(pBoard); + + return 1; +} + + +/******************************************************************************\ + + Function : ClientApplyEpromPatch + + Description : Not implemented. + + I/O Desc. : LPBOARDHANDLE pBoard | Handle to the board structure + containing all the information about a specific board. + LPBIOSREGS pBiosRegs | Pointor to the Bios register + structure. + + Return Val : ULONG + +\******************************************************************************/ +ULONG ClientApplyEpromPatch(LPBOARDHANDLE pBoard) +{ + ASSERT_HANDLER(pBoard); + + return 1; +} + + +/******************************************************************************\ + + Function : ClientDetectHostInterface + + Description : Not implemented. + + I/O Desc. : LPBOARDHANDLE pBoard | Handle to the board structure + containing all the information about a specific board. + LPBIOSREGS pBiosRegs | Pointor to the Bios register + structure. + + Return Val : ULONG + +\******************************************************************************/ +ULONG ClientDetectHostInterface(LPBOARDHANDLE pBoard, LPULONG pulData) +{ + ASSERT_HANDLER(pBoard); + + return 1; +} + diff --git a/driver/xf86-video-mga/src/mga.h b/driver/xf86-video-mga/src/mga.h new file mode 100644 index 000000000..04624a9ce --- /dev/null +++ b/driver/xf86-video-mga/src/mga.h @@ -0,0 +1,746 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga.h,v 1.87tsi Exp $ */ +/* + * MGA Millennium (MGA2064W) functions + * + * Copyright 1996 The XFree86 Project, Inc. + * + * Authors + * Dirk Hohndel + * hohndel@XFree86.Org + * David Dawes + * dawes@XFree86.Org + */ + +#ifndef MGA_H +#define MGA_H + +#include <string.h> +#include <stdio.h> + +#include "compiler.h" +#include "xaa.h" +#include "exa.h" +#include "xf86Cursor.h" +#include "vgaHW.h" +#include "colormapst.h" +#include "xf86DDC.h" +#include "xf86xv.h" + +#ifdef XF86DRI +#include "xf86drm.h" + +#define _XF86DRI_SERVER_ +#include "mga_dripriv.h" +#include "dri.h" +#include "GL/glxint.h" + +#include "dri.h" + +#include "GL/glxint.h" +#include "mga_dri.h" +#endif + +#ifdef USEMGAHAL +#include "client.h" +#endif + +typedef enum { + OPTION_SW_CURSOR, + OPTION_HW_CURSOR, + OPTION_PCI_RETRY, + OPTION_SYNC_ON_GREEN, + OPTION_NOACCEL, + OPTION_SHOWCACHE, + OPTION_OVERLAY, + OPTION_MGA_SDRAM, + OPTION_SHADOW_FB, + OPTION_FBDEV, + OPTION_COLOR_KEY, + OPTION_SET_MCLK, + OPTION_OVERCLOCK_MEM, + OPTION_VIDEO_KEY, + OPTION_ROTATE, + OPTION_TEXTURED_VIDEO, + OPTION_CRTC2HALF, + OPTION_CRTC2RAM, + OPTION_INT10, + OPTION_AGP_MODE, + OPTION_AGP_SIZE, + OPTION_DIGITAL1, + OPTION_DIGITAL2, + OPTION_TV, + OPTION_TVSTANDARD, + OPTION_CABLETYPE, + OPTION_USEIRQZERO, + OPTION_NOHAL, + OPTION_SWAPPED_HEAD, + OPTION_DRI, + OPTION_MERGEDFB, + OPTION_HSYNC2, + OPTION_VREFRESH2, + OPTION_MONITOR2POS, + OPTION_METAMODES, + OPTION_OLDDMA, + OPTION_PCIDMA, + OPTION_ACCELMETHOD +} MGAOpts; + + +#if !defined(EXTRADEBUG) +#define INREG8(addr) MMIO_IN8(pMga->IOBase, addr) +#define INREG16(addr) MMIO_IN16(pMga->IOBase, addr) +#define INREG(addr) MMIO_IN32(pMga->IOBase, addr) +#define OUTREG8(addr, val) MMIO_OUT8(pMga->IOBase, addr, val) +#define OUTREG16(addr, val) MMIO_OUT16(pMga->IOBase, addr, val) +#define OUTREG(addr, val) MMIO_OUT32(pMga->IOBase, addr, val) +#else /* !EXTRADEBUG */ +CARD8 MGAdbg_inreg8(ScrnInfoPtr, int, int, char*); +CARD16 MGAdbg_inreg16(ScrnInfoPtr, int, int, char*); +CARD32 MGAdbg_inreg32(ScrnInfoPtr, int, int, char*); +void MGAdbg_outreg8(ScrnInfoPtr, int, int, char*); +void MGAdbg_outreg16(ScrnInfoPtr, int,int, char*); +void MGAdbg_outreg32(ScrnInfoPtr, int,int, char*); +#ifndef __GNUC__ +# define MGA_STRINGIZE(x) #x +# define MGA_STRINGIFY(x) MGA_STRINGIZE(x) +# define __FUNCTION__ MGA_STRINGIFY(__FILE__) ", line " MGA_STRINGIFY(__LINE__) +#endif +#define INREG8(addr) MGAdbg_inreg8(pScrn, addr, 1, __FUNCTION__) +#define INREG16(addr) MGAdbg_inreg16(pScrn, addr, 1, __FUNCTION__) +#define INREG(addr) MGAdbg_inreg32(pScrn, addr, 1, __FUNCTION__) +#define OUTREG8(addr,val) MGAdbg_outreg8(pScrn, addr, val, __FUNCTION__) +#define OUTREG16(addr,val) MGAdbg_outreg16(pScrn, addr, val, __FUNCTION__) +#define OUTREG(addr,val) MGAdbg_outreg32(pScrn, addr, val, __FUNCTION__) +#endif /* EXTRADEBUG */ + +#ifndef PCI_CHIP_MGAG200_SE_A_PCI +#define PCI_CHIP_MGAG200_SE_A_PCI 0x0522 +#endif + +#ifndef PCI_CHIP_MGAG200_SE_B_PCI +#define PCI_CHIP_MGAG200_SE_B_PCI 0x0524 +#endif + +/* + * Read/write to the DAC via MMIO + */ + +/* + * These were functions. Use macros instead to avoid the need to + * pass pMga to them. + */ + +#define inMGAdreg(reg) INREG8(RAMDAC_OFFSET + (reg)) + +#define outMGAdreg(reg, val) OUTREG8(RAMDAC_OFFSET + (reg), val) + +#define inMGAdac(reg) \ + (outMGAdreg(MGA1064_INDEX, reg), inMGAdreg(MGA1064_DATA)) + +#define outMGAdac(reg, val) \ + (outMGAdreg(MGA1064_INDEX, reg), outMGAdreg(MGA1064_DATA, val)) + +#define outMGAdacmsk(reg, mask, val) \ + do { /* note: mask and reg may get evaluated twice */ \ + unsigned char tmp = (mask) ? (inMGAdac(reg) & (mask)) : 0; \ + outMGAdreg(MGA1064_INDEX, reg); \ + outMGAdreg(MGA1064_DATA, tmp | (val)); \ + } while (0) + +#define PORT_OFFSET (0x1F00 - 0x300) + +#define MGA_VERSION 4000 +#define MGA_NAME "MGA" +#define MGA_C_NAME MGA +#define MGA_MODULE_DATA mgaModuleData +#define MGA_DRIVER_NAME "mga" +#define MGA_MAJOR_VERSION 1 +#define MGA_MINOR_VERSION 4 +#define MGA_PATCHLEVEL 4 + +typedef struct { + unsigned char ExtVga[6]; + unsigned char DacClk[6]; + unsigned char * DacRegs; + unsigned long crtc2[0x58]; + unsigned char dac2[0x21]; + CARD32 Option; + CARD32 Option2; + CARD32 Option3; + long Clock; + Bool PIXPLLCSaved; +} MGARegRec, *MGARegPtr; + +/* For programming the second CRTC */ +typedef struct { + CARD32 ulDispWidth; /* Display Width in pixels*/ + CARD32 ulDispHeight; /* Display Height in pixels*/ + CARD32 ulBpp; /* Bits Per Pixels / input format*/ + CARD32 ulPixClock; /* Pixel Clock in kHz*/ + CARD32 ulHFPorch; /* Horizontal front porch in pixels*/ + CARD32 ulHSync; /* Horizontal Sync in pixels*/ + CARD32 ulHBPorch; /* Horizontal back porch in pixels*/ + CARD32 ulVFPorch; /* Vertical front porch in lines*/ + CARD32 ulVSync; /* Vertical Sync in lines*/ + CARD32 ulVBPorch; /* Vertical back Porch in lines*/ + CARD32 ulFBPitch; /* Pitch*/ + CARD32 flSignalMode; /* Signal Mode*/ +} xMODEINFO; + + +typedef struct { + int brightness; + int contrast; + Bool doubleBuffer; + unsigned char currentBuffer; + RegionRec clip; + CARD32 colorKey; + CARD32 videoStatus; + Time offTime; + Time freeTime; + int lastPort; + +#ifdef USE_EXA + int size; + ExaOffscreenArea *off_screen; +#endif + + void *video_memory; + int video_offset; +} MGAPortPrivRec, *MGAPortPrivPtr; + +typedef struct { + Bool isHwCursor; + int CursorMaxWidth; + int CursorMaxHeight; + int CursorFlags; + int CursorOffscreenMemSize; + Bool (*UseHWCursor)(ScreenPtr, CursorPtr); + void (*LoadCursorImage)(ScrnInfoPtr, unsigned char*); + void (*ShowCursor)(ScrnInfoPtr); + void (*HideCursor)(ScrnInfoPtr); + void (*SetCursorPosition)(ScrnInfoPtr, int, int); + void (*SetCursorColors)(ScrnInfoPtr, int, int); + long maxPixelClock; + long MemoryClock; + MessageType ClockFrom; + MessageType MemClkFrom; + Bool SetMemClk; + void (*LoadPalette)(ScrnInfoPtr, int, int*, LOCO*, VisualPtr); + void (*RestorePalette)(ScrnInfoPtr, unsigned char *); + void (*PreInit)(ScrnInfoPtr); + void (*Save)(ScrnInfoPtr, vgaRegPtr, MGARegPtr, Bool); + void (*Restore)(ScrnInfoPtr, vgaRegPtr, MGARegPtr, Bool); + Bool (*ModeInit)(ScrnInfoPtr, DisplayModePtr); +} MGARamdacRec, *MGARamdacPtr; + + +typedef struct { + int bitsPerPixel; + int depth; + int displayWidth; + rgb weight; + Bool Overlay8Plus24; + DisplayModePtr mode; +} MGAFBLayout; + +/* Card-specific driver information */ + +typedef struct { + Bool update; + unsigned char red; + unsigned char green; + unsigned char blue; +} MGAPaletteInfo; + +#define MGAPTR(p) ((MGAPtr)((p)->driverPrivate)) + +/*avoids segfault by returning false if pMgaHwInfo not defined*/ +#define ISDIGITAL1(p) (p->pMgaHwInfo && ((p->pMgaHwInfo->ulCapsFirstOutput) & MGAHWINFOCAPS_OUTPUT_DIGITAL)) +#define ISDIGITAL2(p) (p->pMgaHwInfo && ((p->pMgaHwInfo->ulCapsSecondOutput) & MGAHWINFOCAPS_OUTPUT_DIGITAL)) +#define ISTV1(p) (p->pMgaHwInfo && ((p->pMgaHwInfo->ulCapsFirstOutput) & MGAHWINFOCAPS_OUTPUT_TV)) +#define ISTV2(p) (p->pMgaHwInfo && ((p->pMgaHwInfo->ulCapsSecondOutput) & MGAHWINFOCAPS_OUTPUT_TV)) + +#ifdef DISABLE_VGA_IO +typedef struct mgaSave { + pciVideoPtr pvp; + Bool enable; +} MgaSave, *MgaSavePtr; +#endif + + +typedef enum { + mgaLeftOf, + mgaRightOf, + mgaAbove, + mgaBelow, + mgaClone +} MgaScrn2Rel; + +typedef struct { + int lastInstance; +#ifdef USEMGAHAL + LPCLIENTDATA pClientStruct; + LPBOARDHANDLE pBoard; + LPMGAHWINFO pMgaHwInfo; +#endif + int refCount; + CARD32 masterFbAddress; + long masterFbMapSize; + CARD32 slaveFbAddress; + long slaveFbMapSize; + int mastervideoRam; + int slavevideoRam; + Bool directRenderingEnabled; + ScrnInfoPtr pScrn_1; + ScrnInfoPtr pScrn_2; +} MGAEntRec, *MGAEntPtr; + +/** + * Track the range of a voltage controlled osciliator (VCO). + */ +struct mga_VCO { + /** + * Minimum selectable frequency for this VCO, measured in kHz. + */ + unsigned min_freq; + + /** + * Maximum selectable frequency for this VCO, measured in kHz. + * + * If this value is zero, then the VCO is not available. + */ + unsigned max_freq; +}; + +/** + * Host interface types that can be set by the card's BIOS. + */ +typedef enum { + MGA_HOST_UNKNOWN0 = 0, /**< Meaning unknown. */ + MGA_HOST_UNKNOWN1 = 1, /**< Meaning unknown. */ + MGA_HOST_UNKNOWN2 = 2, /**< Meaning unknown. */ + MGA_HOST_HYBRID = 3, /**< AGP 4x for data xfers only. */ + + /** + * PCI interface. Either native or via a universal PCI-to-PCI bridge + * chip. The PCI G450 and PCI G550 cards are examples. + */ + MGA_HOST_PCI = 4, + + MGA_HOST_AGP_1x = 5, /**< AGP 1x capable. */ + MGA_HOST_AGP_2x = 6, /**< AGP 2x capable. */ + MGA_HOST_AGP_4x = 7 /**< AGP 4x capable. */ +} mga_host_t; + +/** + * Card information derrived from BIOS PInS data. + */ +struct mga_bios_values { + /** + * \name Voltage Controlled Oscilators + * \brief Track information about the various VCOs. + * + * MGA cards have between one and three VCOs that can be used to drive the + * various clocks. On older cards, only \c mga_bios_values::pixel VCO is + * available. On newer cards, such as the G450 and G550, all three are + * available. If \c mga_VCO::max_freq is zero, the VCO is not available. + */ + /*@{*/ + struct mga_VCO system; /**< System VCO. */ + struct mga_VCO pixel; /**< Pixel VCO. */ + struct mga_VCO video; /**< Video VCO. */ + /*@}*/ + + /** + * Memory clock speed, measured in kHz. + */ + unsigned mem_clock; + + /** + * PLL reference frequency value. On older cards this is ~14MHz, and on + * newer cards it is ~27MHz. + */ + unsigned pll_ref_freq; + + /** + * Some older MGA cards have a "fast bitblt" mode. This is determined + * by a capability bit stored in the PInS data. + */ + Bool fast_bitblt; + + /** + * Type of physical interface used for the card. + */ + mga_host_t host_interface; +}; + + +typedef struct { +#ifdef USEMGAHAL + LPCLIENTDATA pClientStruct; + LPBOARDHANDLE pBoard; + LPMGAMODEINFO pMgaModeInfo; + LPMGAHWINFO pMgaHwInfo; +#endif + EntityInfoPtr pEnt; + struct mga_bios_values bios; + CARD8 BiosOutputMode; + pciVideoPtr PciInfo; + PCITAG PciTag; + xf86AccessRec Access; + int Chipset; + int ChipRev; + + int is_Gx50:1; + int is_G200SE:1; + int is_HAL_chipset:1; + + Bool Primary; + Bool Interleave; + int HwBpp; + int Roundings[4]; + int BppShifts[4]; + Bool HasFBitBlt; + Bool OverclockMem; + int YDstOrg; + int DstOrg; + int SrcOrg; + unsigned long IOAddress; + unsigned long FbAddress; + unsigned long ILOADAddress; + int FbBaseReg; + unsigned long BiosAddress; + MessageType BiosFrom; + unsigned char * IOBase; + unsigned char * FbBase; + unsigned char * ILOADBase; + unsigned char * FbStart; + long FbMapSize; + long FbUsableSize; + long FbCursorOffset; + MGARamdacRec Dac; + Bool HasSDRAM; + Bool NoAccel; + Bool Exa; + ExaDriverPtr ExaDriver; + Bool SyncOnGreen; + Bool Dac6Bit; + Bool HWCursor; + Bool UsePCIRetry; + Bool ShowCache; + Bool Overlay8Plus24; + Bool ShadowFB; + unsigned char * ShadowPtr; + int ShadowPitch; + int MemClk; + int MinClock; + int MaxClock; + MGARegRec SavedReg; + MGARegRec ModeReg; + int MaxFastBlitY; + CARD32 BltScanDirection; + CARD32 FilledRectCMD; + CARD32 SolidLineCMD; + CARD32 PatternRectCMD; + CARD32 DashCMD; + CARD32 NiceDashCMD; + CARD32 AccelFlags; + CARD32 PlaneMask; + CARD32 FgColor; + CARD32 BgColor; + CARD32 MAccess; + int FifoSize; + int StyleLen; + XAAInfoRecPtr AccelInfoRec; + xf86CursorInfoPtr CursorInfoRec; + DGAModePtr DGAModes; + int numDGAModes; + Bool DGAactive; + int DGAViewportStatus; + CARD32 *Atype; + CARD32 *AtypeNoBLK; + void (*PreInit)(ScrnInfoPtr pScrn); + void (*Save)(ScrnInfoPtr, vgaRegPtr, MGARegPtr, Bool); + void (*Restore)(ScrnInfoPtr, vgaRegPtr, MGARegPtr, Bool); + Bool (*ModeInit)(ScrnInfoPtr, DisplayModePtr); + void (*PointerMoved)(int index, int x, int y); + CloseScreenProcPtr CloseScreen; + ScreenBlockHandlerProcPtr BlockHandler; + unsigned int (*ddc1Read)(ScrnInfoPtr); + void (*DDC1SetSpeed)(ScrnInfoPtr, xf86ddcSpeed); + Bool (*i2cInit)(ScrnInfoPtr); + I2CBusPtr DDC_Bus1; + I2CBusPtr DDC_Bus2; + I2CBusPtr Maven_Bus; + I2CDevPtr Maven; + char Maven_Version; + Bool UseMaven; + Bool UseMavenPM; + Bool FBDev; + int colorKey; + int videoKey; + int fifoCount; + int Rotate; + MGAFBLayout CurrentLayout; + Bool DrawTransparent; + int MaxBlitDWORDS; + Bool TexturedVideo; + MGAPortPrivPtr portPrivate; + unsigned char *ScratchBuffer; + unsigned char *ColorExpandBase; + int expandRows; + int expandDWORDs; + int expandRemaining; + int expandHeight; + int expandY; +#ifdef XF86DRI + Bool directRenderingEnabled; + DRIInfoPtr pDRIInfo; + int drmFD; + int numVisualConfigs; + __GLXvisualConfig* pVisualConfigs; + MGAConfigPrivPtr pVisualConfigsPriv; + MGADRIServerPrivatePtr DRIServerInfo; + + MGARegRec DRContextRegs; + + Bool haveQuiescense; + void (*GetQuiescence)(ScrnInfoPtr pScrn); + + int agpMode; + int agpSize; + + int irq; + CARD32 reg_ien; + + Bool useOldDmaInit; + Bool forcePciDma; +#endif + XF86VideoAdaptorPtr adaptor; + Bool DualHeadEnabled; + Bool Crtc2IsTV; + Bool SecondCrtc; + Bool SecondOutput; + + GDevPtr device; + /* The hardware's real SrcOrg */ + int realSrcOrg; + MGAEntPtr entityPrivate; + void (*SetupForSolidFill)(ScrnInfoPtr pScrn, int color, + int rop, unsigned int planemask); + void (*SubsequentSolidFillRect)(ScrnInfoPtr pScrn, + int x, int y, int w, int h); + void (*RestoreAccelState)(ScrnInfoPtr pScrn); + int allowedWidth; + void (*VideoTimerCallback)(ScrnInfoPtr, Time); + void (*PaletteLoadCallback)(ScrnInfoPtr); + void (*RenderCallback)(ScrnInfoPtr); + Time RenderTime; + MGAPaletteInfo palinfo[256]; /* G400 hardware bug workaround */ + FBLinearPtr LinearScratch; + Bool softbooted; +#ifdef USEMGAHAL + Bool HALLoaded; +#endif + OptionInfoPtr Options; + + /* Exa */ + PicturePtr currentSrcPicture; + PicturePtr currentMaskPicture; + PixmapPtr currentSrc; + PixmapPtr currentMask; + int src_w2; + int src_h2; + int mask_w2; + int mask_h2; + CARD32 src_pitch; /* FIXME kill me */ + +/* Merged Framebuffer data */ + Bool MergedFB; + + /* Real values specific to monitor1, since the original ones are replaced */ + DisplayModePtr M1modes; /* list of actual modes */ + DisplayModePtr M1currentMode; /* current mode */ + int M1frameX0; /* viewport position */ + int M1frameY0; + int M1frameX1; + int M1frameY1; + + ScrnInfoPtr pScrn2; /*pointer to second CRTC screeninforec, + if in merged mode */ +/* End of Merged Framebuffer Data */ + int HALGranularityOffX, HALGranularityOffY; +} MGARec, *MGAPtr; + +extern CARD32 MGAAtype[16]; +extern CARD32 MGAAtypeNoBLK[16]; + +#define USE_RECTS_FOR_LINES 0x00000001 +#define FASTBLT_BUG 0x00000002 +#define CLIPPER_ON 0x00000004 +#define BLK_OPAQUE_EXPANSION 0x00000008 +#define TRANSC_SOLID_FILL 0x00000010 +#define NICE_DASH_PATTERN 0x00000020 +#define TWO_PASS_COLOR_EXPAND 0x00000040 +#define MGA_NO_PLANEMASK 0x00000080 +#define USE_LINEAR_EXPANSION 0x00000100 +#define LARGE_ADDRESSES 0x00000200 + +#define MGAIOMAPSIZE 0x00004000 +#define MGAILOADMAPSIZE 0x00400000 + +#define TRANSPARENCY_KEY 255 +#define KEY_COLOR 0 + + +/* Prototypes */ + +void MGAAdjustFrame(int scrnIndex, int x, int y, int flags); +Bool MGASwitchMode(int scrnIndex, DisplayModePtr mode, int flags); +void MGAFillModeInfoStruct(ScrnInfoPtr pScrn, DisplayModePtr mode); +Bool MGAGetRec(ScrnInfoPtr pScrn); +void MGAProbeDDC(ScrnInfoPtr pScrn, int index); +void MGASoftReset(ScrnInfoPtr pScrn); +void MGAFreeRec(ScrnInfoPtr pScrn); +Bool mga_read_and_process_bios(ScrnInfoPtr pScrn); +void MGADisplayPowerManagementSet(ScrnInfoPtr pScrn, int PowerManagementMode, + int flags); +void MGAAdjustFrameCrtc2(int scrnIndex, int x, int y, int flags); +void MGADisplayPowerManagementSetCrtc2(ScrnInfoPtr pScrn, + int PowerManagementMode, + int flags); +void MGAAdjustGranularity(ScrnInfoPtr pScrn, int* x, int* y); + + +void MGA2064SetupFuncs(ScrnInfoPtr pScrn); +void MGAGSetupFuncs(ScrnInfoPtr pScrn); + +/* #ifdef USE_XAA */ +void MGAStormSync(ScrnInfoPtr pScrn); +void MGAStormEngineInit(ScrnInfoPtr pScrn); +Bool MGAStormAccelInit(ScreenPtr pScreen); +Bool mgaAccelInit(ScreenPtr pScreen); +/* #endif */ + +#ifdef USE_EXA +Bool mgaExaInit(ScreenPtr pScreen); +#endif + +Bool MGAHWCursorInit(ScreenPtr pScreen); + + +void MGAPolyArcThinSolid(DrawablePtr, GCPtr, int, xArc*); + +Bool MGADGAInit(ScreenPtr pScreen); + +void MGARefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox); +void MGARefreshArea8(ScrnInfoPtr pScrn, int num, BoxPtr pbox); +void MGARefreshArea16(ScrnInfoPtr pScrn, int num, BoxPtr pbox); +void MGARefreshArea24(ScrnInfoPtr pScrn, int num, BoxPtr pbox); +void MGARefreshArea32(ScrnInfoPtr pScrn, int num, BoxPtr pbox); + +void mgaDoSetupForScreenToScreenCopy( ScrnInfoPtr pScrn, int xdir, + int ydir, int rop, unsigned int planemask, int trans, unsigned int bpp ); + +void mgaDoSetupForSolidFill( ScrnInfoPtr pScrn, int color, int rop, + unsigned int planemask, unsigned int bpp ); + +void MGAPointerMoved(int index, int x, int y); + +void MGAInitVideo(ScreenPtr pScreen); +void MGAResetVideo(ScrnInfoPtr pScrn); + +#ifdef XF86DRI + +#define MGA_FRONT 0x1 +#define MGA_BACK 0x2 +#define MGA_DEPTH 0x4 + +Bool MGADRIScreenInit( ScreenPtr pScreen ); +void MGADRICloseScreen( ScreenPtr pScreen ); +Bool MGADRIFinishScreenInit( ScreenPtr pScreen ); + +Bool MGALockUpdate( ScrnInfoPtr pScrn, drmLockFlags flags ); + +void MGAGetQuiescence( ScrnInfoPtr pScrn ); +void MGAGetQuiescenceShared( ScrnInfoPtr pScrn ); + +void MGASelectBuffer(ScrnInfoPtr pScrn, int which); +Bool MgaCleanupDma(ScrnInfoPtr pScrn); +Bool MgaInitDma(ScrnInfoPtr pScrn, int prim_size); + +#define MGA_AGP_1X_MODE 0x01 +#define MGA_AGP_2X_MODE 0x02 +#define MGA_AGP_4X_MODE 0x04 +#define MGA_AGP_MODE_MASK 0x07 + +#endif + +Bool MGAMavenRead(ScrnInfoPtr pScrn, I2CByte reg, I2CByte *val); + +void MGACRTC2Set(ScrnInfoPtr pScrn, xMODEINFO *pModeInfo); +void MGAEnableSecondOutPut(ScrnInfoPtr pScrn, xMODEINFO *pModeInfo); +void MGACRTC2SetPitch(ScrnInfoPtr pSrcn, xMODEINFO *pModeInfo); +void MGACRTC2SetDisplayStart(ScrnInfoPtr pScrn, xMODEINFO *pModeInfo, CARD32 base, CARD32 ulX, CARD32 ulY); + +void MGACRTC2Get(ScrnInfoPtr pScrn, xMODEINFO *pModeInfo); +void MGACRTC2GetPitch(ScrnInfoPtr pSrcn, xMODEINFO *pModeInfo); +void MGACRTC2GetDisplayStart(ScrnInfoPtr pScrn, xMODEINFO *pModeInfo, CARD32 base, CARD32 ulX, CARD32 ulY); + +double MGAG450SetPLLFreq(ScrnInfoPtr pScrn, long f_out); +#ifdef DEBUG +void MGAG450PrintPLL(ScrnInfoPtr pScrn); +#endif +long MGAG450SavePLLFreq(ScrnInfoPtr pScrn); +void MGAprintDac(ScrnInfoPtr pScrn); +void MGAG200SESaveFonts(ScrnInfoPtr, vgaRegPtr); +void MGAG200SERestoreFonts(ScrnInfoPtr, vgaRegPtr); + +#ifdef USEMGAHAL +/************ ESC Call Definition ***************/ +typedef struct { + char *function; + void (*funcptr)(ScrnInfoPtr pScrn, unsigned long *param, char *out, DisplayModePtr pMode); +} MGAEscFuncRec, *MGAEscFuncPtr; + +typedef struct { + char function[32]; + unsigned long parameters[32]; +} EscCmdStruct; + +extern LPMGAMODEINFO pMgaModeInfo[2]; +extern MGAMODEINFO TmpMgaModeInfo[2]; + +extern void MGAExecuteEscCmd(ScrnInfoPtr pScrn, char *cmdline , char *sResult, DisplayModePtr pMode); +void MGAFillDisplayModeStruct(DisplayModePtr pMode, LPMGAMODEINFO pModeInfo); +/************************************************/ +#endif + +static __inline__ void +MGA_MARK_SYNC(MGAPtr pMga, ScrnInfoPtr pScrn) +{ +#ifdef USE_EXA + if (pMga->Exa) + exaMarkSync(pScrn->pScreen); +#endif +#ifdef USE_XAA + if (!pMga->Exa) + SET_SYNC_FLAG(pMga->AccelInfoRec); +#endif +} + +static __inline__ void +MGA_SYNC(MGAPtr pMga, ScrnInfoPtr pScrn) +{ +#ifdef USE_EXA + if (pMga->Exa) + exaWaitSync(pScrn->pScreen); +#endif +#ifdef USE_XAA + if (!pMga->Exa && pMga->AccelInfoRec && pMga->AccelInfoRec->NeedToSync) + pMga->AccelInfoRec->Sync(pScrn); +#endif +} + +#endif diff --git a/driver/xf86-video-mga/src/mga_arc.c b/driver/xf86-video-mga/src/mga_arc.c new file mode 100644 index 000000000..00b0e54e0 --- /dev/null +++ b/driver/xf86-video-mga/src/mga_arc.c @@ -0,0 +1,228 @@ +/************************************************************ + +Copyright 1989, 1998 The Open Group + +Permission to use, copy, modify, distribute, and sell this software and its +documentation for any purpose is hereby granted without fee, provided that +the above copyright notice appear in all copies and that both that +copyright notice and this permission notice appear in supporting +documentation. + +The above copyright notice and this permission notice shall be included in +all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +OPEN GROUP BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN +AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN +CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + +Except as contained in this notice, the name of The Open Group shall not be +used in advertising or otherwise to promote the sale, use or other dealings +in this Software without prior written authorization from The Open Group. + +********************************************************/ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_arc.c,v 1.12tsi Exp $ */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include <limits.h> +#include <X11/X.h> +#include "gcstruct.h" +#include "windowstr.h" +#include "pixmapstr.h" +#include "regionstr.h" +#include <X11/Xprotostr.h> +#include "regionstr.h" +#include "mizerarc.h" +#include "mi.h" +#include "scrnintstr.h" +#include "xaa.h" +#include "xaalocal.h" +#include "xf86.h" +#include "xf86_OSproc.h" + +#include "xf86Pci.h" + +#include "mga.h" +#include "mga_reg.h" +#include "mga_macros.h" + + +/* + This is only faster than cfb for stuff other than GXcopy. + And even then, only when pci_retries are on. +*/ + + +#define DRAW_POINT(x, y) { \ + tmp = x; \ + OUTREG(MGAREG_FXBNDRY, (tmp) | (((tmp) + 1) << 16)); \ + OUTREG(MGAREG_YDSTLEN + MGAREG_EXEC, ((y) << 16) | 1); \ +} + +static void +MGAZeroArc( + DrawablePtr pDraw, + GCPtr pGC, + xArc *arc +){ + int yoffset, dyoffset, x, y, a, b, d, mask, k1, k3, dx, dy, tmp; + XAAInfoRecPtr infoRec = GET_XAAINFORECPTR_FROM_GC(pGC); + ScrnInfoPtr pScrn = infoRec->pScrn; + MGAPtr pMga = MGAPTR(pScrn); + miZeroArcRec info; + Bool do360; + DDXPointRec org, orgo; + + CHECK_DMA_QUIESCENT( pMga, infoRec->pScrn ); + + (*infoRec->SetupForSolidFill)(infoRec->pScrn, pGC->fgPixel, + pGC->alu, pGC->planemask); + + do360 = miZeroArcSetup(arc, &info, TRUE); + org.y = info.yorg + pDraw->y; + org.x = 0; + orgo.y = info.yorgo + pDraw->y; + orgo.x = 0; + info.xorg += pDraw->x; + info.xorgo += pDraw->x; + + MIARCSETUP(); + yoffset = y ? 1 : 0; + dyoffset = 0; + mask = info.initialMask; + if (!(arc->width & 1)) { + WAITFIFO(4); + if (mask & 2) + DRAW_POINT(info.xorgo, org.y); + if (mask & 8) + DRAW_POINT(info.xorgo, orgo.y); + } + if (!info.end.x || !info.end.y) { + mask = info.end.mask; + info.end = info.altend; + } + if (do360 && (arc->width == arc->height) && !(arc->width & 1)) { + int xoffset = 1; + DDXPointRec orghb, orgohb; + + orghb.y = org.y + info.h; + orghb.x = org.x + info.xorg; + orgohb.y = orghb.y; + orgohb.x = orghb.x - info.h; + + org.x += info.xorg; + orgo.x += info.xorg; + orghb.x += info.h; + while (1) { + WAITFIFO(16); + DRAW_POINT(org.x + x, org.y + yoffset); + DRAW_POINT(org.x - x, org.y + yoffset); + DRAW_POINT(orgo.x - x, orgo.y - yoffset); + DRAW_POINT(orgo.x + x, orgo.y - yoffset); + if (a < 0) break; + DRAW_POINT(orghb.x - y, orghb.y - xoffset); + DRAW_POINT(orgohb.x + y, orgohb.y - xoffset); + DRAW_POINT(orgohb.x + y, orgohb.y + xoffset); + DRAW_POINT(orghb.x - y, orghb.y + xoffset); + xoffset ++; + MIARCCIRCLESTEP(yoffset ++;); + } + org.x -= info.xorg; + orgo.x -= info.xorg; + x = info.w; + yoffset = info.h; + } + else if (do360) { + while (y < info.h || x < info.w) { + MIARCOCTANTSHIFT(dyoffset = 1;); + WAITFIFO(8); + DRAW_POINT(org.x + info.xorg + x, org.y + yoffset); + DRAW_POINT(org.x + info.xorgo - x, org.y + yoffset); + DRAW_POINT(orgo.x + info.xorgo - x, orgo.y - yoffset); + DRAW_POINT(orgo.x + info.xorg + x, orgo.y - yoffset); + MIARCSTEP(yoffset += dyoffset;, yoffset++;); + } + } + else { + while (y < info.h || x < info.w) { + MIARCOCTANTSHIFT(dyoffset = 1;); + if ((x == info.start.x) || (y == info.start.y)) { + mask = info.start.mask; + info.start = info.altstart; + } + WAITFIFO(8); + if (mask & 1) + DRAW_POINT(org.x + info.xorg + x, org.y + yoffset); + if (mask & 2) + DRAW_POINT(org.x + info.xorgo - x, org.y + yoffset); + if (mask & 4) + DRAW_POINT(orgo.x + info.xorgo - x, orgo.y - yoffset); + if (mask & 8) + DRAW_POINT(orgo.x + info.xorg + x, orgo.y - yoffset); + if ((x == info.end.x) || (y == info.end.y)) { + mask = info.end.mask; + info.end = info.altend; + } + MIARCSTEP(yoffset += dyoffset;, yoffset++;); + } + } + if ((x == info.start.x) || (y == info.start.y)) + mask = info.start.mask; + + WAITFIFO(4); + if (mask & 1) + DRAW_POINT(org.x + info.xorg + x, org.y + yoffset); + if (mask & 4) + DRAW_POINT(orgo.x + info.xorgo - x, orgo.y - yoffset); + if (arc->height & 1) { + WAITFIFO(4); + if (mask & 2) + DRAW_POINT(org.x + info.xorgo - x, org.y + yoffset); + if (mask & 8) + DRAW_POINT(orgo.x + info.xorg + x, orgo.y - yoffset); + } + + SET_SYNC_FLAG(infoRec); +} + +void +MGAPolyArcThinSolid ( + DrawablePtr pDraw, + GCPtr pGC, + int narcs, + xArc *parcs +){ + xArc *arc; + BoxRec box; + int i, x2, y2; + RegionPtr cclip; + + cclip = pGC->pCompositeClip; + + if(!REGION_NUM_RECTS(cclip)) + return; + + for (arc = parcs, i = narcs; --i >= 0; arc++) { + if (miCanZeroArc(arc)) { + box.x1 = arc->x + pDraw->x; + box.y1 = arc->y + pDraw->y; + x2 = box.x1 + (int)arc->width + 1; + box.x2 = x2; + y2 = box.y1 + (int)arc->height + 1; + box.y2 = y2; + if ( (x2 <= SHRT_MAX) && (y2 <= SHRT_MAX) && + (RECT_IN_REGION(pDraw->pScreen, cclip, &box) == rgnIN) ) + MGAZeroArc (pDraw, pGC, arc); + else + miZeroPolyArc(pDraw, pGC, 1, arc); + } + else + miPolyArc(pDraw, pGC, 1, arc); + } +} + diff --git a/driver/xf86-video-mga/src/mga_bios.c b/driver/xf86-video-mga/src/mga_bios.c new file mode 100644 index 000000000..dd75f3f4d --- /dev/null +++ b/driver/xf86-video-mga/src/mga_bios.c @@ -0,0 +1,573 @@ +/* + * (C) Copyright IBM Corporation 2005 + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * IBM AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +/** + * \file mga_bios.c + * Routines for processing the PInS data stored in the MGA BIOS. + * + * The structure of this code was inspired by similar routines in the Linux + * kernel matroxfb code. Specifically, the routines in matroxfb_misc.c. In + * addition, that code was used in place of documentation about the structure + * of the PInS data for non-G450 cards. + * + * \author Ian Romanick <idr@us.ibm.com> + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +/* All drivers should typically include these */ +#include "xf86.h" +#include "xf86_OSproc.h" +#include "xf86Resources.h" + +/* All drivers need this */ + +#include "compiler.h" + +/* Drivers for PCI hardware need this */ +#include "xf86PciInfo.h" + +/* Drivers that need to access the PCI config space directly need this */ +#include "xf86Pci.h" + +#include <X11/Xmd.h> + +#include "mga.h" + +#if defined(DEBUG) +#define BIOS_DEBUG +#endif + +/** + * Read a little-endian, unaligned data value and return as 16-bit. + */ +static __inline__ CARD16 get_u16( const CARD8 * data ) +{ + CARD16 temp; + + temp = data[1]; + temp <<= 8; + temp += data[0]; + return temp; +} + + +/** + * Read a little-endian, unaligned data value and return as 32-bit. + */ +static __inline__ CARD32 get_u32( const CARD8 * data ) +{ + CARD32 temp; + + + temp = data[3]; + temp <<= 8; + temp += data[2]; + temp <<= 8; + temp += data[1]; + temp <<= 8; + temp += data[0]; + + return temp; +} + + +/** + * Initialize reasonable defaults for values that normally come form the BIOS. + * + * For each generation of hardware, provide reasonable default values, based + * on the type of hardware and chipset revision, for various values that are + * normally read from the PInS structure in the BIOS. This provides a backup + * in case the PInS structure cannot be found. + * + * \param pMga Pointer to the MGA-private data. + * \param bios Pointer to the structure that holds values read from the BIOS. + * + * \todo + * Determine if different default values should be used for G400 and G450 + * cards. These cards have the same PCI ID, but can be identified by a + * different chip revision. The G450 cards have a revision of 3 or higher. + */ + +static void mga_initialize_bios_values( MGAPtr pMga, + struct mga_bios_values * bios ) +{ + (void) memset( bios, 0, sizeof( *bios ) ); + + bios->pixel.min_freq = 50000; + + switch( pMga->Chipset ) { + case PCI_CHIP_MGA2064: + case PCI_CHIP_MGA2164: + case PCI_CHIP_MGA2164_AGP: + bios->pixel.max_freq = 220000; + + bios->pll_ref_freq = 14318; + bios->mem_clock = 50000; + + bios->host_interface = (pMga->Chipset == PCI_CHIP_MGA2164_AGP) + ? MGA_HOST_AGP_1x : MGA_HOST_PCI; + break; + + case PCI_CHIP_MGA1064: + /* There used to be code in MGARamdacInit (mga_dacG.c) that would + * set this to 170000 if the chip revision was less than 3. Is that + * needed here? + */ + + bios->system.max_freq = 230000; + bios->pixel.max_freq = 230000; + + bios->pll_ref_freq = 14318; + bios->mem_clock = 50000; + bios->host_interface = MGA_HOST_PCI; + break; + + case PCI_CHIP_MGAG200_SE_A_PCI: + case PCI_CHIP_MGAG200_SE_B_PCI: + bios->system.max_freq = 114000; + bios->system.min_freq = 50000; + bios->pixel.max_freq = 114000; + bios->pll_ref_freq = 27050; + bios->mem_clock = 45000; + bios->host_interface = MGA_HOST_PCI; + break; + + case PCI_CHIP_MGAG100_PCI: + case PCI_CHIP_MGAG100: + case PCI_CHIP_MGAG200_PCI: + case PCI_CHIP_MGAG200: + bios->system.max_freq = 230000; + bios->pixel.max_freq = 230000; + + bios->system.min_freq = 50000; + + bios->pll_ref_freq = 27050; + bios->mem_clock = 50000; + + if ( pMga->Chipset == PCI_CHIP_MGAG100 ) { + bios->host_interface = MGA_HOST_AGP_1x; + } + else if ( pMga->Chipset == PCI_CHIP_MGAG200 ) { + bios->host_interface = MGA_HOST_AGP_2x; + } + else { + bios->host_interface = MGA_HOST_PCI; + } + break; + + case PCI_CHIP_MGAG400: + bios->system.max_freq = 252000; + bios->pixel.max_freq = 252000; + + bios->system.min_freq = 50000; + + bios->pll_ref_freq = 27050; + bios->mem_clock = 200000; + bios->host_interface = MGA_HOST_AGP_4x; + break; + + case PCI_CHIP_MGAG550: + bios->system.min_freq = 256000; + bios->pixel.min_freq = 256000; + bios->video.min_freq = 256000; + bios->system.max_freq = 600000; + bios->pixel.max_freq = 600000; + bios->video.max_freq = 600000; + + bios->pll_ref_freq = 27050; + bios->mem_clock = 284000; + bios->host_interface = MGA_HOST_AGP_4x; + break; + } +} + + +/** + * Parse version 0x01XX of the BIOS PInS structure. + * + * Version 0x01XX of the BIOS PInS structure is only found in Millenium cards. + * + * \todo + * There used to be an "OverclockMem" option that would scale the memory clock + * by 12 instead 10. Add support for this back in. + */ +static void mga_parse_bios_ver_1( struct mga_bios_values * bios, + const CARD8 * bios_data ) +{ + unsigned maxdac; + + if ( get_u16( & bios_data[24] ) ) { + maxdac = get_u16( & bios_data[24] ) * 10; + } + else { + /* There is some disagreement here between the Linux kernel matroxfb + * driver and the old X.org mga driver. matroxfb has case-statements + * for 0 and 1 (with the values below), and the mga driver has + * case-statements for 1 and 2 (with the values below). The default + * value for the mga driver is 17500, but the default value for the + * matroxfb driver is 240000. + */ + + switch( bios_data[22] ) { + case 0: maxdac = 175000; break; + case 1: maxdac = 220000; break; + case 2: maxdac = 250000; break; + default: maxdac = 240000; break; + } + } + + if ( get_u16( & bios_data[28] ) ) { + bios->mem_clock = get_u16( & bios_data[28] ) * 10; + } + + if ( (bios_data[48] & 0x01) == 0 ) { + bios->fast_bitblt = TRUE; + } + + bios->pixel.max_freq = maxdac; +} + + +/** + * Parse version 0x02XX of the BIOS PInS structure. + * + * Version 0x02XX of the BIOS PInS structure is only found in Millenium II + * and Mystique cards. + */ +static void mga_parse_bios_ver_2( struct mga_bios_values * bios, + const CARD8 * bios_data ) +{ + if ( bios_data[41] != 0xff ) { + const unsigned maxdac = (bios_data[41] + 100) * 1000; + + bios->pixel.max_freq = maxdac; + bios->system.max_freq = maxdac; + } + + if ( bios_data[43] != 0xff ) { + const unsigned system_pll = (bios_data[43] + 100) * 1000; + bios->mem_clock = system_pll; + } +} + + +/** + * Parse version 0x03XX of the BIOS PInS structure. + * + * Version 0x03XX of the BIOS PInS structure is only found in G100 and G200 + * cards. + */ +static void mga_parse_bios_ver_3( struct mga_bios_values * bios, + const CARD8 * bios_data ) +{ + if ( bios_data[36] != 0xff ) { + const unsigned maxdac = (bios_data[36] + 100) * 1000; + + bios->pixel.max_freq = maxdac; + bios->system.max_freq = maxdac; + } + + if ( (bios_data[52] & 0x20) != 0 ) { + bios->pll_ref_freq = 14318; + } +} + + +/** + * Parse version 0x04XX of the BIOS PInS structure. + * + * Version 0x04XX of the BIOS PInS structure is only found in G400 cards. + */ +static void mga_parse_bios_ver_4( struct mga_bios_values * bios, + const CARD8 * bios_data ) +{ + if ( bios_data[39] != 0xff ) { + const unsigned maxdac = bios_data[39] * 4 * 1000; + + bios->pixel.max_freq = maxdac; + bios->system.max_freq = maxdac; + } + + if ( bios_data[38] != 0xff ) { + const unsigned maxdac = bios_data[38] * 4 * 1000; + + bios->system.max_freq = maxdac; + } + + if ( (bios_data[92] & 0x01) != 0 ) { + bios->pll_ref_freq = 14318; + } + + bios->host_interface = (bios_data[95] >> 3) & 0x07; + + if ( bios_data[65] != 0xff ) { + const unsigned system_pll = bios_data[65] * 4 * 1000; + bios->mem_clock = system_pll; + } +} + + +/** + * Parse version 0x05XX of the BIOS PInS structure. + * + * Version 0x05XX of the BIOS PInS structure is only found in G450 and G550 + * cards. + */ +static void mga_parse_bios_ver_5( struct mga_bios_values * bios, + const CARD8 * bios_data ) +{ + const unsigned scale = (bios_data[4] != 0) ? 8000 : 6000; + + + if ( bios_data[38] != 0xff ) { + const unsigned maxdac = bios_data[38] * scale; + + bios->pixel.max_freq = maxdac; + bios->system.max_freq = maxdac; + bios->video.max_freq = maxdac; + } + + if ( bios_data[36] != 0xff ) { + const unsigned maxdac = bios_data[36] * scale; + + bios->system.max_freq = maxdac; + bios->video.max_freq = maxdac; + } + + if ( bios_data[37] != 0xff ) { + const unsigned maxdac = bios_data[37] * scale; + + bios->video.max_freq = maxdac; + } + + + if ( bios_data[123] != 0xff ) { + const unsigned mindac = bios_data[123] * scale; + + bios->pixel.min_freq = mindac; + bios->system.min_freq = mindac; + bios->video.min_freq = mindac; + } + + if ( bios_data[121] != 0xff ) { + const unsigned mindac = bios_data[121] * scale; + + bios->system.min_freq = mindac; + bios->video.min_freq = mindac; + } + + if ( bios_data[122] != 0xff ) { + const unsigned mindac = bios_data[122] * scale; + + bios->video.min_freq = mindac; + } + + + if ( bios_data[92] != 0xff ) { + const unsigned system_pll = bios_data[92] * 4 * 1000; + bios->mem_clock = system_pll; + } + + if ( (bios_data[110] & 0x01) != 0 ) { + bios->pll_ref_freq = 14318; + } + + bios->host_interface = (bios_data[113] >> 3) & 0x07; +} + + +/** + * Read the BIOS data from the card and initialize internal values. + */ + +Bool mga_read_and_process_bios( ScrnInfoPtr pScrn ) +{ + CARD8 bios_data[0x10000]; + unsigned offset; + MGAPtr pMga = MGAPTR(pScrn); + Bool pciBIOS = TRUE; + int rlen; + static const unsigned expected_length[] = { 0, 64, 64, 64, 128, 128 }; + unsigned version; + unsigned pins_len; + const CARD8 * pins_data; +#ifdef BIOS_DEBUG + static const char * const host_interface_strings[8] = { + "Reserved", + "Reserved", + "Reserved", + "Hybrid (AGP 4x on data transfers only)", + "PCI", + "AGP 1x", + "AGP 2x", + "AGP 4x" + }; +#endif + + + /* Initialize the stored BIOS data to some reasonable values for the + * card at hand. This is done now so that even if the PInS data block + * isn't found or can't be read we'll still have some reasonable values + * to use. + */ + + mga_initialize_bios_values( pMga, & pMga->bios ); + + + /* If the BIOS address was probed, it was found from the PCI config space + * If it was given in the config file, try to guess when it looks like it + * might be controlled by the PCI config space. + */ + + if (pMga->BiosFrom == X_DEFAULT) { + pciBIOS = FALSE; + } + else if (pMga->BiosFrom == X_CONFIG && pMga->BiosAddress < 0x100000) { + pciBIOS = TRUE; + } + + if (pciBIOS) { + rlen = xf86ReadPciBIOS(0, pMga->PciTag, pMga->FbBaseReg, + bios_data, sizeof(bios_data)); + } + else { + rlen = xf86ReadDomainMemory(pMga->PciTag, pMga->BiosAddress, + sizeof(bios_data), bios_data); + } + + if (rlen < (bios_data[2] << 9)) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Could not retrieve video BIOS!\n"); + return FALSE; + } + + /* Get the output mode set by the BIOS */ + pMga->BiosOutputMode = bios_data[0x7ff1]; + + /* Get the video BIOS info block */ + if (strncmp((char *)(&bios_data[45]), "MATROX", 6)) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Video BIOS info block not detected!\n"); + return FALSE; + } + +#if X_BYTE_ORDER == X_BIG_ENDIAN + /* The offset information that is included in the BIOS on PC Matrox cards + * is not there on PowerPC cards. Instead, we have to search the BIOS + * image for the magic signature. This is the 16-bit value 0x412d. This + * value is followed by the length of the PInS block. We know that this + * must (currently) be either 0x80 or 0x40. + * + * Happy hunting. + */ + for (offset = 0 ; offset < 0x7ffc ; offset++) { + if ((bios_data[offset] == 0x2e) && (bios_data[offset+1] == 0x41) + && ((bios_data[offset+2] == 0x80) || (bios_data[offset+2] == 0x40))) { + break; + } + } + + if (offset == 0x7ffc) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Video BIOS PInS data not found!\n"); + return FALSE; + } +#else + /* Get the info block offset */ + offset = (unsigned)((bios_data[0x7ffd] << 8) | bios_data[0x7ffc]); +#endif + + /* Let the world know what we are up to */ + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, + "Video BIOS info block at offset 0x%05lX\n", + (long)(offset)); + + + /* Determine the version of the PInS block. This will determine how the + * data is processed. Only the first version of the PInS data structure + * did *NOT* have the initial 0x412e (in little-endian order!) signature. + */ + + pins_data = & bios_data[ offset ]; + if ( (pins_data[0] == 0x2e) && (pins_data[1] == 0x41) ) { + version = pins_data[5]; + pins_len = pins_data[2]; + } + else { + version = 1; + pins_len = get_u16( pins_data ); + } + + + if ( (version < 1) || (version > 5) ) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "PInS data version (%u) not supported.\n", version); + return FALSE; + } + + if ( pins_len != expected_length[ version ] ) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "PInS data length (%u) does not match expected length (%u)" + " for version %u.X.\n", + pins_len, expected_length[ version ], version); + return FALSE; + } + + switch( version ) { + case 1: mga_parse_bios_ver_1( & pMga->bios, pins_data ); break; + case 2: mga_parse_bios_ver_2( & pMga->bios, pins_data ); break; + case 3: mga_parse_bios_ver_3( & pMga->bios, pins_data ); break; + case 4: mga_parse_bios_ver_4( & pMga->bios, pins_data ); break; + case 5: mga_parse_bios_ver_5( & pMga->bios, pins_data ); break; + } + +#ifdef BIOS_DEBUG + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "system VCO = [%u, %u]\n", + pMga->bios.system.min_freq, pMga->bios.system.max_freq); + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "pixel VCO = [%u, %u]\n", + pMga->bios.pixel.min_freq, pMga->bios.pixel.max_freq); + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "video VCO = [%u, %u]\n", + pMga->bios.video.min_freq, pMga->bios.video.max_freq); + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "memory clock = %ukHz\n", pMga->bios.mem_clock); + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "PLL reference frequency = %ukHz\n", + pMga->bios.pll_ref_freq); + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "%s fast bitblt\n", + (pMga->bios.fast_bitblt) ? "Has" : "Does not have"); + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "Host interface: %s (%u)\n", + host_interface_strings[ pMga->bios.host_interface ], + pMga->bios.host_interface); +#endif + + return TRUE; +} diff --git a/driver/xf86-video-mga/src/mga_common.h b/driver/xf86-video-mga/src/mga_common.h new file mode 100644 index 000000000..90f6b37f4 --- /dev/null +++ b/driver/xf86-video-mga/src/mga_common.h @@ -0,0 +1,152 @@ +/* mga_common.h -- common header definitions for MGA 2D/3D/DRM suite + * + * Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Converted to common header format: + * Jens Owen <jens@tungstengraphics.com> + * + * $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_common.h,v 1.2 2002/12/16 16:19:18 dawes Exp $ + * + */ + +#ifndef _MGA_COMMON_H_ +#define _MGA_COMMON_H_ + +/* + * WARNING: If you change any of these defines, make sure to change + * the kernel include file as well (mga_drm.h) + */ + +#define DRM_MGA_IDLE_RETRY 2048 +#define DRM_MGA_NR_TEX_HEAPS 2 + +typedef struct { + int installed; + unsigned long phys_addr; + int size; +} drmMGAWarpIndex; + +/* Driver specific DRM command indices + * NOTE: these are not OS specific, but they are driver specific + */ +#define DRM_MGA_INIT 0x00 +#define DRM_MGA_FLUSH 0x01 +#define DRM_MGA_RESET 0x02 +#define DRM_MGA_SWAP 0x03 +#define DRM_MGA_CLEAR 0x04 +#define DRM_MGA_VERTEX 0x05 +#define DRM_MGA_INDICES 0x06 +#define DRM_MGA_ILOAD 0x07 +#define DRM_MGA_BLIT 0x08 +#define DRM_MGA_GETPARAM 0x09 + +typedef struct { + enum { + MGA_INIT_DMA = 0x01, + MGA_CLEANUP_DMA = 0x02 + } func; + + unsigned long sarea_priv_offset; + + int chipset; + int sgram; + + unsigned int maccess; + + unsigned int fb_cpp; + unsigned int front_offset, front_pitch; + unsigned int back_offset, back_pitch; + + unsigned int depth_cpp; + unsigned int depth_offset, depth_pitch; + + unsigned int texture_offset[DRM_MGA_NR_TEX_HEAPS]; + unsigned int texture_size[DRM_MGA_NR_TEX_HEAPS]; + + unsigned long fb_offset; + unsigned long mmio_offset; + unsigned long status_offset; + unsigned long warp_offset; + unsigned long primary_offset; + unsigned long buffers_offset; +} drmMGAInit; + +typedef enum { + DRM_MGA_LOCK_READY = 0x01, /* Wait until hardware is ready for DMA */ + DRM_MGA_LOCK_QUIESCENT = 0x02, /* Wait until hardware quiescent */ + DRM_MGA_LOCK_FLUSH = 0x04, /* Flush this context's DMA queue first */ + DRM_MGA_LOCK_FLUSH_ALL = 0x08, /* Flush all DMA queues first */ + /* These *HALT* flags aren't supported yet + -- they will be used to support the + full-screen DGA-like mode. */ + DRM_MGA_HALT_ALL_QUEUES = 0x10, /* Halt all current and future queues */ + DRM_MGA_HALT_CUR_QUEUES = 0x20 /* Halt all current queues */ +} drmMGALockFlags; + +typedef struct { + int context; + drmMGALockFlags flags; +} drmMGALock; + +typedef struct { + int idx; + unsigned int dstorg; + unsigned int length; +} drmMGAIload; + +typedef struct { + unsigned int flags; + unsigned int clear_color; + unsigned int clear_depth; + unsigned int color_mask; + unsigned int depth_mask; +} drmMGAClearRec; + +typedef struct { + int idx; /* buffer to queue */ + int used; /* bytes in use */ + int discard; /* client finished with buffer? */ +} drmMGAVertex; + +typedef struct { + unsigned int planemask; + unsigned int srcorg; + unsigned int dstorg; + int src_pitch, dst_pitch; + int delta_sx, delta_sy; + int delta_dx, delta_dy; + int height, ydir; /* flip image vertically */ + int source_pitch, dest_pitch; +} drmMGABlit; + +/* 3.1: An ioctl to get parameters that aren't available to the 3d + * client any other way. + */ +#define MGA_PARAM_IRQ_NR 1 + +typedef struct { + int param; + int *value; +} drmMGAGetParam; + +#endif diff --git a/driver/xf86-video-mga/src/mga_dac3026.c b/driver/xf86-video-mga/src/mga_dac3026.c new file mode 100644 index 000000000..1eddefdad --- /dev/null +++ b/driver/xf86-video-mga/src/mga_dac3026.c @@ -0,0 +1,1201 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dac3026.c,v 1.58tsi Exp $ */ +/* + * Copyright 1994 by Robin Cutshaw <robin@XFree86.org> + * + * Permission to use, copy, modify, distribute, and sell this software and its + * documentation for any purpose is hereby granted without fee, provided that + * the above copyright notice appear in all copies and that both that + * copyright notice and this permission notice appear in supporting + * documentation, and that the name of Robin Cutshaw not be used in + * advertising or publicity pertaining to distribution of the software without + * specific, written prior permission. Robin Cutshaw makes no representations + * about the suitability of this software for any purpose. It is provided + * "as is" without express or implied warranty. + * + * ROBIN CUTSHAW DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, + * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO + * EVENT SHALL ROBIN CUTSHAW BE LIABLE FOR ANY SPECIAL, INDIRECT OR + * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, + * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER + * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR + * PERFORMANCE OF THIS SOFTWARE. + * + * + * Modified for TVP3026 by Harald Koenig <koenig@tat.physik.uni-tuebingen.de> + * + * Modified for MGA Millennium by Xavier Ducoin <xavier@rd.lectra.fr> + * + * Doug Merritt <doug@netcom.com> + * 24bpp: fixed high res stripe glitches, clock glitches on all res + * + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +/* + * This is a first cut at a non-accelerated version to work with the + * new server design (DHD). + */ + +/* All drivers should typically include these */ +#include "xf86.h" +#include "xf86_OSproc.h" + +/* Drivers for PCI hardware need this */ +#include "xf86PciInfo.h" + +/* Drivers that need to access the PCI config space directly need this */ +#include "xf86Pci.h" + +#include "mga_reg.h" +#include "mga.h" +#include "mga_macros.h" + +#include "xf86DDC.h" + +/* + * Only change these bits in the Option register. Make sure that the + * vgaioen bit is never in this mask because it is controlled elsewhere + */ +#define OPTION_MASK 0xFFEFFEFF /* ~(eepromwt | vgaioen) */ + +static void MGA3026LoadPalette(ScrnInfoPtr, int, int*, LOCO*, VisualPtr); +static void MGA3026SavePalette(ScrnInfoPtr, unsigned char*); +static void MGA3026RestorePalette(ScrnInfoPtr, unsigned char*); +static void MGA3026RamdacInit(ScrnInfoPtr); +static void MGA3026Save(ScrnInfoPtr, vgaRegPtr, MGARegPtr, Bool); +static void MGA3026Restore(ScrnInfoPtr, vgaRegPtr, MGARegPtr, Bool); +static Bool MGA3026Init(ScrnInfoPtr, DisplayModePtr); +static Bool MGA3026_i2cInit(ScrnInfoPtr pScrn); + + +/* + * implementation + */ + +/* + * indexes to ti3026 registers (the order is important) + */ +const static unsigned char MGADACregs[] = { + 0x0F, 0x18, 0x19, 0x1A, 0x1C, 0x1D, 0x1E, 0x2A, 0x2B, 0x30, + 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3A, + 0x06 +}; + +/* note: to fix a cursor hw glitch, register 0x37 (blue color key) needs + to be set to magic numbers, even though they are "never" used because + blue keying disabled in 0x38. + + Matrox sez: + + ...The more precise statement of the software workaround is to insure + that bits 7-5 of register 0x37 (Blue Color Key High) and bits 7-5 of + register 0x38 (HZOOM)are the same... +*/ + +/* also note: the values of the MUX control register 0x19 (index [2]) can be + found in table 2-17 of the 3026 manual. If interlace is set, the values + listed here are incremented by one. +*/ + +#define DACREGSIZE sizeof(MGADACregs) +/* + * initial values of ti3026 registers + */ +const static unsigned char MGADACbpp8[DACREGSIZE] = { + 0x06, 0x80, 0x4b, 0x25, 0x00, 0x00, 0x0C, 0x00, 0x1E, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0, 0x00, + 0x00 +}; +const static unsigned char MGADACbpp16[DACREGSIZE] = { + 0x07, 0x45, 0x53, 0x15, 0x00, 0x00, 0x2C, 0x00, 0x1E, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x10, 0, 0x00, + 0x00 +}; +/* + * [0] value was 0x07, but changed to 0x06 by Doug Merrit to fix high res + * stripe glitches and clock glitches at 24bpp. + */ +/* [0] value is now set inside of MGA3026Init, based on the silicon revision + It is still set to 7 or 6 based on the revision, though, since setting to + 8 as in the documentation makes (some?) revB chips get the colors wrong... + maybe BGR instead of RGB? This only applies to 24bpp, since it is the only + one documented as depending on revision. + */ + +const static unsigned char MGADACbpp24[DACREGSIZE] = { + 0x06, 0x56, 0x5b, 0x25, 0x00, 0x00, 0x2C, 0x00, 0x1E, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x10, 0, 0x00, + 0x00 +}; +const static unsigned char MGADACbpp32[DACREGSIZE] = { + 0x07, 0x46, 0x5b, 0x05, 0x00, 0x00, 0x2C, 0x00, 0x1E, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x10, 0, 0x00, + 0x00 +}; + +/* on at least some 2064Ws, the PSEL line flips at 4MB or so, so PSEL keying + has to be off in register 0x1e -> bit4 clear */ + +const static unsigned char MGADACbpp8plus24[DACREGSIZE] = { + 0x07, 0x06, 0x5b, 0x05, 0x00, 0x00, 0x2C, 0x00, 0x1E, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x01, 0x00, 0x00, + 0x00 +}; + +/* + * Read/write to the DAC via MMIO + */ + +/* + * These were functions. Use macros instead to avoid the need to + * pass pMga to them. + */ + +#define inTi3026dreg(reg) INREG8(RAMDAC_OFFSET + (reg)) + +#define outTi3026dreg(reg, val) OUTREG8(RAMDAC_OFFSET + (reg), val) + +#define inTi3026(reg) \ + (outTi3026dreg(TVP3026_INDEX, reg), inTi3026dreg(TVP3026_DATA)) + +#define outTi3026(reg, mask, val) \ + do { /* note: mask and reg may get evaluated twice */ \ + unsigned char tmp = (mask) ? (inTi3026(reg) & (mask)) : 0; \ + outTi3026dreg(TVP3026_INDEX, reg); \ + outTi3026dreg(TVP3026_DATA, tmp | (val)); \ + } while (0) + + +/* + * MGATi3026CalcClock - Calculate the PLL settings (m, n, p). + * + * DESCRIPTION + * For more information, refer to the Texas Instruments + * "TVP3026 Data Manual" (document SLAS098B). + * Section 2.4 "PLL Clock Generators" + * Appendix A "Frequency Synthesis PLL Register Settings" + * Appendix B "PLL Programming Examples" + * + * PARAMETERS + * f_out IN Desired clock frequency. + * f_max IN Maximum allowed clock frequency. + * m OUT Value of PLL 'm' register. + * n OUT Value of PLL 'n' register. + * p OUT Value of PLL 'p' register. + * + * HISTORY + * January 11, 1997 - [aem] Andrew E. Mileski + * Split off from MGATi3026SetClock. + */ + +/* The following values are in kHz */ +#define TI_MIN_VCO_FREQ 110000 +#define TI_MAX_VCO_FREQ 220000 +#define TI_MAX_MCLK_FREQ 100000 +#define TI_REF_FREQ 14318.18 + +static double +MGATi3026CalcClock ( + long f_out, long f_max, + int *m, int *n, int *p +){ + int best_m = 0, best_n = 0; + double f_pll, f_vco; + double m_err, inc_m, calc_m; + + /* Make sure that f_min <= f_out <= f_max */ + if ( f_out < ( TI_MIN_VCO_FREQ / 8 )) + f_out = TI_MIN_VCO_FREQ / 8; + if ( f_out > f_max ) + f_out = f_max; + + /* + * f_pll = f_vco / 2 ^ p + * Choose p so that TI_MIN_VCO_FREQ <= f_vco <= TI_MAX_VCO_FREQ + * Note that since TI_MAX_VCO_FREQ = 2 * TI_MIN_VCO_FREQ + * we don't have to bother checking for this maximum limit. + */ + f_vco = ( double ) f_out; + for ( *p = 0; *p < 3 && f_vco < TI_MIN_VCO_FREQ; ( *p )++ ) + f_vco *= 2.0; + + /* + * We avoid doing multiplications by ( 65 - n ), + * and add an increment instead - this keeps any error small. + */ + inc_m = f_vco / ( TI_REF_FREQ * 8.0 ); + + /* Initial value of calc_m for the loop */ + calc_m = inc_m + inc_m + inc_m; + + /* Initial amount of error for an integer - impossibly large */ + m_err = 2.0; + + /* Search for the closest INTEGER value of ( 65 - m ) */ + for ( *n = 3; *n <= 25; ( *n )++, calc_m += inc_m ) { + + /* Ignore values of ( 65 - m ) which we can't use */ + if ( calc_m < 3.0 || calc_m > 64.0 ) + continue; + + /* + * Pick the closest INTEGER (has smallest fractional part). + * The optimizer should clean this up for us. + */ + if (( calc_m - ( int ) calc_m ) < m_err ) { + m_err = calc_m - ( int ) calc_m; + best_m = ( int ) calc_m; + best_n = *n; + } + } + + /* 65 - ( 65 - x ) = x */ + *m = 65 - best_m; + *n = 65 - best_n; + + /* Now all the calculations can be completed */ + f_vco = 8.0 * TI_REF_FREQ * best_m / best_n; + f_pll = f_vco / ( 1 << *p ); + +#ifdef DEBUG + ErrorF( "f_out=%ld f_pll=%.1f f_vco=%.1f n=%d m=%d p=%d\n", + f_out, f_pll, f_vco, *n, *m, *p ); +#endif + + return f_pll; +} + +/* + * MGATi3026SetMCLK - Set the memory clock (MCLK) PLL. + * + * HISTORY + * January 11, 1997 - [aem] Andrew E. Mileski + * Written and tested. + */ +static void +MGATi3026SetMCLK( ScrnInfoPtr pScrn, long f_out ) +{ + int mclk_m, mclk_n, mclk_p; + int pclk_m, pclk_n, pclk_p; + int mclk_ctl; + MGAPtr pMga = MGAPTR(pScrn); + + MGATi3026CalcClock(f_out, TI_MAX_MCLK_FREQ, &mclk_m, &mclk_n, &mclk_p); + + /* Save PCLK settings */ + outTi3026( TVP3026_PLL_ADDR, 0, 0xfc ); + pclk_n = inTi3026( TVP3026_PIX_CLK_DATA ); + outTi3026( TVP3026_PLL_ADDR, 0, 0xfd ); + pclk_m = inTi3026( TVP3026_PIX_CLK_DATA ); + outTi3026( TVP3026_PLL_ADDR, 0, 0xfe ); + pclk_p = inTi3026( TVP3026_PIX_CLK_DATA ); + + /* Stop PCLK (PLLEN = 0, PCLKEN = 0) */ + outTi3026( TVP3026_PLL_ADDR, 0, 0xfe ); + outTi3026( TVP3026_PIX_CLK_DATA, 0, 0x00 ); + + /* Set PCLK to the new MCLK frequency (PLLEN = 1, PCLKEN = 0 ) */ + outTi3026( TVP3026_PLL_ADDR, 0, 0xfc ); + outTi3026( TVP3026_PIX_CLK_DATA, 0, ( mclk_n & 0x3f ) | 0xc0 ); + outTi3026( TVP3026_PIX_CLK_DATA, 0, mclk_m & 0x3f ); + outTi3026( TVP3026_PIX_CLK_DATA, 0, ( mclk_p & 0x03 ) | 0xb0 ); + + /* Wait for PCLK PLL to lock on frequency */ + while (( inTi3026( TVP3026_PIX_CLK_DATA ) & 0x40 ) == 0 ) { + ; + } + + /* Output PCLK on MCLK pin */ + mclk_ctl = inTi3026( TVP3026_MCLK_CTL ); + outTi3026( TVP3026_MCLK_CTL, 0, mclk_ctl & 0xe7 ); + outTi3026( TVP3026_MCLK_CTL, 0, ( mclk_ctl & 0xe7 ) | 0x08 ); + + /* Stop MCLK (PLLEN = 0 ) */ + outTi3026( TVP3026_PLL_ADDR, 0, 0xfb ); + outTi3026( TVP3026_MEM_CLK_DATA, 0, 0x00 ); + + /* Set MCLK to the new frequency (PLLEN = 1) */ + outTi3026( TVP3026_PLL_ADDR, 0, 0xf3 ); + outTi3026( TVP3026_MEM_CLK_DATA, 0, ( mclk_n & 0x3f ) | 0xc0 ); + outTi3026( TVP3026_MEM_CLK_DATA, 0, mclk_m & 0x3f ); + outTi3026( TVP3026_MEM_CLK_DATA, 0, ( mclk_p & 0x03 ) | 0xb0 ); + + /* Wait for MCLK PLL to lock on frequency */ + while (( inTi3026( TVP3026_MEM_CLK_DATA ) & 0x40 ) == 0 ) { + ; + } + + /* Output MCLK PLL on MCLK pin */ + outTi3026( TVP3026_MCLK_CTL, 0, ( mclk_ctl & 0xe7 ) | 0x10 ); + outTi3026( TVP3026_MCLK_CTL, 0, ( mclk_ctl & 0xe7 ) | 0x18 ); + + /* Stop PCLK (PLLEN = 0, PCLKEN = 0 ) */ + outTi3026( TVP3026_PLL_ADDR, 0, 0xfe ); + outTi3026( TVP3026_PIX_CLK_DATA, 0, 0x00 ); + + /* Restore PCLK (PLLEN = ?, PCLKEN = ?) */ + outTi3026( TVP3026_PLL_ADDR, 0, 0xfc ); + outTi3026( TVP3026_PIX_CLK_DATA, 0, pclk_n ); + outTi3026( TVP3026_PIX_CLK_DATA, 0, pclk_m ); + outTi3026( TVP3026_PIX_CLK_DATA, 0, pclk_p ); + + /* Wait for PCLK PLL to lock on frequency */ + while (( inTi3026( TVP3026_PIX_CLK_DATA ) & 0x40 ) == 0 ) { + ; + } +} + +/* + * MGATi3026SetPCLK - Set the pixel (PCLK) and loop (LCLK) clocks. + * + * PARAMETERS + * f_pll IN Pixel clock PLL frequencly in kHz. + * bpp IN Bytes per pixel. + * + * HISTORY + * January 11, 1997 - [aem] Andrew E. Mileski + * Split to simplify code for MCLK (=GCLK) setting. + * + * December 14, 1996 - [aem] Andrew E. Mileski + * Fixed loop clock to be based on the calculated, not requested, + * pixel clock. Added f_max = maximum f_vco frequency. + * + * October 19, 1996 - [aem] Andrew E. Mileski + * Commented the loop clock code (wow, I understand everything now), + * and simplified it a bit. This should really be two separate functions. + * + * October 1, 1996 - [aem] Andrew E. Mileski + * Optimized the m & n picking algorithm. Added maxClock detection. + * Low speed pixel clock fix (per the docs). Documented what I understand. + * + * ?????, ??, ???? - [???] ???????????? + * Based on the TVP3026 code in the S3 driver. + */ + +static void +MGATi3026SetPCLK( ScrnInfoPtr pScrn, long f_out, int bpp ) +{ + /* Pixel clock values */ + int m, n, p; + + /* Loop clock values */ + int lm, ln, lp, lq; + double z; + + /* The actual frequency output by the clock */ + double f_pll; + + long f_max = TI_MAX_VCO_FREQ; + + MGAPtr pMga = MGAPTR(pScrn); + MGARegPtr pReg = &pMga->ModeReg; + + /* Get the maximum pixel clock frequency */ + if ( pMga->MaxClock > TI_MAX_VCO_FREQ ) + f_max = pMga->MaxClock; + + /* Do the calculations for m, n, and p */ + f_pll = MGATi3026CalcClock( f_out, f_max, & m, & n, & p ); + + /* Values for the pixel clock PLL registers */ + pReg->DacClk[ 0 ] = ( n & 0x3f ) | 0xc0; + pReg->DacClk[ 1 ] = ( m & 0x3f ); + pReg->DacClk[ 2 ] = ( p & 0x03 ) | 0xb0; + + /* + * Now that the pixel clock PLL is setup, + * the loop clock PLL must be setup. + */ + + /* + * First we figure out lm, ln, and z. + * Things are different in packed pixel mode (24bpp) though. + */ + if ( pMga->CurrentLayout.bitsPerPixel == 24 ) { + + /* ln:lm = ln:3 */ + lm = 65 - 3; + + /* Check for interleaved mode */ + if ( bpp == 2 ) + /* ln:lm = 4:3 */ + ln = 65 - 4; + else + /* ln:lm = 8:3 */ + ln = 65 - 8; + + /* Note: this is actually 100 * z for more precision */ + z = ( 11000 * ( 65 - ln )) / (( f_pll / 1000 ) * ( 65 - lm )); + } + else { + /* ln:lm = ln:4 */ + lm = 65 - 4; + + /* Note: bpp = bytes per pixel */ + ln = 65 - 4 * ( 64 / 8 ) / bpp; + + /* Note: this is actually 100 * z for more precision */ + z = (( 11000 / 4 ) * ( 65 - ln )) / ( f_pll / 1000 ); + } + + /* + * Now we choose dividers lp and lq so that the VCO frequency + * is within the operating range of 110 MHz to 220 MHz. + */ + + /* Assume no lq divider */ + lq = 0; + + /* Note: z is actually 100 * z for more precision */ + if ( z <= 200.0 ) + lp = 0; + else if ( z <= 400.0 ) + lp = 1; + else if ( z <= 800.0 ) + lp = 2; + else if ( z <= 1600.0 ) + lp = 3; + else { + lp = 3; + lq = ( int )( z / 1600.0 ); + } + + /* Values for the loop clock PLL registers */ + if ( pMga->CurrentLayout.bitsPerPixel == 24 ) { + /* Packed pixel mode values */ + pReg->DacClk[ 3 ] = ( ln & 0x3f ) | 0x80; + pReg->DacClk[ 4 ] = ( lm & 0x3f ) | 0x80; + pReg->DacClk[ 5 ] = ( lp & 0x03 ) | 0xf8; + } else { + /* Non-packed pixel mode values */ + pReg->DacClk[ 3 ] = ( ln & 0x3f ) | 0xc0; + pReg->DacClk[ 4 ] = ( lm & 0x3f ); + pReg->DacClk[ 5 ] = ( lp & 0x03 ) | 0xf0; + } + pReg->DacRegs[ 18 ] = lq | 0x38; + +#ifdef DEBUG + ErrorF( "bpp=%d z=%.1f ln=%d lm=%d lp=%d lq=%d\n", + bpp, z, ln, lm, lp, lq ); +#endif +} + +/* + * MGA3026Init -- for mga2064 with ti3026 + * + * The 'mode' parameter describes the video mode. The 'mode' structure + * as well as the 'vga256InfoRec' structure can be dereferenced for + * information that is needed to initialize the mode. The 'new' macro + * (see definition above) is used to simply fill in the structure. + */ +static Bool +MGA3026Init(ScrnInfoPtr pScrn, DisplayModePtr mode) +{ + int hd, hs, he, ht, vd, vs, ve, vt, wd; + int i, BppShift, index_1d = 0; + const unsigned char* initDAC; + MGAPtr pMga = MGAPTR(pScrn); + MGARamdacPtr MGAdac = &pMga->Dac; + MGAFBLayout *pLayout = &pMga->CurrentLayout; + MGARegPtr pReg = &pMga->ModeReg; + vgaRegPtr pVga = &VGAHWPTR(pScrn)->ModeReg; + + BppShift = pMga->BppShifts[(pLayout->bitsPerPixel >> 3) - 1]; + + switch(pLayout->bitsPerPixel) + { + case 8: + initDAC = MGADACbpp8; + break; + case 16: + initDAC = MGADACbpp16; + break; + case 24: + initDAC = MGADACbpp24; + break; + case 32: + if(pLayout->Overlay8Plus24) + initDAC = MGADACbpp8plus24; + else + initDAC = MGADACbpp32; + break; + default: + FatalError("MGA: unsupported bits per pixel\n"); + } + + /* Allocate the DacRegs space if not done already */ + if (pReg->DacRegs == NULL) { + pReg->DacRegs = xnfcalloc(DACREGSIZE, 1); + } + for (i = 0; i < DACREGSIZE; i++) { + pReg->DacRegs[i] = initDAC[i]; + if (MGADACregs[i] == 0x1D) + index_1d = i; + } + + if((pLayout->bitsPerPixel == 32) && pLayout->Overlay8Plus24) { + pReg->DacRegs[9] = pMga->colorKey; + pReg->DacRegs[10] = pMga->colorKey; + } + + if ( (pLayout->bitsPerPixel == 16) && (pLayout->weight.red == 5) + && (pLayout->weight.green == 5) && (pLayout->weight.blue == 5) ) { + pReg->DacRegs[1] &= ~0x01; + } + if (pMga->Interleave ) pReg->DacRegs[2] += 1; + + + if ( pLayout->bitsPerPixel == 24 ) { + int silicon_rev; + /* we need to set DacRegs[0] differently based on the silicon + * revision of the 3026 RAMDAC, as per page 2-14 of tvp3026.pdf. + * If we have rev A silicon, we want 0x07; rev B silicon wants + * 0x06. + */ + silicon_rev = inTi3026(TVP3026_SILICON_REV); + +#ifdef DEBUG + ErrorF("TVP3026 revision 0x%x (rev %s)\n", + silicon_rev, (silicon_rev <= 0x20) ? "A" : "B"); +#endif + + if(silicon_rev <= 0x20) { + /* rev A */ + pReg->DacRegs[0] = 0x07; + } else { + /* rev B */ + pReg->DacRegs[0] = 0x06; + } + } + + /* + * This will initialize all of the generic VGA registers. + */ + if (!vgaHWInit(pScrn, mode)) + return(FALSE); + + /* + * Here all of the MGA registers get filled in. + */ + hd = (mode->CrtcHDisplay >> 3) - 1; + hs = (mode->CrtcHSyncStart >> 3) - 1; + he = (mode->CrtcHSyncEnd >> 3) - 1; + ht = (mode->CrtcHTotal >> 3) - 1; + vd = mode->CrtcVDisplay - 1; + vs = mode->CrtcVSyncStart - 1; + ve = mode->CrtcVSyncEnd - 1; + vt = mode->CrtcVTotal - 2; + + /* HTOTAL & 0x7 equal to 0x6 in 8bpp or 0x4 in 24bpp causes strange + * vertical stripes + */ + if((ht & 0x07) == 0x06 || (ht & 0x07) == 0x04) + ht++; + + if (pLayout->bitsPerPixel == 24) + wd = (pLayout->displayWidth * 3) >> (4 - BppShift); + else + wd = pLayout->displayWidth >> (4 - BppShift); + + pReg->ExtVga[0] = 0; + pReg->ExtVga[5] = 0; + + if (mode->Flags & V_INTERLACE) + { + pReg->ExtVga[0] = 0x80; + pReg->ExtVga[5] = (hs + he - ht) >> 1; + wd <<= 1; + vt &= 0xFFFE; + + /* enable interlaced cursor */ + pReg->DacRegs[20] |= 0x20; + } + + pReg->ExtVga[0] |= (wd & 0x300) >> 4; + pReg->ExtVga[1] = (((ht - 4) & 0x100) >> 8) | + ((hd & 0x100) >> 7) | + ((hs & 0x100) >> 6) | + (ht & 0x40); + pReg->ExtVga[2] = ((vt & 0xc00) >> 10) | + ((vd & 0x400) >> 8) | + ((vd & 0xc00) >> 7) | + ((vs & 0xc00) >> 5); + if (pLayout->bitsPerPixel == 24) + pReg->ExtVga[3] = (((1 << BppShift) * 3) - 1) | 0x80; + else + pReg->ExtVga[3] = ((1 << BppShift) - 1) | 0x80; + + /* Set viddelay (CRTCEXT3 Bits 3-4). */ + pReg->ExtVga[3] |= (pScrn->videoRam == 8192 ? 0x10 + : pScrn->videoRam == 2048 ? 0x08 : 0x00); + + pReg->ExtVga[4] = 0; + + pVga->CRTC[0] = ht - 4; + pVga->CRTC[1] = hd; + pVga->CRTC[2] = hd; + pVga->CRTC[3] = (ht & 0x1F) | 0x80; + pVga->CRTC[4] = hs; + pVga->CRTC[5] = ((ht & 0x20) << 2) | (he & 0x1F); + pVga->CRTC[6] = vt & 0xFF; + pVga->CRTC[7] = ((vt & 0x100) >> 8 ) | + ((vd & 0x100) >> 7 ) | + ((vs & 0x100) >> 6 ) | + ((vd & 0x100) >> 5 ) | + 0x10 | + ((vt & 0x200) >> 4 ) | + ((vd & 0x200) >> 3 ) | + ((vs & 0x200) >> 2 ); + pVga->CRTC[9] = ((vd & 0x200) >> 4) | 0x40; + pVga->CRTC[16] = vs & 0xFF; + pVga->CRTC[17] = (ve & 0x0F) | 0x20; + pVga->CRTC[18] = vd & 0xFF; + pVga->CRTC[19] = wd & 0xFF; + pVga->CRTC[21] = vd & 0xFF; + pVga->CRTC[22] = (vt + 1) & 0xFF; + + if (mode->Flags & V_DBLSCAN) + pVga->CRTC[9] |= 0x80; + + /* Per DDK vid.c line 75, sync polarity should be controlled + * via the TVP3026 RAMDAC register 1D and so MISC Output Register + * should always have bits 6 and 7 set. */ + + pVga->MiscOutReg |= 0xC0; + if ((mode->Flags & (V_PHSYNC | V_NHSYNC)) && + (mode->Flags & (V_PVSYNC | V_NVSYNC))) + { + if (mode->Flags & V_PHSYNC) + pReg->DacRegs[index_1d] |= 0x01; + if (mode->Flags & V_PVSYNC) + pReg->DacRegs[index_1d] |= 0x02; + } + else + { + int VDisplay = mode->VDisplay; + if (mode->Flags & V_DBLSCAN) + VDisplay *= 2; + if (VDisplay < 400) + pReg->DacRegs[index_1d] |= 0x01; /* +hsync -vsync */ + else if (VDisplay < 480) + pReg->DacRegs[index_1d] |= 0x02; /* -hsync +vsync */ + else if (VDisplay < 768) + pReg->DacRegs[index_1d] |= 0x00; /* -hsync -vsync */ + else + pReg->DacRegs[index_1d] |= 0x03; /* +hsync +vsync */ + } + + if (pMga->SyncOnGreen) + pReg->DacRegs[index_1d] |= 0x20; + + pReg->Option = 0x402C0100; /* fine for 2064 and 2164 */ + + if (pMga->Interleave) + pReg->Option |= 0x1000; + else + pReg->Option &= ~0x1000; + + /* must always have the pci retries on but rely on + polling to keep them from occuring */ + pReg->Option &= ~0x20000000; + + pVga->MiscOutReg |= 0x0C; + /* XXX Need to check the first argument */ + MGATi3026SetPCLK( pScrn, mode->Clock, 1 << BppShift ); + + /* this one writes registers rather than writing to the + mgaReg->ModeReg and letting Restore write to the hardware + but that's no big deal since we will Restore right after + this function */ + + MGA_NOT_HAL(MGATi3026SetMCLK(pScrn, MGAdac->MemoryClock)); + +#ifdef DEBUG + ErrorF("%6ld: %02X %02X %02X %02X %02X %02X %08lX\n", mode->Clock, + pReg->DacClk[0], pReg->DacClk[1], pReg->DacClk[2], pReg->DacClk[3], pReg->DacClk[4], pReg->DacClk[5], pReg->Option); + for (i=0; i<sizeof(MGADACregs); i++) ErrorF("%02X ", pReg->DacRegs[i]); + for (i=0; i<6; i++) ErrorF(" %02X", pReg->ExtVga[i]); + ErrorF("\n"); +#endif + + /* This disables the VGA memory aperture */ + pVga->MiscOutReg &= ~0x02; + return(TRUE); +} + +/* + * MGA3026Restore -- for mga2064 with ti3026 + * + * This function restores a video mode. It basically writes out all of + * the registers that have previously been saved in the vgaMGARec data + * structure. + */ +static void +MGA3026Restore(ScrnInfoPtr pScrn, vgaRegPtr vgaReg, MGARegPtr mgaReg, + Bool restoreFonts) +{ + int i; + MGAPtr pMga = MGAPTR(pScrn); + + /* + * Code is needed to get things back to bank zero. + */ + for (i = 0; i < 6; i++) + OUTREG16(0x1FDE, (mgaReg->ExtVga[i] << 8) | i); + + pciSetBitsLong(pMga->PciTag, PCI_OPTION_REG, OPTION_MASK, + mgaReg->Option); + + MGA_NOT_HAL( + /* select pixel clock PLL as clock source */ + outTi3026(TVP3026_CLK_SEL, 0, mgaReg->DacRegs[3]); + + /* set loop and pixel clock PLL PLLEN bits to 0 */ + outTi3026(TVP3026_PLL_ADDR, 0, 0x2A); + outTi3026(TVP3026_LOAD_CLK_DATA, 0, 0); + outTi3026(TVP3026_PIX_CLK_DATA, 0, 0); + ); /* MGA_NOT_HAL */ + + /* + * This function handles restoring the generic VGA registers. + */ + vgaHWRestore(pScrn, vgaReg, + VGA_SR_MODE | (restoreFonts ? VGA_SR_FONTS : 0)); + MGA3026RestorePalette(pScrn, vgaReg->DAC); + + /* + * Code to restore SVGA registers that have been saved/modified + * goes here. + */ + + MGA_NOT_HAL( + /* program pixel clock PLL */ + outTi3026(TVP3026_PLL_ADDR, 0, 0x00); + for (i = 0; i < 3; i++) + outTi3026(TVP3026_PIX_CLK_DATA, 0, mgaReg->DacClk[i]); + + if (vgaReg->MiscOutReg & 0x08) { + /* poll until pixel clock PLL LOCK bit is set */ + outTi3026(TVP3026_PLL_ADDR, 0, 0x3F); + while ( ! (inTi3026(TVP3026_PIX_CLK_DATA) & 0x40) ); + } + + /* set Q divider for loop clock PLL */ + outTi3026(TVP3026_MCLK_CTL, 0, mgaReg->DacRegs[18]); + ); /* MGA_NOT_HAL */ + + /* program loop PLL */ + outTi3026(TVP3026_PLL_ADDR, 0, 0x00); + for (i = 3; i < 6; i++) + outTi3026(TVP3026_LOAD_CLK_DATA, 0, mgaReg->DacClk[i]); + + MGA_NOT_HAL( + if ((vgaReg->MiscOutReg & 0x08) && ((mgaReg->DacClk[3] & 0xC0) == 0xC0) ) { + /* poll until loop PLL LOCK bit is set */ + outTi3026(TVP3026_PLL_ADDR, 0, 0x3F); + while ( ! (inTi3026(TVP3026_LOAD_CLK_DATA) & 0x40) ); + } + ); /* MGA_NOT_HAL */ + + /* + * restore other DAC registers + */ + for (i = 0; i < DACREGSIZE; i++) + outTi3026(MGADACregs[i], 0, mgaReg->DacRegs[i]); + +#ifdef DEBUG + ErrorF("PCI retry (0-enabled / 1-disabled): %d\n", + !!(mgaReg->Option & 0x20000000)); +#endif +} + +/* + * MGA3026Save -- for mga2064 with ti3026 + * + * This function saves the video state. + */ +static void +MGA3026Save(ScrnInfoPtr pScrn, vgaRegPtr vgaReg, MGARegPtr mgaReg, + Bool saveFonts) +{ + int i; + MGAPtr pMga = MGAPTR(pScrn); + + /* Allocate the DacRegs space if not done already */ + if (mgaReg->DacRegs == NULL) { + mgaReg->DacRegs = xnfcalloc(DACREGSIZE, 1); + } + + /* + * Code is needed to get back to bank zero. + */ + OUTREG16(0x1FDE, 0x0004); + + /* + * This function will handle creating the data structure and filling + * in the generic VGA portion. + */ + vgaHWSave(pScrn, vgaReg, VGA_SR_MODE | (saveFonts ? VGA_SR_FONTS : 0)); + MGA3026SavePalette(pScrn, vgaReg->DAC); + + /* + * The port I/O code necessary to read in the extended registers + * into the fields of the vgaMGARec structure. + */ + for (i = 0; i < 6; i++) + { + OUTREG8(0x1FDE, i); + mgaReg->ExtVga[i] = INREG8(0x1FDF); + } + + MGA_NOT_HAL( + outTi3026(TVP3026_PLL_ADDR, 0, 0x00); + for (i = 0; i < 3; i++) + outTi3026(TVP3026_PIX_CLK_DATA, 0, mgaReg->DacClk[i] = + inTi3026(TVP3026_PIX_CLK_DATA)); + + outTi3026(TVP3026_PLL_ADDR, 0, 0x00); + for (i = 3; i < 6; i++) + outTi3026(TVP3026_LOAD_CLK_DATA, 0, mgaReg->DacClk[i] = + inTi3026(TVP3026_LOAD_CLK_DATA)); + ); /* MGA_NOT_HAL */ + + for (i = 0; i < DACREGSIZE; i++) + mgaReg->DacRegs[i] = inTi3026(MGADACregs[i]); + + mgaReg->Option = pciReadLong(pMga->PciTag, PCI_OPTION_REG); + +#ifdef DEBUG + ErrorF("read: %02X %02X %02X %02X %02X %02X %08lX\n", + mgaReg->DacClk[0], mgaReg->DacClk[1], mgaReg->DacClk[2], mgaReg->DacClk[3], mgaReg->DacClk[4], mgaReg->DacClk[5], mgaReg->Option); + for (i=0; i<sizeof(MGADACregs); i++) ErrorF("%02X ", mgaReg->DacRegs[i]); + for (i=0; i<6; i++) ErrorF(" %02X", mgaReg->ExtVga[i]); + ErrorF("\n"); +#endif +} + + +static void +MGA3026LoadCursorImage( + ScrnInfoPtr pScrn, + unsigned char *src +) +{ + MGAPtr pMga = MGAPTR(pScrn); + int i = 1024; + + outTi3026(TVP3026_CURSOR_CTL, 0xf3, 0x00); /* reset A9,A8 */ + /* reset cursor RAM load address A7..A0 */ + outTi3026dreg(TVP3026_WADR_PAL, 0x00); + + while(i--) { + while (INREG8(0x1FDA) & 0x01); + while (!(INREG8(0x1FDA) & 0x01)); + outTi3026dreg(TVP3026_CUR_RAM, *(src++)); + } +} + + +static void +MGA3026ShowCursor(ScrnInfoPtr pScrn) +{ + MGAPtr pMga = MGAPTR(pScrn); + /* Enable cursor - X11 mode */ + outTi3026(TVP3026_CURSOR_CTL, 0x6c, 0x13); +} + +static void +MGA3026HideCursor(ScrnInfoPtr pScrn) +{ + MGAPtr pMga = MGAPTR(pScrn); + /* Disable cursor */ + outTi3026(TVP3026_CURSOR_CTL, 0xfc, 0x00); +} + +static void +MGA3026SetCursorPosition( + ScrnInfoPtr pScrn, + int x, int y +) +{ + MGAPtr pMga = MGAPTR(pScrn); + x += 64; + y += 64; + + /* Output position - "only" 12 bits of location documented */ + + outTi3026dreg(TVP3026_CUR_XLOW, x & 0xFF); + outTi3026dreg(TVP3026_CUR_XHI, (x >> 8) & 0x0F); + outTi3026dreg(TVP3026_CUR_YLOW, y & 0xFF); + outTi3026dreg(TVP3026_CUR_YHI, (y >> 8) & 0x0F); +} + +static void +MGA3026SetCursorColors( + ScrnInfoPtr pScrn, + int bg, int fg +) +{ + MGAPtr pMga = MGAPTR(pScrn); + /* The TI 3026 cursor is always 8 bits so shift 8, not 10 */ + + /* Background color */ + outTi3026dreg(TVP3026_CUR_COL_ADDR, 1); + outTi3026dreg(TVP3026_CUR_COL_DATA, (bg & 0x00FF0000) >> 16); + outTi3026dreg(TVP3026_CUR_COL_DATA, (bg & 0x0000FF00) >> 8); + outTi3026dreg(TVP3026_CUR_COL_DATA, (bg & 0x000000FF)); + + /* Foreground color */ + outTi3026dreg(TVP3026_CUR_COL_ADDR, 2); + outTi3026dreg(TVP3026_CUR_COL_DATA, (fg & 0x00FF0000) >> 16); + outTi3026dreg(TVP3026_CUR_COL_DATA, (fg & 0x0000FF00) >> 8); + outTi3026dreg(TVP3026_CUR_COL_DATA, (fg & 0x000000FF)); +} + +static Bool +MGA3026UseHWCursor(ScreenPtr pScrn, CursorPtr pCurs) +{ + if( XF86SCRNINFO(pScrn)->currentMode->Flags & V_DBLSCAN ) + return FALSE; + return TRUE; +} + +static const int DDC_SDA_MASK = 1 << 2; +static const int DDC_SCL_MASK = 1 << 4; + +static unsigned int +MGA3026_ddc1Read(ScrnInfoPtr pScrn) +{ + MGAPtr pMga = MGAPTR(pScrn); + + /* Define the SDA as an input */ + outTi3026(TVP3026_GEN_IO_CTL, 0xfb, 0); + + /* wait for Vsync */ + while( INREG( MGAREG_Status ) & 0x08 ); + while( ! (INREG( MGAREG_Status ) & 0x08) ); + + /* Get the result */ + return (inTi3026(TVP3026_GEN_IO_DATA) & DDC_SDA_MASK) >> 2 ; +} + +static void +MGA3026_I2CGetBits(I2CBusPtr b, int *clock, int *data) +{ + ScrnInfoPtr pScrn = xf86Screens[b->scrnIndex]; + MGAPtr pMga = MGAPTR(pScrn); + unsigned char val; + + /* Get the result. */ + val = inTi3026(TVP3026_GEN_IO_DATA); + *clock = (val & DDC_SCL_MASK) != 0; + *data = (val & DDC_SDA_MASK) != 0; + +#ifdef DEBUG + ErrorF("MGA3026_I2CGetBits(%p,...) val=0x%x, returns clock %d, data %d\n", b, val, *clock, *data); +#endif +} + +/* + * ATTENTION! - the DATA and CLOCK lines need to be tri-stated when + * high. Therefore turn off output driver for the line to set line + * to high. High signal is maintained by a 15k Ohm pll-up resistor. + */ +static void +MGA3026_I2CPutBits(I2CBusPtr b, int clock, int data) +{ + ScrnInfoPtr pScrn = xf86Screens[b->scrnIndex]; + MGAPtr pMga = MGAPTR(pScrn); + unsigned char val,drv; + + /* Write the values */ + val = (clock ? DDC_SCL_MASK : 0) | (data ? DDC_SDA_MASK : 0); + drv = ((!clock) ? DDC_SCL_MASK : 0) | ((!data) ? DDC_SDA_MASK : 0); + /* Define the SDA (Data) and SCL (clock) as outputs */ + outTi3026(TVP3026_GEN_IO_CTL, ~(DDC_SDA_MASK | DDC_SCL_MASK), drv); + outTi3026(TVP3026_GEN_IO_DATA, ~(DDC_SDA_MASK | DDC_SCL_MASK), val); + +#ifdef DEBUG + ErrorF("MGA3026_I2CPutBits(%p, %d, %d) val=0x%x\n", b, clock, data, val); +#endif + +} + + +Bool +MGA3026_i2cInit(ScrnInfoPtr pScrn) +{ + MGAPtr pMga = MGAPTR(pScrn); + I2CBusPtr I2CPtr; + + I2CPtr = xf86CreateI2CBusRec(); + if(!I2CPtr) return FALSE; + + pMga->DDC_Bus1 = I2CPtr; + + I2CPtr->BusName = "DDC"; + I2CPtr->scrnIndex = pScrn->scrnIndex; + I2CPtr->I2CPutBits = MGA3026_I2CPutBits; + I2CPtr->I2CGetBits = MGA3026_I2CGetBits; + + /* I2CPutByte is timing out, experimenting with AcknTimeout + * default is 2CPtr->AcknTimeout = 5; + */ + /* I2CPtr->AcknTimeout = 10; */ + + if (!xf86I2CBusInit(I2CPtr)) { + return FALSE; + } + return TRUE; +} + +static void +MGA3026RamdacInit(ScrnInfoPtr pScrn) +{ + MGAPtr pMga; + MGARamdacPtr MGAdac; + + pMga = MGAPTR(pScrn); + MGAdac = &pMga->Dac; + + MGAdac->isHwCursor = TRUE; + MGAdac->CursorMaxWidth = 64; + MGAdac->CursorMaxHeight = 64; + MGAdac->SetCursorColors = MGA3026SetCursorColors; + MGAdac->SetCursorPosition = MGA3026SetCursorPosition; + MGAdac->LoadCursorImage = MGA3026LoadCursorImage; + MGAdac->HideCursor = MGA3026HideCursor; + MGAdac->ShowCursor = MGA3026ShowCursor; + MGAdac->UseHWCursor = MGA3026UseHWCursor; + MGAdac->CursorFlags = +#if X_BYTE_ORDER == X_LITTLE_ENDIAN + HARDWARE_CURSOR_BIT_ORDER_MSBFIRST | +#endif + HARDWARE_CURSOR_TRUECOLOR_AT_8BPP | + HARDWARE_CURSOR_SOURCE_MASK_NOT_INTERLEAVED; + + MGAdac->LoadPalette = MGA3026LoadPalette; + MGAdac->RestorePalette = MGA3026RestorePalette; + + MGAdac->maxPixelClock = pMga->bios.pixel.max_freq; + MGAdac->ClockFrom = X_PROBED; + + MGAdac->MemoryClock = pMga->bios.mem_clock; + MGAdac->MemClkFrom = X_PROBED; + MGAdac->SetMemClk = TRUE; + + + /* safety check */ + if ( (MGAdac->MemoryClock < 40000) || + (MGAdac->MemoryClock > 70000) ) + MGAdac->MemoryClock = 50000; + + /* + * Should initialise a sane default when the probed value is + * obviously garbage. + */ + + /* Check if interleaving can be used and set the rounding value */ + if (pScrn->videoRam > 2048) + pMga->Interleave = TRUE; + else { + pMga->Interleave = FALSE; + pMga->BppShifts[0]++; + pMga->BppShifts[1]++; + pMga->BppShifts[2]++; + pMga->BppShifts[3]++; + } + + pMga->Roundings[0] = 128 >> pMga->BppShifts[0]; + pMga->Roundings[1] = 128 >> pMga->BppShifts[1]; + pMga->Roundings[2] = 128 >> pMga->BppShifts[2]; + pMga->Roundings[3] = 128 >> pMga->BppShifts[3]; + + /* Set Fast bitblt flag */ + pMga->HasFBitBlt = pMga->bios.fast_bitblt; +} + +void MGA3026LoadPalette( + ScrnInfoPtr pScrn, + int numColors, + int *indices, + LOCO *colors, + VisualPtr pVisual +){ + MGAPtr pMga = MGAPTR(pScrn); + int i, index; + + if(pMga->CurrentLayout.Overlay8Plus24 && (pVisual->nplanes != 8)) + return; + + if (pVisual->nplanes == 16) { + for(i = 0; i < numColors; i++) { + index = indices[i]; + outTi3026dreg(MGA1064_WADR_PAL, index << 2); + outTi3026dreg(MGA1064_COL_PAL, colors[index >> 1].red); + outTi3026dreg(MGA1064_COL_PAL, colors[index].green); + outTi3026dreg(MGA1064_COL_PAL, colors[index >> 1].blue); + + /* we have to write 2 indices since the pixel X on the + TVP3026 has green colors at different locations from + the red and blue colors */ + if(index <= 31) { + outTi3026dreg(MGA1064_WADR_PAL, index << 3); + outTi3026dreg(MGA1064_COL_PAL, colors[index].red); + outTi3026dreg(MGA1064_COL_PAL, colors[(index << 1) + 1].green); + outTi3026dreg(MGA1064_COL_PAL, colors[index].blue); + } + } + } else { + int shift = (pVisual->nplanes == 15) ? 3 : 0; + + for(i = 0; i < numColors; i++) { + index = indices[i]; + outTi3026dreg(MGA1064_WADR_PAL, index << shift); + outTi3026dreg(MGA1064_COL_PAL, colors[index].red); + outTi3026dreg(MGA1064_COL_PAL, colors[index].green); + outTi3026dreg(MGA1064_COL_PAL, colors[index].blue); + } + } +} + + +static void +MGA3026SavePalette(ScrnInfoPtr pScrn, unsigned char* pntr) +{ + MGAPtr pMga = MGAPTR(pScrn); + int i = 768; + + outTi3026dreg(TVP3026_RADR_PAL, 0x00); + while(i--) + *(pntr++) = inTi3026dreg(TVP3026_COL_PAL); +} + +static void +MGA3026RestorePalette(ScrnInfoPtr pScrn, unsigned char* pntr) +{ + MGAPtr pMga = MGAPTR(pScrn); + int i = 768; + + outTi3026dreg(TVP3026_WADR_PAL, 0x00); + while(i--) + outTi3026dreg(TVP3026_COL_PAL, *(pntr++)); +} + + +void MGA2064SetupFuncs(ScrnInfoPtr pScrn) +{ + MGAPtr pMga = MGAPTR(pScrn); + + pMga->PreInit = MGA3026RamdacInit; + pMga->Save = MGA3026Save; + pMga->Restore = MGA3026Restore; + pMga->ModeInit = MGA3026Init; + pMga->ddc1Read = MGA3026_ddc1Read; + /* vgaHWddc1SetSpeed will only work if the card is in VGA mode */ + pMga->DDC1SetSpeed = vgaHWddc1SetSpeedWeak(); + pMga->i2cInit = MGA3026_i2cInit; +} diff --git a/driver/xf86-video-mga/src/mga_dacG.c b/driver/xf86-video-mga/src/mga_dacG.c new file mode 100644 index 000000000..df29b4890 --- /dev/null +++ b/driver/xf86-video-mga/src/mga_dacG.c @@ -0,0 +1,1380 @@ +/* + * MGA-1064, MGA-G100, MGA-G200, MGA-G400, MGA-G550 RAMDAC driver + */ + +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dacG.c,v 1.54tsi Exp $ */ + +/* + * This is a first cut at a non-accelerated version to work with the + * new server design (DHD). + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include "colormapst.h" + +/* All drivers should typically include these */ +#include "xf86.h" +#include "xf86_OSproc.h" + +/* Drivers for PCI hardware need this */ +#include "xf86PciInfo.h" + +/* Drivers that need to access the PCI config space directly need this */ +#include "xf86Pci.h" + +#include "mga_reg.h" +#include "mga.h" +#include "mga_macros.h" +#include "mga_maven.h" + +#include "xf86DDC.h" + +#include <stdlib.h> +#include <unistd.h> + +/* + * implementation + */ + +#define DACREGSIZE 0x50 + +/* + * Only change bits shown in this mask. Ideally reserved bits should be + * zeroed here. Also, don't change the vgaioen bit here since it is + * controlled elsewhere. + * + * XXX These settings need to be checked. + */ +#define OPTION1_MASK 0xFFFFFEFF +#define OPTION2_MASK 0xFFFFFFFF +#define OPTION3_MASK 0xFFFFFFFF + +#define OPTION1_MASK_PRIMARY 0xFFFC0FF + +static void MGAGRamdacInit(ScrnInfoPtr); +static void MGAGSave(ScrnInfoPtr, vgaRegPtr, MGARegPtr, Bool); +static void MGAGRestore(ScrnInfoPtr, vgaRegPtr, MGARegPtr, Bool); +static Bool MGAGInit(ScrnInfoPtr, DisplayModePtr); +static void MGAGLoadPalette(ScrnInfoPtr, int, int*, LOCO*, VisualPtr); +static Bool MGAG_i2cInit(ScrnInfoPtr pScrn); + +static void +MGAG200SEComputePLLParam(ScrnInfoPtr pScrn, long lFo, int *M, int *N, int *P) +{ + unsigned int ulComputedFo; + unsigned int ulFDelta; + unsigned int ulFPermitedDelta; + unsigned int ulFTmpDelta; + unsigned int ulVCOMax, ulVCOMin; + unsigned int ulTestP; + unsigned int ulTestM; + unsigned int ulTestN; + unsigned int ulPLLFreqRef; + + ulVCOMax = 320000; + ulVCOMin = 160000; + ulPLLFreqRef = 25000; + + ulFDelta = 0xFFFFFFFF; + /* Permited delta is 0.5% as VESA Specification */ + ulFPermitedDelta = lFo * 5 / 1000; + + /* Then we need to minimize the M while staying within 0.5% */ + for (ulTestP = 8; ulTestP > 0; ulTestP >>= 1) { + if ((lFo * ulTestP) > ulVCOMax) continue; + if ((lFo * ulTestP) < ulVCOMin) continue; + + for (ulTestN = 17; ulTestN <= 256; ulTestN++) { + for (ulTestM = 1; ulTestM <= 32; ulTestM++) { + ulComputedFo = (ulPLLFreqRef * ulTestN) / (ulTestM * ulTestP); + if (ulComputedFo > lFo) + ulFTmpDelta = ulComputedFo - lFo; + else + ulFTmpDelta = lFo - ulComputedFo; + + if (ulFTmpDelta < ulFDelta) { + ulFDelta = ulFTmpDelta; + *M = ulTestM - 1; + *N = ulTestN - 1; + *P = ulTestP - 1; + } + } + } + } +} + + +/** + * Calculate the PLL settings (m, n, p, s). + * + * For more information, refer to the Matrox "MGA1064SG Developer + * Specification" (document 10524-MS-0100). chapter 5.7.8. "PLLs Clocks + * Generators" + * + * \param f_out Desired clock frequency, measured in kHz. + * \param best_m Value of PLL 'm' register. + * \param best_n Value of PLL 'n' register. + * \param p Value of PLL 'p' register. + * \param s Value of PLL 's' filter register (pix pll clock only). + */ + +static void +MGAGCalcClock ( ScrnInfoPtr pScrn, long f_out, + int *best_m, int *best_n, int *p, int *s ) +{ + MGAPtr pMga = MGAPTR(pScrn); + int m, n; + double f_vco; + double m_err, calc_f; + const double ref_freq = (double) pMga->bios.pll_ref_freq; + int feed_div_min, feed_div_max; + int in_div_min, in_div_max; + int post_div_max; + + switch( pMga->Chipset ) + { + case PCI_CHIP_MGA1064: + feed_div_min = 100; + feed_div_max = 127; + in_div_min = 1; + in_div_max = 31; + post_div_max = 7; + break; + case PCI_CHIP_MGAG400: + case PCI_CHIP_MGAG550: + feed_div_min = 7; + feed_div_max = 127; + in_div_min = 1; + in_div_max = 31; + post_div_max = 7; + break; + case PCI_CHIP_MGAG200_SE_A_PCI: + case PCI_CHIP_MGAG200_SE_B_PCI: + case PCI_CHIP_MGAG100: + case PCI_CHIP_MGAG100_PCI: + case PCI_CHIP_MGAG200: + case PCI_CHIP_MGAG200_PCI: + default: + feed_div_min = 7; + feed_div_max = 127; + in_div_min = 1; + in_div_max = 6; + post_div_max = 7; + break; + } + + /* Make sure that f_min <= f_out */ + if ( f_out < ( pMga->bios.pixel.min_freq / 8)) + f_out = pMga->bios.pixel.min_freq / 8; + + /* + * f_pll = f_vco / (p+1) + * Choose p so that + * pMga->bios.pixel.min_freq <= f_vco <= pMga->bios.pixel.max_freq + * we don't have to bother checking for this maximum limit. + */ + f_vco = ( double ) f_out; + for ( *p = 0; *p <= post_div_max && f_vco < pMga->bios.pixel.min_freq; + *p = *p * 2 + 1, f_vco *= 2.0); + + /* Initial amount of error for frequency maximum */ + m_err = f_out; + + /* Search for the different values of ( m ) */ + for ( m = in_div_min ; m <= in_div_max ; m++ ) + { + /* see values of ( n ) which we can't use */ + for ( n = feed_div_min; n <= feed_div_max; n++ ) + { + calc_f = ref_freq * (n + 1) / (m + 1) ; + + /* + * Pick the closest frequency. + */ + if ( abs(calc_f - f_vco) < m_err ) { + m_err = abs(calc_f - f_vco); + *best_m = m; + *best_n = n; + } + } + } + + /* Now all the calculations can be completed */ + f_vco = ref_freq * (*best_n + 1) / (*best_m + 1); + + /* Adjustments for filtering pll feed back */ + if ( (50000.0 <= f_vco) + && (f_vco < 100000.0) ) + *s = 0; + if ( (100000.0 <= f_vco) + && (f_vco < 140000.0) ) + *s = 1; + if ( (140000.0 <= f_vco) + && (f_vco < 180000.0) ) + *s = 2; + if ( (180000.0 <= f_vco) ) + *s = 3; + +#ifdef DEBUG + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "f_out_requ =%ld f_pll_real=%.1f f_vco=%.1f n=0x%x m=0x%x p=0x%x s=0x%x\n", + f_out, (f_vco / (*p + 1)), f_vco, *best_n, *best_m, *p, *s ); +#endif +} + +/* + * MGAGSetPCLK - Set the pixel (PCLK) clock. + */ +static void +MGAGSetPCLK( ScrnInfoPtr pScrn, long f_out ) +{ + MGAPtr pMga = MGAPTR(pScrn); + MGARegPtr pReg = &pMga->ModeReg; + + /* Pixel clock values */ + int m, n, p, s; + + if(MGAISGx50(pMga)) { + pReg->Clock = f_out; + return; + } + + if (pMga->is_G200SE) { + MGAG200SEComputePLLParam(pScrn, f_out, &m, &n, &p); + + pReg->DacRegs[ MGA1064_PIX_PLLC_M ] = m; + pReg->DacRegs[ MGA1064_PIX_PLLC_N ] = n; + pReg->DacRegs[ MGA1064_PIX_PLLC_P ] = p; + } else { + /* Do the calculations for m, n, p and s */ + MGAGCalcClock( pScrn, f_out, &m, &n, &p, &s ); + + /* Values for the pixel clock PLL registers */ + pReg->DacRegs[ MGA1064_PIX_PLLC_M ] = m & 0x1F; + pReg->DacRegs[ MGA1064_PIX_PLLC_N ] = n & 0x7F; + pReg->DacRegs[ MGA1064_PIX_PLLC_P ] = (p & 0x07) | + ((s & 0x03) << 3); + } +} + +/* + * MGAGInit + */ +static Bool +MGAGInit(ScrnInfoPtr pScrn, DisplayModePtr mode) +{ + /* + * initial values of the DAC registers + */ + const static unsigned char initDAC[] = { + /* 0x00: */ 0, 0, 0, 0, 0, 0, 0x00, 0, + /* 0x08: */ 0, 0, 0, 0, 0, 0, 0, 0, + /* 0x10: */ 0, 0, 0, 0, 0, 0, 0, 0, + /* 0x18: */ 0x00, 0, 0xC9, 0xFF, 0xBF, 0x20, 0x1F, 0x20, + /* 0x20: */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0x28: */ 0x00, 0x00, 0x00, 0x00, 0, 0, 0, 0x40, + /* 0x30: */ 0x00, 0xB0, 0x00, 0xC2, 0x34, 0x14, 0x02, 0x83, + /* 0x38: */ 0x00, 0x93, 0x00, 0x77, 0x00, 0x00, 0x00, 0x3A, + /* 0x40: */ 0, 0, 0, 0, 0, 0, 0, 0, + /* 0x48: */ 0, 0, 0, 0, 0, 0, 0, 0 + }; + + int i; + int hd, hs, he, ht, vd, vs, ve, vt, wd; + int BppShift; + MGAPtr pMga; + MGARegPtr pReg; + vgaRegPtr pVga; + MGAFBLayout *pLayout; + xMODEINFO ModeInfo; + + ModeInfo.ulDispWidth = mode->HDisplay; + ModeInfo.ulDispHeight = mode->VDisplay; + ModeInfo.ulFBPitch = mode->HDisplay; + ModeInfo.ulBpp = pScrn->bitsPerPixel; + ModeInfo.flSignalMode = 0; + ModeInfo.ulPixClock = mode->Clock; + ModeInfo.ulHFPorch = mode->HSyncStart - mode->HDisplay; + ModeInfo.ulHSync = mode->HSyncEnd - mode->HSyncStart; + ModeInfo.ulHBPorch = mode->HTotal - mode->HSyncEnd; + ModeInfo.ulVFPorch = mode->VSyncStart - mode->VDisplay; + ModeInfo.ulVSync = mode->VSyncEnd - mode->VSyncStart; + ModeInfo.ulVBPorch = mode->VTotal - mode->VSyncEnd; + + pMga = MGAPTR(pScrn); + pReg = &pMga->ModeReg; + pVga = &VGAHWPTR(pScrn)->ModeReg; + pLayout = &pMga->CurrentLayout; + + BppShift = pMga->BppShifts[(pLayout->bitsPerPixel >> 3) - 1]; + + MGA_NOT_HAL( + /* Allocate the DacRegs space if not done already */ + if (pReg->DacRegs == NULL) { + pReg->DacRegs = xnfcalloc(DACREGSIZE, 1); + } + for (i = 0; i < DACREGSIZE; i++) { + pReg->DacRegs[i] = initDAC[i]; + } + ); /* MGA_NOT_HAL */ + + switch(pMga->Chipset) + { + case PCI_CHIP_MGA1064: + pReg->DacRegs[ MGA1064_SYS_PLL_M ] = 0x04; + pReg->DacRegs[ MGA1064_SYS_PLL_N ] = 0x44; + pReg->DacRegs[ MGA1064_SYS_PLL_P ] = 0x18; + pReg->Option = 0x5F094F21; + pReg->Option2 = 0x00000000; + break; + case PCI_CHIP_MGAG100: + case PCI_CHIP_MGAG100_PCI: + pReg->DacRegs[ MGAGDAC_XVREFCTRL ] = 0x03; + if(pMga->HasSDRAM) { + if(pMga->OverclockMem) { + /* 220 Mhz */ + pReg->DacRegs[ MGA1064_SYS_PLL_M ] = 0x06; + pReg->DacRegs[ MGA1064_SYS_PLL_N ] = 0x38; + pReg->DacRegs[ MGA1064_SYS_PLL_P ] = 0x18; + } else { + /* 203 Mhz */ + pReg->DacRegs[ MGA1064_SYS_PLL_M ] = 0x01; + pReg->DacRegs[ MGA1064_SYS_PLL_N ] = 0x0E; + pReg->DacRegs[ MGA1064_SYS_PLL_P ] = 0x18; + } + pReg->Option = 0x404991a9; + } else { + if(pMga->OverclockMem) { + /* 143 Mhz */ + pReg->DacRegs[ MGA1064_SYS_PLL_M ] = 0x06; + pReg->DacRegs[ MGA1064_SYS_PLL_N ] = 0x24; + pReg->DacRegs[ MGA1064_SYS_PLL_P ] = 0x10; + } else { + /* 124 Mhz */ + pReg->DacRegs[ MGA1064_SYS_PLL_M ] = 0x04; + pReg->DacRegs[ MGA1064_SYS_PLL_N ] = 0x16; + pReg->DacRegs[ MGA1064_SYS_PLL_P ] = 0x08; + } + pReg->Option = 0x4049d121; + } + pReg->Option2 = 0x0000007; + break; + case PCI_CHIP_MGAG400: + case PCI_CHIP_MGAG550: +#ifdef USEMGAHAL + MGA_HAL(break;); +#endif + if (MGAISGx50(pMga)) + break; + + if(pMga->Dac.maxPixelClock == 360000) { /* G400 MAX */ + if(pMga->OverclockMem) { + /* 150/200 */ + pReg->DacRegs[ MGA1064_SYS_PLL_M ] = 0x05; + pReg->DacRegs[ MGA1064_SYS_PLL_N ] = 0x42; + pReg->DacRegs[ MGA1064_SYS_PLL_P ] = 0x18; + pReg->Option3 = 0x019B8419; + pReg->Option = 0x50574120; + } else { + /* 125/166 */ + pReg->DacRegs[ MGA1064_SYS_PLL_M ] = 0x02; + pReg->DacRegs[ MGA1064_SYS_PLL_N ] = 0x1B; + pReg->DacRegs[ MGA1064_SYS_PLL_P ] = 0x18; + pReg->Option3 = 0x019B8419; + pReg->Option = 0x5053C120; + } + } else { + if(pMga->OverclockMem) { + /* 125/166 */ + pReg->DacRegs[ MGA1064_SYS_PLL_M ] = 0x02; + pReg->DacRegs[ MGA1064_SYS_PLL_N ] = 0x1B; + pReg->DacRegs[ MGA1064_SYS_PLL_P ] = 0x18; + pReg->Option3 = 0x019B8419; + pReg->Option = 0x5053C120; + } else { + /* 110/166 */ + pReg->DacRegs[ MGA1064_SYS_PLL_M ] = 0x13; + pReg->DacRegs[ MGA1064_SYS_PLL_N ] = 0x7A; + pReg->DacRegs[ MGA1064_SYS_PLL_P ] = 0x08; + pReg->Option3 = 0x0190a421; + pReg->Option = 0x50044120; + } + } + if(pMga->HasSDRAM) + pReg->Option &= ~(1 << 14); + pReg->Option2 = 0x01003000; + break; + case PCI_CHIP_MGAG200_SE_A_PCI: + case PCI_CHIP_MGAG200_SE_B_PCI: +#ifdef USEMGAHAL + MGA_HAL(break;); +#endif + pReg->DacRegs[ MGA1064_VREF_CTL ] = 0x03; + pReg->DacRegs[ MGA1064_PIX_CLK_CTL ] = 0x01; + pReg->DacRegs[ MGA1064_MISC_CTL ] = 0x19; + if(pMga->HasSDRAM) + pReg->Option = 0x40499121; + else + pReg->Option = 0x4049cd21; + pReg->Option2 = 0x00008000; + break; + case PCI_CHIP_MGAG200: + case PCI_CHIP_MGAG200_PCI: + default: +#ifdef USEMGAHAL + MGA_HAL(break;); +#endif + if(pMga->OverclockMem) { + /* 143 Mhz */ + pReg->DacRegs[ MGA1064_SYS_PLL_M ] = 0x06; + pReg->DacRegs[ MGA1064_SYS_PLL_N ] = 0x24; + pReg->DacRegs[ MGA1064_SYS_PLL_P ] = 0x10; + } else { + /* 124 Mhz */ + pReg->DacRegs[ MGA1064_SYS_PLL_M ] = 0x04; + pReg->DacRegs[ MGA1064_SYS_PLL_N ] = 0x2D; + pReg->DacRegs[ MGA1064_SYS_PLL_P ] = 0x19; + } + pReg->Option2 = 0x00008000; + if(pMga->HasSDRAM) + pReg->Option = 0x40499121; + else + pReg->Option = 0x4049cd21; + break; + } + + MGA_NOT_HAL( + /* must always have the pci retries on but rely on + polling to keep them from occuring */ + pReg->Option &= ~0x20000000; + + switch(pLayout->bitsPerPixel) + { + case 8: + pReg->DacRegs[ MGA1064_MUL_CTL ] = MGA1064_MUL_CTL_8bits; + break; + case 16: + pReg->DacRegs[ MGA1064_MUL_CTL ] = MGA1064_MUL_CTL_16bits; + if ( (pLayout->weight.red == 5) && (pLayout->weight.green == 5) + && (pLayout->weight.blue == 5) ) { + pReg->DacRegs[ MGA1064_MUL_CTL ] = MGA1064_MUL_CTL_15bits; + } + break; + case 24: + pReg->DacRegs[ MGA1064_MUL_CTL ] = MGA1064_MUL_CTL_24bits; + break; + case 32: + if(pLayout->Overlay8Plus24) { + pReg->DacRegs[ MGA1064_MUL_CTL ] = MGA1064_MUL_CTL_32bits; + pReg->DacRegs[ MGA1064_COL_KEY_MSK_LSB ] = 0xFF; + pReg->DacRegs[ MGA1064_COL_KEY_LSB ] = pMga->colorKey; + } else + pReg->DacRegs[ MGA1064_MUL_CTL ] = MGA1064_MUL_CTL_32_24bits; + break; + default: + FatalError("MGA: unsupported depth\n"); + } + ); /* MGA_NOT_HAL */ + + /* + * This will initialize all of the generic VGA registers. + */ + if (!vgaHWInit(pScrn, mode)) + return(FALSE); + + /* + * Here all of the MGA registers get filled in. + */ + hd = (mode->CrtcHDisplay >> 3) - 1; + hs = (mode->CrtcHSyncStart >> 3) - 1; + he = (mode->CrtcHSyncEnd >> 3) - 1; + ht = (mode->CrtcHTotal >> 3) - 1; + vd = mode->CrtcVDisplay - 1; + vs = mode->CrtcVSyncStart - 1; + ve = mode->CrtcVSyncEnd - 1; + vt = mode->CrtcVTotal - 2; + + /* HTOTAL & 0x7 equal to 0x6 in 8bpp or 0x4 in 24bpp causes strange + * vertical stripes + */ + if((ht & 0x07) == 0x06 || (ht & 0x07) == 0x04) + ht++; + + if (pLayout->bitsPerPixel == 24) + wd = (pLayout->displayWidth * 3) >> (4 - BppShift); + else + wd = pLayout->displayWidth >> (4 - BppShift); + + pReg->ExtVga[0] = 0; + pReg->ExtVga[5] = 0; + + if (mode->Flags & V_INTERLACE) + { + pReg->ExtVga[0] = 0x80; + pReg->ExtVga[5] = (hs + he - ht) >> 1; + wd <<= 1; + vt &= 0xFFFE; + } + + pReg->ExtVga[0] |= (wd & 0x300) >> 4; + pReg->ExtVga[1] = (((ht - 4) & 0x100) >> 8) | + ((hd & 0x100) >> 7) | + ((hs & 0x100) >> 6) | + (ht & 0x40); + pReg->ExtVga[2] = ((vt & 0xc00) >> 10) | + ((vd & 0x400) >> 8) | + ((vd & 0xc00) >> 7) | + ((vs & 0xc00) >> 5) | + ((vd & 0x400) >> 3); /* linecomp */ + if (pLayout->bitsPerPixel == 24) + pReg->ExtVga[3] = (((1 << BppShift) * 3) - 1) | 0x80; + else + pReg->ExtVga[3] = ((1 << BppShift) - 1) | 0x80; + + pReg->ExtVga[4] = 0; + + pVga->CRTC[0] = ht - 4; + pVga->CRTC[1] = hd; + pVga->CRTC[2] = hd; + pVga->CRTC[3] = (ht & 0x1F) | 0x80; + pVga->CRTC[4] = hs; + pVga->CRTC[5] = ((ht & 0x20) << 2) | (he & 0x1F); + pVga->CRTC[6] = vt & 0xFF; + pVga->CRTC[7] = ((vt & 0x100) >> 8 ) | + ((vd & 0x100) >> 7 ) | + ((vs & 0x100) >> 6 ) | + ((vd & 0x100) >> 5 ) | + ((vd & 0x100) >> 4 ) | /* linecomp */ + ((vt & 0x200) >> 4 ) | + ((vd & 0x200) >> 3 ) | + ((vs & 0x200) >> 2 ); + pVga->CRTC[9] = ((vd & 0x200) >> 4) | + ((vd & 0x200) >> 3); /* linecomp */ + pVga->CRTC[16] = vs & 0xFF; + pVga->CRTC[17] = (ve & 0x0F) | 0x20; + pVga->CRTC[18] = vd & 0xFF; + pVga->CRTC[19] = wd & 0xFF; + pVga->CRTC[21] = vd & 0xFF; + pVga->CRTC[22] = (vt + 1) & 0xFF; + pVga->CRTC[24] = vd & 0xFF; /* linecomp */ + + MGA_NOT_HAL(pReg->DacRegs[MGA1064_CURSOR_BASE_ADR_LOW] = pMga->FbCursorOffset >> 10); + MGA_NOT_HAL(pReg->DacRegs[MGA1064_CURSOR_BASE_ADR_HI] = pMga->FbCursorOffset >> 18); + + if (pMga->SyncOnGreen) { + MGA_NOT_HAL(pReg->DacRegs[MGA1064_GEN_CTL] &= ~0x20); + pReg->ExtVga[3] |= 0x40; + } + + /* select external clock */ + pVga->MiscOutReg |= 0x0C; + + MGA_NOT_HAL( + if (mode->Flags & V_DBLSCAN) + pVga->CRTC[9] |= 0x80; + + if(MGAISGx50(pMga)) { + OUTREG(MGAREG_ZORG, 0); + } + + MGAGSetPCLK(pScrn, mode->Clock); + ); /* MGA_NOT_HAL */ + + /* This disables the VGA memory aperture */ + pVga->MiscOutReg &= ~0x02; + + /* Urgh. Why do we define our own xMODEINFO structure instead + * of just passing the blinkin' DisplayModePtr? If we're going to + * just cut'n'paste routines from the HALlib, it would be better + * just to strip the MacroVision stuff out of the HALlib and release + * that, surely? + */ + /********************* Second Crtc programming **************/ + /* Writing values to crtc2[] array */ + if (pMga->SecondCrtc) + { + MGACRTC2Get(pScrn, &ModeInfo); + MGACRTC2GetPitch(pScrn, &ModeInfo); + MGACRTC2GetDisplayStart(pScrn, &ModeInfo,0,0,0); + } + +#if X_BYTE_ORDER == X_BIG_ENDIAN + /* Disable byte-swapping for big-endian architectures - the XFree + driver seems to like a little-endian framebuffer -ReneR */ + /* pReg->Option |= 0x80000000; */ + pReg->Option &= ~0x80000000; +#endif + + return(TRUE); +} + +/* + * MGAGLoadPalette + */ + +static void +MGAPaletteLoadCallback(ScrnInfoPtr pScrn) +{ + MGAPtr pMga = MGAPTR(pScrn); + MGAPaletteInfo *pal = pMga->palinfo; + int i; + + while (!(INREG8(0x1FDA) & 0x08)); + + for(i = 0; i < 256; i++) { + if(pal->update) { + outMGAdreg(MGA1064_WADR_PAL, i); + outMGAdreg(MGA1064_COL_PAL, pal->red); + outMGAdreg(MGA1064_COL_PAL, pal->green); + outMGAdreg(MGA1064_COL_PAL, pal->blue); + pal->update = FALSE; + } + pal++; + } + pMga->PaletteLoadCallback = NULL; +} + +void MGAGLoadPalette( + ScrnInfoPtr pScrn, + int numColors, + int *indices, + LOCO *colors, + VisualPtr pVisual +){ + MGAPtr pMga = MGAPTR(pScrn); + + if((pMga->CurrentLayout.Overlay8Plus24) && (pVisual->nplanes != 8)) + return; + + if(pMga->Chipset == PCI_CHIP_MGAG400 || pMga->Chipset == PCI_CHIP_MGAG550){ + /* load them at the retrace in the block handler instead to + work around some problems with static on the screen */ + while(numColors--) { + pMga->palinfo[*indices].update = TRUE; + pMga->palinfo[*indices].red = colors[*indices].red; + pMga->palinfo[*indices].green = colors[*indices].green; + pMga->palinfo[*indices].blue = colors[*indices].blue; + indices++; + } + pMga->PaletteLoadCallback = MGAPaletteLoadCallback; + return; + } else { + while(numColors--) { + outMGAdreg(MGA1064_WADR_PAL, *indices); + outMGAdreg(MGA1064_COL_PAL, colors[*indices].red); + outMGAdreg(MGA1064_COL_PAL, colors[*indices].green); + outMGAdreg(MGA1064_COL_PAL, colors[*indices].blue); + indices++; + } + } +} + +/* + * MGAGRestorePalette + */ + +static void +MGAGRestorePalette(ScrnInfoPtr pScrn, unsigned char* pntr) +{ + MGAPtr pMga = MGAPTR(pScrn); + int i = 768; + + outMGAdreg(MGA1064_WADR_PAL, 0x00); + while(i--) + outMGAdreg(MGA1064_COL_PAL, *(pntr++)); +} + +/* + * MGAGSavePalette + */ +static void +MGAGSavePalette(ScrnInfoPtr pScrn, unsigned char* pntr) +{ + MGAPtr pMga = MGAPTR(pScrn); + int i = 768; + + outMGAdreg(MGA1064_RADR_PAL, 0x00); + while(i--) + *(pntr++) = inMGAdreg(MGA1064_COL_PAL); +} + +/* + * MGAGRestore + * + * This function restores a video mode. It basically writes out all of + * the registers that have previously been saved. + */ +static void +MGAGRestore(ScrnInfoPtr pScrn, vgaRegPtr vgaReg, MGARegPtr mgaReg, + Bool restoreFonts) +{ + int i; + MGAPtr pMga = MGAPTR(pScrn); + CARD32 optionMask; + + /* + * Pixel Clock needs to be restored regardless if we use + * HALLib or not. HALlib doesn't do a good job restoring + * VESA modes. MATROX: hint, hint. + */ + if (MGAISGx50(pMga) && mgaReg->Clock) { + /* + * With HALlib program only when restoring to console! + * To test this we check for Clock == 0. + */ + MGAG450SetPLLFreq(pScrn, mgaReg->Clock); + mgaReg->PIXPLLCSaved = FALSE; + } + + if(!pMga->SecondCrtc) { + /* Do not set the memory config for primary cards as it + should be correct already. Only on little endian architectures + since we need to modify the byteswap bit. -ReneR */ +#if X_BYTE_ORDER == X_BIG_ENDIAN + optionMask = OPTION1_MASK; +#else + optionMask = (pMga->Primary) ? OPTION1_MASK_PRIMARY : OPTION1_MASK; +#endif + +MGA_NOT_HAL( + /* + * Code is needed to get things back to bank zero. + */ + + /* restore DAC registers + * according to the docs we shouldn't write to reserved regs*/ + for (i = 0; i < DACREGSIZE; i++) { + if( (i <= 0x03) || + (i == 0x07) || + (i == 0x0b) || + (i == 0x0f) || + ((i >= 0x13) && (i <= 0x17)) || + (i == 0x1b) || + (i == 0x1c) || + ((i >= 0x1f) && (i <= 0x29)) || + ((i >= 0x30) && (i <= 0x37)) || + (MGAISGx50(pMga) && !mgaReg->PIXPLLCSaved && + ((i == 0x2c) || (i == 0x2d) || (i == 0x2e) || + (i == 0x4c) || (i == 0x4d) || (i == 0x4e)))) + continue; + if (pMga->is_G200SE + && ((i == 0x2C) || (i == 0x2D) || (i == 0x2E))) + continue; + outMGAdac(i, mgaReg->DacRegs[i]); + } + + if (!MGAISGx50(pMga)) { + /* restore pci_option register */ + pciSetBitsLong(pMga->PciTag, PCI_OPTION_REG, optionMask, + mgaReg->Option); + if (pMga->Chipset != PCI_CHIP_MGA1064) + pciSetBitsLong(pMga->PciTag, PCI_MGA_OPTION2, OPTION2_MASK, + mgaReg->Option2); + if (pMga->Chipset == PCI_CHIP_MGAG400 || pMga->Chipset == PCI_CHIP_MGAG550) + pciSetBitsLong(pMga->PciTag, PCI_MGA_OPTION3, OPTION3_MASK, + mgaReg->Option3); + } +); /* MGA_NOT_HAL */ +#ifdef USEMGAHAL + /* + * Work around another bug in HALlib: it doesn't restore the + * DAC width register correctly. MATROX: hint, hint. + */ + MGA_HAL( + outMGAdac(MGA1064_MUL_CTL,mgaReg->DacRegs[0]); + outMGAdac(MGA1064_MISC_CTL,mgaReg->DacRegs[1]); + if (!MGAISGx50(pMga)) { + outMGAdac(MGA1064_PIX_PLLC_M,mgaReg->DacRegs[2]); + outMGAdac(MGA1064_PIX_PLLC_N,mgaReg->DacRegs[3]); + outMGAdac(MGA1064_PIX_PLLC_P,mgaReg->DacRegs[4]); + } + ); +#endif + /* restore CRTCEXT regs */ + for (i = 0; i < 6; i++) + OUTREG16(0x1FDE, (mgaReg->ExtVga[i] << 8) | i); + + /* This handles restoring the generic VGA registers. */ + if (pMga->is_G200SE) { + vgaHWRestore(pScrn, vgaReg, VGA_SR_MODE); + if (restoreFonts) + MGAG200SERestoreFonts(pScrn, vgaReg); + } else { + vgaHWRestore(pScrn, vgaReg, + VGA_SR_MODE | (restoreFonts ? VGA_SR_FONTS : 0)); + } + MGAGRestorePalette(pScrn, vgaReg->DAC); + + /* + * this is needed to properly restore start address + */ + OUTREG16(0x1FDE, (mgaReg->ExtVga[0] << 8) | 0); + } else { + /* Second Crtc */ + xMODEINFO ModeInfo; + +MGA_NOT_HAL( + /* Enable Dual Head */ + MGACRTC2Set(pScrn, &ModeInfo); + MGAEnableSecondOutPut(pScrn, &ModeInfo); + MGACRTC2SetPitch(pScrn, &ModeInfo); + MGACRTC2SetDisplayStart(pScrn, &ModeInfo,0,0,0); + + for (i = 0x80; i <= 0xa0; i ++) { + if (i== 0x8d) { + i = 0x8f; + continue; + } + outMGAdac(i, mgaReg->dac2[ i - 0x80]); + } +); /* MGA_NOT_HAL */ + + } + +#ifdef DEBUG + ErrorF("Setting DAC:"); + for (i=0; i<DACREGSIZE; i++) { +#if 1 + if(!(i%16)) ErrorF("\n%02X: ",i); + ErrorF("%02X ", mgaReg->DacRegs[i]); +#else + if(!(i%8)) ErrorF("\n%02X: ",i); + ErrorF("0x%02X, ", mgaReg->DacRegs[i]); +#endif + } + ErrorF("\nOPTION = %08lX\n", mgaReg->Option); + ErrorF("OPTION2 = %08lX\n", mgaReg->Option2); + ErrorF("CRTCEXT:"); + for (i=0; i<6; i++) ErrorF(" %02X", mgaReg->ExtVga[i]); + ErrorF("\n"); +#endif + +} + +/* + * MGAGSave + * + * This function saves the video state. + */ +static void +MGAGSave(ScrnInfoPtr pScrn, vgaRegPtr vgaReg, MGARegPtr mgaReg, + Bool saveFonts) +{ + int i; + MGAPtr pMga = MGAPTR(pScrn); + + /* + * Pixel Clock needs to be restored regardless if we use + * HALLib or not. HALlib doesn't do a good job restoring + * VESA modes (s.o.). MATROX: hint, hint. + */ + if (MGAISGx50(pMga)) { + mgaReg->Clock = MGAG450SavePLLFreq(pScrn); + } + + if(pMga->SecondCrtc == TRUE) { + for(i = 0x80; i < 0xa0; i++) + mgaReg->dac2[i-0x80] = inMGAdac(i); + + return; + } + + MGA_NOT_HAL( + /* Allocate the DacRegs space if not done already */ + if (mgaReg->DacRegs == NULL) { + mgaReg->DacRegs = xnfcalloc(DACREGSIZE, 1); + } + ); /* MGA_NOT_HAL */ + + /* + * Code is needed to get back to bank zero. + */ + OUTREG16(0x1FDE, 0x0004); + + /* + * This function will handle creating the data structure and filling + * in the generic VGA portion. + */ + if (pMga->is_G200SE) { + vgaHWSave(pScrn, vgaReg, VGA_SR_MODE); + if (saveFonts) + MGAG200SESaveFonts(pScrn, vgaReg); + } else { + vgaHWSave(pScrn, vgaReg, VGA_SR_MODE | + (saveFonts ? VGA_SR_FONTS : 0)); + } + MGAGSavePalette(pScrn, vgaReg->DAC); + /* + * Work around another bug in HALlib: it doesn't restore the + * DAC width register correctly. + */ + +#ifdef USEMGAHAL + /* + * Work around another bug in HALlib: it doesn't restore the + * DAC width register correctly (s.o.). MATROX: hint, hint. + */ + MGA_HAL( + if (mgaReg->DacRegs == NULL) { + mgaReg->DacRegs = xnfcalloc(MGAISGx50(pMga) ? 2 : 5, 1); + } + mgaReg->DacRegs[0] = inMGAdac(MGA1064_MUL_CTL); + mgaReg->DacRegs[1] = inMGAdac(MGA1064_MISC_CTL); + if (!MGAISGx50(pMga)) { + mgaReg->DacRegs[2] = inMGAdac(MGA1064_PIX_PLLC_M); + mgaReg->DacRegs[3] = inMGAdac(MGA1064_PIX_PLLC_N); + mgaReg->DacRegs[4] = inMGAdac(MGA1064_PIX_PLLC_P); + } + ); +#endif + MGA_NOT_HAL( + /* + * The port I/O code necessary to read in the extended registers. + */ + for (i = 0; i < DACREGSIZE; i++) + mgaReg->DacRegs[i] = inMGAdac(i); + + mgaReg->PIXPLLCSaved = TRUE; + + mgaReg->Option = pciReadLong(pMga->PciTag, PCI_OPTION_REG); + + mgaReg->Option2 = pciReadLong(pMga->PciTag, PCI_MGA_OPTION2); + if (pMga->Chipset == PCI_CHIP_MGAG400 || pMga->Chipset == PCI_CHIP_MGAG550) + mgaReg->Option3 = pciReadLong(pMga->PciTag, PCI_MGA_OPTION3); + ); /* MGA_NOT_HAL */ + + for (i = 0; i < 6; i++) + { + OUTREG8(0x1FDE, i); + mgaReg->ExtVga[i] = INREG8(0x1FDF); + } +#ifdef DEBUG + ErrorF("Saved values:\nDAC:"); + for (i=0; i<DACREGSIZE; i++) { +#if 1 + if(!(i%16)) ErrorF("\n%02X: ",i); + ErrorF("%02X ", mgaReg->DacRegs[i]); +#else + if(!(i%8)) ErrorF("\n%02X: ",i); + ErrorF("0x%02X, ", mgaReg->DacRegs[i]); +#endif + } + ErrorF("\nOPTION = %08lX\n:", mgaReg->Option); + ErrorF("OPTION2 = %08lX\nCRTCEXT:", mgaReg->Option2); + for (i=0; i<6; i++) ErrorF(" %02X", mgaReg->ExtVga[i]); + ErrorF("\n"); +#endif +} + +/**** + *** HW Cursor + */ +static void +MGAGLoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src) +{ + MGAPtr pMga = MGAPTR(pScrn); + CARD32 *dst = (CARD32*)(pMga->FbBase + pMga->FbCursorOffset); + int i = 128; + + /* swap bytes in each line */ + while( i-- ) { + *dst++ = (src[4] << 24) | (src[5] << 16) | (src[6] << 8) | src[7]; + *dst++ = (src[0] << 24) | (src[1] << 16) | (src[2] << 8) | src[3]; + src += 8; + } +} + +static void +MGAGShowCursor(ScrnInfoPtr pScrn) +{ + MGAPtr pMga = MGAPTR(pScrn); + /* Enable cursor - X-Windows mode */ + outMGAdac(MGA1064_CURSOR_CTL, 0x03); +} + +static void +MGAGShowCursorG100(ScrnInfoPtr pScrn) +{ + MGAPtr pMga = MGAPTR(pScrn); + /* Enable cursor - X-Windows mode */ + outMGAdac(MGA1064_CURSOR_CTL, 0x01); +} + +static void +MGAGHideCursor(ScrnInfoPtr pScrn) +{ + MGAPtr pMga = MGAPTR(pScrn); + /* Disable cursor */ + outMGAdac(MGA1064_CURSOR_CTL, 0x00); +} + +static void +MGAGSetCursorPosition(ScrnInfoPtr pScrn, int x, int y) +{ + MGAPtr pMga = MGAPTR(pScrn); + x += 64; + y += 64; + +#ifdef USEMGAHAL + MGA_HAL( + x += pMga->HALGranularityOffX; + y += pMga->HALGranularityOffY; + ); +#endif + /* cursor update must never occurs during a retrace period (pp 4-160) */ + while( INREG( MGAREG_Status ) & 0x08 ); + + /* Output position - "only" 12 bits of location documented */ + OUTREG8( RAMDAC_OFFSET + MGA1064_CUR_XLOW, (x & 0xFF)); + OUTREG8( RAMDAC_OFFSET + MGA1064_CUR_XHI, (x & 0xF00) >> 8); + OUTREG8( RAMDAC_OFFSET + MGA1064_CUR_YLOW, (y & 0xFF)); + OUTREG8( RAMDAC_OFFSET + MGA1064_CUR_YHI, (y & 0xF00) >> 8); +} + + +static void +MGAGSetCursorColors(ScrnInfoPtr pScrn, int bg, int fg) +{ + MGAPtr pMga = MGAPTR(pScrn); + + /* Background color */ + outMGAdac(MGA1064_CURSOR_COL0_RED, (bg & 0x00FF0000) >> 16); + outMGAdac(MGA1064_CURSOR_COL0_GREEN, (bg & 0x0000FF00) >> 8); + outMGAdac(MGA1064_CURSOR_COL0_BLUE, (bg & 0x000000FF)); + + /* Foreground color */ + outMGAdac(MGA1064_CURSOR_COL1_RED, (fg & 0x00FF0000) >> 16); + outMGAdac(MGA1064_CURSOR_COL1_GREEN, (fg & 0x0000FF00) >> 8); + outMGAdac(MGA1064_CURSOR_COL1_BLUE, (fg & 0x000000FF)); +} + +static void +MGAGSetCursorColorsG100(ScrnInfoPtr pScrn, int bg, int fg) +{ + MGAPtr pMga = MGAPTR(pScrn); + + /* Background color */ + outMGAdac(MGA1064_CURSOR_COL1_RED, (bg & 0x00FF0000) >> 16); + outMGAdac(MGA1064_CURSOR_COL1_GREEN, (bg & 0x0000FF00) >> 8); + outMGAdac(MGA1064_CURSOR_COL1_BLUE, (bg & 0x000000FF)); + + /* Foreground color */ + outMGAdac(MGA1064_CURSOR_COL2_RED, (fg & 0x00FF0000) >> 16); + outMGAdac(MGA1064_CURSOR_COL2_GREEN, (fg & 0x0000FF00) >> 8); + outMGAdac(MGA1064_CURSOR_COL2_BLUE, (fg & 0x000000FF)); +} + +static Bool +MGAGUseHWCursor(ScreenPtr pScrn, CursorPtr pCurs) +{ + MGAPtr pMga = MGAPTR(xf86Screens[pScrn->myNum]); + /* This needs to detect if its on the second dac */ + if( XF86SCRNINFO(pScrn)->currentMode->Flags & V_DBLSCAN ) + return FALSE; + if( pMga->SecondCrtc == TRUE ) + return FALSE; + return TRUE; +} + + +/* + * According to mga-1064g.pdf pp215-216 (4-179 & 4-180) the low bits of + * XGENIODATA and XGENIOCTL are connected to the 4 DDC pins, but don't say + * which VGA line is connected to each DDC pin, so I've had to guess. + * + * DDC1 support only requires DDC_SDA_MASK, + * DDC2 support requires DDC_SDA_MASK and DDC_SCL_MASK + * + * If we want DDC on second head (P2) then we must use DDC2 protocol (I2C) + * + * Be careful, DDC1 and DDC2 refer to protocols, DDC_P1 and DDC_P2 refer to + * DDC data coming in on which videoport on the card + */ +static const int DDC_P1_SDA_MASK = (1 << 1); +static const int DDC_P1_SCL_MASK = (1 << 3); +static const int DDC_P2_SDA_MASK = (1 << 0); +static const int DDC_P2_SCL_MASK = (1 << 2); +static const int MAVEN_SDA_MASK = (1 << 4); +static const int MAVEN_SCL_MASK = (1 << 5); + +static unsigned int +MGAG_ddc1Read(ScrnInfoPtr pScrn) +{ + MGAPtr pMga = MGAPTR(pScrn); + unsigned char val; + + /* Define the SDA as an input */ + outMGAdacmsk(MGA1064_GEN_IO_CTL, ~(DDC_P1_SCL_MASK | DDC_P1_SDA_MASK), 0); + + /* wait for Vsync */ + if (pMga->is_G200SE) { + usleep(4); + } else { + while( INREG( MGAREG_Status ) & 0x08 ); + while( ! (INREG( MGAREG_Status ) & 0x08) ); + } + + /* Get the result */ + val = (inMGAdac(MGA1064_GEN_IO_DATA) & DDC_P1_SDA_MASK); + return val; +} + +static void +MGAG_I2CGetBits(I2CBusPtr b, int *clock, int *data, int my_scl_mask, int my_sda_mask) +{ + ScrnInfoPtr pScrn = xf86Screens[b->scrnIndex]; + MGAPtr pMga = MGAPTR(pScrn); + unsigned char val; + + /* Get the result. */ + val = inMGAdac(MGA1064_GEN_IO_DATA); + + *clock = (val & my_scl_mask) != 0; + *data = (val & my_sda_mask) != 0; +#ifdef DEBUG + ErrorF("MGAG_I2CGetBits(%p,...) val=0x%x, returns clock %d, data %d\n", b, val, *clock, *data); +#endif +} + +/* + * ATTENTION! - the DATA and CLOCK lines need to be tri-stated when + * high. Therefore turn off output driver for the line to set line + * to high. High signal is maintained by a 15k Ohm pull-up resistor. + */ +static void +MGAG_I2CPutBits(I2CBusPtr b, int clock, int data, int my_scl_mask, int my_sda_mask) +{ + ScrnInfoPtr pScrn = xf86Screens[b->scrnIndex]; + MGAPtr pMga = MGAPTR(pScrn); + unsigned char drv, val; + + val = (clock ? my_scl_mask : 0) | (data ? my_sda_mask : 0); + drv = ((!clock) ? my_scl_mask : 0) | ((!data) ? my_sda_mask : 0); + + /* Write the values */ + outMGAdacmsk(MGA1064_GEN_IO_CTL, ~(my_scl_mask | my_sda_mask) , drv); + outMGAdacmsk(MGA1064_GEN_IO_DATA, ~(my_scl_mask | my_sda_mask) , val); +#ifdef DEBUG + ErrorF("MGAG_I2CPutBits(%p, %d, %d) val=0x%x\n", b, clock, data, val); +#endif +} + +/* FIXME, can we use some neater way besides these silly stubs? */ + +static void +MGAG_DDC_P1_I2CPutBits(I2CBusPtr b, int clock, int data) +{ + MGAG_I2CPutBits(b, clock, data, DDC_P1_SCL_MASK, DDC_P1_SDA_MASK); +} +static void +MGAG_DDC_P2_I2CPutBits(I2CBusPtr b, int clock, int data) +{ + MGAG_I2CPutBits(b, clock, data, DDC_P2_SCL_MASK, DDC_P2_SDA_MASK); +} +static void +MGAG_MAVEN_I2CPutBits(I2CBusPtr b, int clock, int data) +{ + MGAG_I2CPutBits(b, clock, data, MAVEN_SCL_MASK, MAVEN_SDA_MASK); +} + +static void +MGAG_DDC_P1_I2CGetBits(I2CBusPtr b, int *clock, int *data) +{ + MGAG_I2CGetBits(b, clock, data, DDC_P1_SCL_MASK, DDC_P1_SDA_MASK); +} +static void +MGAG_DDC_P2_I2CGetBits(I2CBusPtr b, int *clock, int *data) +{ + MGAG_I2CGetBits(b, clock, data, DDC_P2_SCL_MASK, DDC_P2_SDA_MASK); +} +static void +MGAG_MAVEN_I2CGetBits(I2CBusPtr b, int *clock, int *data) +{ + MGAG_I2CGetBits(b, clock, data, MAVEN_SCL_MASK, MAVEN_SDA_MASK); +} + +Bool +MGAG_i2cInit(ScrnInfoPtr pScrn) +{ + MGAPtr pMga = MGAPTR(pScrn); + I2CBusPtr I2CPtr; + + if (pMga->SecondCrtc == FALSE) { + I2CPtr = xf86CreateI2CBusRec(); + if(!I2CPtr) return FALSE; + + pMga->DDC_Bus1 = I2CPtr; + + I2CPtr->BusName = "DDC P1"; + I2CPtr->scrnIndex = pScrn->scrnIndex; + I2CPtr->I2CPutBits = MGAG_DDC_P1_I2CPutBits; + I2CPtr->I2CGetBits = MGAG_DDC_P1_I2CGetBits; + I2CPtr->AcknTimeout = 5; + + if (!xf86I2CBusInit(I2CPtr)) { + xf86DestroyI2CBusRec(pMga->DDC_Bus1, TRUE, TRUE); + pMga->DDC_Bus1 = NULL; + return FALSE; + } + } + else { + /* We have a dual head setup on G-series, set up DDC #2. */ + I2CPtr = xf86CreateI2CBusRec(); + if(!I2CPtr) return FALSE; + + pMga->DDC_Bus2 = I2CPtr; + + I2CPtr->BusName = "DDC P2"; + I2CPtr->scrnIndex = pScrn->scrnIndex; + I2CPtr->I2CPutBits = MGAG_DDC_P2_I2CPutBits; + I2CPtr->I2CGetBits = MGAG_DDC_P2_I2CGetBits; + I2CPtr->AcknTimeout = 5; + + if (!xf86I2CBusInit(I2CPtr)) { + xf86DestroyI2CBusRec(pMga->DDC_Bus2, TRUE, TRUE); + pMga->DDC_Bus2 = NULL; + } + else { + if (!xf86I2CProbeAddress(pMga->DDC_Bus2, 0xA0)) { /* 0xA0 is DDC EEPROM address */ + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "DDC #2 unavailable -> TV cable connected or no monitor connected!\n"); + pMga->Crtc2IsTV = TRUE; /* assume for now. We need to fix HAL interactions. */ + } + } + + /* Then try to set up MAVEN bus. */ + + I2CPtr = xf86CreateI2CBusRec(); + if(!I2CPtr) return FALSE; + pMga->Maven_Bus = I2CPtr; + + I2CPtr->BusName = "MAVEN"; + I2CPtr->scrnIndex = pScrn->scrnIndex; + I2CPtr->I2CPutBits = MGAG_MAVEN_I2CPutBits; + I2CPtr->I2CGetBits = MGAG_MAVEN_I2CGetBits; + I2CPtr->StartTimeout = 5; + + if (!xf86I2CBusInit(I2CPtr)) { + xf86DestroyI2CBusRec(pMga->Maven_Bus, TRUE, TRUE); + pMga->Maven_Bus = NULL; + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Failed to register MAVEN I2C bus!\n"); + } + else { + Bool failed = FALSE; + /* Try to detect the MAVEN. */ + if (xf86I2CProbeAddress(pMga->Maven_Bus, MAVEN_READ) == TRUE) { + I2CDevPtr dp = xf86CreateI2CDevRec(); + if (dp) { + I2CByte maven_ver; + + pMga->Maven = dp; + dp->DevName = "MGA-TVO"; + dp->SlaveAddr = MAVEN_WRITE; + dp->pI2CBus = pMga->Maven_Bus; + if (!xf86I2CDevInit(dp)) { + xf86DestroyI2CDevRec(dp, TRUE); + pMga->Maven = NULL; + failed = TRUE; + } + if (MGAMavenRead(pScrn, 0xB2, &maven_ver)) { + if (maven_ver < 0x14) { /* heuristic stolen from matroxfb */ + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "MAVEN revision MGA-TVO-B detected (0x%x)\n", maven_ver); + pMga->Maven_Version = 'B'; + } + else { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "MAVEN revision MGA-TVO-C detected (0x%x)\n", maven_ver); + pMga->Maven_Version = 'C'; + } + } + else { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Failed to determine MAVEN hardware version!\n"); + } + } + else { + failed = TRUE; + } + } + else { + failed = TRUE; + } + + if (failed) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Failed to register MGA-TVO I2C device!\n"); + pMga->Maven = NULL; + pMga->Maven_Version = 0; + } + } + } + + return TRUE; +} + + +/* + * MGAGRamdacInit + * Handle broken G100 special. + */ +static void +MGAGRamdacInit(ScrnInfoPtr pScrn) +{ + MGAPtr pMga = MGAPTR(pScrn); + MGARamdacPtr MGAdac = &pMga->Dac; + + MGAdac->isHwCursor = TRUE; + MGAdac->CursorOffscreenMemSize = 1024; + MGAdac->CursorMaxWidth = 64; + MGAdac->CursorMaxHeight = 64; + MGAdac->SetCursorPosition = MGAGSetCursorPosition; + MGAdac->LoadCursorImage = MGAGLoadCursorImage; + MGAdac->HideCursor = MGAGHideCursor; + if ((pMga->Chipset == PCI_CHIP_MGAG100) + || (pMga->Chipset == PCI_CHIP_MGAG100)) { + MGAdac->SetCursorColors = MGAGSetCursorColorsG100; + MGAdac->ShowCursor = MGAGShowCursorG100; + } else { + MGAdac->SetCursorColors = MGAGSetCursorColors; + MGAdac->ShowCursor = MGAGShowCursor; + } + MGAdac->UseHWCursor = MGAGUseHWCursor; + MGAdac->CursorFlags = +#if X_BYTE_ORDER == X_LITTLE_ENDIAN + HARDWARE_CURSOR_BIT_ORDER_MSBFIRST | +#endif + HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_64 | + HARDWARE_CURSOR_TRUECOLOR_AT_8BPP; + + MGAdac->LoadPalette = MGAGLoadPalette; + MGAdac->RestorePalette = MGAGRestorePalette; + + + MGAdac->maxPixelClock = pMga->bios.pixel.max_freq; + MGAdac->ClockFrom = X_PROBED; + + /* Disable interleaving and set the rounding value */ + pMga->Interleave = FALSE; + + pMga->Roundings[0] = 64; + pMga->Roundings[1] = 32; + pMga->Roundings[2] = 64; + pMga->Roundings[3] = 32; + + /* Clear Fast bitblt flag */ + pMga->HasFBitBlt = FALSE; +} + +void MGAGSetupFuncs(ScrnInfoPtr pScrn) +{ + MGAPtr pMga = MGAPTR(pScrn); + + pMga->PreInit = MGAGRamdacInit; + pMga->Save = MGAGSave; + pMga->Restore = MGAGRestore; + pMga->ModeInit = MGAGInit; + pMga->ddc1Read = MGAG_ddc1Read; + /* vgaHWddc1SetSpeed will only work if the card is in VGA mode */ + pMga->DDC1SetSpeed = vgaHWddc1SetSpeedWeak(); + pMga->i2cInit = MGAG_i2cInit; +} + diff --git a/driver/xf86-video-mga/src/mga_dga.c b/driver/xf86-video-mga/src/mga_dga.c new file mode 100644 index 000000000..6bae9dcd5 --- /dev/null +++ b/driver/xf86-video-mga/src/mga_dga.c @@ -0,0 +1,451 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dga.c,v 1.14 1999/11/02 23:12:00 mvojkovi Exp $ */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include "xf86.h" +#include "xf86_OSproc.h" +#include "xf86Pci.h" +#include "xf86PciInfo.h" +#include "xaa.h" +#include "xaalocal.h" +#include "mga.h" +#include "mga_reg.h" +#include "dgaproc.h" + + +static Bool MGA_OpenFramebuffer(ScrnInfoPtr, char **, unsigned char **, + int *, int *, int *); +static Bool MGA_SetMode(ScrnInfoPtr, DGAModePtr); +static int MGA_GetViewport(ScrnInfoPtr); +static void MGA_SetViewport(ScrnInfoPtr, int, int, int); +static void MGA_FillRect(ScrnInfoPtr, int, int, int, int, unsigned long); +static void MGA_BlitRect(ScrnInfoPtr, int, int, int, int, int, int); +static void MGA_BlitTransRect(ScrnInfoPtr, int, int, int, int, int, int, + unsigned long); + +static +DGAFunctionRec MGA_DGAFuncs = { + MGA_OpenFramebuffer, + NULL, + MGA_SetMode, + MGA_SetViewport, + MGA_GetViewport, + MGAStormSync, + MGA_FillRect, + MGA_BlitRect, + MGA_BlitTransRect +}; + + +static int +FindSmallestPitch( + MGAPtr pMga, + int Bpp, + int width +){ + int Pitches1[] = + {640, 768, 800, 960, 1024, 1152, 1280, 1600, 1920, 2048, 0}; + int Pitches2[] = + {512, 640, 768, 800, 832, 960, 1024, 1152, 1280, 1600, 1664, + 1920, 2048, 0}; + int *linePitches = NULL; + int pitch; + + + if(!pMga->NoAccel) { + switch(pMga->Chipset) { + case PCI_CHIP_MGA2064: + linePitches = Pitches1; + break; + case PCI_CHIP_MGA2164: + case PCI_CHIP_MGA2164_AGP: + case PCI_CHIP_MGA1064: + linePitches = Pitches2; + break; + } + } + + pitch = pMga->Roundings[Bpp - 1] - 1; + + if(linePitches) { + while((*linePitches < width) || (*linePitches & pitch)) + linePitches++; + return *linePitches; + } + + return ((width + pitch) & ~pitch); +} + +static DGAModePtr +MGASetupDGAMode( + ScrnInfoPtr pScrn, + DGAModePtr modes, + int *num, + int bitsPerPixel, + int depth, + Bool pixmap, + int secondPitch, + unsigned long red, + unsigned long green, + unsigned long blue, + short visualClass +){ + DisplayModePtr firstMode, pMode; + MGAPtr pMga = MGAPTR(pScrn); + DGAModePtr mode, newmodes; + int size, pitch, Bpp = bitsPerPixel >> 3; + +SECOND_PASS: + + pMode = firstMode = pScrn->modes; + + while(1) { + + + pitch = FindSmallestPitch(pMga, Bpp, pMode->HDisplay); + size = pitch * Bpp * pMode->VDisplay; + + if((!secondPitch || (pitch != secondPitch)) && + (size <= pMga->FbUsableSize)) { + + if(secondPitch) + pitch = secondPitch; + + if(!(newmodes = xrealloc(modes, (*num + 1) * sizeof(DGAModeRec)))) + break; + + modes = newmodes; + mode = modes + *num; + + mode->mode = pMode; + mode->flags = DGA_CONCURRENT_ACCESS; + if(pixmap) + mode->flags |= DGA_PIXMAP_AVAILABLE; + if(!pMga->NoAccel) { + mode->flags |= DGA_FILL_RECT | DGA_BLIT_RECT; + if((Bpp != 3) && (pMga->Chipset != PCI_CHIP_MGA2064)) + mode->flags |= DGA_BLIT_RECT_TRANS; + } + if(pMode->Flags & V_DBLSCAN) + mode->flags |= DGA_DOUBLESCAN; + if(pMode->Flags & V_INTERLACE) + mode->flags |= DGA_INTERLACED; + mode->byteOrder = pScrn->imageByteOrder; + mode->depth = depth; + mode->bitsPerPixel = bitsPerPixel; + mode->red_mask = red; + mode->green_mask = green; + mode->blue_mask = blue; + mode->visualClass = visualClass; + mode->viewportWidth = pMode->HDisplay; + mode->viewportHeight = pMode->VDisplay; + mode->xViewportStep = (3 - pMga->BppShifts[Bpp - 1]); + if((Bpp == 3) && + (pMga->Chipset == PCI_CHIP_MGAG400 || pMga->Chipset == PCI_CHIP_MGAG550)) + mode->xViewportStep <<= 1; + mode->yViewportStep = 1; + mode->viewportFlags = DGA_FLIP_RETRACE; + mode->offset = pMga->YDstOrg * Bpp; /* gonna need to fix that */ + mode->address = pMga->FbStart; + mode->bytesPerScanline = pitch * Bpp; + mode->imageWidth = pitch; + mode->imageHeight = pMga->FbUsableSize / mode->bytesPerScanline; + mode->pixmapWidth = pitch; + switch (pMga->Chipset) { + case PCI_CHIP_MGAG200_SE_A_PCI: + case PCI_CHIP_MGAG200_SE_B_PCI: + mode->pixmapHeight = (min(pMga->FbUsableSize, 1*1024*1024)) / + mode->bytesPerScanline; + break; + default: + mode->pixmapHeight = (min(pMga->FbUsableSize, 16*1024*1024)) / + mode->bytesPerScanline; + } + mode->maxViewportX = mode->imageWidth - mode->viewportWidth; + mode->maxViewportY = (pMga->FbUsableSize / mode->bytesPerScanline) - + mode->viewportHeight; + + if( (pMga->Chipset == PCI_CHIP_MGA2064) || + (pMga->Chipset == PCI_CHIP_MGA2164) || + (pMga->Chipset == PCI_CHIP_MGA2164_AGP)) + { + int tmp; + + tmp = (8*1024*1024 / mode->bytesPerScanline) - + mode->viewportHeight; + if(tmp < 0) tmp = 0; + if(tmp < mode->maxViewportY) + mode->maxViewportY = tmp; + } + + (*num)++; + } + + pMode = pMode->next; + if(pMode == firstMode) + break; + } + + if(secondPitch) { + secondPitch = 0; + goto SECOND_PASS; + } + + return modes; +} + + +Bool +MGADGAInit(ScreenPtr pScreen) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + MGAPtr pMga = MGAPTR(pScrn); + DGAModePtr modes = NULL; + int num = 0; + + /* 8 */ + modes = MGASetupDGAMode (pScrn, modes, &num, 8, 8, + (pScrn->bitsPerPixel == 8), + (pScrn->bitsPerPixel != 8) ? 0 : pScrn->displayWidth, + 0, 0, 0, PseudoColor); + + /* 15 */ + modes = MGASetupDGAMode (pScrn, modes, &num, 16, 15, + (pScrn->bitsPerPixel == 16), + (pScrn->depth != 15) ? 0 : pScrn->displayWidth, + 0x7c00, 0x03e0, 0x001f, TrueColor); + + modes = MGASetupDGAMode (pScrn, modes, &num, 16, 15, + (pScrn->bitsPerPixel == 16), + (pScrn->depth != 15) ? 0 : pScrn->displayWidth, + 0x7c00, 0x03e0, 0x001f, DirectColor); + + /* 16 */ + modes = MGASetupDGAMode (pScrn, modes, &num, 16, 16, + (pScrn->bitsPerPixel == 16), + (pScrn->depth != 16) ? 0 : pScrn->displayWidth, + 0xf800, 0x07e0, 0x001f, TrueColor); + + modes = MGASetupDGAMode (pScrn, modes, &num, 16, 16, + (pScrn->bitsPerPixel == 16), + (pScrn->depth != 16) ? 0 : pScrn->displayWidth, + 0xf800, 0x07e0, 0x001f, DirectColor); + + /* 24 */ + modes = MGASetupDGAMode (pScrn, modes, &num, 24, 24, + (pScrn->bitsPerPixel == 24), + (pScrn->bitsPerPixel != 24) ? 0 : pScrn->displayWidth, + 0xff0000, 0x00ff00, 0x0000ff, TrueColor); + + modes = MGASetupDGAMode (pScrn, modes, &num, 24, 24, + (pScrn->bitsPerPixel == 24), + (pScrn->bitsPerPixel != 24) ? 0 : pScrn->displayWidth, + 0xff0000, 0x00ff00, 0x0000ff, DirectColor); + + /* 32 */ + modes = MGASetupDGAMode (pScrn, modes, &num, 32, 24, + (pScrn->bitsPerPixel == 32), + (pScrn->bitsPerPixel != 32) ? 0 : pScrn->displayWidth, + 0xff0000, 0x00ff00, 0x0000ff, TrueColor); + + modes = MGASetupDGAMode (pScrn, modes, &num, 32, 24, + (pScrn->bitsPerPixel == 32), + (pScrn->bitsPerPixel != 32) ? 0 : pScrn->displayWidth, + 0xff0000, 0x00ff00, 0x0000ff, DirectColor); + + pMga->numDGAModes = num; + pMga->DGAModes = modes; + + return DGAInit(pScreen, &MGA_DGAFuncs, modes, num); +} + + +static int +BitsSet(unsigned long data) +{ + unsigned long mask; + int set = 0; + + for(mask = 1; mask; mask <<= 1) + if(mask & data) set++; + + return set; +} + +/* + * This is not strictly required - but it will load a 'sane' + * palette when starting DGA. + */ +static void +mgaDGASetPalette(ScrnInfoPtr pScrn) +{ + MGAPtr pMga = MGAPTR(pScrn); + MGARamdacPtr MGAdac = &pMga->Dac; + unsigned char DAC[256*3]; + int i; + + if (!MGAdac->RestorePalette) + return; + + for (i = 0; i < 256; i++) { + DAC[i*3] = i; + DAC[i*3 + 1] = i; + DAC[i*3 + 2] = i; + } + MGAdac->RestorePalette(pScrn, DAC); +} + + +static Bool +MGA_SetMode( + ScrnInfoPtr pScrn, + DGAModePtr pMode +){ + static MGAFBLayout SavedLayouts[MAXSCREENS]; + int index = pScrn->pScreen->myNum; + + MGAPtr pMga = MGAPTR(pScrn); + + if(!pMode) { /* restore the original mode */ + if(pMga->DGAactive) + memcpy(&pMga->CurrentLayout, &SavedLayouts[index], sizeof(MGAFBLayout)); + + pScrn->currentMode = pMga->CurrentLayout.mode; + pScrn->SwitchMode(index, pScrn->currentMode, 0); + MGAAdjustFrame(index, pScrn->frameX0, pScrn->frameY0, 0); + pMga->DGAactive = FALSE; + } else { + if(!pMga->DGAactive) { /* save the old parameters */ + memcpy(&SavedLayouts[index], &pMga->CurrentLayout, sizeof(MGAFBLayout)); + pMga->DGAactive = TRUE; + } + /* update CurrentLayout */ + pMga->CurrentLayout.bitsPerPixel = pMode->bitsPerPixel; + pMga->CurrentLayout.depth = pMode->depth; + pMga->CurrentLayout.displayWidth = pMode->bytesPerScanline / + (pMode->bitsPerPixel >> 3); + pMga->CurrentLayout.weight.red = BitsSet(pMode->red_mask); + pMga->CurrentLayout.weight.green = BitsSet(pMode->green_mask); + pMga->CurrentLayout.weight.blue = BitsSet(pMode->blue_mask); + pMga->CurrentLayout.Overlay8Plus24 = FALSE; + /* MGAModeInit() will set the mode field */ + + pScrn->SwitchMode(index, pMode->mode, 0); + /* not strictly required but nice */ + mgaDGASetPalette(pScrn); + } + + return TRUE; +} + + + +static int +MGA_GetViewport( + ScrnInfoPtr pScrn +){ + MGAPtr pMga = MGAPTR(pScrn); + + return pMga->DGAViewportStatus; +} + +static void +MGA_SetViewport( + ScrnInfoPtr pScrn, + int x, int y, + int flags +){ + MGAPtr pMga = MGAPTR(pScrn); + + MGAAdjustFrame(pScrn->pScreen->myNum, x, y, flags); + pMga->DGAViewportStatus = 0; /* MGAAdjustFrame loops until finished */ +} + +static void +MGA_FillRect ( + ScrnInfoPtr pScrn, + int x, int y, int w, int h, + unsigned long color +){ + MGAPtr pMga = MGAPTR(pScrn); + + if(!pMga->AccelInfoRec) return; + + mgaDoSetupForSolidFill(pScrn, color, GXcopy, ~0, + pMga->CurrentLayout.bitsPerPixel); + (*pMga->AccelInfoRec->SubsequentSolidFillRect)(pScrn, x, y, w, h); + + SET_SYNC_FLAG(pMga->AccelInfoRec); +} + +static void +MGA_BlitRect( + ScrnInfoPtr pScrn, + int srcx, int srcy, + int w, int h, + int dstx, int dsty +){ + MGAPtr pMga = MGAPTR(pScrn); + int xdir = ((srcx < dstx) && (srcy == dsty)) ? -1 : 1; + int ydir = (srcy < dsty) ? -1 : 1; + + if(!pMga->AccelInfoRec) return; + + mgaDoSetupForScreenToScreenCopy( pScrn, xdir, ydir, GXcopy, ~0, -1, + pMga->CurrentLayout.bitsPerPixel ); + + (*pMga->AccelInfoRec->SubsequentScreenToScreenCopy)( + pScrn, srcx, srcy, dstx, dsty, w, h); + + SET_SYNC_FLAG(pMga->AccelInfoRec); +} + + +static void MGA_BlitTransRect( ScrnInfoPtr pScrn, int srcx, int srcy, + int w, int h, int dstx, int dsty, + unsigned long color ) +{ + MGAPtr pMga = MGAPTR(pScrn); + + if( (pMga->AccelInfoRec != NULL) + && (pMga->CurrentLayout.bitsPerPixel != 24) + && (pMga->Chipset != PCI_CHIP_MGA2064) ) { + const int xdir = ((srcx < dstx) && (srcy == dsty)) ? -1 : 1; + const int ydir = (srcy < dsty) ? -1 : 1; + + pMga->DrawTransparent = TRUE; + + mgaDoSetupForScreenToScreenCopy( pScrn, xdir, ydir, GXcopy, ~0, color, + pMga->CurrentLayout.bitsPerPixel ); + + pMga->DrawTransparent = FALSE; + + (*pMga->AccelInfoRec->SubsequentScreenToScreenCopy)( + pScrn, srcx, srcy, dstx, dsty, w, h); + + SET_SYNC_FLAG(pMga->AccelInfoRec); + } +} + + +static Bool +MGA_OpenFramebuffer( + ScrnInfoPtr pScrn, + char **name, + unsigned char **mem, + int *size, + int *offset, + int *flags +){ + MGAPtr pMga = MGAPTR(pScrn); + + *name = NULL; /* no special device */ + *mem = (unsigned char*)pMga->FbAddress; + *size = pMga->FbMapSize; + *offset = 0; + *flags = DGA_NEED_ROOT; + + return TRUE; +} diff --git a/driver/xf86-video-mga/src/mga_dh.c b/driver/xf86-video-mga/src/mga_dh.c new file mode 100644 index 000000000..0bf89e998 --- /dev/null +++ b/driver/xf86-video-mga/src/mga_dh.c @@ -0,0 +1,515 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dh.c,v 1.4tsi Exp $ */ +/********************************************************************* +* G450: This is for Dual Head. +* Matrox Graphics +* Author : Luugi Marsan +**********************************************************************/ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +/* All drivers should typically include these */ +#include "xf86.h" +#include "xf86_OSproc.h" + +/* Drivers for PCI hardware need this */ +#include "xf86PciInfo.h" + +/* Drivers that need to access the PCI config space directly need this */ +#include "xf86Pci.h" + +#include "mga_reg.h" +#include "mga.h" + +#define MNP_TABLE_SIZE 64 +#define CLKSEL_MGA 0x0c +#define PLLLOCK 0x40 + +/* CRTC2 control field*/ +#define C2_EN_A 0 +#define C2_EN_M (1 << C2_EN_A) +#define C2_HIPRILVL_A 4 +#define C2_HIPRILVL_M (7 << C2_HIPRILVL_A) +#define C2_MAXHIPRI_A 8 +#define C2_MAXHIPRI_M (7 << C2_MAXHIPRI_A) + +#define C2CTL_PIXCLKSEL_SHIFT 1L +#define C2CTL_PIXCLKSEL_MASK (3L << C2CTL_PIXCLKSEL_SHIFT) +#define C2CTL_PIXCLKSELH_SHIFT 14L +#define C2CTL_PIXCLKSELH_MASK (1L << C2CTL_PIXCLKSELH_SHIFT) +#define C2CTL_PIXCLKSEL_PCICLK 0L +#define C2CTL_PIXCLKSEL_VDOCLK (1L << C2CTL_PIXCLKSEL_SHIFT) +#define C2CTL_PIXCLKSEL_PIXELPLL (2L << C2CTL_PIXCLKSEL_SHIFT) +#define C2CTL_PIXCLKSEL_VIDEOPLL (3L << C2CTL_PIXCLKSEL_SHIFT) +#define C2CTL_PIXCLKSEL_VDCLK (1L << C2CTL_PIXCLKSELH_SHIFT) + +#define C2CTL_PIXCLKSEL_CRISTAL (1L << C2CTL_PIXCLKSEL_SHIFT) | (1L << C2CTL_PIXCLKSELH_SHIFT) +#define C2CTL_PIXCLKSEL_SYSTEMPLL (2L << C2CTL_PIXCLKSEL_SHIFT) | (1L << C2CTL_PIXCLKSELH_SHIFT) + +#define C2CTL_PIXCLKDIS_SHIFT 3L +#define C2CTL_PIXCLKDIS_MASK (1L << C2CTL_PIXCLKDIS_SHIFT) +#define C2CTL_PIXCLKDIS_DISABLE (1L << C2CTL_PIXCLKDIS_SHIFT) + +#define C2CTL_CRTCDACSEL_SHIFT 20L +#define C2CTL_CRTCDACSEL_MASK (1L << C2CTL_CRTCDACSEL_SHIFT) +#define C2CTL_CRTCDACSEL_CRTC1 0 +#define C2CTL_CRTCDACSEL_CRTC2 (1L << C2CTL_CRTCDACSEL_SHIFT) + +/* Misc field*/ +#define IOADDSEL 0x01 +#define RAMMAPEN 0x02 +#define CLKSEL_25175 0x00 +#define CLKSEL_28322 0x04 +#define CLKSEL_MGA 0x0c +#define VIDEODIS 0x10 +#define HPGODDEV 0x20 +#define HSYNCPOL 0x40 +#define VSYNCPOL 0x80 + +/* XSYNCCTRL field */ +#define XSYNCCTRL_DAC1HSPOL_SHIFT 2 +#define XSYNCCTRL_DAC1HSPOL_MASK (1 << XSYNCCTRL_DAC1HSPOL_SHIFT) +#define XSYNCCTRL_DAC1HSPOL_NEG (1 << XSYNCCTRL_DAC1HSPOL_SHIFT) +#define XSYNCCTRL_DAC1HSPOL_POS 0 +#define XSYNCCTRL_DAC1VSPOL_SHIFT 3 +#define XSYNCCTRL_DAC1VSPOL_MASK (1 << XSYNCCTRL_DAC1VSPOL_SHIFT) +#define XSYNCCTRL_DAC1VSPOL_NEG (1 << XSYNCCTRL_DAC1VSPOL_SHIFT) +#define XSYNCCTRL_DAC1VSPOL_POS 0 +#define XSYNCCTRL_DAC2HSPOL_SHIFT 6 +#define XSYNCCTRL_DAC2HSPOL_MASK (1 << XSYNCCTRL_DAC2HSPOL_SHIFT) +#define XSYNCCTRL_DAC2HSPOL_NEG (1 << XSYNCCTRL_DAC2HSPOL_SHIFT) +#define XSYNCCTRL_DAC2HSPOL_POS 0 +#define XSYNCCTRL_DAC2VSPOL_SHIFT 7 +#define XSYNCCTRL_DAC2VSPOL_MASK (1 << XSYNCCTRL_DAC2VSPOL_SHIFT) +#define XSYNCCTRL_DAC2VSPOL_NEG (1 << XSYNCCTRL_DAC2VSPOL_SHIFT) +#define XSYNCCTRL_DAC2VSPOL_POS 0 +#define XSYNCCTRL_DAC1HSOFF_SHIFT 0 +#define XSYNCCTRL_DAC1HSOFF_MASK (1 << XSYNCCTRL_DAC1HSOFF_SHIFT) +#define XSYNCCTRL_DAC1HSOFF_OFF (1 << XSYNCCTRL_DAC1HSOFF_SHIFT) +#define XSYNCCTRL_DAC1HSOFF_ON 1 +#define XSYNCCTRL_DAC1VSOFF_SHIFT 1 +#define XSYNCCTRL_DAC1VSOFF_MASK (1 << XSYNCCTRL_DAC1VSOFF_SHIFT) +#define XSYNCCTRL_DAC1VSOFF_OFF (1 << XSYNCCTRL_DAC1VSOFF_SHIFT) +#define XSYNCCTRL_DAC1VSOFF_ON 0 +#define XSYNCCTRL_DAC2HSOFF_SHIFT 4 +#define XSYNCCTRL_DAC2HSOFF_MASK (1 << XSYNCCTRL_DAC2HSOFF_SHIFT) +#define XSYNCCTRL_DAC2HSOFF_OFF (1 << XSYNCCTRL_DAC2HSOFF_SHIFT) +#define XSYNCCTRL_DAC2HSOFF_ON 0 +#define XSYNCCTRL_DAC2VSOFF_SHIFT 5 +#define XSYNCCTRL_DAC2VSOFF_MASK (1 << XSYNCCTRL_DAC2VSOFF_SHIFT) +#define XSYNCCTRL_DAC2VSOFF_OFF (1 << XSYNCCTRL_DAC2VSOFF_SHIFT) +#define XSYNCCTRL_DAC2VSOFF_ON 0 + + +/* XDISPCTRL field */ +#define XDISPCTRL_DAC1OUTSEL_SHIFT 0L +#define XDISPCTRL_DAC1OUTSEL_MASK 1L +#define XDISPCTRL_DAC1OUTSEL_DIS 0L +#define XDISPCTRL_DAC1OUTSEL_EN 1L +#define XDISPCTRL_DAC2OUTSEL_SHIFT 2L +#define XDISPCTRL_DAC2OUTSEL_MASK (3L << XDISPCTRL_DAC2OUTSEL_SHIFT) +#define XDISPCTRL_DAC2OUTSEL_DIS 0L +#define XDISPCTRL_DAC2OUTSEL_CRTC1 (1L << XDISPCTRL_DAC2OUTSEL_SHIFT) +#define XDISPCTRL_DAC2OUTSEL_CRTC2 (2L << XDISPCTRL_DAC2OUTSEL_SHIFT) +#define XDISPCTRL_DAC2OUTSEL_TVE (3L << XDISPCTRL_DAC2OUTSEL_SHIFT) +#define XDISPCTRL_PANOUTSEL_SHIFT 5L +#define XDISPCTRL_PANOUTSEL_MASK (3L << XDISPCTRL_PANOUTSEL_SHIFT) +#define XDISPCTRL_PANOUTSEL_DIS 0L +#define XDISPCTRL_PANOUTSEL_CRTC1 (1L << XDISPCTRL_PANOUTSEL_SHIFT) +#define XDISPCTRL_PANOUTSEL_CRTC2RGB (2L << XDISPCTRL_PANOUTSEL_SHIFT) +#define XDISPCTRL_PANOUTSEL_CRTC2656 (3L << XDISPCTRL_PANOUTSEL_SHIFT) + +/* XPWRCTRL field*/ +#define XPWRCTRL_DAC2PDN_SHIFT 0 +#define XPWRCTRL_DAC2PDN_MASK (1 << XPWRCTRL_DAC2PDN_SHIFT) +#define XPWRCTRL_VIDPLLPDN_SHIFT 1 +#define XPWRCTRL_VIDPLLPDN_MASK (1 << XPWRCTRL_VIDPLLPDN_SHIFT) +#define XPWRCTRL_PANPDN_SHIFT 2 +#define XPWRCTRL_PANPDN_MASK (1 << XPWRCTRL_PANPDN_SHIFT) +#define XPWRCTRL_RFIFOPDN_SHIFT 3 +#define XPWRCTRL_RFIFOPDN_MASK (1 << XPWRCTRL_RFIFOPDN_SHIFT) +#define XPWRCTRL_CFIFOPDN_SHIFT 4 +#define XPWRCTRL_CFIFOPDN_MASK (1 << XPWRCTRL_CFIFOPDN_SHIFT) + + + +#define POS_HSYNC 0x00000004 +#define POS_VSYNC 0x00000008 + + +/* Set CRTC 2*/ +/* Uses the mode given by xfree86 to setup the registry */ +/* Does not write to the hard yet */ +void MGACRTC2Get(ScrnInfoPtr pScrn, xMODEINFO *pModeInfo) +{ + + + MGAPtr pMga = MGAPTR(pScrn); + MGARegPtr pReg = &pMga->ModeReg; + + xMODEINFO tmpModeInfo; + CARD32 ulHTotal; + CARD32 ulHDispEnd; + CARD32 ulHBlkStr; + CARD32 ulHSyncStr; + CARD32 ulHSyncEnd; + CARD32 ulVTotal; + CARD32 ulVDispEnd; + CARD32 ulVBlkStr; + CARD32 ulVSyncStr; + CARD32 ulVSyncEnd; + CARD32 ulOffset; + CARD32 ulCtl2; + CARD32 ulDataCtl2; + CARD32 ulDispHeight = pModeInfo->ulDispHeight; + +#ifdef DEBUG + ErrorF("ENTER MGACRTC2Get\n"); +#endif + + tmpModeInfo = *pModeInfo; + + + /* First compute the Values */ + + ulHTotal = tmpModeInfo.ulDispWidth + + tmpModeInfo.ulHFPorch + + tmpModeInfo.ulHBPorch + + tmpModeInfo.ulHSync; + + ulHDispEnd = tmpModeInfo.ulDispWidth; + ulHBlkStr = ulHDispEnd; + ulHSyncStr = ulHBlkStr + tmpModeInfo.ulHFPorch; + ulHSyncEnd = ulHSyncStr + tmpModeInfo.ulHSync; + + ulVTotal = ulDispHeight + + tmpModeInfo.ulVFPorch + + tmpModeInfo.ulVBPorch + + tmpModeInfo.ulVSync; + + + ulVDispEnd = ulDispHeight; + ulVBlkStr = ulVDispEnd; + ulVSyncStr = ulVBlkStr + tmpModeInfo.ulVFPorch; + ulVSyncEnd = ulVSyncStr + tmpModeInfo.ulVSync; + + ulOffset = tmpModeInfo.ulFBPitch; + + + + ulCtl2 = INREG(MGAREG_C2CTL); + ulDataCtl2 = INREG(MGAREG_C2DATACTL); + + ulCtl2 &= 0xFF1FFFFF; + ulDataCtl2 &= 0xFFFFFF00; + + switch (tmpModeInfo.ulBpp) + { + case 15: ulCtl2 |= 0x00200000; + ulOffset <<= 1; + break; + case 16: ulCtl2 |= 0x00400000; + ulOffset <<= 1; + break; + case 32: ulCtl2 |= 0x00800000; + ulOffset <<= 2; + break; + } + + + pReg->crtc2[ MGAREG2_C2CTL ] = ulCtl2; + pReg->crtc2[ MGAREG2_C2DATACTL ] = ulDataCtl2; + + /* Horizontal Value*/ + pReg->crtc2[MGAREG2_C2HPARAM] = (((ulHDispEnd-8) << 16) | (ulHTotal-8)) ; + pReg->crtc2[MGAREG2_C2HSYNC] = (((ulHSyncEnd-8) << 16) | (ulHSyncStr-8)) ; + + + /*Vertical Value*/ + pReg->crtc2[MGAREG2_C2VPARAM] = (((ulVDispEnd-1) << 16) | (ulVTotal-1)) ; + pReg->crtc2[MGAREG2_C2VSYNC] = (((ulVSyncEnd-1) << 16) | (ulVSyncStr-1)) ; + + /** Offset value*/ + + pReg->crtc2[MGAREG2_C2OFFSET] = ulOffset; + +#ifdef DEBUG + ErrorF("EXIT MGACRTC2Get\n"); +#endif + +} + +/* Set CRTC 2*/ +/* Writes to the hardware */ +void MGACRTC2Set(ScrnInfoPtr pScrn, xMODEINFO *pModeInfo) +{ + + + MGAPtr pMga = MGAPTR(pScrn); + MGARegPtr pReg = &pMga->ModeReg; + +#ifdef DEBUG + ErrorF("ENTER MGACRTC2Set\n"); +#endif + + + /* This writes to the registers manually */ + OUTREG(MGAREG_C2CTL, pReg->crtc2[MGAREG2_C2CTL]); + OUTREG(MGAREG_C2DATACTL,pReg->crtc2[MGAREG2_C2DATACTL]); + + + /* Horizontal Value*/ + OUTREG(MGAREG_C2HPARAM, pReg->crtc2[MGAREG2_C2HPARAM]); + OUTREG(MGAREG_C2HSYNC, pReg->crtc2[MGAREG2_C2HSYNC]); + + + /*Vertical Value*/ + OUTREG(MGAREG_C2VPARAM, pReg->crtc2[MGAREG2_C2VPARAM]); + OUTREG(MGAREG_C2VSYNC, pReg->crtc2[MGAREG2_C2VSYNC]); + + /** Offset value*/ + + OUTREG(MGAREG_C2OFFSET, pReg->crtc2[MGAREG2_C2VSYNC]); +#ifdef DEBUG + ErrorF("EXIT MGACRTC2Set\n"); +#endif + +} + + +/* Set CRTC2 on the right output */ +void MGAEnableSecondOutPut(ScrnInfoPtr pScrn, xMODEINFO *pModeInfo) +{ + CARD8 ucByte, ucXDispCtrl; + CARD32 ulC2CTL; + MGAPtr pMga = MGAPTR(pScrn); + MGARegPtr pReg; + pReg = &pMga->ModeReg; +#ifdef DEBUG + ErrorF("ENTER MGAEnableSecondOutPut\n"); +#endif + + + /* Route Video PLL on second CRTC */ + ulC2CTL = INREG( MGAREG_C2CTL); + + /*--- Disable Pixel clock oscillations On Crtc1 */ + OUTREG( MGAREG_C2CTL, ulC2CTL | C2CTL_PIXCLKDIS_MASK); + /*--- Have to wait minimum time (2 acces will be ok) */ + (void) INREG( MGAREG_Status); + (void) INREG( MGAREG_Status); + + + ulC2CTL &= ~(C2CTL_PIXCLKSEL_MASK | C2CTL_PIXCLKSELH_MASK); + + ulC2CTL |= C2CTL_PIXCLKSEL_VIDEOPLL; + + + OUTREG( MGAREG_C2CTL, ulC2CTL); + /*--- Enable Pixel clock oscillations on CRTC2*/ + OUTREG( MGAREG_C2CTL, ulC2CTL & ~C2CTL_PIXCLKDIS_MASK); + + + /* We don't use MISC synch pol, must be 0*/ + ucByte = inMGAdreg( MGAREG_MISC_READ); + + OUTREG8(MGAREG_MISC_WRITE, (CARD8)(ucByte & ~(HSYNCPOL| VSYNCPOL) )); + + + + + /* Set Rset to 0.7 V*/ + ucByte = inMGAdac(MGA1064_GEN_IO_CTL); + ucByte &= ~0x40; + pReg->DacRegs[MGA1064_GEN_IO_CTL] = ucByte; + outMGAdac (MGA1064_GEN_IO_CTL, ucByte); + + ucByte = inMGAdac( MGA1064_GEN_IO_DATA); + ucByte &= ~0x40; + pReg->DacRegs[MGA1064_GEN_IO_DATA]= ucByte; + outMGAdac (MGA1064_GEN_IO_DATA, ucByte); + + /* Since G550 can swap outputs at BIOS initialisation, we must check which + * DAC is 'logically' used as the secondary (don't assume its DAC2 anymore) */ + + ulC2CTL = INREG(MGAREG_C2CTL); + ucXDispCtrl = inMGAdac(MGA1064_DISP_CTL); + + ucXDispCtrl &= ~XDISPCTRL_DAC2OUTSEL_MASK; + ucXDispCtrl |= XDISPCTRL_DAC2OUTSEL_CRTC2; + + if (!pMga->SecondOutput) { + /* Route Crtc2 on Output1 */ + ucXDispCtrl &= ~XDISPCTRL_DAC2OUTSEL_MASK; + ucXDispCtrl |= XDISPCTRL_DAC2OUTSEL_CRTC1; + ulC2CTL |= C2CTL_CRTCDACSEL_CRTC2; + } + else { + /* Route Crtc2 on Output2*/ + ucXDispCtrl &= ~XDISPCTRL_DAC2OUTSEL_MASK; + ucXDispCtrl |= XDISPCTRL_DAC2OUTSEL_CRTC2; + ulC2CTL &= ~C2CTL_CRTCDACSEL_MASK; + } + + /* Enable CRTC2*/ + ulC2CTL |= C2_EN_M; + + pReg->dac2[ MGA1064_DISP_CTL - 0x80] = ucXDispCtrl; + + + + OUTREG( MGAREG_C2CTL, ulC2CTL); + + /* Set DAC2 Synch polarity*/ + ucByte = inMGAdac( MGA1064_SYNC_CTL); + ucByte &= ~(XSYNCCTRL_DAC2HSPOL_MASK | XSYNCCTRL_DAC2VSPOL_MASK); + if ( !(pModeInfo->flSignalMode & POS_HSYNC) ) + { + ucByte |= XSYNCCTRL_DAC2HSPOL_NEG; + } + if ( !(pModeInfo->flSignalMode & POS_VSYNC) ) + { + ucByte |= XSYNCCTRL_DAC2VSPOL_NEG; + } + + /* Enable synch output*/ + ucByte &= ~(XSYNCCTRL_DAC2HSOFF_MASK | XSYNCCTRL_DAC2VSOFF_MASK); + pReg->dac2[ MGA1064_SYNC_CTL - 0x80] = ucByte; + + /* Powerup DAC2*/ + ucByte = inMGAdac( MGA1064_PWR_CTL); + pReg->dac2[ MGA1064_PWR_CTL - 0x80] = /* 0x0b; */ (ucByte | XPWRCTRL_DAC2PDN_MASK); + + + + /* Power up Fifo*/ + ucByte = inMGAdac( MGA1064_PWR_CTL); + pReg->dac2[ MGA1064_PWR_CTL - 0x80] = 0x1b; /* (ucByte | XPWRCTRL_CFIFOPDN_MASK) */; + + +#ifdef DEBUG + ErrorF("EXIT MGAEnableSecondOutPut\n"); +#endif +} + + + + + +void MGACRTC2GetPitch (ScrnInfoPtr pScrn, xMODEINFO *pModeInfo) +{ + CARD32 ulOffset; + MGAPtr pMga = MGAPTR(pScrn); + MGARegPtr pReg; + + pReg = &pMga->ModeReg; +#ifdef DEBUG + ErrorF("ENTER MGACRTC2GetPitch\n"); +#endif + + + switch(pModeInfo->ulBpp) + { + case 15: + case 16: + ulOffset = pModeInfo->ulFBPitch * 2; + break; + case 32: + ulOffset = pModeInfo->ulFBPitch * 4; + break; + default: /* Muffle compiler */ + ulOffset = pModeInfo->ulFBPitch; + break; + } + + pReg->crtc2[MGAREG2_C2OFFSET] = ulOffset; + +#ifdef DEBUG + ErrorF("EXIT MGACRTC2GetPitch\n"); +#endif + +} + +void MGACRTC2SetPitch (ScrnInfoPtr pScrn, xMODEINFO *pModeInfo) +{ + + MGAPtr pMga = MGAPTR(pScrn); + MGARegPtr pReg; + pReg = &pMga->ModeReg; + +#ifdef DEBUG + ErrorF("ENTER CRCT2SetPitch\n"); +#endif + + + OUTREG(MGAREG_C2OFFSET, pReg->crtc2[MGAREG2_C2OFFSET]); +#ifdef DEBUG + ErrorF("EXIT CRCT2SetPitch\n"); +#endif + +} + + + /* Set Display Start*/ + /* base in bytes*/ +void MGACRTC2GetDisplayStart (ScrnInfoPtr pScrn, xMODEINFO *pModeInfo, CARD32 base, CARD32 ulX, CARD32 ulY) +{ + + CARD32 ulAddress; + MGAPtr pMga = MGAPTR(pScrn); + MGARegPtr pReg; + pReg = &pMga->ModeReg; + +#ifdef DEBUG + ErrorF("ENTER MGACRTC2GetDisplayStart\n"); +#endif + + + pReg = &pMga->ModeReg; + + ulAddress = (pModeInfo->ulFBPitch * ulY + ulX); + switch(pModeInfo->ulBpp) + { + case 15: + case 16: + ulAddress <<= 1; + break; + case 32: + ulAddress <<= 2; + break; + } + + pReg->crtc2[MGAREG2_C2STARTADD0] = ulAddress + base; +#ifdef DEBUG + ErrorF("EXIT MGACRTC2GetDisplayStart\n"); +#endif + +} + +void MGACRTC2SetDisplayStart (ScrnInfoPtr pScrn, xMODEINFO *pModeInfo, CARD32 base, CARD32 ulX, CARD32 ulY) +{ + MGAPtr pMga = MGAPTR(pScrn); + MGARegPtr pReg; + pReg = &pMga->ModeReg; +#ifdef DEBUG + ErrorF("ENTER MGACRTC2SetDisplayStart\n"); +#endif + + OUTREG(MGAREG2_C2STARTADD0, pReg->crtc2[MGAREG2_C2STARTADD0]); +#ifdef DEBUG + ErrorF("EXIT MGACRTC2GetDisplayStart\n"); +#endif + +} + + + + + + + + + + + diff --git a/driver/xf86-video-mga/src/mga_dri.c b/driver/xf86-video-mga/src/mga_dri.c new file mode 100644 index 000000000..103279d21 --- /dev/null +++ b/driver/xf86-video-mga/src/mga_dri.c @@ -0,0 +1,1339 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.c,v 1.31tsi Exp $ */ + +/* + * Copyright 2000 VA Linux Systems Inc., Fremont, California. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES + * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Keith Whitwell <keith@tungstengraphics.com> + * Gareth Hughes <gareth@valinux.com> + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include "xf86.h" +#include "xf86_OSproc.h" +#include "xf86Priv.h" + +#include "xf86PciInfo.h" +#include "xf86Pci.h" +#define PSZ 8 +#include "cfb.h" +#undef PSZ +#include "cfb16.h" +#include "cfb32.h" + +#include "miline.h" + +#include <errno.h> + +#include <inttypes.h> +#include "mga_reg.h" +#include "mga.h" +#include "mga_macros.h" +#include "mga_dri.h" +#include "mga_sarea.h" +#include "mga_drm.h" + +#define _XF86DRI_SERVER_ +#include "GL/glxtokens.h" +#include "sarea.h" + + + + + +#include "GL/glxtokens.h" + +#include "mga_reg.h" +#include "mga.h" +#include "mga_macros.h" +#include "mga_dri.h" + +#define DRM_MGA_IDLE_RETRY 2048 + +static char MGAKernelDriverName[] = "mga"; +static char MGAClientDriverName[] = "mga"; + +/* DRI buffer management + */ +extern void mgaDRIInitBuffers( WindowPtr pWin, RegionPtr prgn, CARD32 index ); +extern void mgaDRIMoveBuffers( WindowPtr pParent, DDXPointRec ptOldOrg, + RegionPtr prgnSrc, CARD32 index ); + + +/* Initialize the visual configs that are supported by the hardware. + * These are combined with the visual configs that the indirect + * rendering core supports, and the intersection is exported to the + * client. + */ +static Bool MGAInitVisualConfigs( ScreenPtr pScreen ) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + MGAPtr pMga = MGAPTR(pScrn); + int numConfigs = 0; + __GLXvisualConfig *pConfigs = 0; + MGAConfigPrivPtr pMGAConfigs = 0; + MGAConfigPrivPtr *pMGAConfigPtrs = 0; + int i, db, depth, stencil, accum; + + switch ( pScrn->bitsPerPixel ) { + case 8: + case 24: + break; + + case 16: + numConfigs = 8; + + pConfigs = (__GLXvisualConfig*)xcalloc( sizeof(__GLXvisualConfig), + numConfigs ); + if ( !pConfigs ) { + return FALSE; + } + + pMGAConfigs = (MGAConfigPrivPtr)xcalloc( sizeof(MGAConfigPrivRec), + numConfigs ); + if ( !pMGAConfigs ) { + xfree( pConfigs ); + return FALSE; + } + + pMGAConfigPtrs = (MGAConfigPrivPtr*)xcalloc( sizeof(MGAConfigPrivPtr), + numConfigs ); + if ( !pMGAConfigPtrs ) { + xfree( pConfigs ); + xfree( pMGAConfigs ); + return FALSE; + } + + for ( i = 0 ; i < numConfigs ; i++ ) { + pMGAConfigPtrs[i] = &pMGAConfigs[i]; + } + + i = 0; + for ( accum = 0 ; accum <= 1 ; accum++ ) { + for ( stencil = 0 ; stencil <= 1 ; stencil++ ) { + for ( db = 1 ; db >= 0 ; db-- ) { + pConfigs[i].vid = -1; + pConfigs[i].class = -1; + pConfigs[i].rgba = TRUE; + pConfigs[i].redSize = 5; + pConfigs[i].greenSize = 6; + pConfigs[i].blueSize = 5; + pConfigs[i].alphaSize = 0; + pConfigs[i].redMask = 0x0000F800; + pConfigs[i].greenMask = 0x000007E0; + pConfigs[i].blueMask = 0x0000001F; + pConfigs[i].alphaMask = 0; + if ( accum ) { + pConfigs[i].accumRedSize = 16; + pConfigs[i].accumGreenSize = 16; + pConfigs[i].accumBlueSize = 16; + pConfigs[i].accumAlphaSize = 0; + } else { + pConfigs[i].accumRedSize = 0; + pConfigs[i].accumGreenSize = 0; + pConfigs[i].accumBlueSize = 0; + pConfigs[i].accumAlphaSize = 0; + } + if ( db ) { + pConfigs[i].doubleBuffer = TRUE; + } else { + pConfigs[i].doubleBuffer = FALSE; + } + pConfigs[i].stereo = FALSE; + pConfigs[i].bufferSize = 16; + pConfigs[i].depthSize = 16; + if ( stencil ) { + pConfigs[i].stencilSize = 8; + } else { + pConfigs[i].stencilSize = 0; + } + pConfigs[i].auxBuffers = 0; + pConfigs[i].level = 0; + if ( accum || stencil ) { + pConfigs[i].visualRating = GLX_SLOW_CONFIG; + } else { + pConfigs[i].visualRating = GLX_NONE; + } + pConfigs[i].transparentPixel = GLX_NONE; + pConfigs[i].transparentRed = 0; + pConfigs[i].transparentGreen = 0; + pConfigs[i].transparentBlue = 0; + pConfigs[i].transparentAlpha = 0; + pConfigs[i].transparentIndex = 0; + i++; + } + } + } + if ( i != numConfigs ) { + xf86DrvMsg( pScrn->scrnIndex, X_ERROR, + "[drm] Incorrect initialization of visuals\n" ); + return FALSE; + } + break; + + case 32: + numConfigs = 8; + + pConfigs = (__GLXvisualConfig*)xcalloc( sizeof(__GLXvisualConfig), + numConfigs ); + if ( !pConfigs ) { + return FALSE; + } + + pMGAConfigs = (MGAConfigPrivPtr)xcalloc( sizeof(MGAConfigPrivRec), + numConfigs ); + if ( !pMGAConfigs ) { + xfree( pConfigs ); + return FALSE; + } + + pMGAConfigPtrs = (MGAConfigPrivPtr*)xcalloc( sizeof(MGAConfigPrivPtr), + numConfigs ); + if ( !pMGAConfigPtrs ) { + xfree( pConfigs ); + xfree( pMGAConfigs ); + return FALSE; + } + + for ( i = 0 ; i < numConfigs ; i++ ) { + pMGAConfigPtrs[i] = &pMGAConfigs[i]; + } + + i = 0; + for ( accum = 0 ; accum <= 1 ; accum++ ) { + for ( depth = 0 ; depth <= 1 ; depth++ ) { /* and stencil */ + for ( db = 1 ; db >= 0 ; db-- ) { + pConfigs[i].vid = -1; + pConfigs[i].class = -1; + pConfigs[i].rgba = TRUE; + pConfigs[i].redSize = 8; + pConfigs[i].greenSize = 8; + pConfigs[i].blueSize = 8; + pConfigs[i].alphaSize = 0; + pConfigs[i].redMask = 0x00FF0000; + pConfigs[i].greenMask = 0x0000FF00; + pConfigs[i].blueMask = 0x000000FF; + pConfigs[i].alphaMask = 0x0; + if ( accum ) { + pConfigs[i].accumRedSize = 16; + pConfigs[i].accumGreenSize = 16; + pConfigs[i].accumBlueSize = 16; + pConfigs[i].accumAlphaSize = 0; + } else { + pConfigs[i].accumRedSize = 0; + pConfigs[i].accumGreenSize = 0; + pConfigs[i].accumBlueSize = 0; + pConfigs[i].accumAlphaSize = 0; + } + if ( db ) { + pConfigs[i].doubleBuffer = TRUE; + } else { + pConfigs[i].doubleBuffer = FALSE; + } + pConfigs[i].stereo = FALSE; + pConfigs[i].bufferSize = 24; + if ( depth ) { + pConfigs[i].depthSize = 24; + pConfigs[i].stencilSize = 8; + } + else { + pConfigs[i].depthSize = 0; + pConfigs[i].stencilSize = 0; + } + pConfigs[i].auxBuffers = 0; + pConfigs[i].level = 0; + if ( accum ) { + pConfigs[i].visualRating = GLX_SLOW_CONFIG; + } else { + pConfigs[i].visualRating = GLX_NONE; + } + pConfigs[i].transparentPixel = GLX_NONE; + pConfigs[i].transparentRed = 0; + pConfigs[i].transparentGreen = 0; + pConfigs[i].transparentBlue = 0; + pConfigs[i].transparentAlpha = 0; + pConfigs[i].transparentIndex = 0; + i++; + } + } + } + if ( i != numConfigs ) { + xf86DrvMsg( pScrn->scrnIndex, X_ERROR, + "[drm] Incorrect initialization of visuals\n" ); + return FALSE; + } + break; + + default: + /* Unexpected bits/pixels */ + break; + } + + pMga->numVisualConfigs = numConfigs; + pMga->pVisualConfigs = pConfigs; + pMga->pVisualConfigsPriv = pMGAConfigs; + + GlxSetVisualConfigs( numConfigs, pConfigs, (void **)pMGAConfigPtrs ); + + return TRUE; +} + +static Bool MGACreateContext( ScreenPtr pScreen, VisualPtr visual, + drm_context_t hwContext, void *pVisualConfigPriv, + DRIContextType contextStore ) +{ + /* Nothing yet */ + return TRUE; +} + +static void MGADestroyContext( ScreenPtr pScreen, drm_context_t hwContext, + DRIContextType contextStore ) +{ + /* Nothing yet */ +} + + +/* Quiescence, locking + */ +#define MGA_TIMEOUT 2048 + +static void MGAWaitForIdleDMA( ScrnInfoPtr pScrn ) +{ + MGAPtr pMga = MGAPTR(pScrn); + drm_lock_t lock; + int ret; + int i = 0; + + memset( &lock, 0, sizeof(drm_lock_t) ); + + for (;;) { + do { + /* first ask for quiescent and flush */ + lock.flags = DRM_LOCK_QUIESCENT | DRM_LOCK_FLUSH; + do { + ret = drmCommandWrite( pMga->drmFD, DRM_MGA_FLUSH, + &lock, sizeof( drm_lock_t ) ); + } while ( ret == -EBUSY && i++ < DRM_MGA_IDLE_RETRY ); + + /* if it's still busy just try quiescent */ + if ( ret == -EBUSY ) { + lock.flags = DRM_LOCK_QUIESCENT; + do { + ret = drmCommandWrite( pMga->drmFD, DRM_MGA_FLUSH, + &lock, sizeof( drm_lock_t ) ); + } while ( ret == -EBUSY && i++ < DRM_MGA_IDLE_RETRY ); + } + } while ( ( ret == -EBUSY ) && ( i++ < MGA_TIMEOUT ) ); + + if ( ret == 0 ) + return; + + xf86DrvMsg( pScrn->scrnIndex, X_ERROR, + "[dri] Idle timed out, resetting engine...\n" ); + + drmCommandNone( pMga->drmFD, DRM_MGA_RESET ); + } +} + + +void MGAGetQuiescence( ScrnInfoPtr pScrn ) +{ + MGAPtr pMga = MGAPTR(pScrn); + + pMga->haveQuiescense = 1; + + if ( pMga->directRenderingEnabled ) { + MGAFBLayout *pLayout = &pMga->CurrentLayout; + + MGAWaitForIdleDMA( pScrn ); + + /* FIXME what about EXA? */ +#ifdef USE_XAA + if (!pMga->Exa && pMga->AccelInfoRec) { + WAITFIFO( 11 ); + OUTREG( MGAREG_MACCESS, pMga->MAccess ); + OUTREG( MGAREG_PITCH, pLayout->displayWidth ); + + pMga->PlaneMask = ~0; + OUTREG( MGAREG_PLNWT, pMga->PlaneMask ); + + pMga->BgColor = 0; + pMga->FgColor = 0; + OUTREG( MGAREG_BCOL, pMga->BgColor ); + OUTREG( MGAREG_FCOL, pMga->FgColor ); + OUTREG( MGAREG_SRCORG, pMga->realSrcOrg ); + + pMga->SrcOrg = 0; + OUTREG( MGAREG_DSTORG, pMga->DstOrg ); + OUTREG( MGAREG_OPMODE, MGAOPM_DMA_BLIT ); + OUTREG( MGAREG_CXBNDRY, 0xFFFF0000 ); /* (maxX << 16) | minX */ + OUTREG( MGAREG_YTOP, 0x00000000 ); /* minPixelPointer */ + OUTREG( MGAREG_YBOT, 0x007FFFFF ); /* maxPixelPointer */ + + pMga->AccelFlags &= ~CLIPPER_ON; + } +#endif + } +} + +void MGAGetQuiescenceShared( ScrnInfoPtr pScrn ) +{ + MGAPtr pMga = MGAPTR(pScrn); + MGAEntPtr pMGAEnt = pMga->entityPrivate; + MGAPtr pMGA2 = MGAPTR(pMGAEnt->pScrn_2); + + pMga = MGAPTR(pMGAEnt->pScrn_1); + pMga->haveQuiescense = 1; + pMGA2->haveQuiescense = 1; + + if ( pMGAEnt->directRenderingEnabled ) { + MGAWaitForIdleDMA( pMGAEnt->pScrn_1 ); + + /* FIXME what about EXA? */ +#ifdef USE_XAA + if (!pMga->Exa && pMga->AccelInfoRec) + pMga->RestoreAccelState( pScrn ); +#endif + xf86SetLastScrnFlag( pScrn->entityList[0], pScrn->scrnIndex ); + } +} + +static void MGASwapContext( ScreenPtr pScreen ) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + MGAPtr pMga = MGAPTR(pScrn); + + /* Arrange for dma_quiescence and xaa sync to be called as + * appropriate. + */ + pMga->haveQuiescense = 0; + + MGA_MARK_SYNC(pMga, pScrn); +} + +static void MGASwapContextShared( ScreenPtr pScreen ) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + MGAPtr pMga = MGAPTR(pScrn); + MGAEntPtr pMGAEnt = pMga->entityPrivate; + MGAPtr pMGA2 = MGAPTR(pMGAEnt->pScrn_2); + + pMga = MGAPTR(pMGAEnt->pScrn_1); + + pMga->haveQuiescense = pMGA2->haveQuiescense = 0; + + MGA_MARK_SYNC(pMga, pScrn); + MGA_MARK_SYNC(pMGA2, pMGAEnt->pScrn_2); +} + +/* FIXME: This comment is out of date, since we aren't overriding + * Block/Wakeuphandler anymore. + * + * + * This is really only called from validate/postvalidate as we + * override the dri lock/unlock. Want to remove validate/postvalidate + * processing, but need to remove all client-side use of drawable lock + * first (otherwise there is noone recover when a client dies holding + * the drawable lock). + * + * What does this mean? + * + * - The above code gets executed every time a + * window changes shape or the focus changes, which isn't really + * optimal. + * - The X server therefore believes it needs to do an XAA sync + * *and* a dma quiescense ioctl each time that happens. + * + * We don't wrap wakeuphandler any longer, so at least we can say that + * this doesn't happen *every time the mouse moves*... + */ +static void +MGADRISwapContext( ScreenPtr pScreen, DRISyncType syncType, + DRIContextType oldContextType, void *oldContext, + DRIContextType newContextType, void *newContext ) +{ + if ( syncType == DRI_3D_SYNC && + oldContextType == DRI_2D_CONTEXT && + newContextType == DRI_2D_CONTEXT ) + { + MGASwapContext( pScreen ); + } +} + +static void +MGADRISwapContextShared( ScreenPtr pScreen, DRISyncType syncType, + DRIContextType oldContextType, void *oldContext, + DRIContextType newContextType, void *newContext ) +{ + if ( syncType == DRI_3D_SYNC && + oldContextType == DRI_2D_CONTEXT && + newContextType == DRI_2D_CONTEXT ) + { + MGASwapContextShared( pScreen ); + } +} + +#ifdef USE_XAA +void MGASelectBuffer( ScrnInfoPtr pScrn, int which ) +{ + MGAPtr pMga = MGAPTR(pScrn); + MGADRIPtr pMGADRI = (MGADRIPtr)pMga->pDRIInfo->devPrivate; + + switch ( which ) { + case MGA_BACK: + OUTREG( MGAREG_DSTORG, pMGADRI->backOffset ); + OUTREG( MGAREG_SRCORG, pMGADRI->backOffset ); + break; + case MGA_DEPTH: + OUTREG( MGAREG_DSTORG, pMGADRI->depthOffset ); + OUTREG( MGAREG_SRCORG, pMGADRI->depthOffset ); + break; + default: + case MGA_FRONT: + OUTREG( MGAREG_DSTORG, pMGADRI->frontOffset ); + OUTREG( MGAREG_SRCORG, pMGADRI->frontOffset ); + break; + } +} +#endif + + +static unsigned int mylog2( unsigned int n ) +{ + unsigned int log2 = 1; + while ( n > 1 ) n >>= 1, log2++; + return log2; +} + +/** + * Initialize DMA and secondary texture memory + * + * \todo + * The sizes used for the primary DMA buffer and the bin size and count for + * the secondary DMA buffers should be configurable from the xorg.conf. + * + * \todo + * This routine should use \c mga_bios_values::host_interface to limit the + * AGP mode. It the card is PCI, \c MGARec::agpSize should be forced to 0. + */ +static Bool MGADRIBootstrapDMA(ScreenPtr pScreen) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + MGAPtr pMga = MGAPTR(pScrn); + MGADRIServerPrivatePtr pMGADRIServer = pMga->DRIServerInfo; + int ret; + int requested_agp_mode; + int count; + + + if(pMga->agpSize < 12)pMga->agpSize = 12; + if(pMga->agpSize > 64)pMga->agpSize = 64; /* cap */ + + + requested_agp_mode = 0; + switch ( pMga->agpMode ) { + case 4: + requested_agp_mode |= MGA_AGP_4X_MODE; + case 2: + requested_agp_mode |= MGA_AGP_2X_MODE; + case 1: + default: + requested_agp_mode |= MGA_AGP_1X_MODE; + } + + + if ( (pMGADRIServer->drm_version_minor >= 2) && !pMga->useOldDmaInit ) { + drm_mga_dma_bootstrap_t dma_bs; + + + (void) memset( & dma_bs, 0, sizeof( dma_bs ) ); + dma_bs.primary_size = 1024 * 1024; + dma_bs.secondary_bin_count = MGA_NUM_BUFFERS; + dma_bs.secondary_bin_size = MGA_BUFFER_SIZE; + dma_bs.agp_size = pMga->agpSize; + dma_bs.agp_mode = (pMga->forcePciDma) ? 0 : requested_agp_mode; + + ret = drmCommandWriteRead( pMga->drmFD, DRM_MGA_DMA_BOOTSTRAP, + & dma_bs, sizeof( dma_bs ) ); + if ( ret ) { + xf86DrvMsg( pScreen->myNum, X_ERROR, "[drm] Could not boot-strap DMA (%d)\n", ret ); + return FALSE; + } + + pMga->agpMode = dma_bs.agp_mode; + pMGADRIServer->agp.size = dma_bs.agp_size; + + pMGADRIServer->agpTextures.handle = dma_bs.texture_handle; + pMGADRIServer->agpTextures.size = dma_bs.texture_size; + } + else { + unsigned long mode; + unsigned int vendor, device; + int i; + + + if ( pMga->forcePciDma ) { + const char * const msg = (pMGADRIServer->drm_version_minor < 2) + ? "DRM version is too old (3.2 or later required)" + : "old DMA init path was requested"; + + xf86DrvMsg( pScreen->myNum, X_WARNING, + "[agp] Cannot force PCI DMA because %s\n", msg ); + } + + if ( drmAgpAcquire( pMga->drmFD ) < 0 ) { + xf86DrvMsg( pScreen->myNum, X_ERROR, "[agp] AGP not available\n" ); + return FALSE; + } + + mode = drmAgpGetMode( pMga->drmFD ); /* Default mode */ + vendor = drmAgpVendorId( pMga->drmFD ); + device = drmAgpDeviceId( pMga->drmFD ); + + mode = (mode & ~MGA_AGP_MODE_MASK) | requested_agp_mode; + + xf86DrvMsg( pScreen->myNum, X_INFO, + "[agp] Mode 0x%08lx [AGP 0x%04x/0x%04x; Card 0x%04x/0x%04x]\n", + mode, vendor, device, + pMga->PciInfo->vendor, + pMga->PciInfo->chipType ); + + if ( drmAgpEnable( pMga->drmFD, mode ) < 0 ) { + xf86DrvMsg( pScreen->myNum, X_ERROR, "[agp] AGP not enabled\n" ); + drmAgpRelease( pMga->drmFD ); + return FALSE; + } + + if ( pMga->Chipset == PCI_CHIP_MGAG200 ) { + switch ( pMga->agpMode ) { + case 2: + xf86DrvMsg( pScreen->myNum, X_INFO, + "[drm] Enabling AGP 2x PLL encoding\n" ); + OUTREG( MGAREG_AGP_PLL, MGA_AGP2XPLL_ENABLE ); + break; + + case 1: + default: + xf86DrvMsg( pScreen->myNum, X_INFO, + "[drm] Disabling AGP 2x PLL encoding\n" ); + OUTREG( MGAREG_AGP_PLL, MGA_AGP2XPLL_DISABLE ); + pMga->agpMode = 1; + break; + } + } + + pMGADRIServer->agp.size = pMga->agpSize * 1024 * 1024; + + pMGADRIServer->warp.offset = 0; + pMGADRIServer->warp.size = MGA_WARP_UCODE_SIZE; + + pMGADRIServer->primary.offset = (pMGADRIServer->warp.offset + + pMGADRIServer->warp.size); + pMGADRIServer->primary.size = 1024 * 1024; + + pMGADRIServer->buffers.offset = (pMGADRIServer->primary.offset + + pMGADRIServer->primary.size); + pMGADRIServer->buffers.size = MGA_NUM_BUFFERS * MGA_BUFFER_SIZE; + + + pMGADRIServer->agpTextures.offset = (pMGADRIServer->buffers.offset + + pMGADRIServer->buffers.size); + + pMGADRIServer->agpTextures.size = (pMGADRIServer->agp.size - + pMGADRIServer->agpTextures.offset); + + ret = drmAgpAlloc( pMga->drmFD, pMGADRIServer->agp.size, + 0, NULL, &pMGADRIServer->agp.handle ); + if ( ret < 0 ) { + xf86DrvMsg( pScreen->myNum, X_ERROR, "[agp] Out of memory (%d)\n", ret ); + drmAgpRelease( pMga->drmFD ); + return FALSE; + } + xf86DrvMsg( pScreen->myNum, X_INFO, + "[agp] %d kB allocated with handle 0x%08x\n", + pMGADRIServer->agp.size/1024, + (unsigned int) pMGADRIServer->agp.handle ); + + if ( drmAgpBind( pMga->drmFD, pMGADRIServer->agp.handle, 0 ) < 0 ) { + xf86DrvMsg( pScreen->myNum, X_ERROR, "[agp] Could not bind memory\n" ); + drmAgpFree( pMga->drmFD, pMGADRIServer->agp.handle ); + drmAgpRelease( pMga->drmFD ); + return FALSE; + } + + /* WARP microcode space + */ + if ( drmAddMap( pMga->drmFD, + pMGADRIServer->warp.offset, + pMGADRIServer->warp.size, + DRM_AGP, DRM_READ_ONLY, + &pMGADRIServer->warp.handle ) < 0 ) { + xf86DrvMsg( pScreen->myNum, X_ERROR, + "[agp] Could not add WARP microcode mapping\n" ); + return FALSE; + } + xf86DrvMsg( pScreen->myNum, X_INFO, + "[agp] WARP microcode handle = 0x%08x\n", + (unsigned int) pMGADRIServer->warp.handle ); + + /* Primary DMA space + */ + if ( drmAddMap( pMga->drmFD, + pMGADRIServer->primary.offset, + pMGADRIServer->primary.size, + DRM_AGP, DRM_READ_ONLY, + &pMGADRIServer->primary.handle ) < 0 ) { + xf86DrvMsg( pScreen->myNum, X_ERROR, + "[agp] Could not add primary DMA mapping\n" ); + return FALSE; + } + xf86DrvMsg( pScreen->myNum, X_INFO, + "[agp] Primary DMA handle = 0x%08x\n", + (unsigned int) pMGADRIServer->primary.handle ); + + /* DMA buffers + */ + if ( drmAddMap( pMga->drmFD, + pMGADRIServer->buffers.offset, + pMGADRIServer->buffers.size, + DRM_AGP, 0, + &pMGADRIServer->buffers.handle ) < 0 ) { + xf86DrvMsg( pScreen->myNum, X_ERROR, + "[agp] Could not add DMA buffers mapping\n" ); + return FALSE; + } + xf86DrvMsg( pScreen->myNum, X_INFO, + "[agp] DMA buffers handle = 0x%08x\n", + (unsigned int) pMGADRIServer->buffers.handle ); + + count = drmAddBufs( pMga->drmFD, + MGA_NUM_BUFFERS, MGA_BUFFER_SIZE, + DRM_AGP_BUFFER, pMGADRIServer->buffers.offset ); + if ( count <= 0 ) { + xf86DrvMsg( pScrn->scrnIndex, X_INFO, + "[drm] failure adding %d %d byte DMA buffers\n", + MGA_NUM_BUFFERS, MGA_BUFFER_SIZE ); + return FALSE; + } + xf86DrvMsg( pScreen->myNum, X_INFO, + "[drm] Added %d %d byte DMA buffers\n", + count, MGA_BUFFER_SIZE ); + + i = mylog2(pMGADRIServer->agpTextures.size / MGA_NR_TEX_REGIONS); + if(i < MGA_LOG_MIN_TEX_REGION_SIZE) + i = MGA_LOG_MIN_TEX_REGION_SIZE; + pMGADRIServer->agpTextures.size = (pMGADRIServer->agpTextures.size >> i) << i; + + if ( drmAddMap( pMga->drmFD, + pMGADRIServer->agpTextures.offset, + pMGADRIServer->agpTextures.size, + DRM_AGP, 0, + &pMGADRIServer->agpTextures.handle ) < 0 ) { + xf86DrvMsg( pScreen->myNum, X_ERROR, + "[agp] Could not add agpTexture mapping\n" ); + return FALSE; + } + + xf86DrvMsg( pScreen->myNum, X_INFO, + "[agp] agpTexture handle = 0x%08x\n", + (unsigned int) pMGADRIServer->agpTextures.handle ); + xf86DrvMsg( pScreen->myNum, X_INFO, + "[agp] agpTexture size: %d kb\n", pMGADRIServer->agpTextures.size/1024 ); + + pMGADRIServer->registers.size = MGAIOMAPSIZE; + + if ( drmAddMap( pMga->drmFD, + (drm_handle_t)pMga->IOAddress, + pMGADRIServer->registers.size, + DRM_REGISTERS, DRM_READ_ONLY, + &pMGADRIServer->registers.handle ) < 0 ) { + xf86DrvMsg( pScreen->myNum, X_ERROR, + "[drm] Could not add MMIO registers mapping\n" ); + return FALSE; + } + xf86DrvMsg( pScreen->myNum, X_INFO, + "[drm] Registers handle = 0x%08x\n", + (unsigned int) pMGADRIServer->registers.handle ); + + pMGADRIServer->status.size = SAREA_MAX; + + if ( drmAddMap( pMga->drmFD, 0, pMGADRIServer->status.size, + DRM_SHM, DRM_READ_ONLY | DRM_LOCKED | DRM_KERNEL, + &pMGADRIServer->status.handle ) < 0 ) { + xf86DrvMsg( pScreen->myNum, X_ERROR, + "[drm] Could not add status page mapping\n" ); + return FALSE; + } + xf86DrvMsg( pScreen->myNum, X_INFO, + "[drm] Status handle = 0x%08x\n", + (unsigned int) pMGADRIServer->status.handle ); + } + + return TRUE; +} + +static Bool MGADRIKernelInit( ScreenPtr pScreen ) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + MGAPtr pMga = MGAPTR(pScrn); + MGADRIServerPrivatePtr pMGADRIServer = pMga->DRIServerInfo; + drm_mga_init_t init; + int ret; + + memset( &init, 0, sizeof(drm_mga_init_t) ); + + init.func = MGA_INIT_DMA; + init.sarea_priv_offset = sizeof(XF86DRISAREARec); + + switch ( pMga->Chipset ) { + case PCI_CHIP_MGAG550: + case PCI_CHIP_MGAG400: + init.chipset = MGA_CARD_TYPE_G400; + break; + case PCI_CHIP_MGAG200: + case PCI_CHIP_MGAG200_PCI: + init.chipset = MGA_CARD_TYPE_G200; + break; + default: + return FALSE; + } + init.sgram = !pMga->HasSDRAM; + + init.maccess = pMga->MAccess; + + init.fb_cpp = pScrn->bitsPerPixel / 8; + init.front_offset = pMGADRIServer->frontOffset; + init.front_pitch = pMGADRIServer->frontPitch / init.fb_cpp; + init.back_offset = pMGADRIServer->backOffset; + init.back_pitch = pMGADRIServer->backPitch / init.fb_cpp; + + init.depth_cpp = pScrn->bitsPerPixel / 8; + init.depth_offset = pMGADRIServer->depthOffset; + init.depth_pitch = pMGADRIServer->depthPitch / init.depth_cpp; + + init.texture_offset[0] = pMGADRIServer->textureOffset; + init.texture_size[0] = pMGADRIServer->textureSize; + + init.fb_offset = pMGADRIServer->fb.handle; + init.mmio_offset = pMGADRIServer->registers.handle; + init.status_offset = pMGADRIServer->status.handle; + + init.warp_offset = pMGADRIServer->warp.handle; + init.primary_offset = pMGADRIServer->primary.handle; + init.buffers_offset = pMGADRIServer->buffers.handle; + + init.texture_offset[1] = pMGADRIServer->agpTextures.handle; + init.texture_size[1] = pMGADRIServer->agpTextures.size; + + ret = drmCommandWrite( pMga->drmFD, DRM_MGA_INIT, &init, sizeof(drm_mga_init_t)); + if ( ret < 0 ) { + xf86DrvMsg( pScrn->scrnIndex, X_ERROR, + "[drm] Failed to initialize DMA! (%d)\n", ret ); + return FALSE; + } + + + return TRUE; +} + +static void MGADRIIrqInit(MGAPtr pMga, ScreenPtr pScreen) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + + /* version = drmGetVersion(pMga->drmFD); + if ( version ) { + if ( version->version_major != 3 || + version->version_minor < 0 ) {*/ + if (!pMga->irq) { + pMga->irq = drmGetInterruptFromBusID( + pMga->drmFD, + ((pciConfigPtr)pMga->PciInfo->thisCard)->busnum, + ((pciConfigPtr)pMga->PciInfo->thisCard)->devnum, + ((pciConfigPtr)pMga->PciInfo->thisCard)->funcnum); + + if((drmCtlInstHandler(pMga->drmFD, pMga->irq)) != 0) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "[drm] failure adding irq handler, " + "there is a device already using that irq\n" + "[drm] falling back to irq-free operation\n"); + pMga->irq = 0; + } else { + pMga->reg_ien = INREG( MGAREG_IEN ); + } + } + + if (pMga->irq) + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "[drm] dma control initialized, using IRQ %d\n", + pMga->irq); +} + +static Bool MGADRIBuffersInit( ScreenPtr pScreen ) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + MGAPtr pMga = MGAPTR(pScrn); + MGADRIServerPrivatePtr pMGADRIServer = pMga->DRIServerInfo; + + + pMGADRIServer->drmBuffers = drmMapBufs( pMga->drmFD ); + if ( !pMGADRIServer->drmBuffers ) { + xf86DrvMsg( pScreen->myNum, X_ERROR, + "[drm] Failed to map DMA buffers list\n" ); + return FALSE; + } + xf86DrvMsg( pScreen->myNum, X_INFO, + "[drm] Mapped %d DMA buffers\n", + pMGADRIServer->drmBuffers->count ); + + return TRUE; +} + + +Bool MGADRIScreenInit( ScreenPtr pScreen ) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + MGAPtr pMga = MGAPTR(pScrn); + DRIInfoPtr pDRIInfo; + MGADRIPtr pMGADRI; + MGADRIServerPrivatePtr pMGADRIServer; + + switch(pMga->Chipset) { + case PCI_CHIP_MGAG550: + case PCI_CHIP_MGAG400: + case PCI_CHIP_MGAG200: + case PCI_CHIP_MGAG200_PCI: + break; + default: + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "[drm] Direct rendering only supported with G200/G400/G450/G550.\n"); + return FALSE; + } + + /* Check that the GLX, DRI, and DRM modules have been loaded by testing + * for canonical symbols in each module. + */ + if ( !xf86LoaderCheckSymbol( "GlxSetVisualConfigs" ) ) return FALSE; + if ( !xf86LoaderCheckSymbol( "drmAvailable" ) ) return FALSE; + if ( !xf86LoaderCheckSymbol( "DRIQueryVersion" ) ) { + xf86DrvMsg( pScreen->myNum, X_ERROR, + "[dri] MGADRIScreenInit failed (libdri.a too old)\n" ); + return FALSE; + } + + /* Check the DRI version */ + { + int major, minor, patch; + DRIQueryVersion( &major, &minor, &patch ); + if ( major != DRIINFO_MAJOR_VERSION || minor < DRIINFO_MINOR_VERSION ) { + xf86DrvMsg( pScreen->myNum, X_ERROR, + "[dri] MGADRIScreenInit failed because of a version mismatch.\n" + "[dri] libdri version = %d.%d.%d but version %d.%d.x is needed.\n" + "[dri] Disabling the DRI.\n", + major, minor, patch, + DRIINFO_MAJOR_VERSION, DRIINFO_MINOR_VERSION ); + return FALSE; + } + } + + xf86DrvMsg( pScreen->myNum, X_INFO, + "[drm] bpp: %d depth: %d\n", + pScrn->bitsPerPixel, pScrn->depth ); + + if ( (pScrn->bitsPerPixel / 8) != 2 && + (pScrn->bitsPerPixel / 8) != 4 ) { + xf86DrvMsg( pScreen->myNum, X_ERROR, + "[dri] Direct rendering only supported in 16 and 32 bpp modes\n" ); + return FALSE; + } + + pDRIInfo = DRICreateInfoRec(); + if ( !pDRIInfo ) { + xf86DrvMsg( pScreen->myNum, X_ERROR, + "[dri] DRICreateInfoRec() failed\n" ); + return FALSE; + } + pMga->pDRIInfo = pDRIInfo; + + pDRIInfo->drmDriverName = MGAKernelDriverName; + pDRIInfo->clientDriverName = MGAClientDriverName; + if (xf86LoaderCheckSymbol("DRICreatePCIBusID")) { + pDRIInfo->busIdString = DRICreatePCIBusID(pMga->PciInfo); + } else { + pDRIInfo->busIdString = xalloc(64); + sprintf( pDRIInfo->busIdString, "PCI:%d:%d:%d", + ((pciConfigPtr)pMga->PciInfo->thisCard)->busnum, + ((pciConfigPtr)pMga->PciInfo->thisCard)->devnum, + ((pciConfigPtr)pMga->PciInfo->thisCard)->funcnum ); + } + pDRIInfo->ddxDriverMajorVersion = MGA_MAJOR_VERSION; + pDRIInfo->ddxDriverMinorVersion = MGA_MINOR_VERSION; + pDRIInfo->ddxDriverPatchVersion = MGA_PATCHLEVEL; + pDRIInfo->frameBufferPhysicalAddress = (void *) pMga->FbAddress; + pDRIInfo->frameBufferSize = pMga->FbMapSize; + pDRIInfo->frameBufferStride = pScrn->displayWidth*(pScrn->bitsPerPixel/8); + pDRIInfo->ddxDrawableTableEntry = MGA_MAX_DRAWABLES; + + pDRIInfo->wrap.ValidateTree = NULL; + pDRIInfo->wrap.PostValidateTree = NULL; + + pDRIInfo->createDummyCtx = TRUE; + pDRIInfo->createDummyCtxPriv = FALSE; + + if ( SAREA_MAX_DRAWABLES < MGA_MAX_DRAWABLES ) { + pDRIInfo->maxDrawableTableEntry = SAREA_MAX_DRAWABLES; + } else { + pDRIInfo->maxDrawableTableEntry = MGA_MAX_DRAWABLES; + } + + /* For now the mapping works by using a fixed size defined + * in the SAREA header. + */ + if ( sizeof(XF86DRISAREARec) + sizeof(MGASAREAPrivRec) > SAREA_MAX ) { + xf86DrvMsg( pScrn->scrnIndex, X_ERROR, + "[drm] Data does not fit in SAREA\n" ); + return FALSE; + } + + xf86DrvMsg( pScrn->scrnIndex, X_INFO, + "[drm] Sarea %d+%d: %d\n", + (int)sizeof(XF86DRISAREARec), (int)sizeof(MGASAREAPrivRec), + (int)sizeof(XF86DRISAREARec) + (int)sizeof(MGASAREAPrivRec) ); + + pDRIInfo->SAREASize = SAREA_MAX; + + pMGADRI = (MGADRIPtr)xcalloc( sizeof(MGADRIRec), 1 ); + if ( !pMGADRI ) { + DRIDestroyInfoRec( pMga->pDRIInfo ); + pMga->pDRIInfo = 0; + xf86DrvMsg( pScrn->scrnIndex, X_ERROR, + "[drm] Failed to allocate memory for private record\n" ); + return FALSE; + } + + pMGADRIServer = (MGADRIServerPrivatePtr) + xcalloc( sizeof(MGADRIServerPrivateRec), 1 ); + if ( !pMGADRIServer ) { + xfree( pMGADRI ); + DRIDestroyInfoRec( pMga->pDRIInfo ); + pMga->pDRIInfo = 0; + xf86DrvMsg( pScrn->scrnIndex, X_ERROR, + "[drm] Failed to allocate memory for private record\n" ); + return FALSE; + } + pMga->DRIServerInfo = pMGADRIServer; + + pDRIInfo->devPrivate = pMGADRI; + pDRIInfo->devPrivateSize = sizeof(MGADRIRec); + pDRIInfo->contextSize = sizeof(MGADRIContextRec); + + pDRIInfo->CreateContext = MGACreateContext; + pDRIInfo->DestroyContext = MGADestroyContext; + if ( xf86IsEntityShared( pScrn->entityList[0] ) + && pMga->DualHeadEnabled) { + pDRIInfo->SwapContext = MGADRISwapContextShared; + } else { + pDRIInfo->SwapContext = MGADRISwapContext; + } + + pDRIInfo->InitBuffers = mgaDRIInitBuffers; + pDRIInfo->MoveBuffers = mgaDRIMoveBuffers; + + pDRIInfo->bufferRequests = DRI_ALL_WINDOWS; + + if ( !DRIScreenInit( pScreen, pDRIInfo, &pMga->drmFD ) ) { + xfree( pMGADRIServer ); + pMga->DRIServerInfo = 0; + xfree( pDRIInfo->devPrivate ); + pDRIInfo->devPrivate = 0; + DRIDestroyInfoRec( pMga->pDRIInfo ); + pMga->pDRIInfo = 0; + xf86DrvMsg( pScreen->myNum, X_ERROR, + "[drm] DRIScreenInit failed. Disabling DRI.\n" ); + return FALSE; + } + + /* Check the DRM versioning */ + { + drmVersionPtr version; + + /* Check the DRM lib version. + drmGetLibVersion was not supported in version 1.0, so check for + symbol first to avoid possible crash or hang. + */ + if (xf86LoaderCheckSymbol("drmGetLibVersion")) { + version = drmGetLibVersion(pMga->drmFD); + } + else { + /* drmlib version 1.0.0 didn't have the drmGetLibVersion + entry point. Fake it by allocating a version record + via drmGetVersion and changing it to version 1.0.0 + */ + version = drmGetVersion(pMga->drmFD); + version->version_major = 1; + version->version_minor = 0; + version->version_patchlevel = 0; + } + + if (version) { + if (version->version_major != 1 || + version->version_minor < 1) { + /* incompatible drm library version */ + xf86DrvMsg(pScreen->myNum, X_ERROR, + "[dri] MGADRIScreenInit failed because of a version mismatch.\n" + "[dri] libdrm.a module version is %d.%d.%d but version 1.1.x is needed.\n" + "[dri] Disabling DRI.\n", + version->version_major, + version->version_minor, + version->version_patchlevel); + drmFreeVersion(version); + MGADRICloseScreen( pScreen ); /* FIXME: ??? */ + return FALSE; + } + drmFreeVersion(version); + } + + /* Check the MGA DRM version */ + version = drmGetVersion(pMga->drmFD); + if ( version ) { + if ( version->version_major != 3 || + version->version_minor < 0 ) { + /* incompatible drm version */ + xf86DrvMsg( pScreen->myNum, X_ERROR, + "[dri] MGADRIScreenInit failed because of a version mismatch.\n" + "[dri] mga.o kernel module version is %d.%d.%d but version 3.0.x is needed.\n" + "[dri] Disabling DRI.\n", + version->version_major, + version->version_minor, + version->version_patchlevel ); + drmFreeVersion( version ); + MGADRICloseScreen( pScreen ); /* FIXME: ??? */ + return FALSE; + } + pMGADRIServer->drm_version_major = version->version_major; + pMGADRIServer->drm_version_minor = version->version_minor; + + drmFreeVersion( version ); + } + } + + if ( (pMga->bios.host_interface == MGA_HOST_PCI) && + ((pMGADRIServer->drm_version_minor < 2) || pMga->useOldDmaInit) ) { + /* PCI cards are supported if the DRM version is at least 3.2 and the + * user has not explicitly disabled the new DMA init path (i.e., to + * support old version of the client-side driver that don't use the + * new features of the 3.2 DRM). + */ + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "[drm] Direct rendering on PCI cards requires DRM version 3.2 or higher\n"); + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "[drm] and a recent client-side driver. Also make sure that 'OldDmaInit'\n"); + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "[drm] is not selected in xorg.conf.'\n"); + return FALSE; + } + + + if ( !MGADRIBootstrapDMA( pScreen ) ) { + DRICloseScreen( pScreen ); + return FALSE; + } + + { + void *scratch_ptr; + int scratch_int; + + DRIGetDeviceInfo(pScreen, &pMGADRIServer->fb.handle, + &scratch_int, &scratch_int, + &scratch_int, &scratch_int, + &scratch_ptr); + } + + if ( !MGAInitVisualConfigs( pScreen ) ) { + DRICloseScreen( pScreen ); + return FALSE; + } + xf86DrvMsg( pScrn->scrnIndex, X_INFO, "[dri] visual configs initialized\n" ); + + return TRUE; +} + + +Bool MGADRIFinishScreenInit( ScreenPtr pScreen ) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + MGAPtr pMga = MGAPTR(pScrn); + MGADRIServerPrivatePtr pMGADRIServer = pMga->DRIServerInfo; + MGADRIPtr pMGADRI; + int i; + + if ( !pMga->pDRIInfo ) + return FALSE; + + pMGADRI = (MGADRIPtr)pMga->pDRIInfo->devPrivate; + + pMga->pDRIInfo->driverSwapMethod = DRI_HIDE_X_CONTEXT; + + /* NOTE: DRIFinishScreenInit must be called before *DRIKernelInit + * because *DRIKernelInit requires that the hardware lock is held by + * the X server, and the first time the hardware lock is grabbed is + * in DRIFinishScreenInit. + */ + if ( !DRIFinishScreenInit( pScreen ) ) { + MGADRICloseScreen( pScreen ); + return FALSE; + } + + if ( !MGADRIKernelInit( pScreen ) ) { + MGADRICloseScreen( pScreen ); + return FALSE; + } + + if ( !MGADRIBuffersInit( pScreen ) ) { + MGADRICloseScreen( pScreen ); + return FALSE; + } + + MGADRIIrqInit(pMga, pScreen); + + switch(pMga->Chipset) { + case PCI_CHIP_MGAG550: + case PCI_CHIP_MGAG400: + pMGADRI->chipset = MGA_CARD_TYPE_G400; + break; + case PCI_CHIP_MGAG200: + case PCI_CHIP_MGAG200_PCI: + pMGADRI->chipset = MGA_CARD_TYPE_G200; + break; + default: + return FALSE; + } + pMGADRI->width = pScrn->virtualX; + pMGADRI->height = pScrn->virtualY; + pMGADRI->cpp = pScrn->bitsPerPixel / 8; + + pMGADRI->agpMode = pMga->agpMode; + + pMGADRI->frontOffset = pMGADRIServer->frontOffset; + pMGADRI->frontPitch = pMGADRIServer->frontPitch; + pMGADRI->backOffset = pMGADRIServer->backOffset; + pMGADRI->backPitch = pMGADRIServer->backPitch; + pMGADRI->depthOffset = pMGADRIServer->depthOffset; + pMGADRI->depthPitch = pMGADRIServer->depthPitch; + pMGADRI->textureOffset = pMGADRIServer->textureOffset; + pMGADRI->textureSize = pMGADRIServer->textureSize; + + pMGADRI->agpTextureOffset = (unsigned int)pMGADRIServer->agpTextures.handle; + pMGADRI->agpTextureSize = (unsigned int)pMGADRIServer->agpTextures.size; + + pMGADRI->sarea_priv_offset = sizeof(XF86DRISAREARec); + + + /* Newer versions of the client-side driver do not need these if the + * kernel version is high enough to support interrupt based waiting. + */ + + pMGADRI->registers.handle = pMGADRIServer->registers.handle; + pMGADRI->registers.size = pMGADRIServer->registers.size; + pMGADRI->primary.handle = pMGADRIServer->primary.handle; + pMGADRI->primary.size = pMGADRIServer->primary.size; + + + /* These are no longer used by the client-side DRI driver. They should + * be removed in the next release (i.e., 6.9 / 7.0). + */ + + pMGADRI->status.handle = pMGADRIServer->status.handle; + pMGADRI->status.size = pMGADRIServer->status.size; + pMGADRI->buffers.handle = pMGADRIServer->buffers.handle; + pMGADRI->buffers.size = pMGADRIServer->buffers.size; + + i = mylog2( pMGADRI->textureSize / MGA_NR_TEX_REGIONS ); + if ( i < MGA_LOG_MIN_TEX_REGION_SIZE ) + i = MGA_LOG_MIN_TEX_REGION_SIZE; + + pMGADRI->logTextureGranularity = i; + pMGADRI->textureSize = (pMGADRI->textureSize >> i) << i; /* truncate */ + + i = mylog2( pMGADRIServer->agpTextures.size / MGA_NR_TEX_REGIONS ); + if ( i < MGA_LOG_MIN_TEX_REGION_SIZE ) + i = MGA_LOG_MIN_TEX_REGION_SIZE; + + pMGADRI->logAgpTextureGranularity = i; + + return TRUE; +} + + +void MGADRICloseScreen( ScreenPtr pScreen ) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + MGAPtr pMga = MGAPTR(pScrn); + MGADRIServerPrivatePtr pMGADRIServer = pMga->DRIServerInfo; + drm_mga_init_t init; + + if ( pMGADRIServer->drmBuffers ) { + drmUnmapBufs( pMGADRIServer->drmBuffers ); + pMGADRIServer->drmBuffers = NULL; + } + + if (pMga->irq) { + drmCtlUninstHandler(pMga->drmFD); + pMga->irq = 0; + pMga->reg_ien = 0; + } + + /* Cleanup DMA */ + memset( &init, 0, sizeof(drm_mga_init_t) ); + init.func = MGA_CLEANUP_DMA; + drmCommandWrite( pMga->drmFD, DRM_MGA_INIT, &init, sizeof(drm_mga_init_t) ); + + if ( pMGADRIServer->agp.handle != DRM_AGP_NO_HANDLE ) { + drmAgpUnbind( pMga->drmFD, pMGADRIServer->agp.handle ); + drmAgpFree( pMga->drmFD, pMGADRIServer->agp.handle ); + pMGADRIServer->agp.handle = DRM_AGP_NO_HANDLE; + drmAgpRelease( pMga->drmFD ); + } + + DRICloseScreen( pScreen ); + + if ( pMga->pDRIInfo ) { + if ( pMga->pDRIInfo->devPrivate ) { + xfree( pMga->pDRIInfo->devPrivate ); + pMga->pDRIInfo->devPrivate = 0; + } + DRIDestroyInfoRec( pMga->pDRIInfo ); + pMga->pDRIInfo = 0; + } + if ( pMga->DRIServerInfo ) { + xfree( pMga->DRIServerInfo ); + pMga->DRIServerInfo = 0; + } + if ( pMga->pVisualConfigs ) { + xfree( pMga->pVisualConfigs ); + } + if ( pMga->pVisualConfigsPriv ) { + xfree( pMga->pVisualConfigsPriv ); + } +} diff --git a/driver/xf86-video-mga/src/mga_dri.h b/driver/xf86-video-mga/src/mga_dri.h new file mode 100644 index 000000000..f1afb5dd4 --- /dev/null +++ b/driver/xf86-video-mga/src/mga_dri.h @@ -0,0 +1,137 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.h,v 1.6 2001/04/10 16:08:01 dawes Exp $ */ + +/* + * Copyright 2000 VA Linux Systems Inc., Fremont, California. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES + * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Keith Whitwell <keith@tungstengraphics.com> + * Gareth Hughes <gareth@valinux.com> + */ + +#ifndef __MGA_DRI_H__ +#define __MGA_DRI_H__ + +#include <X11/Xfuncproto.h> +#include "xf86drm.h" + +#define MGA_DEFAULT_AGP_MODE 1 +#define MGA_MAX_AGP_MODE 4 + +/* Buffer are aligned on 4096 byte boundaries. + */ +#define MGA_BUFFER_ALIGN 0x00000fff + +typedef struct { + unsigned int frontOffset; + unsigned int frontPitch; + + unsigned int backOffset; + unsigned int backPitch; + + unsigned int depthOffset; + unsigned int depthPitch; + + unsigned int textureOffset; + int textureSize; + + drmRegion agp; + + /* PCI mappings */ + drmRegion fb; + drmRegion registers; + drmRegion status; + + /* AGP mappings */ + drmRegion warp; + drmRegion primary; + drmRegion buffers; + drmRegion agpTextures; + + drmBufMapPtr drmBuffers; + + int drm_version_major; + int drm_version_minor; +} MGADRIServerPrivateRec, *MGADRIServerPrivatePtr; + +/** + * Hardware information sent from server to client-side DRI driver. + * + * \todo + * Several of these fields are no longer used (and will never be used + * again) on the client-side. At some point when it is safe to do so + * (probably for the X.org 6.9 / 7.0 release), these fields should be removed. + */ +#if 1 +typedef struct _mgaDrmRegion { + drm_handle_t handle; + unsigned int offset; + drmSize size; +} mgaDrmRegion, *mgaDrmRegionPtr; +#else +#define mgaDrmRegion drmRegion +#endif + +typedef struct { + int chipset; + int width; + int height; + int mem _X_DEPRECATED; /**< Unused client-side since forever. */ + int cpp; + + int agpMode; + + unsigned int frontOffset; + unsigned int frontPitch; + + unsigned int backOffset; + unsigned int backPitch; + + unsigned int depthOffset; + unsigned int depthPitch; + + unsigned int textureOffset; + unsigned int textureSize; + int logTextureGranularity; /**< Unused client-side since 2003-Aug-06 */ + + unsigned int agpBufferOffset _X_DEPRECATED; /**< Unused client-side since forever. */ + + unsigned int agpTextureOffset; + unsigned int agpTextureSize; + int logAgpTextureGranularity; /**< Unused client-side since 2003-Aug-06 */ + + unsigned int mAccess _X_DEPRECATED; /**< Unused client-side since forever. */ + + /** + * \name DRM memory regions. + */ + /*@{*/ + mgaDrmRegion registers; /**< MMIO registers. */ + mgaDrmRegion status; /**< Unused client-side since forever. */ + mgaDrmRegion primary; /**< Primary DMA region. */ + mgaDrmRegion buffers; /**< Unused client-side since forever. */ + /*@}*/ + + unsigned int sarea_priv_offset; +} MGADRIRec, *MGADRIPtr; + +#endif diff --git a/driver/xf86-video-mga/src/mga_dripriv.h b/driver/xf86-video-mga/src/mga_dripriv.h new file mode 100644 index 000000000..3ddd133be --- /dev/null +++ b/driver/xf86-video-mga/src/mga_dripriv.h @@ -0,0 +1,51 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dripriv.h,v 1.4 2001/04/10 16:08:01 dawes Exp $ */ + +/* + * Copyright 2000 VA Linux Systems Inc., Fremont, California. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES + * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Gareth Hughes <gareth@valinux.com> + */ + +#ifndef __MGA_DRIPRIV_H__ +#define __MGA_DRIPRIV_H__ + +#include "GL/glxint.h" + +#define MGA_MAX_DRAWABLES 256 + +extern void GlxSetVisualConfigs( int nconfigs, + __GLXvisualConfig *configs, + void **configprivs ); + +typedef struct { + /* Nothing here yet */ + int dummy; +} MGAConfigPrivRec, *MGAConfigPrivPtr; + +typedef struct { + /* Nothing here yet */ + int dummy; +} MGADRIContextRec, *MGADRIContextPtr; + +#endif diff --git a/driver/xf86-video-mga/src/mga_driver.c b/driver/xf86-video-mga/src/mga_driver.c new file mode 100644 index 000000000..a95871ad3 --- /dev/null +++ b/driver/xf86-video-mga/src/mga_driver.c @@ -0,0 +1,4274 @@ +/* $XConsortium: mga_driver.c /main/12 1996/10/28 05:13:26 kaleb $ */ +/* + * MGA Millennium (MGA2064W) with Ti3026 RAMDAC driver v.1.1 + * + * The driver is written without any chip documentation. All extended ports + * and registers come from tracing the VESA-ROM functions. + * The BitBlt Engine comes from tracing the windows BitBlt function. + * + * Author: Radoslaw Kapitan, Tarnow, Poland + * kapitan@student.uci.agh.edu.pl + * original source + * + * Now that MATROX has released documentation to the public, enhancing + * this driver has become much easier. Nevertheless, this work continues + * to be based on Radoslaw's original source + * + * Contributors: + * Andrew van der Stock + * ajv@greebo.net + * additions, corrections, cleanups + * + * Dirk Hohndel + * hohndel@XFree86.Org + * integrated into XFree86-3.1.2Gg + * fixed some problems with PCI probing and mapping + * + * David Dawes + * dawes@XFree86.Org + * some cleanups, and fixed some problems + * + * Andrew E. Mileski + * aem@ott.hookup.net + * RAMDAC timing, and BIOS stuff + * + * Leonard N. Zubkoff + * lnz@dandelion.com + * Support for 8MB boards, RGB Sync-on-Green, and DPMS. + * Guy DESBIEF + * g.desbief@aix.pacwan.net + * RAMDAC MGA1064 timing, + * Doug Merritt + * doug@netcom.com + * Fixed 32bpp hires 8MB horizontal line glitch at middle right + * Niels Gram Jeppesen + * Added digital screen option for first head + */ + +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_driver.c,v 1.244tsi Exp $ */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +/* All drivers should typically include these */ +#include "xf86.h" +#include "xf86_OSproc.h" +#include "xf86Resources.h" + +/* All drivers need this */ + +#include "compiler.h" + +/* Drivers for PCI hardware need this */ +#include "xf86PciInfo.h" + +/* Drivers that need to access the PCI config space directly need this */ +#include "xf86Pci.h" + +/* All drivers initialising the SW cursor need this */ +#include "mipointer.h" + +/* All drivers implementing backing store need this */ +#include "mibstore.h" + +#include "micmap.h" + +#include "xf86DDC.h" +#include "xf86RAC.h" +#include "vbe.h" + +#include "fb.h" +#include "dixstruct.h" + +#include "mga_reg.h" +#include "mga.h" +#include "mga_macros.h" +#include "mga_maven.h" + +#ifdef USE_XAA +#include "xaa.h" +#endif + +#include "xf86cmap.h" +#include "shadowfb.h" +#include "fbdevhw.h" + +#include "cfb8_32.h" + +#ifdef XF86DRI +#include "dri.h" +#endif + +#include <unistd.h> + +/* + * Forward definitions for the functions that make up the driver. + */ + +/* Mandatory functions */ +static const OptionInfoRec * MGAAvailableOptions(int chipid, int busid); +static void MGAIdentify(int flags); +static Bool MGAProbe(DriverPtr drv, int flags); +static Bool MGAPreInit(ScrnInfoPtr pScrn, int flags); +static Bool MGAScreenInit(int Index, ScreenPtr pScreen, int argc, + char **argv); +static Bool MGAEnterVT(int scrnIndex, int flags); +static Bool MGAEnterVTFBDev(int scrnIndex, int flags); +static void MGALeaveVT(int scrnIndex, int flags); +static Bool MGACloseScreen(int scrnIndex, ScreenPtr pScreen); +static Bool MGASaveScreen(ScreenPtr pScreen, int mode); +static Bool MGASaveScreenCrtc2(ScreenPtr pScreen, int mode); + +/* This shouldn't be needed since RAC will disable all I/O for MGA cards. */ +#ifdef DISABLE_VGA_IO +static void VgaIOSave(int i, void *arg); +static void VgaIORestore(int i, void *arg); +#endif + +/* Optional functions */ +static void MGAFreeScreen(int scrnIndex, int flags); +static ModeStatus MGAValidMode(int scrnIndex, DisplayModePtr mode, + Bool verbose, int flags); + +/* Internally used functions */ +static Bool MGAMapMem(ScrnInfoPtr pScrn); +static Bool MGAUnmapMem(ScrnInfoPtr pScrn); +static void MGASave(ScrnInfoPtr pScrn); +static void MGARestore(ScrnInfoPtr pScrn); +static Bool MGAModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode); +static void MGABlockHandler(int, pointer, pointer, pointer); +static void MGAG100BlackMagic(ScrnInfoPtr pScrn); + +static int MGAEntityIndex = -1; + +#include "mga_merge.h" + + +/* + * This contains the functions needed by the server after loading the + * driver module. It must be supplied, and gets added the driver list by + * the Module Setup funtion in the dynamic case. In the static case a + * reference to this is compiled in, and this requires that the name of + * this DriverRec be an upper-case version of the driver name. + */ + +_X_EXPORT DriverRec MGA_C_NAME = { + MGA_VERSION, + MGA_DRIVER_NAME, + MGAIdentify, + MGAProbe, + MGAAvailableOptions, + NULL, + 0 +}; + +/* Supported chipsets */ +static SymTabRec MGAChipsets[] = { + { PCI_CHIP_MGA2064, "mga2064w" }, + { PCI_CHIP_MGA1064, "mga1064sg" }, + { PCI_CHIP_MGA2164, "mga2164w" }, + { PCI_CHIP_MGA2164_AGP, "mga2164w AGP" }, + { PCI_CHIP_MGAG100, "mgag100" }, + { PCI_CHIP_MGAG100_PCI, "mgag100 PCI" }, + { PCI_CHIP_MGAG200, "mgag200" }, + { PCI_CHIP_MGAG200_PCI, "mgag200 PCI" }, + { PCI_CHIP_MGAG200_SE_A_PCI, "mgag200 SE A PCI" }, + { PCI_CHIP_MGAG200_SE_B_PCI, "mgag200 SE B PCI" }, + { PCI_CHIP_MGAG400, "mgag400" }, + { PCI_CHIP_MGAG550, "mgag550" }, + {-1, NULL } +}; + +static PciChipsets MGAPciChipsets[] = { + { PCI_CHIP_MGA2064, PCI_CHIP_MGA2064, (resRange*)RES_SHARED_VGA }, + { PCI_CHIP_MGA1064, PCI_CHIP_MGA1064, (resRange*)RES_SHARED_VGA }, + { PCI_CHIP_MGA2164, PCI_CHIP_MGA2164, (resRange*)RES_SHARED_VGA }, + { PCI_CHIP_MGA2164_AGP, PCI_CHIP_MGA2164_AGP,(resRange*)RES_SHARED_VGA }, + { PCI_CHIP_MGAG100, PCI_CHIP_MGAG100, (resRange*)RES_SHARED_VGA }, + { PCI_CHIP_MGAG100_PCI, PCI_CHIP_MGAG100_PCI,(resRange*)RES_SHARED_VGA }, + { PCI_CHIP_MGAG200, PCI_CHIP_MGAG200, (resRange*)RES_SHARED_VGA }, + { PCI_CHIP_MGAG200_PCI, PCI_CHIP_MGAG200_PCI,(resRange*)RES_SHARED_VGA }, + { PCI_CHIP_MGAG200_SE_B_PCI, PCI_CHIP_MGAG200_SE_B_PCI, + (resRange*)RES_SHARED_VGA }, + { PCI_CHIP_MGAG200_SE_A_PCI, PCI_CHIP_MGAG200_SE_A_PCI, + (resRange*)RES_SHARED_VGA }, + { PCI_CHIP_MGAG400, PCI_CHIP_MGAG400, (resRange*)RES_SHARED_VGA }, + { PCI_CHIP_MGAG550, PCI_CHIP_MGAG550, (resRange*)RES_SHARED_VGA }, + { -1, -1, (resRange*)RES_UNDEFINED } +}; + +static const OptionInfoRec MGAOptions[] = { + { OPTION_SW_CURSOR, "SWcursor", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_HW_CURSOR, "HWcursor", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_PCI_RETRY, "PciRetry", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_SYNC_ON_GREEN, "SyncOnGreen", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_NOACCEL, "NoAccel", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_SHOWCACHE, "ShowCache", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_OVERLAY, "Overlay", OPTV_ANYSTR, {0}, FALSE }, + { OPTION_MGA_SDRAM, "MGASDRAM", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_SHADOW_FB, "ShadowFB", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_FBDEV, "UseFBDev", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_COLOR_KEY, "ColorKey", OPTV_INTEGER, {0}, FALSE }, + { OPTION_SET_MCLK, "SetMclk", OPTV_FREQ, {0}, FALSE }, + { OPTION_OVERCLOCK_MEM, "OverclockMem", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_VIDEO_KEY, "VideoKey", OPTV_INTEGER, {0}, FALSE }, + { OPTION_ROTATE, "Rotate", OPTV_ANYSTR, {0}, FALSE }, + { OPTION_TEXTURED_VIDEO, "TexturedVideo",OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_CRTC2HALF, "Crtc2Half", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_CRTC2RAM, "Crtc2Ram", OPTV_INTEGER, {0}, FALSE }, + { OPTION_INT10, "Int10", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_AGP_MODE, "AGPMode", OPTV_INTEGER, {0}, FALSE }, + { OPTION_AGP_SIZE, "AGPSize", OPTV_INTEGER, {0}, FALSE }, + { OPTION_DIGITAL1, "DigitalScreen1",OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_DIGITAL2, "DigitalScreen2",OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_TV, "TV", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_TVSTANDARD, "TVStandard", OPTV_ANYSTR, {0}, FALSE }, + { OPTION_CABLETYPE, "CableType", OPTV_ANYSTR, {0}, FALSE }, + { OPTION_NOHAL, "NoHal", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_SWAPPED_HEAD, "SwappedHead", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_DRI, "DRI", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_MERGEDFB, "MergedFB", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_HSYNC2, "Monitor2HSync", OPTV_ANYSTR, {0}, FALSE }, + { OPTION_VREFRESH2, "Monitor2VRefresh", OPTV_ANYSTR, {0}, FALSE }, + { OPTION_MONITOR2POS, "Monitor2Position", OPTV_ANYSTR, {0}, FALSE }, + { OPTION_METAMODES, "MetaModes", OPTV_ANYSTR, {0}, FALSE }, + { OPTION_OLDDMA, "OldDmaInit", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_PCIDMA, "ForcePciDma", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_ACCELMETHOD, "AccelMethod", OPTV_ANYSTR, {0}, FALSE }, + { -1, NULL, OPTV_NONE, {0}, FALSE } +}; + + +/* + * List of symbols from other modules that this module references. This + * list is used to tell the loader that it is OK for symbols here to be + * unresolved providing that it hasn't been told that they haven't been + * told that they are essential via a call to xf86LoaderReqSymbols() or + * xf86LoaderReqSymLists(). The purpose is this is to avoid warnings about + * unresolved symbols that are not required. + */ + +static const char *vgahwSymbols[] = { + "vgaHWFreeHWRec", + "vgaHWGetHWRec", + "vgaHWGetIOBase", + "vgaHWGetIndex", + "vgaHWInit", + "vgaHWLock", + "vgaHWMapMem", + "vgaHWProtect", + "vgaHWRestore", + "vgaHWSave", + "vgaHWSaveScreen", + "vgaHWSetMmioFuncs", + "vgaHWUnlock", + "vgaHWUnmapMem", + "vgaHWddc1SetSpeedWeak", + NULL +}; + +static const char *fbSymbols[] = { + "fbPictureInit", + "fbScreenInit", + NULL +}; + +static const char *xf8_32bppSymbols[] = { + "cfb8_32ScreenInit", + "xf86Overlay8Plus32Init", + NULL +}; + +#ifdef USE_EXA +static const char *exaSymbols[] = { + "exaDriverInit", + "exaDriverFini", + "exaGetPixmapOffset", + "exaGetVersion", + NULL +}; +#endif + +#ifdef USE_XAA +static const char *xaaSymbols[] = { + "XAACachePlanarMonoStipple", + "XAACreateInfoRec", + "XAADestroyInfoRec", + "XAAGetFallbackOps", + "XAAInit", + "XAAMoveDWORDS", + "XAA_888_plus_PICT_a8_to_8888", + NULL +}; +#endif + +static const char *ramdacSymbols[] = { + "xf86CreateCursorInfoRec", + "xf86DestroyCursorInfoRec", + "xf86InitCursor", + NULL +}; + +#ifdef XF86DRI +static const char *drmSymbols[] = { + "drmAddBufs", + "drmAddMap", + "drmAgpAcquire", + "drmAgpAlloc", + "drmAgpBind", + "drmAgpDeviceId", + "drmAgpEnable", + "drmAgpFree", + "drmAgpGetMode", + "drmAgpRelease", + "drmAgpUnbind", + "drmAgpVendorId", + "drmCommandNone", + "drmCommandWrite", + "drmCtlInstHandler", + "drmCtlUninstHandler", + "drmFreeVersion", + "drmGetInterruptFromBusID", + "drmGetLibVersion", + "drmGetVersion", + "drmMap", + "drmMapBufs", + "drmUnmap", + "drmUnmapBufs", + NULL +}; + +static const char *driSymbols[] = { + "DRICloseScreen", + "DRICreateInfoRec", + "DRIDestroyInfoRec", + "DRIFinishScreenInit", + "DRIGetDeviceInfo", + "DRILock", + "DRIQueryVersion", + "DRIScreenInit", + "DRIUnlock", + "GlxSetVisualConfigs", + "DRICreatePCIBusID", + NULL +}; +#endif + +#define MGAuseI2C 1 + +static const char *ddcSymbols[] = { + "xf86DoEDID_DDC1", +#if MGAuseI2C + "xf86DoEDID_DDC2", +#endif + "xf86PrintEDID", + "xf86SetDDCproperties", + NULL +}; + +static const char *i2cSymbols[] = { + "xf86CreateI2CBusRec", + "xf86I2CBusInit", + NULL +}; + +static const char *shadowSymbols[] = { + "ShadowFBInit", + NULL +}; + +#ifdef XFree86LOADER +static const char *vbeSymbols[] = { + "VBEInit", + "vbeDoEDID", + "vbeFree", + NULL +}; +#endif + +static const char *int10Symbols[] = { + "xf86FreeInt10", + "xf86InitInt10", + NULL +}; + +static const char *fbdevHWSymbols[] = { + "fbdevHWAdjustFrameWeak", + "fbdevHWEnterVT", + "fbdevHWGetVidmem", + "fbdevHWInit", + "fbdevHWLeaveVTWeak", + "fbdevHWLoadPaletteWeak", + "fbdevHWMapMMIO", + "fbdevHWMapVidmem", + "fbdevHWModeInit", + "fbdevHWRestore", + "fbdevHWSave", + "fbdevHWSwitchModeWeak", + "fbdevHWUnmapMMIO", + "fbdevHWUnmapVidmem", + "fbdevHWUseBuildinMode", + "fbdevHWValidModeWeak", + NULL +}; + +#ifdef USEMGAHAL +static const char *halSymbols[] = { + "MGACloseLibrary", + "MGAGetBOARDHANDLESize", + "MGAGetHardwareInfo", + "MGAOpenLibrary", + "MGARestoreVgaState", + "MGASaveVgaState", + "MGASetMode", + "MGASetVgaMode", + "MGAValidateMode", + "MGAValidateVideoParameters", + "HALSetDisplayStart", + NULL +}; +#endif +#ifdef XFree86LOADER + +static MODULESETUPPROTO(mgaSetup); + +static XF86ModuleVersionInfo mgaVersRec = +{ + MGA_DRIVER_NAME, + MODULEVENDORSTRING, + MODINFOSTRING1, + MODINFOSTRING2, + XORG_VERSION_CURRENT, + MGA_MAJOR_VERSION, MGA_MINOR_VERSION, MGA_PATCHLEVEL, + ABI_CLASS_VIDEODRV, /* This is a video driver */ + ABI_VIDEODRV_VERSION, + MOD_CLASS_VIDEODRV, + {0,0,0,0} +}; + +_X_EXPORT XF86ModuleData MGA_MODULE_DATA = { &mgaVersRec, mgaSetup, NULL }; + +static pointer +mgaSetup(pointer module, pointer opts, int *errmaj, int *errmin) +{ + static Bool setupDone = FALSE; + + /* This module should be loaded only once, but check to be sure. */ + + if (!setupDone) { + setupDone = TRUE; + xf86AddDriver(&MGA_C_NAME, module, 0); + + /* + * Modules that this driver always requires may be loaded here + * by calling LoadSubModule(). + */ + + /* + * Tell the loader about symbols from other modules that this module + * might refer to. + */ + LoaderRefSymLists(vgahwSymbols, +#ifdef USE_XAA + xaaSymbols, +#endif +#ifdef USE_EXA + exaSymbols, +#endif + xf8_32bppSymbols, ramdacSymbols, + ddcSymbols, i2cSymbols, shadowSymbols, + fbdevHWSymbols, vbeSymbols, + fbSymbols, int10Symbols, +#ifdef XF86DRI + drmSymbols, driSymbols, +#endif +#ifdef USEMGAHAL + halSymbols, +#endif + NULL); + + /* + * The return value must be non-NULL on success even though there + * is no TearDownProc. + */ + return (pointer)1; + } else { + if (errmaj) *errmaj = LDR_ONCEONLY; + return NULL; + } +} + + +#endif /* XFree86LOADER */ + +/* + * ramdac info structure initialization + */ +static MGARamdacRec DacInit = { + FALSE, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, + 90000, /* maxPixelClock */ + 0, X_DEFAULT, X_DEFAULT, FALSE +}; + +Bool +MGAGetRec(ScrnInfoPtr pScrn) +{ + /* + * Allocate an MGARec, and hook it into pScrn->driverPrivate. + * pScrn->driverPrivate is initialised to NULL, so we can check if + * the allocation has already been done. + */ + if (pScrn->driverPrivate != NULL) + return TRUE; + + pScrn->driverPrivate = xnfcalloc(sizeof(MGARec), 1); + /* Initialise it */ + + MGAPTR(pScrn)->Dac = DacInit; + return TRUE; +} + +void +MGAFreeRec(ScrnInfoPtr pScrn) +{ + if (pScrn->driverPrivate == NULL) + return; + xfree(pScrn->driverPrivate); + pScrn->driverPrivate = NULL; +} + +static const OptionInfoRec * +MGAAvailableOptions(int chipid, int busid) +{ + return MGAOptions; +} + +/* Mandatory */ +static void +MGAIdentify(int flags) +{ + xf86PrintChipsets(MGA_NAME, "driver for Matrox chipsets", MGAChipsets); +} + + +/* Mandatory */ +static Bool +MGAProbe(DriverPtr drv, int flags) +{ + int i; + GDevPtr *devSections; + int *usedChips = NULL; + int numDevSections; + int numUsed; + Bool foundScreen = FALSE; + + /* + * The aim here is to find all cards that this driver can handle, + * and for the ones not already claimed by another driver, claim the + * slot, and allocate a ScrnInfoRec. + * + * This should be a minimal probe, and it should under no circumstances + * change the state of the hardware. Because a device is found, don't + * assume that it will be used. Don't do any initialisations other than + * the required ScrnInfoRec initialisations. Don't allocate any new + * data structures. + */ + + /* + * Check if there has been a chipset override in the config file. + * For this we must find out if there is an active device section which + * is relevant, i.e., which has no driver specified or has THIS driver + * specified. + */ + + if ((numDevSections = xf86MatchDevice(MGA_DRIVER_NAME, + &devSections)) <= 0) { + /* + * There's no matching device section in the config file, so quit + * now. + */ + return FALSE; + } + + /* + * We need to probe the hardware first. We then need to see how this + * fits in with what is given in the config file, and allow the config + * file info to override any contradictions. + */ + + /* + * All of the cards this driver supports are PCI, so the "probing" just + * amounts to checking the PCI data that the server has already collected. + */ + if (xf86GetPciVideoInfo() == NULL) { + /* + * We won't let anything in the config file override finding no + * PCI video cards at all. This seems reasonable now, but we'll see. + */ + return FALSE; + } + + numUsed = xf86MatchPciInstances(MGA_NAME, PCI_VENDOR_MATROX, + MGAChipsets, MGAPciChipsets, devSections, + numDevSections, drv, &usedChips); + /* Free it since we don't need that list after this */ + xfree(devSections); + if (numUsed <= 0) + return FALSE; + + + if (flags & PROBE_DETECT) + foundScreen = TRUE; + else for (i = 0; i < numUsed; i++) { + ScrnInfoPtr pScrn; + EntityInfoPtr pEnt; +#ifdef DISABLE_VGA_IO + MgaSavePtr smga; +#endif + + /* Allocate a ScrnInfoRec and claim the slot */ + pScrn = NULL; + +#ifndef DISABLE_VGA_IO + if ((pScrn = xf86ConfigPciEntity(pScrn, 0,usedChips[i], + MGAPciChipsets, NULL, NULL, + NULL, NULL, NULL))) +#else + smga = xnfalloc(sizeof(MgaSave)); + smga->pvp = xf86GetPciInfoForEntity(usedChips[i]); + if ((pScrn = xf86ConfigPciEntity(pScrn, 0,usedChips[i], + MGAPciChipsets, NULL,VgaIOSave, + VgaIOSave, VgaIORestore,smga))) +#endif + { + + /* Fill in what we can of the ScrnInfoRec */ + pScrn->driverVersion = MGA_VERSION; + pScrn->driverName = MGA_DRIVER_NAME; + pScrn->name = MGA_NAME; + pScrn->Probe = MGAProbe; + pScrn->PreInit = MGAPreInit; + pScrn->ScreenInit = MGAScreenInit; + pScrn->SwitchMode = MGASwitchMode; + pScrn->AdjustFrame = MGAAdjustFrame; + pScrn->EnterVT = MGAEnterVT; + pScrn->LeaveVT = MGALeaveVT; + pScrn->FreeScreen = MGAFreeScreen; + pScrn->ValidMode = MGAValidMode; + + foundScreen = TRUE; + } + + /* + * For cards that can do dual head per entity, mark the entity + * as sharable. + */ + pEnt = xf86GetEntityInfo(usedChips[i]); + if ((pEnt->chipset == PCI_CHIP_MGAG400 || pEnt->chipset == PCI_CHIP_MGAG550)) { + MGAEntPtr pMgaEnt = NULL; + DevUnion *pPriv; + + xf86SetEntitySharable(usedChips[i]); + /* Allocate an entity private if necessary */ + if (MGAEntityIndex < 0) + MGAEntityIndex = xf86AllocateEntityPrivateIndex(); + pPriv = xf86GetEntityPrivate(pScrn->entityList[0], MGAEntityIndex); + if (!pPriv->ptr) { + pPriv->ptr = xnfcalloc(sizeof(MGAEntRec), 1); + pMgaEnt = pPriv->ptr; + pMgaEnt->lastInstance = -1; + } else { + pMgaEnt = pPriv->ptr; + } + /* + * Set the entity instance for this instance of the driver. For + * dual head per card, instance 0 is the "master" instance, driving + * the primary head, and instance 1 is the "slave". + */ + pMgaEnt->lastInstance++; + xf86SetEntityInstanceForScreen(pScrn, pScrn->entityList[0], + pMgaEnt->lastInstance); + } + } + + xfree(usedChips); + + return foundScreen; +} + + +/* + * MGASoftReset -- + * + * Resets drawing engine + */ +void +MGASoftReset(ScrnInfoPtr pScrn) +{ + MGAPtr pMga = MGAPTR(pScrn); + + pMga->FbMapSize = 8192 * 1024; + MGAMapMem(pScrn); + + /* set soft reset bit */ + OUTREG(MGAREG_Reset, 1); + usleep(200); + OUTREG(MGAREG_Reset, 0); + + /* reset memory */ + OUTREG(MGAREG_MACCESS, 1<<15); + usleep(10); + +#if 0 + /* This will hang if the PLLs aren't on */ + + /* wait until drawing engine is ready */ + while ( MGAISBUSY() ) + usleep(1000); + + /* flush FIFO */ + i = 32; + WAITFIFO(i); + while ( i-- ) + OUTREG(MGAREG_SHIFT, 0); +#endif + + MGAUnmapMem(pScrn); +} + +/* + * MGACountRAM -- + * + * Counts amount of installed RAM + */ +static int +MGACountRam(ScrnInfoPtr pScrn) +{ + MGAPtr pMga = MGAPTR(pScrn); + int ProbeSize = 8192; + int SizeFound = 2048; + CARD32 biosInfo = 0; + +#if 0 + /* This isn't correct. It looks like this can have arbitrary + data for the memconfig even when the bios has initialized + it. At least, my cards don't advertise the documented + values (my 8 and 16 Meg G200s have the same values) */ + if(pMga->Primary) /* can only trust this for primary cards */ + biosInfo = pciReadLong(pMga->PciTag, PCI_OPTION_REG); +#endif + + switch(pMga->Chipset) { + case PCI_CHIP_MGA2164: + case PCI_CHIP_MGA2164_AGP: + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Unable to probe memory amount due to hardware bug. " + "Assuming 4096 KB\n"); + return 4096; + case PCI_CHIP_MGAG400: + case PCI_CHIP_MGAG550: + if(biosInfo) { + switch((biosInfo >> 10) & 0x07) { + case 0: + return (biosInfo & (1 << 14)) ? 32768 : 16384; + case 1: + case 2: + return 16384; + case 3: + case 5: + return 65536; + case 4: + return 32768; + } + } + ProbeSize = 32768; + break; + case PCI_CHIP_MGAG200_SE_A_PCI: + case PCI_CHIP_MGAG200_SE_B_PCI: + ProbeSize = 4096; + break; + case PCI_CHIP_MGAG200: + case PCI_CHIP_MGAG200_PCI: + if(biosInfo) { + switch((biosInfo >> 11) & 0x03) { + case 0: + return 8192; + default: + return 16384; + } + } + ProbeSize = 8192; + break; + case PCI_CHIP_MGAG100: + case PCI_CHIP_MGAG100_PCI: + if(biosInfo) /* I'm not sure if the docs are correct */ + return (biosInfo & (1 << 12)) ? 16384 : 8192; + case PCI_CHIP_MGA1064: + case PCI_CHIP_MGA2064: + ProbeSize = 8192; + break; + default: + break; + } + + if (pMga->FbAddress) { + volatile unsigned char* base; + unsigned char tmp; + int i; + + pMga->FbMapSize = ProbeSize * 1024; + MGAMapMem(pScrn); + base = pMga->FbBase; + + /* turn MGA mode on - enable linear frame buffer (CRTCEXT3) */ + OUTREG8(MGAREG_CRTCEXT_INDEX, 3); + tmp = INREG8(MGAREG_CRTCEXT_DATA); + OUTREG8(MGAREG_CRTCEXT_DATA, tmp | 0x80); + + /* apparently the G200SE doesn't have a BIOS to read */ + if (pMga->is_G200SE) { + CARD32 MemoryAt0, MemoryAt1, Offset; + CARD32 FirstMemoryVal1, FirstMemoryVal2; + CARD32 SecondMemoryVal1, SecondMemoryVal2; + CARD32 TestMemoryLocA, TestMemoryLocB; + CARD32 TestMemoryLoc0, TestMemoryLoc1; + CARD32 TestA, TestB; + + MemoryAt0 = base[0]; + MemoryAt1 = base[1]; + base[0] = 0; + base[1] = 0; + + for (Offset = 0x100000; Offset < (ProbeSize * 1024); + Offset += 0x1000) { + FirstMemoryVal1 = base[Offset]; + FirstMemoryVal2 = base[Offset+1]; + SecondMemoryVal1 = base[Offset+0x100]; + SecondMemoryVal2 = base[Offset+0x101]; + + base[Offset] = 0x55; + base[Offset+1] = 0xaa; + base[Offset+0x100] = 0x55; + base[Offset+0x101] = 0xaa; + + OUTREG(MGAREG_CRTC_INDEX, 0); + usleep(8); + + TestMemoryLocA = base[Offset]; + TestMemoryLocB = base[Offset+1]; + TestMemoryLoc0 = base[0]; + TestMemoryLoc1 = base[1]; + + base[Offset] = FirstMemoryVal1; + base[Offset+1] = FirstMemoryVal2; + base[Offset+0x100] = SecondMemoryVal1; + base[Offset+0x101] = SecondMemoryVal2; + + TestA = ((TestMemoryLocB << 8) + TestMemoryLocA); + TestB = ((TestMemoryLoc1 << 8) + TestMemoryLoc0); + if ((TestA != 0xAA55) || (TestB)) { + break; + } + } + + base[0] = MemoryAt0; + base[1] = MemoryAt1; + + SizeFound = (Offset / 1024) - 64; + } else { + /* write, read and compare method + split into two loops to make it more reliable on RS/6k -ReneR */ + for(i = ProbeSize; i > 2048; i -= 2048) { + base[(i * 1024) - 1] = 0xAA; + } + OUTREG8(MGAREG_CRTC_INDEX, 0); /* flush the cache */ + usleep(4); /* twart write combination */ + for(i = ProbeSize; i > 2048; i -= 2048) { + if(base[(i * 1024) - 1] == 0xAA) { + SizeFound = i; + break; + } + } + } + + /* restore CRTCEXT3 state */ + OUTREG8(MGAREG_CRTCEXT_INDEX, 3); + OUTREG8(MGAREG_CRTCEXT_DATA, tmp); + + MGAUnmapMem(pScrn); + } + return SizeFound; +} + +static xf86MonPtr +MGAdoDDC(ScrnInfoPtr pScrn) +{ + vgaHWPtr hwp; + MGAPtr pMga; + xf86MonPtr MonInfo = NULL; + + hwp = VGAHWPTR(pScrn); + pMga = MGAPTR(pScrn); + + /* Load DDC if we have the code to use it */ + /* This gives us DDC1 */ + if (pMga->ddc1Read || pMga->i2cInit) { + if (xf86LoadSubModule(pScrn, "ddc")) { + xf86LoaderReqSymLists(ddcSymbols, NULL); + } else { + /* ddc module not found, we can do without it */ + pMga->ddc1Read = NULL; + pMga->DDC_Bus1 = NULL; + pMga->DDC_Bus2 = NULL; + return NULL; + } + } else + return NULL; + +#if MGAuseI2C + /* - DDC can use I2C bus */ + /* Load I2C if we have the code to use it */ + if (pMga->i2cInit) { + if ( xf86LoadSubModule(pScrn, "i2c") ) { + xf86LoaderReqSymLists(i2cSymbols,NULL); + } else { + /* i2c module not found, we can do without it */ + pMga->i2cInit = NULL; + pMga->DDC_Bus1 = NULL; + pMga->DDC_Bus2 = NULL; + } + } +#endif /* MGAuseI2C */ + + /* Map the MGA memory and MMIO areas */ + if (!MGAMapMem(pScrn)) + return NULL; + + /* Initialise the MMIO vgahw functions */ + vgaHWSetMmioFuncs(hwp, pMga->IOBase, PORT_OFFSET); + vgaHWGetIOBase(hwp); + + /* Map the VGA memory when the primary video */ + if (pMga->Primary) { + hwp->MapSize = 0x10000; + if (!vgaHWMapMem(pScrn)) + return NULL; + } else { + /* XXX Need to write an MGA mode ddc1SetSpeed */ + if (pMga->DDC1SetSpeed == vgaHWddc1SetSpeedWeak()) { + pMga->DDC1SetSpeed = NULL; + xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 2, + "DDC1 disabled - chip not in VGA mode\n"); + } + } + + /* Save the current state */ + MGASave(pScrn); + + /* It is now safe to talk to the card */ + +#if MGAuseI2C + /* Initialize I2C buses - used by DDC if available */ + if (pMga->i2cInit) { + pMga->i2cInit(pScrn); + } + + /* DDC for second head... */ + if (pMga->SecondCrtc && pMga->DDC_Bus2) { + MonInfo = xf86DoEDID_DDC2(pScrn->scrnIndex,pMga->DDC_Bus2); + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "I2C Monitor info: %p\n", + (void *)MonInfo); + xf86PrintEDID(MonInfo); + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "end of I2C Monitor info\n"); + xf86SetDDCproperties(pScrn, MonInfo); + return MonInfo; + } + + else { + /* Its the first head... */ + if (pMga->DDC_Bus1) { + MonInfo = xf86DoEDID_DDC2(pScrn->scrnIndex,pMga->DDC_Bus1); + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "I2C Monitor info: %p\n", (void *) MonInfo); + xf86PrintEDID(MonInfo); + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "end of I2C Monitor info\n"); + } + if (!MonInfo) +#endif /* MGAuseI2C */ + /* Read and output monitor info using DDC1 */ + if (pMga->ddc1Read && pMga->DDC1SetSpeed) { + MonInfo = xf86DoEDID_DDC1(pScrn->scrnIndex, + pMga->DDC1SetSpeed, + pMga->ddc1Read ) ; + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "DDC Monitor info: %p\n", (void *) MonInfo); + xf86PrintEDID( MonInfo ); + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "end of DDC Monitor info\n"); + } + if (!MonInfo){ + vbeInfoPtr pVbe; + if (xf86LoadSubModule(pScrn, "vbe")) { + pVbe = VBEInit(NULL,pMga->pEnt->index); + MonInfo = vbeDoEDID(pVbe, NULL); + vbeFree(pVbe); + + if (MonInfo){ + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VBE DDC Monitor info: %p\n", (void *) MonInfo); + xf86PrintEDID( MonInfo ); + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "end of VBE DDC Monitor info\n\n"); + } + } + } +#if MGAuseI2C + } +#endif + /* Restore previous state and unmap MGA memory and MMIO areas */ + MGARestore(pScrn); + MGAUnmapMem(pScrn); + /* Unmap vga memory if we mapped it */ + if (xf86IsPrimaryPci(pMga->PciInfo) && !pMga->FBDev) { + vgaHWUnmapMem(pScrn); + } + + xf86SetDDCproperties(pScrn, MonInfo); + + return MonInfo; +} + +#ifdef DISABLE_VGA_IO +static void +VgaIOSave(int i, void *arg) +{ + MgaSavePtr sMga = arg; + PCITAG tag = pciTag(sMga->pvp->bus,sMga->pvp->device,sMga->pvp->func); + +#ifdef DEBUG + ErrorF("mga: VgaIOSave: %d:%d:%d\n", sMga->pvp->bus, sMga->pvp->device, + sMga->pvp->func); +#endif + sMga->enable = (pciReadLong(tag, PCI_OPTION_REG) & 0x100) != 0; +} + +static void +VgaIORestore(int i, void *arg) +{ + MgaSavePtr sMga = arg; + PCITAG tag = pciTag(sMga->pvp->bus,sMga->pvp->device,sMga->pvp->func); + +#ifdef DEBUG + ErrorF("mga: VgaIORestore: %d:%d:%d\n", sMga->pvp->bus, sMga->pvp->device, + sMga->pvp->func); +#endif + pciSetBitsLong(tag, PCI_OPTION_REG, 0x100, sMga->enable ? 0x100 : 0x000); +} + +static void +VgaIODisable(void *arg) +{ + MGAPtr pMga = arg; + +#ifdef DEBUG + ErrorF("mga: VgaIODisable: %d:%d:%d, %s, xf86ResAccessEnter is %s\n", + pMga->PciInfo->bus, pMga->PciInfo->device, pMga->PciInfo->func, + pMga->Primary ? "primary" : "secondary", + BOOLTOSTRING(xf86ResAccessEnter)); +#endif + /* Turn off the vgaioen bit. */ + pciSetBitsLong(pMga->PciTag, PCI_OPTION_REG, 0x100, 0x000); +} + +static void +VgaIOEnable(void *arg) +{ + MGAPtr pMga = arg; + +#ifdef DEBUG + ErrorF("mga: VgaIOEnable: %d:%d:%d, %s, xf86ResAccessEnter is %s\n", + pMga->PciInfo->bus, pMga->PciInfo->device, pMga->PciInfo->func, + pMga->Primary ? "primary" : "secondary", + BOOLTOSTRING(xf86ResAccessEnter)); +#endif + /* Turn on the vgaioen bit. */ + if (pMga->Primary) + pciSetBitsLong(pMga->PciTag, PCI_OPTION_REG, 0x100, 0x100); +} +#endif /* DISABLE_VGA_IO */ + +void +MGAProbeDDC(ScrnInfoPtr pScrn, int index) +{ + vbeInfoPtr pVbe; + if (xf86LoadSubModule(pScrn, "vbe")) { + pVbe = VBEInit(NULL,index); + ConfiguredMonitor = vbeDoEDID(pVbe, NULL); + vbeFree(pVbe); + } +} + +Bool +MGAMavenRead(ScrnInfoPtr pScrn, I2CByte reg, I2CByte *val) +{ + MGAPtr pMga = MGAPTR(pScrn); + + if (!pMga->Maven) return FALSE; + + /* FIXME: Using private interfaces for the moment until a more + * flexible xf86I2CWriteRead() variant shows up for us + * + * MAVEN does _not_ like a start bit in the middle of its transaction + * MAVEN does _not_ like ACK at the end of the transaction + */ + + if (!pMga->Maven_Bus->I2CStart(pMga->Maven_Bus, pMga->Maven->ByteTimeout)) return FALSE; + if (!pMga->Maven_Bus->I2CPutByte(pMga->Maven, MAVEN_READ)) return FALSE; + if (!pMga->Maven_Bus->I2CPutByte(pMga->Maven, reg)) return FALSE; + pMga->Maven_Bus->I2CStop(pMga->Maven); + if (!pMga->Maven_Bus->I2CGetByte(pMga->Maven, val, 0)) return FALSE; + pMga->Maven_Bus->I2CStop(pMga->Maven); + + return TRUE; +} + +/* Mandatory */ +static Bool +MGAPreInit(ScrnInfoPtr pScrn, int flags) +{ + MGAPtr pMga; + MessageType from; + int i; + double real; + int bytesPerPixel; + ClockRangePtr clockRanges; + const char *s; + int flags24; + MGAEntPtr pMgaEnt = NULL; + Bool Default; +#ifdef USEMGAHAL + ULONG status; + CARD8 MiscCtlReg; +#endif + + /* + * Note: This function is only called once at server startup, and + * not at the start of each server generation. This means that + * only things that are persistent across server generations can + * be initialised here. xf86Screens[] is (pScrn is a pointer to one + * of these). Privates allocated using xf86AllocateScrnInfoPrivateIndex() + * are too, and should be used for data that must persist across + * server generations. + * + * Per-generation data should be allocated with + * AllocateScreenPrivateIndex() from the ScreenInit() function. + */ + + /* Check the number of entities, and fail if it isn't one. */ + if (pScrn->numEntities != 1) + return FALSE; + + /* Allocate the MGARec driverPrivate */ + if (!MGAGetRec(pScrn)) { + return FALSE; + } + + pMga = MGAPTR(pScrn); + /* Set here until dri is enabled */ +#ifdef XF86DRI + pMga->haveQuiescense = 1; +#endif + /* Get the entity, and make sure it is PCI. */ + pMga->pEnt = xf86GetEntityInfo(pScrn->entityList[0]); + if (pMga->pEnt->location.type != BUS_PCI) + return FALSE; + + /* Allocate an entity private if necessary */ + if (xf86IsEntityShared(pScrn->entityList[0])) { + pMgaEnt = xf86GetEntityPrivate(pScrn->entityList[0], + MGAEntityIndex)->ptr; + pMga->entityPrivate = pMgaEnt; + } + + /* Set pMga->device to the relevant Device section */ + pMga->device = xf86GetDevFromEntity(pScrn->entityList[0], + pScrn->entityInstanceList[0]); + + if (flags & PROBE_DETECT) { + MGAProbeDDC(pScrn, pMga->pEnt->index); + return TRUE; + } + + /* The vgahw module should be loaded here when needed */ + if (!xf86LoadSubModule(pScrn, "vgahw")) + return FALSE; + + xf86LoaderReqSymLists(vgahwSymbols, NULL); + + /* + * Allocate a vgaHWRec + */ + if (!vgaHWGetHWRec(pScrn)) + return FALSE; + + /* Find the PCI info for this screen */ + pMga->PciInfo = xf86GetPciInfoForEntity(pMga->pEnt->index); + pMga->PciTag = pciTag(pMga->PciInfo->bus, pMga->PciInfo->device, + pMga->PciInfo->func); + + pMga->Primary = xf86IsPrimaryPci(pMga->PciInfo); + +#ifndef DISABLE_VGA_IO + xf86SetOperatingState(resVgaIo, pMga->pEnt->index, ResUnusedOpr); + xf86SetOperatingState(resVgaMem, pMga->pEnt->index, ResDisableOpr); +#else + /* + * Set our own access functions, which control the vgaioen bit. + */ + pMga->Access.AccessDisable = VgaIODisable; + pMga->Access.AccessEnable = VgaIOEnable; + pMga->Access.arg = pMga; + xf86SetAccessFuncs(pMga->pEnt, &pMga->Access, &pMga->Access); +#endif + + /* Set pScrn->monitor */ + pScrn->monitor = pScrn->confScreen->monitor; + + /* + * Set the Chipset and ChipRev, allowing config file entries to + * override. + */ + if (pMga->device->chipset && *pMga->device->chipset) { + pScrn->chipset = pMga->device->chipset; + pMga->Chipset = xf86StringToToken(MGAChipsets, pScrn->chipset); + from = X_CONFIG; + } else if (pMga->device->chipID >= 0) { + pMga->Chipset = pMga->device->chipID; + pScrn->chipset = (char *)xf86TokenToString(MGAChipsets, pMga->Chipset); + from = X_CONFIG; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipID override: 0x%04X\n", + pMga->Chipset); + } else { + from = X_PROBED; + pMga->Chipset = pMga->PciInfo->chipType; + pScrn->chipset = (char *)xf86TokenToString(MGAChipsets, pMga->Chipset); + } + if (pMga->device->chipRev >= 0) { + pMga->ChipRev = pMga->device->chipRev; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipRev override: %d\n", + pMga->ChipRev); + } else { + pMga->ChipRev = pMga->PciInfo->chipRev; + } + + /* + * This shouldn't happen because such problems should be caught in + * MGAProbe(), but check it just in case. + */ + if (pScrn->chipset == NULL) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "ChipID 0x%04X is not recognised\n", pMga->Chipset); + return FALSE; + } + if (pMga->Chipset < 0) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Chipset \"%s\" is not recognised\n", pScrn->chipset); + return FALSE; + } + + xf86DrvMsg(pScrn->scrnIndex, from, "Chipset: \"%s\"", pScrn->chipset); + if (pMga->Chipset == PCI_CHIP_MGAG400) { + if (pMga->ChipRev >= 0x80) + xf86ErrorF(" (G450)\n"); + else + xf86ErrorF(" (G400)\n"); + } else { + xf86ErrorF("\n"); + } + + pMga->is_Gx50 = ((pMga->Chipset == PCI_CHIP_MGAG400) && (pMga->ChipRev >= 0x80)) + || (pMga->Chipset == PCI_CHIP_MGAG550); + pMga->is_G200SE = (pMga->Chipset == PCI_CHIP_MGAG200_SE_A_PCI) + || (pMga->Chipset == PCI_CHIP_MGAG200_SE_B_PCI); + pMga->is_HAL_chipset = ((pMga->Chipset == PCI_CHIP_MGAG200_PCI) || + (pMga->Chipset == PCI_CHIP_MGAG200) || + (pMga->Chipset == PCI_CHIP_MGAG200_SE_A_PCI) || + (pMga->Chipset == PCI_CHIP_MGAG200_SE_B_PCI) || + (pMga->Chipset == PCI_CHIP_MGAG400) || + (pMga->Chipset == PCI_CHIP_MGAG550)); + +#ifdef USEMGAHAL + if (HAL_CHIPSETS) { + Bool loadHal = TRUE; + + from = X_DEFAULT; + if (xf86FindOption(pMga->device->options, "NoHal")) { + loadHal = !xf86SetBoolOption(pMga->device->options, + "NoHal", !loadHal); + from = X_CONFIG; + } else if (xf86FindOption(pMga->device->options, "Hal")) { + loadHal = xf86SetBoolOption(pMga->device->options, + "Hal", loadHal); + from = X_CONFIG; + } + if (loadHal && xf86LoadSubModule(pScrn, "mga_hal")) { + xf86LoaderReqSymLists(halSymbols, NULL); + xf86DrvMsg(pScrn->scrnIndex, from,"Matrox HAL module used\n"); + pMga->HALLoaded = TRUE; + } else { + xf86DrvMsg(pScrn->scrnIndex, from, "Matrox HAL module not loaded " + "- using builtin mode setup instead\n"); + pMga->HALLoaded = FALSE; + } + } +#endif + + pMga->DualHeadEnabled = FALSE; + if (xf86IsEntityShared(pScrn->entityList[0])) {/* dual-head mode requested*/ + if ( +#ifdef USEMGAHAL + pMga->HALLoaded || +#endif + !MGA_DH_NEEDS_HAL(pMga)) { + pMga->DualHeadEnabled = TRUE; + } else if (xf86IsPrimInitDone(pScrn->entityList[0])) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "This card requires the \"mga_hal\" module for dual-head operation\n" + "\tIt can be found at the Matrox web site <http://www.matrox.com>\n"); + } + } + + /* + * In case of DualHead, we need to determine if we are the 'master' head + * or the 'slave' head. In order to do that, at the end of the first + * initialisation, PrimInit is set as DONE to the shared entity. So that + * the second initialisation knows that something has been done before it. + * This always assume that the first device initialised is the master + * head, and the second the slave. + * + */ + if (xf86IsEntityShared(pScrn->entityList[0])) { /* dual-head mode */ + if (!xf86IsPrimInitDone(pScrn->entityList[0])) { /* Is it the first initialisation? */ + /* First CRTC */ + pMga->SecondCrtc = FALSE; + pMga->HWCursor = TRUE; + pMgaEnt->pScrn_1 = pScrn; + } else if (pMga->DualHeadEnabled) { + /* Second CRTC */ + pMga->SecondCrtc = TRUE; + pMga->HWCursor = FALSE; + pMgaEnt->pScrn_2 = pScrn; + pScrn->AdjustFrame = MGAAdjustFrameCrtc2; + /* + * Fail initialization of second head if we are in MergeFB mode, + * since we do it ourselfs. + */ + if(pMgaEnt->pScrn_1 && MGAPTR(pMgaEnt->pScrn_1)->MergedFB) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Primary head in Merged framebuffer mode. \n" + "Don't let Xfree try to manage the second head.\n" + "Remove the second screen in the \"ServerLayout\"\n" + "Section of the config file."); + return FALSE; + } + } else { + return FALSE; + } + } + + if (pMga->DualHeadEnabled) { +#ifdef XF86DRI + pMga->GetQuiescence = MGAGetQuiescenceShared; +#endif + } else { /* single-head mode */ + pMga->SecondCrtc = FALSE; + pMga->HWCursor = TRUE; +#ifdef XF86DRI + pMga->GetQuiescence = MGAGetQuiescence; +#endif + } + + + + /* + * The first thing we should figure out is the depth, bpp, etc. + * Our default depth is 8, so pass it to the helper function. + * We support both 24bpp and 32bpp layouts, so indicate that. + */ + + /* Prefer 24bpp fb unless the Overlay option is set, or DRI is + * supported. + */ + flags24 = Support24bppFb | Support32bppFb | SupportConvert32to24; + s = xf86TokenToOptName(MGAOptions, OPTION_OVERLAY); +#ifndef XF86DRI + if (!(xf86FindOption(pScrn->confScreen->options, s) || + xf86FindOption(pMga->device->options, s))) { + flags24 |= PreferConvert32to24; + } +#endif + + if (pMga->SecondCrtc) + flags24 = Support32bppFb; + + if (!xf86SetDepthBpp(pScrn, 0, 0, 0, flags24)) { + return FALSE; + } else { + /* Check that the returned depth is one we support */ + switch (pScrn->depth) { + case 8: + case 15: + case 16: + case 24: + /* OK */ + break; + default: + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Given depth (%d) is not supported by this driver\n", + pScrn->depth); + return FALSE; + } + } + xf86PrintDepthBpp(pScrn); + + /* + * This must happen after pScrn->display has been set because + * xf86SetWeight references it. + */ + if (pScrn->depth > 8) { + /* The defaults are OK for us */ + rgb zeros = {0, 0, 0}; + + if (!xf86SetWeight(pScrn, zeros, zeros)) { + return FALSE; + } else { + /* XXX check that weight returned is supported */ + ; + } + } + + bytesPerPixel = pScrn->bitsPerPixel / 8; + + /* We use a programmable clock */ + pScrn->progClock = TRUE; + + /* Collect all of the relevant option flags (fill in pScrn->options) */ + xf86CollectOptions(pScrn, NULL); + + /* Process the options */ + if (!(pMga->Options = xalloc(sizeof(MGAOptions)))) + return FALSE; + memcpy(pMga->Options, MGAOptions, sizeof(MGAOptions)); + xf86ProcessOptions(pScrn->scrnIndex, pScrn->options, pMga->Options); + + +#if !defined(__powerpc__) + pMga->softbooted = FALSE; + if (pMga->Chipset >= PCI_CHIP_MGAG400 + && !pMga->Primary + && !pMga->SecondCrtc) + Default = TRUE; + else + Default = FALSE; + if (xf86ReturnOptValBool(pMga->Options, OPTION_INT10, Default) && + xf86LoadSubModule(pScrn, "int10")) { + xf86Int10InfoPtr pInt; + + xf86LoaderReqSymLists(int10Symbols, NULL); + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Initializing int10\n"); + pInt = xf86InitInt10(pMga->pEnt->index); + if (pInt) pMga->softbooted = TRUE; + xf86FreeInt10(pInt); + } +#endif + + /* Set the bits per RGB for 8bpp mode */ + if (pScrn->depth == 8) + pScrn->rgbBits = 8; + +#ifdef XF86DRI + from = X_DEFAULT; + pMga->agpMode = MGA_DEFAULT_AGP_MODE; + + if (xf86GetOptValInteger(pMga->Options, + OPTION_AGP_MODE, &(pMga->agpMode))) { + if (pMga->agpMode < 1) { + pMga->agpMode = 1; + } + if (pMga->agpMode > MGA_MAX_AGP_MODE) { + pMga->agpMode = MGA_MAX_AGP_MODE; + } + from = X_CONFIG; + } + if (xf86GetOptValInteger(pMga->Options, + OPTION_AGP_SIZE, &(pMga->agpSize))) { + /* check later */ + xf86DrvMsg(pScrn->scrnIndex, from, "Using %d MB of AGP memory\n", + pMga->agpSize); + } + + xf86DrvMsg(pScrn->scrnIndex, from, "Using AGP %dx mode\n", + pMga->agpMode); + + if (xf86ReturnOptValBool(pMga->Options, OPTION_OLDDMA, FALSE)) { + pMga->useOldDmaInit = TRUE; + } + + if (xf86ReturnOptValBool(pMga->Options, OPTION_PCIDMA, FALSE)) { + pMga->forcePciDma = TRUE; + } +#endif + + from = X_DEFAULT; + + /* + * The preferred method is to use the "hw cursor" option as a tri-state + * option, with the default set above. + */ + if (xf86GetOptValBool(pMga->Options, OPTION_HW_CURSOR, &pMga->HWCursor)) { + from = X_CONFIG; + } + + /* For compatibility, accept this too (as an override) */ + if (xf86ReturnOptValBool(pMga->Options, OPTION_NOACCEL, FALSE)) { + pMga->NoAccel = TRUE; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Acceleration disabled\n"); + } else { + int from = X_DEFAULT; +#ifdef USE_EXA + char *s = xf86GetOptValString(pMga->Options, OPTION_ACCELMETHOD); +#endif + pMga->NoAccel = FALSE; + pMga->Exa = FALSE; +#ifdef USE_EXA + if (!xf86NameCmp(s, "EXA")) { + pMga->Exa = TRUE; + from = X_CONFIG; + } +#endif + xf86DrvMsg(pScrn->scrnIndex, from, "Using %s acceleration\n", + pMga->Exa ? "EXA" : "XAA"); + } + if (xf86ReturnOptValBool(pMga->Options, OPTION_PCI_RETRY, FALSE)) { + pMga->UsePCIRetry = TRUE; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "PCI retry enabled\n"); + } + if (xf86ReturnOptValBool(pMga->Options, OPTION_SYNC_ON_GREEN, FALSE)) { + pMga->SyncOnGreen = TRUE; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Sync-on-Green enabled\n"); + } + if (xf86ReturnOptValBool(pMga->Options, OPTION_SHOWCACHE, FALSE)) { + pMga->ShowCache = TRUE; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ShowCache enabled\n"); + } + if (xf86ReturnOptValBool(pMga->Options, OPTION_MGA_SDRAM, FALSE)) { + pMga->HasSDRAM = TRUE; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Has SDRAM\n"); + } + if (xf86GetOptValFreq(pMga->Options, OPTION_SET_MCLK, OPTUNITS_MHZ, &real)) { + pMga->MemClk = (int)(real * 1000.0); + } + if ((s = xf86GetOptValString(pMga->Options, OPTION_OVERLAY))) { + if (!*s || !xf86NameCmp(s, "8,24") || !xf86NameCmp(s, "24,8")) { + if(pScrn->bitsPerPixel == 32 && pMga->SecondCrtc == FALSE) { + pMga->Overlay8Plus24 = TRUE; + if(!xf86GetOptValInteger( + pMga->Options, OPTION_COLOR_KEY,&(pMga->colorKey))) + pMga->colorKey = TRANSPARENCY_KEY; + pScrn->colorKey = pMga->colorKey; + pScrn->overlayFlags = OVERLAY_8_32_PLANAR; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "PseudoColor overlay enabled\n"); + } else { + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Option \"Overlay\" is only supported in 32 bits per pixel on" + "the first CRTC\n"); + } + } else { + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "\"%s\" is not a valid value for Option \"Overlay\"\n", s); + } + } + + if(xf86GetOptValInteger(pMga->Options, OPTION_VIDEO_KEY, &(pMga->videoKey))) { + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "video key set to 0x%x\n", + pMga->videoKey); + } else { + pMga->videoKey = (1 << pScrn->offset.red) | + (1 << pScrn->offset.green) | + (((pScrn->mask.blue >> pScrn->offset.blue) - 1) << pScrn->offset.blue); + } + if (xf86ReturnOptValBool(pMga->Options, OPTION_SHADOW_FB, FALSE)) { + pMga->ShadowFB = TRUE; + pMga->NoAccel = TRUE; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Using \"Shadow Framebuffer\" - acceleration disabled\n"); + } + if (xf86ReturnOptValBool(pMga->Options, OPTION_FBDEV, FALSE)) { + pMga->FBDev = TRUE; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Using framebuffer device\n"); + } + if (xf86ReturnOptValBool(pMga->Options, OPTION_OVERCLOCK_MEM, FALSE)) { + pMga->OverclockMem = TRUE; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Overclocking memory\n"); + } + if (xf86ReturnOptValBool(pMga->Options, OPTION_TEXTURED_VIDEO, FALSE)) { + pMga->TexturedVideo = TRUE; + } + if (xf86ReturnOptValBool(pMga->Options, OPTION_MERGEDFB, FALSE)) { + if(!MGAISGx50(pMga)) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "\"Merged Framebuffer\" mode only supported on G450 and G550 boards.\n"); + } else { +#ifdef USEMGAHAL + if(pMga->HALLoaded) + { + pMga->MergedFB = TRUE; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Using \"Merged Framebuffer\" mode.\n"); + /* + * a few options that won't work well together + */ + if(pMga->HWCursor) /*Should we give the choice? */ + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + " -- Hardware Cursor disabled.\n"); + pMga->HWCursor = FALSE; + if(pMga->ShadowFB) + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + " -- Shadow Framebuffer disabled.\n"); + pMga->ShadowFB = FALSE; + if(pMga->FBDev) + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + " -- Framebuffer device disabled.\n"); + pMga->FBDev = FALSE; + } /* MGA_HAL */ + else +#endif + { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "HALLib not loaded! NOT using \"Merged Framebuffer\" mode.\n"); + } /* MGA_NOT_HAL */ + } /* ISMGAGx50() */ + } + if (pMga->FBDev) { + /* check for linux framebuffer device */ + if (!xf86LoadSubModule(pScrn, "fbdevhw")) + return FALSE; + xf86LoaderReqSymLists(fbdevHWSymbols, NULL); + if (!fbdevHWInit(pScrn, pMga->PciInfo, NULL)) + return FALSE; + pScrn->SwitchMode = fbdevHWSwitchModeWeak(); + pScrn->AdjustFrame = fbdevHWAdjustFrameWeak(); + pScrn->EnterVT = MGAEnterVTFBDev; + pScrn->LeaveVT = fbdevHWLeaveVTWeak(); + pScrn->ValidMode = fbdevHWValidModeWeak(); + } + pMga->Rotate = 0; + if ((s = xf86GetOptValString(pMga->Options, OPTION_ROTATE))) { + if(!pMga->MergedFB) { + if(!xf86NameCmp(s, "CW")) { + pMga->ShadowFB = TRUE; + pMga->NoAccel = TRUE; + pMga->HWCursor = FALSE; + pMga->Rotate = 1; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Rotating screen clockwise - acceleration disabled\n"); + } else + if(!xf86NameCmp(s, "CCW")) { + pMga->ShadowFB = TRUE; + pMga->NoAccel = TRUE; + pMga->HWCursor = FALSE; + pMga->Rotate = -1; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Rotating screen counter clockwise - acceleration disabled\n"); + } else { + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "\"%s\" is not a valid value for Option \"Rotate\"\n", s); + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "Valid options are \"CW\" or \"CCW\"\n"); + } + } else { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + " -- Rotation disabled.\n"); + } + } + + switch (pMga->Chipset) { + case PCI_CHIP_MGA2064: + case PCI_CHIP_MGA2164: + case PCI_CHIP_MGA2164_AGP: + MGA2064SetupFuncs(pScrn); + break; + case PCI_CHIP_MGA1064: + case PCI_CHIP_MGAG100: + case PCI_CHIP_MGAG100_PCI: + case PCI_CHIP_MGAG200: + case PCI_CHIP_MGAG200_PCI: + case PCI_CHIP_MGAG200_SE_A_PCI: + case PCI_CHIP_MGAG200_SE_B_PCI: + case PCI_CHIP_MGAG400: + case PCI_CHIP_MGAG550: + MGAGSetupFuncs(pScrn); + break; + } + + /* ajv changes to reflect actual values. see sdk pp 3-2. */ + /* these masks just get rid of the crap in the lower bits */ + + /* + * For the 2064 and older rev 1064, base0 is the MMIO and base0 is + * the framebuffer is base1. Let the config file override these. + */ + if (pMga->device->MemBase != 0) { + /* Require that the config file value matches one of the PCI values. */ + if (!xf86CheckPciMemBase(pMga->PciInfo, pMga->device->MemBase)) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "MemBase 0x%08lX doesn't match any PCI base register.\n", + pMga->device->MemBase); + MGAFreeRec(pScrn); + return FALSE; + } + pMga->FbAddress = pMga->device->MemBase; + from = X_CONFIG; + } else { + /* details: mgabase2 sdk pp 4-12 */ + int i = ((pMga->Chipset == PCI_CHIP_MGA1064 && pMga->ChipRev < 3) || + pMga->Chipset == PCI_CHIP_MGA2064) ? 1 : 0; + pMga->FbBaseReg = i; + if (pMga->PciInfo->memBase[i] != 0) { + pMga->FbAddress = pMga->PciInfo->memBase[i] & 0xff800000; + from = X_PROBED; + } else { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "No valid FB address in PCI config space\n"); + MGAFreeRec(pScrn); + return FALSE; + } + } + + xf86DrvMsg(pScrn->scrnIndex, from, "Linear framebuffer at 0x%lX\n", + (unsigned long)pMga->FbAddress); + +#if !defined(__powerpc__) + if (pMga->device->IOBase != 0) { + /* Require that the config file value matches one of the PCI values. */ + if (!xf86CheckPciMemBase(pMga->PciInfo, pMga->device->IOBase)) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "IOBase 0x%08lX doesn't match any PCI base register.\n", + pMga->device->IOBase); + MGAFreeRec(pScrn); + return FALSE; + } + pMga->IOAddress = pMga->device->IOBase; + from = X_CONFIG; + } else +#endif + { + /* details: mgabase1 sdk pp 4-11 */ + int i = ((pMga->Chipset == PCI_CHIP_MGA1064 && pMga->ChipRev < 3) || + pMga->Chipset == PCI_CHIP_MGA2064) ? 0 : 1; + if (pMga->PciInfo->memBase[i] != 0) { + pMga->IOAddress = pMga->PciInfo->memBase[i] & 0xffffc000; + from = X_PROBED; + } else { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "No valid MMIO address in PCI config space\n"); + MGAFreeRec(pScrn); + return FALSE; + } + } + xf86DrvMsg(pScrn->scrnIndex, from, "MMIO registers at 0x%lX\n", + (unsigned long)pMga->IOAddress); + + + pMga->ILOADAddress = 0; + if ( pMga->Chipset != PCI_CHIP_MGA2064 ) { + if (pMga->PciInfo->memBase[2] != 0) { + pMga->ILOADAddress = pMga->PciInfo->memBase[2] & 0xffffc000; + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, + "Pseudo-DMA transfer window at 0x%lX\n", + (unsigned long)pMga->ILOADAddress); + } + } + + + /* + * Find the BIOS base. Get it from the PCI config if possible. Otherwise + * use the VGA default. Allow the config file to override this. + */ + + pMga->BiosFrom = X_NONE; + if (pMga->device->BiosBase != 0) { + /* XXX This isn't used */ + pMga->BiosAddress = pMga->device->BiosBase; + pMga->BiosFrom = X_CONFIG; + } else { + /* details: rombase sdk pp 4-15 */ + if (pMga->PciInfo->biosBase != 0) { + pMga->BiosAddress = pMga->PciInfo->biosBase & 0xffff0000; + pMga->BiosFrom = X_PROBED; + } else if (pMga->Primary) { + pMga->BiosAddress = 0xc0000; + pMga->BiosFrom = X_DEFAULT; + } + } + if (pMga->BiosAddress) { + xf86DrvMsg(pScrn->scrnIndex, pMga->BiosFrom, "BIOS at 0x%lX\n", + (unsigned long)pMga->BiosAddress); + } + + if (xf86RegisterResources(pMga->pEnt->index, NULL, ResExclusive)) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "xf86RegisterResources() found resource conflicts\n"); + MGAFreeRec(pScrn); + return FALSE; + } + + /* + * Read the BIOS data struct + */ + +#if defined(__alpha__) + /* + * Some old Digital-OEMed Matrox Millennium I cards have a VGA + * disable switch. If the disable is on, we can't read the BIOS, + * and pMga->BiosAddress = 0x0. The disable switch is needed to + * allow multi-head operation with brain-dead console code... ;-} + */ + + if ((pMga->BiosAddress == 0) && !xf86IsPrimaryPci(pMga->PciInfo)) + xf86DrvMsg(pScrn->scrnIndex, pMga->BiosFrom, + "BIOS not found, skipping read\n"); + else +#endif + mga_read_and_process_bios( pScrn ); + + + /* Since the BIOS can swap DACs during the initialisation of G550, we need to + * store which DAC this instance of the driver is taking care of. This is done + * by checking a flag stored in the ROM by the BIOS at a fixed address. */ + + if (!pMga->SecondCrtc) + pMga->SecondOutput = FALSE; + else + pMga->SecondOutput = TRUE; + + if (pMga->Chipset == PCI_CHIP_MGAG550) { + if (!pMga->SecondCrtc) { + pMga->SecondOutput = (pMga->BiosOutputMode & 0x1) ? TRUE : FALSE; + } else { + pMga->SecondOutput = (pMga->BiosOutputMode & 0x1) ? FALSE : TRUE; + } + } + + + /* HW bpp matches reported bpp */ + pMga->HwBpp = pScrn->bitsPerPixel; + + /* + * Reset card if it isn't primary one + */ + if ( (!pMga->Primary && !pMga->FBDev) || xf86IsPc98() ) + MGASoftReset(pScrn); + + /* + * If the user has specified the amount of memory in the XF86Config + * file, we respect that setting. + */ + from = X_PROBED; + if (pMga->device->videoRam != 0) { + pScrn->videoRam = pMga->device->videoRam; + from = X_CONFIG; + } else if (pMga->FBDev) { + pScrn->videoRam = fbdevHWGetVidmem(pScrn)/1024; + } else { + pScrn->videoRam = MGACountRam(pScrn); + } + + if (pMga->DualHeadEnabled) { + /* This takes gives either half or 8 meg to the second head + * whichever is less. */ + if(pMga->SecondCrtc == FALSE) { + Bool UseHalf = FALSE; + int adjust; + + xf86GetOptValBool(pMga->Options, OPTION_CRTC2HALF, &UseHalf); + adjust = pScrn->videoRam / 2; + + if (UseHalf == TRUE || + xf86GetOptValInteger(pMga->Options, OPTION_CRTC2RAM, &adjust)) { + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Crtc2 will use %dK of VideoRam\n", + adjust); + } else { + adjust = min(adjust, 8192); + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, + "Crtc2 will use %dK of VideoRam\n", + adjust); + } + pMgaEnt->mastervideoRam = pScrn->videoRam - adjust; + pScrn->videoRam = pMgaEnt->mastervideoRam; + pMgaEnt->slavevideoRam = adjust; + pMgaEnt->masterFbAddress = pMga->FbAddress; + pMga->FbMapSize = + pMgaEnt->masterFbMapSize = pScrn->videoRam * 1024; + pMgaEnt->slaveFbAddress = pMga->FbAddress + + pMgaEnt->masterFbMapSize; + pMgaEnt->slaveFbMapSize = pMgaEnt->slavevideoRam * 1024; + pMga->realSrcOrg = pMga->SrcOrg = 0; + pMga->DstOrg = 0; + } else { + pMga->FbAddress = pMgaEnt->slaveFbAddress; + pMga->FbMapSize = pMgaEnt->slaveFbMapSize; + pScrn->videoRam = pMgaEnt->slavevideoRam; + pMga->DstOrg = pMga->realSrcOrg = + pMgaEnt->slaveFbAddress - pMgaEnt->masterFbAddress; + pMga->SrcOrg = 0; /* This is not stored in hw format!! */ + } + pMgaEnt->refCount++; + } else { + /* Normal Handling of video ram etc */ + pMga->FbMapSize = pScrn->videoRam * 1024; + switch(pMga->Chipset) { + case PCI_CHIP_MGAG550: + case PCI_CHIP_MGAG400: + case PCI_CHIP_MGAG200: + case PCI_CHIP_MGAG200_PCI: + case PCI_CHIP_MGAG200_SE_A_PCI: + case PCI_CHIP_MGAG200_SE_B_PCI: + pMga->SrcOrg = 0; + pMga->DstOrg = 0; + break; + default: + break; + } + } + xf86DrvMsg(pScrn->scrnIndex, from, "VideoRAM: %d kByte\n", + pScrn->videoRam); + + /* Set the bpp shift value */ + pMga->BppShifts[0] = 0; + pMga->BppShifts[1] = 1; + pMga->BppShifts[2] = 0; + pMga->BppShifts[3] = 2; + + /* + * fill MGAdac struct + * Warning: currently, it should be after RAM counting + */ + (*pMga->PreInit)(pScrn); + +#if !defined(__powerpc__) + + /* Read and print the Monitor DDC info */ + pScrn->monitor->DDC = MGAdoDDC(pScrn); +#endif /* !__powerpc__ */ + + /* + * If the driver can do gamma correction, it should call xf86SetGamma() + * here. + */ + + { + Gamma zeros = {0.0, 0.0, 0.0}; + + if (!xf86SetGamma(pScrn, zeros)) { + return FALSE; + } + } + + + /* XXX Set HW cursor use */ + + /* Set the min pixel clock */ + pMga->MinClock = 12000; /* XXX Guess, need to check this */ + xf86DrvMsg(pScrn->scrnIndex, X_DEFAULT, "Min pixel clock is %d MHz\n", + pMga->MinClock / 1000); + /* + * If the user has specified ramdac speed in the XF86Config + * file, we respect that setting. + */ + if (pMga->device->dacSpeeds[0]) { + int speed = 0; + + switch (pScrn->bitsPerPixel) { + case 8: + speed = pMga->device->dacSpeeds[DAC_BPP8]; + break; + case 16: + speed = pMga->device->dacSpeeds[DAC_BPP16]; + break; + case 24: + speed = pMga->device->dacSpeeds[DAC_BPP24]; + break; + case 32: + speed = pMga->device->dacSpeeds[DAC_BPP32]; + break; + } + if (speed == 0) + pMga->MaxClock = pMga->device->dacSpeeds[0]; + else + pMga->MaxClock = speed; + from = X_CONFIG; + } else { + pMga->MaxClock = pMga->Dac.maxPixelClock; + from = pMga->Dac.ClockFrom; + } + if(pMga->SecondCrtc == TRUE) { + /* Override on 2nd crtc */ + if ((pMga->ChipRev >= 0x80) || (pMga->Chipset == PCI_CHIP_MGAG550)) { + /* G450, G550 */ + pMga->MaxClock = 234000; + } else { + pMga->MaxClock = 135000; + } + } + xf86DrvMsg(pScrn->scrnIndex, from, "Max pixel clock is %d MHz\n", + pMga->MaxClock / 1000); + /* + * Setup the ClockRanges, which describe what clock ranges are available, + * and what sort of modes they can be used for. + */ + clockRanges = xnfcalloc(sizeof(ClockRange), 1); + clockRanges->next = NULL; + clockRanges->minClock = pMga->MinClock; + clockRanges->maxClock = pMga->MaxClock; + clockRanges->clockIndex = -1; /* programmable */ + clockRanges->interlaceAllowed = TRUE; + clockRanges->doubleScanAllowed = TRUE; +#ifdef USEMGAHAL + MGA_HAL(clockRanges->interlaceAllowed = FALSE); + MGA_HAL(clockRanges->doubleScanAllowed = FALSE); +#endif + if (pMga->SecondCrtc == TRUE) + clockRanges->interlaceAllowed = FALSE; + + clockRanges->ClockMulFactor = 1; + clockRanges->ClockDivFactor = 1; + + /* Only set MemClk if appropriate for the ramdac */ + if (pMga->Dac.SetMemClk) { + if (pMga->MemClk == 0) { + pMga->MemClk = pMga->Dac.MemoryClock; + from = pMga->Dac.MemClkFrom; + } else + from = X_CONFIG; + xf86DrvMsg(pScrn->scrnIndex, from, "MCLK used is %.1f MHz\n", + pMga->MemClk / 1000.0); + } + + /* + * xf86ValidateModes will check that the mode HTotal and VTotal values + * don't exceed the chipset's limit if pScrn->maxHValue and + * pScrn->maxVValue are set. Since our MGAValidMode() already takes + * care of this, we don't worry about setting them here. + */ + { + int Pitches1[] = + {640, 768, 800, 960, 1024, 1152, 1280, 1600, 1920, 2048, 0}; + int Pitches2[] = + {512, 640, 768, 800, 832, 960, 1024, 1152, 1280, 1600, 1664, + 1920, 2048, 0}; + int *linePitches = NULL; + int minPitch = 256; + int maxPitch = 2048; + + switch(pMga->Chipset) { + case PCI_CHIP_MGA2064: + if (!pMga->NoAccel) { + linePitches = xalloc(sizeof(Pitches1)); + memcpy(linePitches, Pitches1, sizeof(Pitches1)); + minPitch = maxPitch = 0; + } + break; + case PCI_CHIP_MGA2164: + case PCI_CHIP_MGA2164_AGP: + case PCI_CHIP_MGA1064: + if (!pMga->NoAccel) { + linePitches = xalloc(sizeof(Pitches2)); + memcpy(linePitches, Pitches2, sizeof(Pitches2)); + minPitch = maxPitch = 0; + } + break; + case PCI_CHIP_MGAG100: + case PCI_CHIP_MGAG100_PCI: + maxPitch = 2048; + break; + case PCI_CHIP_MGAG200: + case PCI_CHIP_MGAG200_PCI: + case PCI_CHIP_MGAG200_SE_A_PCI: + case PCI_CHIP_MGAG200_SE_B_PCI: + case PCI_CHIP_MGAG400: + case PCI_CHIP_MGAG550: + maxPitch = 4096; + break; + } + + i = xf86ValidateModes(pScrn, pScrn->monitor->Modes, + pScrn->display->modes, clockRanges, + linePitches, minPitch, maxPitch, + pMga->Roundings[(pScrn->bitsPerPixel >> 3) - 1] * + pScrn->bitsPerPixel, 128, 2048, + pScrn->display->virtualX, + pScrn->display->virtualY, + pMga->FbMapSize, + LOOKUP_BEST_REFRESH); + + if (linePitches) + xfree(linePitches); + } + + + if (i < 1 && pMga->FBDev) { + fbdevHWUseBuildinMode(pScrn); + pScrn->displayWidth = pScrn->virtualX; /* FIXME: might be wrong */ + i = 1; + } + if (i == -1) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Validate Modes Failed\n"); + MGAFreeRec(pScrn); + return FALSE; + } + + /* Prune the modes marked as invalid */ + xf86PruneDriverModes(pScrn); + + if (i == 0 || pScrn->modes == NULL) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No valid modes found\n"); + MGAFreeRec(pScrn); + return FALSE; + } +#ifdef USEMGAHAL + MGA_HAL( + + if(pMga->SecondCrtc == FALSE) { + + pMga->pBoard = xalloc(sizeof(CLIENTDATA) + MGAGetBOARDHANDLESize()); + pMga->pClientStruct = xalloc(sizeof(CLIENTDATA)); + pMga->pClientStruct->pMga = (MGAPtr) pMga; + + MGAMapMem(pScrn); + /* + * For some reason the MGAOPM_DMA_BLIT bit needs to be set + * on G200 before opening the HALlib. I don't know why. + * MATROX: hint, hint. + */ + /*if (pMga->Chipset == PCI_CHIP_MGAG200 || + pMga->Chipset == PCI_CHIP_MGAG200_PCI) */{ + CARD32 opmode; + opmode = INREG(MGAREG_OPMODE); + OUTREG(MGAREG_OPMODE, MGAOPM_DMA_BLIT | opmode); + } + /* wrapping OpenLibrary to fix broken registers. MATROX: hint, hint. */ + MiscCtlReg = inMGAdac(MGA1064_MISC_CTL); + MGAOpenLibrary(pMga->pBoard,pMga->pClientStruct,sizeof(CLIENTDATA)); + outMGAdac(MGA1064_MISC_CTL,MiscCtlReg); + MGAUnmapMem(pScrn); + pMga->pMgaHwInfo = xalloc(sizeof(MGAHWINFO)); + MGAGetHardwareInfo(pMga->pBoard,pMga->pMgaHwInfo); + + /* copy the board handles */ + if (pMga->DualHeadEnabled) { + pMgaEnt->pClientStruct = pMga->pClientStruct; + pMgaEnt->pBoard = pMga->pBoard; + pMgaEnt->pMgaHwInfo = pMga->pMgaHwInfo; + } + + } else { /* Second CRTC && entity is shared */ + pMga->pBoard = pMgaEnt->pBoard; + pMga->pClientStruct = pMgaEnt->pClientStruct; + pMga->pMgaHwInfo = pMgaEnt->pMgaHwInfo; + + } + + MGAFillModeInfoStruct(pScrn,NULL); + /* Fields usually handled by MGAFillModeInfoStruct, but are unavailable + * because no mode is given + */ + pMga->pMgaModeInfo->ulDispWidth = pScrn->virtualX; + pMga->pMgaModeInfo->ulDispHeight = pScrn->virtualY; + + + if (ISDIGITAL1(pMga)) + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "Digital screen detected on first head.\n"); + if (ISTV1(pMga)) + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "TV detected on first head.\n"); + if (ISDIGITAL2(pMga)) + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "Digital screen detected on second head.\n"); + if (ISTV2(pMga)) + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "TV detected on second head.\n"); + + + if((status = MGAValidateMode(pMga->pBoard,pMga->pMgaModeInfo)) != 0) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "MGAValidateMode from HALlib found the mode to be invalid.\n" + "\tError: 0x%lx\n", status); + return FALSE; + } + pScrn->displayWidth = pMga->pMgaModeInfo->ulFBPitch; + ); /* MGA_HAL */ +#endif + + if (pMga->HasSDRAM) { /* don't bother checking */ } + else if ((pMga->PciInfo->subsysCard == PCI_CARD_MILL_G200_SD) || + (pMga->PciInfo->subsysCard == PCI_CARD_MARV_G200_SD) || + (pMga->PciInfo->subsysCard == PCI_CARD_MYST_G200_SD) || + (pMga->PciInfo->subsysCard == PCI_CARD_PROD_G100_SD)) { + pMga->HasSDRAM = TRUE; + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Has SDRAM\n"); + } + /* + * Can we trust HALlib to set the memory configuration + * registers correctly? + */ + else if ((pMga->softbooted || pMga->Primary +#ifdef USEMGAHAL + /*|| pMga->HALLoaded*/ +#endif + ) && + (pMga->Chipset != PCI_CHIP_MGA2064) && + (pMga->Chipset != PCI_CHIP_MGA2164) && + (pMga->Chipset != PCI_CHIP_MGA2164_AGP)) { + CARD32 option_reg = pciReadLong(pMga->PciTag, PCI_OPTION_REG); + if(!(option_reg & (1 << 14))) { + pMga->HasSDRAM = TRUE; + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Has SDRAM\n"); + } + } + + /* + * Set the CRTC parameters for all of the modes based on the type + * of mode, and the chipset's interlace requirements. + * + * Calling this is required if the mode->Crtc* values are used by the + * driver and if the driver doesn't provide code to set them. They + * are not pre-initialised at all. + */ +#ifdef USEMGAHAL + MGA_HAL(xf86SetCrtcForModes(pScrn, 0)); +#endif + MGA_NOT_HAL(xf86SetCrtcForModes(pScrn, INTERLACE_HALVE_V)); + + /* Set the current mode to the first in the list */ + pScrn->currentMode = pScrn->modes; + + /* Print the list of modes being used */ + xf86PrintModes(pScrn); + + /* Set display resolution */ + xf86SetDpi(pScrn, 0, 0); + + /* + * Compute the byte offset into the linear frame buffer where the + * frame buffer data should actually begin. According to DDK misc.c + * line 1023, if more than 4MB is to be displayed, YDSTORG must be set + * appropriately to align memory bank switching, and this requires a + * corresponding offset on linear frame buffer access. + * This is only needed for WRAM. + */ + + pMga->YDstOrg = 0; + if (((pMga->Chipset == PCI_CHIP_MGA2064) || + (pMga->Chipset == PCI_CHIP_MGA2164) || + (pMga->Chipset == PCI_CHIP_MGA2164_AGP)) && + (pScrn->virtualX * pScrn->virtualY * bytesPerPixel > 4*1024*1024)) + { + int offset, offset_modulo, ydstorg_modulo; + + offset = (4*1024*1024) % (pScrn->displayWidth * bytesPerPixel); + offset_modulo = 4; + ydstorg_modulo = 64; + if (pScrn->bitsPerPixel == 24) + offset_modulo *= 3; + if (pMga->Interleave) + { + offset_modulo <<= 1; + ydstorg_modulo <<= 1; + } + pMga->YDstOrg = offset / bytesPerPixel; + + /* + * When this was unconditional, it caused a line of horizontal garbage + * at the middle right of the screen at the 4Meg boundary in 32bpp + * (and presumably any other modes that use more than 4M). But it's + * essential for 24bpp (it may not matter either way for 8bpp & 16bpp, + * I'm not sure; I didn't notice problems when I checked with and + * without.) + * DRM Doug Merritt 12/97, submitted to XFree86 6/98 (oops) + */ + if (bytesPerPixel < 4) { + while ((offset % offset_modulo) != 0 || + (pMga->YDstOrg % ydstorg_modulo) != 0) { + offset++; + pMga->YDstOrg = offset / bytesPerPixel; + } + } + } + + xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 2, "YDstOrg is set to %d\n", + pMga->YDstOrg); + if(pMga->DualHeadEnabled) { + if(pMga->SecondCrtc == FALSE) { + pMga->FbUsableSize = pMgaEnt->masterFbMapSize; + /* Allocate HW cursor buffer at the end of video ram */ + if( pMga->HWCursor && pMga->Dac.CursorOffscreenMemSize ) { + if( pScrn->virtualY * pScrn->displayWidth * + pScrn->bitsPerPixel / 8 <= + pMga->FbUsableSize - pMga->Dac.CursorOffscreenMemSize ) { + pMga->FbUsableSize -= pMga->Dac.CursorOffscreenMemSize; + pMga->FbCursorOffset = + pMgaEnt->masterFbMapSize - + pMga->Dac.CursorOffscreenMemSize; + } else { + pMga->HWCursor = FALSE; + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, + "Too little offscreen memory for HW cursor; " + "using SW cursor\n"); + } + } + } else { /* Second CRTC */ + pMga->FbUsableSize = pMgaEnt->slaveFbMapSize; + pMga->HWCursor = FALSE; + } + } else { + pMga->FbUsableSize = pMga->FbMapSize - pMga->YDstOrg * bytesPerPixel; + /* Allocate HW cursor buffer at the end of video ram */ + if( pMga->HWCursor && pMga->Dac.CursorOffscreenMemSize ) { + if( pScrn->virtualY * pScrn->displayWidth * + pScrn->bitsPerPixel / 8 <= + pMga->FbUsableSize - pMga->Dac.CursorOffscreenMemSize ) { + pMga->FbUsableSize -= pMga->Dac.CursorOffscreenMemSize; + pMga->FbCursorOffset = + pMga->FbMapSize - pMga->Dac.CursorOffscreenMemSize; + } else { + pMga->HWCursor = FALSE; + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, + "Too little offscreen memory for HW cursor; " + "using SW cursor\n"); + } + } + } + /* + * XXX This should be taken into account in some way in the mode valdation + * section. + */ + + + /* Load the required framebuffer */ + if (pMga->Overlay8Plus24) { + if (!xf86LoadSubModule(pScrn, "xf8_32bpp")) { + MGAFreeRec(pScrn); + return FALSE; + } + xf86LoaderReqSymLists(xf8_32bppSymbols, NULL); + } else { + if (!xf86LoadSubModule(pScrn, "fb")) { + MGAFreeRec(pScrn); + return FALSE; + } + xf86LoaderReqSymLists(fbSymbols, NULL); + } + + + /* Load XAA if needed */ + if (!pMga->NoAccel) { +#ifdef USE_EXA + if (pMga->Exa) { + if (!xf86LoadSubModule(pScrn, "exa")) { + MGAFreeRec(pScrn); + return FALSE; + } else xf86LoaderReqSymLists(exaSymbols, NULL); + } else { +#endif +#ifdef USE_XAA + if (!xf86LoadSubModule(pScrn, "xaa")) { + MGAFreeRec(pScrn); + return FALSE; + } else xf86LoaderReqSymLists(xaaSymbols, NULL); +#endif +#ifdef USE_EXA + } +#endif + } + + /* Load ramdac if needed */ + if (pMga->HWCursor) { + if (!xf86LoadSubModule(pScrn, "ramdac")) { + MGAFreeRec(pScrn); + return FALSE; + } + xf86LoaderReqSymLists(ramdacSymbols, NULL); + } + + /* Load shadowfb if needed */ + if (pMga->ShadowFB) { + if (!xf86LoadSubModule(pScrn, "shadowfb")) { + MGAFreeRec(pScrn); + return FALSE; + } + xf86LoaderReqSymLists(shadowSymbols, NULL); + } + +#ifdef XF86DRI + /* Load the dri module if requested. */ + if (xf86ReturnOptValBool(pMga->Options, OPTION_DRI, FALSE)) { + if (xf86LoadSubModule(pScrn, "dri")) { + xf86LoaderReqSymLists(driSymbols, drmSymbols, NULL); + } + } +#endif + pMga->CurrentLayout.bitsPerPixel = pScrn->bitsPerPixel; + pMga->CurrentLayout.depth = pScrn->depth; + pMga->CurrentLayout.displayWidth = pScrn->displayWidth; + pMga->CurrentLayout.weight.red = pScrn->weight.red; + pMga->CurrentLayout.weight.green = pScrn->weight.green; + pMga->CurrentLayout.weight.blue = pScrn->weight.blue; + pMga->CurrentLayout.Overlay8Plus24 = pMga->Overlay8Plus24; + pMga->CurrentLayout.mode = pScrn->currentMode; + + + + if(pMga->MergedFB) { + MGAPreInitMergedFB(pScrn,flags); + }; + + +#ifdef USEMGAHAL + MGA_HAL( + /* Close the library after preinit */ + /* This needs to only happen after this board has completed preinit + * both times + */ + + if(pMga->DualHeadEnabled) { + /* Entity is shared make sure refcount == 2 */ + /* If ref count is 2 then reset it to 0 */ + if(pMgaEnt->refCount == 2) { + /* Both boards have done there initialization */ + MGACloseLibrary(pMga->pBoard); + + if (pMga->pBoard) + xfree(pMga->pBoard); + if (pMga->pClientStruct) + xfree(pMga->pClientStruct); + if (pMga->pMgaModeInfo) + xfree(pMga->pMgaModeInfo); + if (pMga->pMgaHwInfo) + xfree(pMga->pMgaHwInfo); + pMgaEnt->refCount = 0; + } + } else { + MGACloseLibrary(pMga->pBoard); + + if (pMga->pBoard) + xfree(pMga->pBoard); + if (pMga->pClientStruct) + xfree(pMga->pClientStruct); + if (pMga->pMgaModeInfo) + xfree(pMga->pMgaModeInfo); + if (pMga->pMgaHwInfo) + xfree(pMga->pMgaHwInfo); + } + + ); /* MGA_HAL */ +#endif + + xf86SetPrimInitDone(pScrn->entityList[0]); + + return TRUE; +} + + +/* + * Map the framebuffer and MMIO memory. + */ + +static Bool +MGAMapMem(ScrnInfoPtr pScrn) +{ + MGAPtr pMga; + + pMga = MGAPTR(pScrn); + + /* + * Map IO registers to virtual address space + */ + /* + * For Alpha, we need to map SPARSE memory, since we need + * byte/short access. This is taken care of automatically by the + * os-support layer. + */ + pMga->IOBase = xf86MapPciMem(pScrn->scrnIndex, + VIDMEM_MMIO | VIDMEM_READSIDEEFFECT, + pMga->PciTag, pMga->IOAddress, 0x4000); + if (pMga->IOBase == NULL) + return FALSE; + + pMga->FbBase = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER, + pMga->PciTag, pMga->FbAddress, + pMga->FbMapSize); + if (pMga->FbBase == NULL) + return FALSE; + + pMga->FbStart = pMga->FbBase + pMga->YDstOrg * (pScrn->bitsPerPixel / 8); + + /* Map the ILOAD transfer window if there is one. We only make + DWORD access on DWORD boundaries to this window */ + if (pMga->ILOADAddress) { + pMga->ILOADBase = xf86MapPciMem(pScrn->scrnIndex, + VIDMEM_MMIO | VIDMEM_MMIO_32BIT | + VIDMEM_READSIDEEFFECT, + pMga->PciTag, pMga->ILOADAddress, 0x800000); + } else + pMga->ILOADBase = NULL; + + return TRUE; +} + +static Bool +MGAMapMemFBDev(ScrnInfoPtr pScrn) +{ + MGAPtr pMga; + + pMga = MGAPTR(pScrn); + + pMga->FbBase = fbdevHWMapVidmem(pScrn); + if (pMga->FbBase == NULL) + return FALSE; + + pMga->IOBase = fbdevHWMapMMIO(pScrn); + if (pMga->IOBase == NULL) + return FALSE; + + pMga->FbStart = pMga->FbBase + pMga->YDstOrg * (pScrn->bitsPerPixel / 8); + +#if 1 /* can't ask matroxfb for a mapping of the iload window */ + + /* Map the ILOAD transfer window if there is one. We only make + DWORD access on DWORD boundaries to this window */ + if(pMga->ILOADAddress) + pMga->ILOADBase = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_MMIO, + pMga->PciTag, pMga->ILOADAddress, 0x800000); + else pMga->ILOADBase = NULL; +#endif + return TRUE; +} + + + +/* + * Unmap the framebuffer and MMIO memory. + */ + +static Bool +MGAUnmapMem(ScrnInfoPtr pScrn) +{ + MGAPtr pMga; + + pMga = MGAPTR(pScrn); + + /* + * Unmap IO registers to virtual address space + */ + xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pMga->IOBase, 0x4000); + pMga->IOBase = NULL; + + xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pMga->FbBase, pMga->FbMapSize); + pMga->FbBase = NULL; + pMga->FbStart = NULL; + + if(pMga->ILOADBase) + xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pMga->ILOADBase, 0x800000); + pMga->ILOADBase = NULL; + return TRUE; +} + +static Bool +MGAUnmapMemFBDev(ScrnInfoPtr pScrn) +{ + MGAPtr pMga; + + pMga = MGAPTR(pScrn); + fbdevHWUnmapVidmem(pScrn); + pMga->FbBase = NULL; + pMga->FbStart = NULL; + fbdevHWUnmapMMIO(pScrn); + pMga->IOBase = NULL; + /* XXX ILOADBase */ + return TRUE; +} + + + + +/* + * This function saves the video state. + */ +static void +MGASave(ScrnInfoPtr pScrn) +{ + vgaHWPtr hwp = VGAHWPTR(pScrn); + vgaRegPtr vgaReg = &hwp->SavedReg; + MGAPtr pMga = MGAPTR(pScrn); + MGARegPtr mgaReg = &pMga->SavedReg; + + if(pMga->SecondCrtc == TRUE) return; +#ifdef USEMGAHAL + MGA_HAL(if (pMga->pBoard != NULL) MGASaveVgaState(pMga->pBoard)); +#endif + + /* I need to save the registers for the second head also */ + /* Save the register for 0x80 to 0xa0 */ + /* Could call it dac2Saved */ + + /* Only save text mode fonts/text for the primary card */ + (*pMga->Save)(pScrn, vgaReg, mgaReg, pMga->Primary); +} + +#ifdef USEMGAHAL +/* Convert DisplayModeRec parameters in MGAMODEINFO parameters. +* mode parameter optionnal. */ +void +MGAFillModeInfoStruct(ScrnInfoPtr pScrn, DisplayModePtr mode) +{ + const char *s; + MGAPtr pMga = MGAPTR(pScrn); + + Bool digital1 = FALSE; + Bool digital2 = FALSE; + Bool tv1 = FALSE; + Bool tv2 = FALSE; + Bool swap_head + = xf86ReturnOptValBool(pMga->Options, OPTION_SWAPPED_HEAD, FALSE); + + if(pMga->MergedFB && mode && mode->Private && (mode->PrivSize == 0)) { + mode = pMga->SecondCrtc ? + ((MergedDisplayModePtr)mode->Private)->Monitor2 + : ((MergedDisplayModePtr)mode->Private)->Monitor1; + } + + + if (pMga->pMgaHwInfo) + { + digital1 = ISDIGITAL1(pMga); + digital2 = ISDIGITAL2(pMga); + tv1 = ISTV1(pMga); + tv2 = ISTV2(pMga); + } + + /*FIXME: causes segfault elsewhere if not commented*/ + /*if(!pMga->pMgaModeInfo)*/ pMga->pMgaModeInfo = xalloc(sizeof(MGAMODEINFO)); + pMga->pMgaModeInfo->flOutput = 0; + pMga->pMgaModeInfo->ulDeskWidth = pScrn->virtualX; + pMga->pMgaModeInfo->ulDeskHeight = pScrn->virtualY; + pMga->pMgaModeInfo->ulFBPitch = 0; + pMga->pMgaModeInfo->ulBpp = pScrn->bitsPerPixel; + pMga->pMgaModeInfo->ulZoom = 1; + pMga->pMgaModeInfo->flSignalMode = 0x10; + + /* Set TV standard */ + if ((s = xf86GetOptValString(pMga->Options, OPTION_TVSTANDARD))) { + if (!xf86NameCmp(s, "PAL")) { + pMga->pMgaModeInfo->flSignalMode = 0x00; + pMga->pMgaModeInfo->ulRefreshRate = 50; + pMga->pMgaModeInfo->ulTVStandard = TV_PAL; + } else { + pMga->pMgaModeInfo->ulRefreshRate = 60; + pMga->pMgaModeInfo->ulTVStandard = TV_NTSC; + } + } else { + pMga->pMgaModeInfo->ulRefreshRate = 0; + pMga->pMgaModeInfo->ulTVStandard = TV_NTSC; + } + + /* Set Cable Type */ + if ((s = xf86GetOptValString(pMga->Options, OPTION_CABLETYPE))) { + if (!xf86NameCmp(s, "SCART_RGB")) { + pMga->pMgaModeInfo->ulCableType = TV_SCART_RGB; + } else if (!xf86NameCmp(s, "SCART_COMPOSITE")) { + pMga->pMgaModeInfo->ulCableType = TV_SCART_COMPOSITE; + } else if (!xf86NameCmp(s, "SCART_TYPE2")) { + pMga->pMgaModeInfo->ulCableType = TV_SCART_TYPE2; + } else { + pMga->pMgaModeInfo->ulCableType = TV_YC_COMPOSITE; + } + } else { + pMga->pMgaModeInfo->ulCableType = TV_YC_COMPOSITE; + } + + if(mode) { + pMga->pMgaModeInfo->ulHorizRate = 0; + pMga->pMgaModeInfo->ulDispWidth = mode->HDisplay; + pMga->pMgaModeInfo->ulDispHeight = mode->VDisplay; + pMga->pMgaModeInfo->ulPixClock = mode->Clock; + pMga->pMgaModeInfo->ulHFPorch = mode->HSyncStart - mode->HDisplay; + pMga->pMgaModeInfo->ulHSync = mode->HSyncEnd - mode->HSyncStart; + pMga->pMgaModeInfo->ulHBPorch = mode->HTotal - mode->HSyncEnd; + pMga->pMgaModeInfo->ulVFPorch = mode->VSyncStart - mode->VDisplay; + pMga->pMgaModeInfo->ulVSync = mode->VSyncEnd - mode->VSyncStart; + pMga->pMgaModeInfo->ulVBPorch = mode->VTotal - mode->VSyncEnd; + } + /* Use DstOrg directly */ + /* This is an offset in pixels not memory */ + pMga->pMgaModeInfo->ulDstOrg = pMga->DstOrg / (pScrn->bitsPerPixel / 8); + pMga->pMgaModeInfo->ulDisplayOrg = pMga->DstOrg / (pScrn->bitsPerPixel / 8); + pMga->pMgaModeInfo->ulPanXGran = 0; + pMga->pMgaModeInfo->ulPanYGran = 0; + + if(pMga->SecondCrtc == TRUE) { + pMga->pMgaModeInfo->flOutput = MGAMODEINFO_SECOND_CRTC | + MGAMODEINFO_FORCE_PITCH | + MGAMODEINFO_FORCE_DISPLAYORG; + if (digital2) { + pMga->pMgaModeInfo->flOutput |= MGAMODEINFO_DIGITAL2; + } else if (tv2) { + pMga->pMgaModeInfo->flOutput |= MGAMODEINFO_TV; + } else { + if (!swap_head) { + pMga->pMgaModeInfo->flOutput |= MGAMODEINFO_ANALOG2; + } else { + pMga->pMgaModeInfo->flOutput |= MGAMODEINFO_ANALOG1; + } + } + } else { + pMga->pMgaModeInfo->flOutput = MGAMODEINFO_FORCE_PITCH; + if (digital1) { + if ((pMga->Chipset == PCI_CHIP_MGAG200) || + (pMga->Chipset == PCI_CHIP_MGAG200_PCI)) { + pMga->pMgaModeInfo->flOutput |= MGAMODEINFO_FLATPANEL1; + pMga->pMgaModeInfo->flOutput |= MGAMODEINFO_DIGITAL2; + } else { + pMga->pMgaModeInfo->flOutput |= MGAMODEINFO_DIGITAL1; + } + } else if (tv1) { + pMga->pMgaModeInfo->flOutput |= MGAMODEINFO_TV; + } else { + if (!swap_head) { + pMga->pMgaModeInfo->flOutput |= MGAMODEINFO_ANALOG1; + } else { + pMga->pMgaModeInfo->flOutput |= MGAMODEINFO_ANALOG2; + } + } + } + pMga->pMgaModeInfo->ulFBPitch = pScrn->displayWidth; +} +#endif + +/* + * Initialise a new mode. This is currently still using the old + * "initialise struct, restore/write struct to HW" model. That could + * be changed. + */ + +static Bool +MGAModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode) +{ + vgaHWPtr hwp = VGAHWPTR(pScrn); + vgaRegPtr vgaReg; + MGAPtr pMga = MGAPTR(pScrn); + MGARegPtr mgaReg; + +#ifdef USEMGAHAL + ULONG status; +#endif + vgaHWUnlock(hwp); + +/* if(pMga->MergedFB && mode && mode->Private && (mode->PrivSize == 0)) { + mode = (DisplayModePtr)mode->Private; + }*/ + + /* Initialise the ModeReg values */ + if (!vgaHWInit(pScrn, mode)) + return FALSE; + pScrn->vtSema = TRUE; + + if (!(*pMga->ModeInit)(pScrn, mode)) + return FALSE; + + /* Program the registers */ + vgaHWProtect(pScrn, TRUE); + vgaReg = &hwp->ModeReg; + mgaReg = &pMga->ModeReg; +#ifdef USEMGAHAL + MGA_HAL( + MGAFillModeInfoStruct(pScrn,mode); + + /* Validate the parameters */ + if ((status = MGAValidateMode(pMga->pBoard, pMga->pMgaModeInfo)) != 0) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "MGAValidateMode from HALlib found the mode to be invalid.\n" + "\tError: %lx\n", status); + return FALSE; + } + + /* + * Find mode for second head. + */ + if(pMga->MergedFB) { + + MGAFillModeInfoStruct(pMga->pScrn2,mode); + /* Validates the Video parameters */ + if ((status = MGAValidateVideoParameters(pMga->pBoard, MGAPTR(pMga->pScrn2)->pMgaModeInfo)) + != 0) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "MGAValidateVideoParameters from HALlib found the mode to be invalid.\n\tError: %lx\n", status); + return FALSE; + } + } + ); /*MGA_HAL */ + +#endif + +#ifdef USEMGAHAL +MGA_HAL( + + /*************************** ESC *****************************/ + TmpMgaModeInfo[0] = *pMga->pMgaModeInfo; + + if(pMga->SecondCrtc == TRUE) + pMgaModeInfo[1] = pMga->pMgaModeInfo; + else + pMgaModeInfo[0] = pMga->pMgaModeInfo; + + TmpMgaModeInfo[0].ulDispWidth = 0; + + if(!pMga->MergedFB) /* FIXME: Must deal with this once PowerDesk & MergedFB + compatibility will exist */ + MGAFillDisplayModeStruct(mode, pMga->pMgaModeInfo); + /*************************************************************/ + +); /* MGA_HAL */ +#endif + +#ifdef XF86DRI + if (pMga->directRenderingEnabled) { + DRILock(screenInfo.screens[pScrn->scrnIndex], 0); + } +#endif + +#ifdef USEMGAHAL + MGA_HAL( + /* Initialize the board */ + if(MGASetMode(pMga->pBoard,pMga->pMgaModeInfo) != 0) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "MGASetMode returned an error." + " Make sure to validate the mode before.\n"); + return FALSE; + } + if(pMga->MergedFB + && MGASetMode(pMga->pBoard,MGAPTR(pMga->pScrn2)->pMgaModeInfo) != 0) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "MGASetMode returned an error." + " Make sure to validate the mode before.\n"); + } + + ); /* MGA_HAL */ + + /* getting around bugs in the HAL lib. MATROX: hint, hint. */ + MGA_HAL( + switch (pMga->Chipset) { + case PCI_CHIP_MGA1064: + case PCI_CHIP_MGAG100: + case PCI_CHIP_MGAG100_PCI: + case PCI_CHIP_MGAG200: + case PCI_CHIP_MGAG200_PCI: + case PCI_CHIP_MGAG200_SE_A_PCI: + case PCI_CHIP_MGAG200_SE_B_PCI: + case PCI_CHIP_MGAG400: + case PCI_CHIP_MGAG550: + if(pMga->SecondCrtc == FALSE && pMga->HWCursor == TRUE) { + outMGAdac(MGA1064_CURSOR_BASE_ADR_LOW, + pMga->FbCursorOffset >> 10); + outMGAdac(MGA1064_CURSOR_BASE_ADR_HI, + pMga->FbCursorOffset >> 18); + outMGAdac(MGA1064_CURSOR_CTL, 0x00); + } + if (pMga->Overlay8Plus24 == TRUE) { + outMGAdac(MGA1064_MUL_CTL, MGA1064_MUL_CTL_32bits); + outMGAdac(MGA1064_COL_KEY_MSK_LSB,0xFF); + outMGAdac(MGA1064_COL_KEY_LSB,pMga->colorKey); + outMGAdac(MGA1064_COL_KEY_MSK_MSB,0xFF); + outMGAdac(MGA1064_COL_KEY_MSB,0xFF); + } + break; + default: + break; + } + ); /* MGA_HAL */ +#endif + + MGA_NOT_HAL((*pMga->Restore)(pScrn, vgaReg, mgaReg, FALSE)); + + MGAStormSync(pScrn); + MGAStormEngineInit(pScrn); + + vgaHWProtect(pScrn, FALSE); + + if (xf86IsPc98()) { + if (pMga->Chipset == PCI_CHIP_MGA2064) + outb(0xfac, 0x01); + else + outb(0xfac, 0x02); + } + + pMga->CurrentLayout.mode = mode; + + if(pMga->MergedFB && mode->Private && (mode->PrivSize == 0)) { + pMga->M1currentMode = (DisplayModePtr)mode->Private; + } + +#ifdef XF86DRI + if (pMga->directRenderingEnabled) + DRIUnlock(screenInfo.screens[pScrn->scrnIndex]); +#endif +#ifdef DEBUG + MGAG450PrintPLL(pScrn); +#endif + return TRUE; +} + +static +void MGARestoreSecondCrtc(ScrnInfoPtr pScrn) +{ + MGAPtr pMga = MGAPTR(pScrn); + + if (MGAISGx50(pMga)) { + /* Force to return in clone mode */ + if (pMga->SecondOutput + && (xf86IsEntityShared(pScrn->entityList[0]) || pMga->SecondCrtc) + && !pMga->MergedFB) { + /* Do this branch if + * SecondOutput + * and not Unshared Primary + * and not Merged Mode (usualy means Unshared Primary) + */ + CARD8 ucXDispCtrl = inMGAdac(MGA1064_DISP_CTL); + + ucXDispCtrl &= ~0x0c; /* dac2outsel mask */ + ucXDispCtrl |= 0x04; /* dac2 -> crtc1 */ + + outMGAdac(MGA1064_DISP_CTL, ucXDispCtrl); + + } else { + CARD8 ucXDispCtrl = inMGAdac(MGA1064_DISP_CTL); + CARD32 ulC2CTL = INREG(MGAREG_C2CTL); + + ucXDispCtrl &= ~0x0c; /* dac2outsel mask */ + ucXDispCtrl |= 0x5; /* dac1outsel -> crtcdacsel, dac2 -> crtc1 */ + ulC2CTL &= ~0x00100000; /* crtcdacsel -> crtc1 */ + + outMGAdac(MGA1064_DISP_CTL, ucXDispCtrl); + OUTREG(MGAREG_C2CTL, ulC2CTL); + } + + } else { + /* Force to close second crtc */ + CARD32 ulC2CTL = INREG(MGAREG_C2CTL); + + ulC2CTL &= ~0x1; /* crtc2 disabled */ + + OUTREG(MGAREG_C2CTL, ulC2CTL); + } + + return; +} + +/* + * Restore the initial (text) mode. + */ +static void +MGARestore(ScrnInfoPtr pScrn) +{ + vgaHWPtr hwp = VGAHWPTR(pScrn); + vgaRegPtr vgaReg = &hwp->SavedReg; + MGAPtr pMga = MGAPTR(pScrn); + MGARegPtr mgaReg = &pMga->SavedReg; + + if (pScrn->pScreen != NULL) + MGAStormSync(pScrn); + + /* + * Restore the second crtc if: + * first and only driver entity + * second entity + * Merged Framebuffer mode (first and only driver entity) + */ + if((!xf86IsEntityShared(pScrn->entityList[0]) && !pMga->SecondCrtc) + || pMga->SecondCrtc || pMga->MergedFB) { + /* if(pMga->MergedFB) { + if(pMga->pScrn2) + MGARestoreSecondCrtc(pMga->pScrn2); + } else*/ + MGARestoreSecondCrtc(pScrn); + /* if we are second instance of driver, we've done our job, exit */ + if(pMga->SecondCrtc) return; + } + + /* Only restore text mode fonts/text for the primary card */ + vgaHWProtect(pScrn, TRUE); + if (pMga->Primary) { +#ifdef USEMGAHAL + MGA_HAL( + if(pMga->pBoard != NULL) { + MGASetVgaMode(pMga->pBoard); + MGARestoreVgaState(pMga->pBoard); + } + ); /* MGA_HAL */ +#endif + (*pMga->Restore)(pScrn, vgaReg, mgaReg, TRUE); + } else { + vgaHWRestore(pScrn, vgaReg, VGA_SR_MODE); + } + vgaHWProtect(pScrn, FALSE); +} + + +/* Workaround for a G400 CRTC2 display problem */ +static void +MGACrtc2FillStrip(ScrnInfoPtr pScrn) +{ + MGAPtr pMga = MGAPTR(pScrn); + + if (pMga->NoAccel) { + /* Clears the whole screen, but ... */ + bzero(pMga->FbStart, + (pScrn->bitsPerPixel >> 3) * pScrn->displayWidth * pScrn->virtualY); + } else { + xf86SetLastScrnFlag(pScrn->entityList[0], pScrn->scrnIndex); + pMga->RestoreAccelState(pScrn); + pMga->SetupForSolidFill(pScrn, 0, GXcopy, 0xFFFFFFFF); + pMga->SubsequentSolidFillRect(pScrn, pScrn->virtualX, 0, + pScrn->displayWidth - pScrn->virtualX, + pScrn->virtualY); + MGAStormSync(pScrn); + } +} + + +/* Mandatory */ + +/* This gets called at the start of each server generation */ + +static Bool +MGAScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) +{ + ScrnInfoPtr pScrn; + vgaHWPtr hwp; + MGAPtr pMga; + MGARamdacPtr MGAdac; + int ret; + VisualPtr visual; + unsigned char *FBStart; + int width, height, displayWidth; + MGAEntPtr pMgaEnt = NULL; + int f; + CARD32 VRTemp, FBTemp; +#ifdef XF86DRI + MessageType driFrom = X_DEFAULT; +#endif + + /* + * First get the ScrnInfoRec + */ + pScrn = xf86Screens[pScreen->myNum]; + + hwp = VGAHWPTR(pScrn); + pMga = MGAPTR(pScrn); + MGAdac = &pMga->Dac; + + if (pMga->is_G200SE) { + VRTemp = pScrn->videoRam; + FBTemp = pMga->FbMapSize; + pScrn->videoRam = 4096; + pMga->FbMapSize = pScrn->videoRam * 1024; + } + + /* Map the MGA memory and MMIO areas */ + if (pMga->FBDev) { + if (!MGAMapMemFBDev(pScrn)) + return FALSE; + } else { + if (!MGAMapMem(pScrn)) + return FALSE; + } + + if ((pMga->Chipset == PCI_CHIP_MGAG100) + || (pMga->Chipset == PCI_CHIP_MGAG100_PCI)) + MGAG100BlackMagic(pScrn); + + if (pMga->DualHeadEnabled) { + DevUnion *pPriv; + pPriv = xf86GetEntityPrivate(pScrn->entityList[0], MGAEntityIndex); + pMgaEnt = pPriv->ptr; + pMgaEnt->refCount++; +#ifdef USEMGAHAL + MGA_HAL( + if(pMgaEnt->refCount == 1) { + CARD8 MiscCtlReg; + pMga->pBoard = xalloc(sizeof(CLIENTDATA) + MGAGetBOARDHANDLESize()); + pMga->pClientStruct = xalloc(sizeof(CLIENTDATA)); + pMga->pClientStruct->pMga = (MGAPtr) pMga; + + /* wrapping OpenLibrary to fix broken registers. MATROX: hint,hint.*/ + MiscCtlReg = inMGAdac(MGA1064_MISC_CTL); + MGAOpenLibrary(pMga->pBoard,pMga->pClientStruct,sizeof(CLIENTDATA)); + outMGAdac(MGA1064_MISC_CTL,MiscCtlReg); + pMga->pMgaHwInfo = xalloc(sizeof(MGAHWINFO)); + MGAGetHardwareInfo(pMga->pBoard,pMga->pMgaHwInfo); + + /* Detecting for type of display */ + if (pMga->pMgaHwInfo->ulCapsSecondOutput & MGAHWINFOCAPS_OUTPUT_TV) { + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "TV detected\n"); + } + if (pMga->pMgaHwInfo->ulCapsFirstOutput & + MGAHWINFOCAPS_OUTPUT_DIGITAL) { + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, + "Digital Screen detected\n"); + } + if (pMga->pMgaHwInfo->ulCapsSecondOutput & + MGAHWINFOCAPS_OUTPUT_DIGITAL) { + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, + "Digital Screen detected\n"); + } + + /* Now copy these to the entitystructure */ + pMgaEnt->pClientStruct = pMga->pClientStruct; + pMgaEnt->pBoard = pMga->pBoard; + pMgaEnt->pMgaHwInfo = pMga->pMgaHwInfo; + } else { /* Ref count is 2 */ + pMga->pClientStruct = pMgaEnt->pClientStruct; + pMga->pBoard = pMgaEnt->pBoard; + pMga->pMgaHwInfo = pMgaEnt->pMgaHwInfo; + } + ); /* MGA_HAL */ +#endif + } else { +#ifdef USEMGAHAL + CARD8 MiscCtlReg; + + MGA_HAL( + pMga->pBoard = xalloc(sizeof(CLIENTDATA) + MGAGetBOARDHANDLESize()); + pMga->pClientStruct = xalloc(sizeof(CLIENTDATA)); + pMga->pClientStruct->pMga = (MGAPtr) pMga; + + MiscCtlReg = inMGAdac(MGA1064_MISC_CTL); + /* wrapping OpenLibrary to fix broken registers. MATROX: hint,hint.*/ + MGAOpenLibrary(pMga->pBoard,pMga->pClientStruct,sizeof(CLIENTDATA)); + outMGAdac(MGA1064_MISC_CTL,MiscCtlReg); + pMga->pMgaHwInfo = xalloc(sizeof(MGAHWINFO)); + MGAGetHardwareInfo(pMga->pBoard,pMga->pMgaHwInfo); + ); /* MGA_HAL */ +#endif + } + if (pMga->is_G200SE) { + pScrn->videoRam = VRTemp; + pMga->FbMapSize = FBTemp; + } +#ifdef USEMGAHAL + MGA_HAL( + /* There is a problem in the HALlib: set soft reset bit */ + /* MATROX: hint, hint. */ + if (!pMga->Primary && !pMga->FBDev && + (pMga->PciInfo->subsysCard == PCI_CARD_MILL_G200_SG) ) { + OUTREG(MGAREG_Reset, 1); + usleep(200); + OUTREG(MGAREG_Reset, 0); + } + ); /* MGA_HAL */ +#endif + + /* Initialise the MMIO vgahw functions */ + vgaHWSetMmioFuncs(hwp, pMga->IOBase, PORT_OFFSET); + vgaHWGetIOBase(hwp); + + /* Map the VGA memory when the primary video */ + if (pMga->Primary && !pMga->FBDev) { + hwp->MapSize = 0x10000; + if (!vgaHWMapMem(pScrn)) + return FALSE; + } + + if (pMga->FBDev) { + fbdevHWSave(pScrn); + /* Disable VGA core, and leave memory access on */ + pciSetBitsLong(pMga->PciTag, PCI_OPTION_REG, 0x100, 0x000); + if (!fbdevHWModeInit(pScrn, pScrn->currentMode)) + return FALSE; + if(pMga->SecondCrtc == FALSE && pMga->HWCursor == TRUE) { + switch (pMga->Chipset) { + case PCI_CHIP_MGA1064: + case PCI_CHIP_MGAG100: + case PCI_CHIP_MGAG100_PCI: + case PCI_CHIP_MGAG200: + case PCI_CHIP_MGAG200_PCI: + case PCI_CHIP_MGAG200_SE_A_PCI: + case PCI_CHIP_MGAG200_SE_B_PCI: + case PCI_CHIP_MGAG400: + case PCI_CHIP_MGAG550: + outMGAdac(MGA1064_CURSOR_BASE_ADR_LOW, pMga->FbCursorOffset >> 10); + outMGAdac(MGA1064_CURSOR_BASE_ADR_HI, pMga->FbCursorOffset >> 18); + break; + default: + break; + } + } + + MGAStormEngineInit(pScrn); + } else { + /* Save the current state */ + MGASave(pScrn); + /* Initialise the first mode */ + if (!MGAModeInit(pScrn, pScrn->currentMode)) + return FALSE; + } + /* Darken the screen for aesthetic reasons and set the viewport */ + if (pMga->SecondCrtc == TRUE && !pMga->MergedFB) { + MGASaveScreenCrtc2(pScreen, SCREEN_SAVER_ON); + } + if (pMga->SecondCrtc == FALSE && !pMga->MergedFB) { + MGASaveScreen(pScreen, SCREEN_SAVER_ON); + } + if( pMga->MergedFB ) { + MGASaveScreenMerged( pScreen, SCREEN_SAVER_ON ); + } + pScrn->AdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0); + + /* + * The next step is to setup the screen's visuals, and initialise the + * framebuffer code. In cases where the framebuffer's default + * choices for things like visual layouts and bits per RGB are OK, + * this may be as simple as calling the framebuffer's ScreenInit() + * function. If not, the visuals will need to be setup before calling + * a fb ScreenInit() function and fixed up after. + * + * For most PC hardware at depths >= 8, the defaults that cfb uses + * are not appropriate. In this driver, we fixup the visuals after. + */ + + /* + * Reset the visual list. + */ + miClearVisualTypes(); + + /* Setup the visuals we support. */ + + /* All MGA support DirectColor and can do overlays in 32bpp */ + if(pMga->Overlay8Plus24 && (pScrn->bitsPerPixel == 32)) { + if (!miSetVisualTypes(8, PseudoColorMask | GrayScaleMask, + pScrn->rgbBits, PseudoColor)) + return FALSE; + if (!miSetVisualTypes(24, TrueColorMask, pScrn->rgbBits, TrueColor)) + return FALSE; + } else if (pMga->SecondCrtc) { + /* No DirectColor on the second head */ + if (!miSetVisualTypes(pScrn->depth, TrueColorMask, pScrn->rgbBits, + TrueColor)) + return FALSE; + if (!miSetPixmapDepths ()) + return FALSE; + } else { + if (!xf86SetDefaultVisual(pScrn, -1)) + return FALSE; + + if (!miSetVisualTypes(pScrn->depth, + miGetDefaultVisualMask(pScrn->depth), + pScrn->rgbBits, pScrn->defaultVisual)) + return FALSE; + if (!miSetPixmapDepths ()) + return FALSE; + } + + /* + * Call the framebuffer layer's ScreenInit function, and fill in other + * pScreen fields. + */ + + width = pScrn->virtualX; + height = pScrn->virtualY; + displayWidth = pScrn->displayWidth; + + + if(pMga->Rotate) { + height = pScrn->virtualX; + width = pScrn->virtualY; + } + + if(pMga->ShadowFB) { + pMga->ShadowPitch = BitmapBytePad(pScrn->bitsPerPixel * width); + pMga->ShadowPtr = xalloc(pMga->ShadowPitch * height); + displayWidth = pMga->ShadowPitch / (pScrn->bitsPerPixel >> 3); + FBStart = pMga->ShadowPtr; + } else { + pMga->ShadowPtr = NULL; + FBStart = pMga->FbStart; + } + +#ifdef XF86DRI + /* + * Setup DRI after visuals have been established, but before cfbScreenInit + * is called. cfbScreenInit will eventually call into the drivers + * InitGLXVisuals call back. + * The DRI does not work when textured video is enabled at this time. + */ + if ((pMga->Chipset == PCI_CHIP_MGAG200_SE_A_PCI) || + (pMga->Chipset == PCI_CHIP_MGAG200_SE_B_PCI)) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Not supported by hardware, not initializing the DRI\n"); + pMga->directRenderingEnabled = FALSE; + driFrom = X_PROBED; + } else if (!xf86ReturnOptValBool(pMga->Options, OPTION_DRI, TRUE)) { + driFrom = X_CONFIG; + } else if ( pMga->NoAccel ) { + xf86DrvMsg( pScrn->scrnIndex, X_ERROR, + "Acceleration disabled, not initializing the DRI\n" ); + pMga->directRenderingEnabled = FALSE; + driFrom = X_CONFIG; + } + else if ( pMga->TexturedVideo == TRUE ) { + xf86DrvMsg( pScrn->scrnIndex, X_ERROR, + "Textured video enabled, not initializing the DRI\n" ); + pMga->directRenderingEnabled = FALSE; + driFrom = X_CONFIG; + } + else if (pMga->SecondCrtc == TRUE) { + xf86DrvMsg( pScrn->scrnIndex, X_ERROR, + "Not initializing the DRI on the second head\n" ); + pMga->directRenderingEnabled = FALSE; + } + else if ((pMga->FbMapSize / + (width * (pScrn->bitsPerPixel >> 3))) <= height * 3) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Static buffer allocation failed, not initializing the DRI\n"); + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Need at least %d kB video memory at this resolution, bit depth\n", + (3 * displayWidth * height * (pScrn->bitsPerPixel >> 3)) / 1024 ); + pMga->directRenderingEnabled = FALSE; + driFrom = X_PROBED; + } + else { + pMga->directRenderingEnabled = MGADRIScreenInit(pScreen); + } +#endif + + + if (pMga->Overlay8Plus24) { + ret = cfb8_32ScreenInit(pScreen, FBStart, + width, height, + pScrn->xDpi, pScrn->yDpi, + displayWidth); + } else { + ret = fbScreenInit(pScreen, FBStart, width, height, + pScrn->xDpi, pScrn->yDpi, + displayWidth, pScrn->bitsPerPixel); + } + + if (!ret) + return FALSE; + + + if (pScrn->bitsPerPixel > 8) { + /* Fixup RGB ordering */ + visual = pScreen->visuals + pScreen->numVisuals; + while (--visual >= pScreen->visuals) { + if ((visual->class | DynamicClass) == DirectColor) { + visual->offsetRed = pScrn->offset.red; + visual->offsetGreen = pScrn->offset.green; + visual->offsetBlue = pScrn->offset.blue; + visual->redMask = pScrn->mask.red; + visual->greenMask = pScrn->mask.green; + visual->blueMask = pScrn->mask.blue; + } + } + } + + /* must be after RGB ordering fixed */ + if (!pMga->Overlay8Plus24) + fbPictureInit (pScreen, 0, 0); + + xf86SetBlackWhitePixels(pScreen); + + pMga->BlockHandler = pScreen->BlockHandler; + pScreen->BlockHandler = MGABlockHandler; + + if(!pMga->ShadowFB) /* hardware cursor needs to wrap this layer */ + MGADGAInit(pScreen); + + if (!pMga->NoAccel) { +#ifdef USE_EXA + if (pMga->Exa) + mgaExaInit(pScreen); + else +#endif +#ifdef USE_XAA + MGAStormAccelInit(pScreen); +#endif + } + + miInitializeBackingStore(pScreen); + xf86SetBackingStore(pScreen); + xf86SetSilkenMouse(pScreen); + + /* Initialize software cursor. + Must precede creation of the default colormap */ + miDCInitialize(pScreen, xf86GetPointerScreenFuncs()); + + /* Initialize HW cursor layer. + Must follow software cursor initialization*/ + if (pMga->HWCursor) { + if(!MGAHWCursorInit(pScreen)) + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Hardware cursor initialization failed\n"); + } + if(pMga->MergedFB) { + /* Rotate and MergedFB are mutiualy exclusive, so we can use this + * variable. + */ + if (!pMga->PointerMoved) + pMga->PointerMoved = pScrn->PointerMoved; + pScrn->PointerMoved = MGAMergePointerMoved; + + } + + /* Initialise default colourmap */ + if (!miCreateDefColormap(pScreen)) + return FALSE; + + /* Initialize colormap layer. + Must follow initialization of the default colormap */ + if (!pMga->SecondCrtc) + f = CMAP_PALETTED_TRUECOLOR | CMAP_RELOAD_ON_MODE_SWITCH; + else + f = CMAP_RELOAD_ON_MODE_SWITCH; + if(!xf86HandleColormaps(pScreen, 256, 8, + pMga->FBDev ? fbdevHWLoadPaletteWeak() : MGAdac->LoadPalette, + NULL, f)) + return FALSE; + + if(pMga->Overlay8Plus24) { /* Must come after colormap initialization */ + if(!xf86Overlay8Plus32Init(pScreen)) + return FALSE; + } + + if(pMga->ShadowFB) { + RefreshAreaFuncPtr refreshArea = MGARefreshArea; + + if(pMga->Rotate) { + if (!pMga->PointerMoved) { + pMga->PointerMoved = pScrn->PointerMoved; + pScrn->PointerMoved = MGAPointerMoved; + } + + switch(pScrn->bitsPerPixel) { + case 8: refreshArea = MGARefreshArea8; break; + case 16: refreshArea = MGARefreshArea16; break; + case 24: refreshArea = MGARefreshArea24; break; + case 32: refreshArea = MGARefreshArea32; break; + } + } + + ShadowFBInit(pScreen, refreshArea); + } + + if(pMga->SecondCrtc == TRUE && !pMga->MergedFB) { + xf86DPMSInit(pScreen, MGADisplayPowerManagementSetCrtc2, 0); + } + if(pMga->SecondCrtc == FALSE && !pMga->MergedFB) { + xf86DPMSInit(pScreen, MGADisplayPowerManagementSet, 0); + } + if(pMga->MergedFB) { + xf86DPMSInit(pScreen, MGADisplayPowerManagementSetMerged, 0); + } + + pScrn->memPhysBase = pMga->FbAddress; + pScrn->fbOffset = pMga->YDstOrg * (pScrn->bitsPerPixel / 8); + + if(!pMga->MergedFB) { + if(pMga->SecondCrtc == TRUE) { + pScreen->SaveScreen = MGASaveScreenCrtc2; + } else { + pScreen->SaveScreen = MGASaveScreen; + } + } else { /* Merged FB */ + pScreen->SaveScreen = MGASaveScreenMerged; + } + + MGAInitVideo(pScreen); + +#ifdef XF86DRI + if (pMga->directRenderingEnabled) { + /* Now that mi, cfb, drm and others have done their thing, + * complete the DRI setup. + */ + pMga->directRenderingEnabled = MGADRIFinishScreenInit(pScreen); + } + if (pMga->directRenderingEnabled) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Direct rendering enabled\n"); + } else { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Direct rendering disabled\n"); + } + if (pMga->DualHeadEnabled && pMga->SecondCrtc == FALSE) + pMgaEnt->directRenderingEnabled = pMga->directRenderingEnabled; + pMga->haveQuiescense = 1; +#endif + + /* Wrap the current CloseScreen function */ + pMga->CloseScreen = pScreen->CloseScreen; + pScreen->CloseScreen = MGACloseScreen; + + /* Report any unused options (only for the first generation) */ + if (serverGeneration == 1) { + xf86ShowUnusedOptions(pScrn->scrnIndex, pScrn->options); + } + + /* For the second head, work around display problem. */ + if (!pMga->MergedFB && pMga->SecondCrtc) { + MGACrtc2FillStrip(pScrn); + } + + /* Done */ + return TRUE; +} + + +/* Usually mandatory */ +Bool +MGASwitchMode(int scrnIndex, DisplayModePtr mode, int flags) +{ +#ifdef USEMGAHAL + char sCmdIn[256]; + char sCmdOut[256]; + FILE* fdIn; +# ifdef MATROX_WRITEBACK + FILE* fdOut; +# endif +#endif + + if (mode->Flags & 0x80000000) { +#ifdef USEMGAHAL + +# ifdef MATROX_WRITEBACK +# define MWB(x) { x; } +# define MWB_COND(x) x +# else +# define MWB(x) +# define MWB_COND(x) 1 +# endif + ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; + + MGA_HAL( + fdIn = fopen("/tmp/mgaDriverIn", "rt"); + MWB(fdOut = fopen("/tmp/mgaDriverOut", "wt")) + + if(fdIn && MWB_COND(fdOut)) + { + + fgets(sCmdIn, 255, fdIn); + + if(sCmdIn) + { + + MGAExecuteEscCmd(xf86Screens[scrnIndex], sCmdIn, sCmdOut, mode); + + /* Remove file and close file descriptor */ + remove("/tmp/mgaDriverIn"); + fclose(fdIn); + MWB( + /* Write output data to output file for + calling application */ + fputs(sCmdOut, fdOut); + fclose(fdOut); + ) + mode->Flags &= 0x7FFFFFFF; + return TRUE; + } + else + { + mode->Flags &= 0x7FFFFFFF; + return FALSE; + } + } + else + { + mode->Flags &= 0x7FFFFFFF; + return FALSE; + } + ) +#endif + return FALSE; + } else + return MGAModeInit(xf86Screens[scrnIndex], mode); +} + + /* Adjusts coordinates to match Panning granularity. + * does nothing if the HALlib is not loaded + */ +void +MGAAdjustGranularity(ScrnInfoPtr pScrn, int* x, int* y) +{ +#ifdef USEMGAHAL + MGA_HAL( + MGAPtr pMga = MGAPTR(pScrn); + MGAPtr pMga2; + int xg = 1; + int yg = 1; + if(pMga->pMgaModeInfo && pMga->pMgaModeInfo->ulPanXGran && pMga->pMgaModeInfo->ulPanYGran) { + xg = pMga->pMgaModeInfo->ulPanXGran; + yg = pMga->pMgaModeInfo->ulPanYGran; + } + if(pMga->pScrn2 && (pMga2 = MGAPTR(pMga->pScrn2)) ) { + + if(pMga2->pMgaModeInfo && pMga2->pMgaModeInfo->ulPanXGran && pMga2->pMgaModeInfo->ulPanYGran) { + xg = max(xg,pMga2->pMgaModeInfo->ulPanXGran); + yg = max(yg,pMga2->pMgaModeInfo->ulPanYGran); + } + } + xg=16; /*ncoder: temporary */ + *x -= *x % xg; + *y -= *y % yg; + ); +#endif +} + + +/* + * This function is used to initialize the Start Address - the first + * displayed location in the video memory. + */ +/* Usually mandatory */ +void +MGAAdjustFrame(int scrnIndex, int x, int y, int flags) +{ + ScrnInfoPtr pScrn; + int Base, tmp, count; + + MGAFBLayout *pLayout; + MGAPtr pMga; + + + pScrn = xf86Screens[scrnIndex]; + pMga = MGAPTR(pScrn); + pLayout = &pMga->CurrentLayout; + + /* wanted to improve panning granularity problems without risking + * compatibility issues. Existing code looked hardware dependent. + */ +#ifdef USEMGAHAL + MGA_HAL( + pMga->HALGranularityOffX = x; + pMga->HALGranularityOffY = y; + MGAAdjustGranularity(pScrn,&x,&y); + pMga->HALGranularityOffX = pMga->HALGranularityOffX - x; + pMga->HALGranularityOffY = pMga->HALGranularityOffY - y; + HALSetDisplayStart(pMga->pBoard,x,y,0); + ); +#endif + MGA_NOT_HAL( + if(pMga->ShowCache && y && pScrn->vtSema) + y += pScrn->virtualY - 1; + + Base = (y * pLayout->displayWidth + x + pMga->YDstOrg) >> + (3 - pMga->BppShifts[(pLayout->bitsPerPixel >> 3) - 1]); + + if (pLayout->bitsPerPixel == 24) { + if (pMga->Chipset == PCI_CHIP_MGAG400 || pMga->Chipset == PCI_CHIP_MGAG550) + Base &= ~1; /*1 Not sure why */ + Base *= 3; + } + + /* find start of retrace */ + while (INREG8(0x1FDA) & 0x08); + while (!(INREG8(0x1FDA) & 0x08)); + /* wait until we're past the start (fixseg.c in the DDK) */ + count = INREG(MGAREG_VCOUNT) + 2; + while(INREG(MGAREG_VCOUNT) < count); + + OUTREG16(MGAREG_CRTC_INDEX, (Base & 0x00FF00) | 0x0C); + OUTREG16(MGAREG_CRTC_INDEX, ((Base & 0x0000FF) << 8) | 0x0D); + OUTREG8(MGAREG_CRTCEXT_INDEX, 0x00); + tmp = INREG8(MGAREG_CRTCEXT_DATA); + OUTREG8(MGAREG_CRTCEXT_DATA, (tmp & 0xF0) | ((Base & 0x0F0000) >> 16)); + ); + +} + +#define C2STARTADD0 0x3C28 + +void +MGAAdjustFrameCrtc2(int scrnIndex, int x, int y, int flags) +{ + ScrnInfoPtr pScrn; + int Base; + MGAFBLayout *pLayout; + MGAPtr pMga; + + pScrn = xf86Screens[scrnIndex]; + pMga = MGAPTR(pScrn); + pLayout = &pMga->CurrentLayout; +#ifdef USEMGAHAL + MGA_HAL( + MGAAdjustGranularity(pScrn,&x,&y); + HALSetDisplayStart(pMga->pBoard,x,y,1); + ); +#endif + MGA_NOT_HAL( + if(pMga->ShowCache && y && pScrn->vtSema) + y += pScrn->virtualY - 1; + + /* 3-85 c2offset + * 3-93 c2startadd0 + * 3-96 c2vcount + */ + + Base = (y * pLayout->displayWidth + x) * pLayout->bitsPerPixel >> 3; + Base += pMga->DstOrg; + Base &= 0x01ffffc0; + OUTREG(C2STARTADD0, Base); + ); +} + +/* + * This is called when VT switching back to the X server. Its job is + * to reinitialise the video mode. + * + * We may wish to unmap video/MMIO memory too. + */ + +/* Mandatory */ +static Bool +MGAEnterVT(int scrnIndex, int flags) +{ + ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; + MGAPtr pMga; + + pMga = MGAPTR(pScrn); + +#ifdef XF86DRI + if (pMga->directRenderingEnabled) { + if (pMga->irq) { + /* Need to make sure interrupts are enabled */ + OUTREG(MGAREG_IEN, pMga->reg_ien); + } + DRIUnlock(screenInfo.screens[scrnIndex]); + } +#endif + + if (!MGAModeInit(pScrn, pScrn->currentMode)) + return FALSE; + pScrn->AdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0); + + /* For the second head, work around display problem. */ + if (pMga->SecondCrtc) { + MGACrtc2FillStrip(pScrn); + } + + return TRUE; +} + +static Bool +MGAEnterVTFBDev(int scrnIndex, int flags) +{ + ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; +#ifdef XF86DRI + ScreenPtr pScreen; + MGAPtr pMga; + + pMga = MGAPTR(pScrn); + if (pMga->directRenderingEnabled) { + pScreen = screenInfo.screens[scrnIndex]; + DRIUnlock(pScreen); + } +#endif + + fbdevHWEnterVT(scrnIndex,flags); + MGAStormEngineInit(pScrn); + return TRUE; +} + +#define RESTORE_TEXTMODE_ON_DVI(x) \ + if (MGAISGx50(x) && \ + (ISDIGITAL1(x) || ISDIGITAL2(x))) { \ + /* Reset DUALDVI register */ \ + outMGAdac(MGA1064_DVI_PIPE_CTL, 0x0); \ + /* Set Panel mode between 20 and 54 MHz */ \ + outMGAdac(MGA1064_PAN_CTL, 0x7); \ + } + + +/* + * This is called when VT switching away from the X server. Its job is + * to restore the previous (text) mode. + * + * We may wish to remap video/MMIO memory too. + */ + +/* Mandatory */ +static void +MGALeaveVT(int scrnIndex, int flags) +{ + ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; + vgaHWPtr hwp = VGAHWPTR(pScrn); +#ifdef XF86DRI + MGAPtr pMga = MGAPTR(pScrn); + ScreenPtr pScreen; +#endif + + MGARestore(pScrn); + vgaHWLock(hwp); + + if (xf86IsPc98()) + outb(0xfac, 0x00); +#ifdef XF86DRI + if (pMga->directRenderingEnabled) { + pScreen = screenInfo.screens[scrnIndex]; + DRILock(pScreen, 0); + } +#endif +#ifdef USEMGAHAL + MGA_HAL( RESTORE_TEXTMODE_ON_DVI(pMga); ); +#endif +} + + +/* + * This is called at the end of each server generation. It restores the + * original (text) mode. It should also unmap the video memory, and free + * any per-generation data allocated by the driver. It should finish + * by unwrapping and calling the saved CloseScreen function. + */ + +/* Mandatory */ +static Bool +MGACloseScreen(int scrnIndex, ScreenPtr pScreen) +{ + ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; + vgaHWPtr hwp = VGAHWPTR(pScrn); + MGAPtr pMga = MGAPTR(pScrn); + MGAEntPtr pMgaEnt = NULL; + +#ifdef USEMGAHAL + MGA_HAL( RESTORE_TEXTMODE_ON_DVI(pMga); ); +#endif + if (pMga->MergedFB) + MGACloseScreenMerged(scrnIndex, pScreen); + + if (pScrn->vtSema) { + if (pMga->FBDev) { + fbdevHWRestore(pScrn); + MGAUnmapMemFBDev(pScrn); + } else { + MGARestore(pScrn); + vgaHWLock(hwp); + MGAUnmapMem(pScrn); + vgaHWUnmapMem(pScrn); + } + } +#ifdef XF86DRI + if (pMga->directRenderingEnabled) { + MGADRICloseScreen(pScreen); + pMga->directRenderingEnabled=FALSE; + } +#endif + + if (pMga->DualHeadEnabled) { + DevUnion *pPriv; + pPriv = xf86GetEntityPrivate(pScrn->entityList[0], MGAEntityIndex); + pMgaEnt = pPriv->ptr; + pMgaEnt->refCount--; + } + +#ifdef USEMGAHAL + MGA_HAL( + if(pMga->DualHeadEnabled) { + if(pMgaEnt->refCount == 0) { + /* Both boards have closed there screen */ + MGACloseLibrary(pMga->pBoard); + + if (pMga->pBoard) + xfree(pMga->pBoard); + if (pMga->pClientStruct) + xfree(pMga->pClientStruct); + if (pMga->pMgaModeInfo) + xfree(pMga->pMgaModeInfo); + if (pMga->pMgaHwInfo) + xfree(pMga->pMgaHwInfo); + } + } else { + MGACloseLibrary(pMga->pBoard); + + if (pMga->pBoard) + xfree(pMga->pBoard); + if (pMga->pClientStruct) + xfree(pMga->pClientStruct); + if (pMga->pMgaModeInfo) + xfree(pMga->pMgaModeInfo); + if (pMga->pMgaHwInfo) + xfree(pMga->pMgaHwInfo); + } + ); /* MGA_HAL */ +#endif + +#ifdef USE_XAA + if (pMga->AccelInfoRec) + XAADestroyInfoRec(pMga->AccelInfoRec); +#endif +#ifdef USE_EXA + if (pMga->ExaDriver) { + exaDriverFini(pScreen); + xfree(pMga->ExaDriver); + } +#endif + if (pMga->CursorInfoRec) + xf86DestroyCursorInfoRec(pMga->CursorInfoRec); + if (pMga->ShadowPtr) + xfree(pMga->ShadowPtr); + if (pMga->DGAModes) + xfree(pMga->DGAModes); + if (pMga->adaptor) + xfree(pMga->adaptor); + if (pMga->portPrivate) + xfree(pMga->portPrivate); + if (pMga->ScratchBuffer) + xfree(pMga->ScratchBuffer); + + pScrn->vtSema = FALSE; + + if (xf86IsPc98()) + outb(0xfac, 0x00); + + xf86ClearPrimInitDone(pScrn->entityList[0]); + + if(pMga->BlockHandler) + pScreen->BlockHandler = pMga->BlockHandler; + + pScreen->CloseScreen = pMga->CloseScreen; + + return (*pScreen->CloseScreen)(scrnIndex, pScreen); +} + + +/* Free up any persistent data structures */ + +/* Optional */ +static void +MGAFreeScreen(int scrnIndex, int flags) +{ + + /* + * This only gets called when a screen is being deleted. It does not + * get called routinely at the end of a server generation. + */ + if (xf86LoaderCheckSymbol("vgaHWFreeHWRec")) + vgaHWFreeHWRec(xf86Screens[scrnIndex]); + MGAFreeRec(xf86Screens[scrnIndex]); + +} + + +/* Checks if a mode is suitable for the selected chipset. */ + +/* Optional */ +static ModeStatus +MGAValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose, int flags) +{ + int lace; + ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; + MGAPtr pMga = MGAPTR(pScrn); + + lace = 1 + ((mode->Flags & V_INTERLACE) != 0); + + if ((mode->CrtcHDisplay <= 2048) && + (mode->CrtcHSyncStart <= 4096) && + (mode->CrtcHSyncEnd <= 4096) && + (mode->CrtcHTotal <= 4096) && + (mode->CrtcVDisplay <= 2048 * lace) && + (mode->CrtcVSyncStart <= 4096 * lace) && + (mode->CrtcVSyncEnd <= 4096 * lace) && + (mode->CrtcVTotal <= 4096 * lace)) { + + /* Can't have horizontal panning for second head of G400 */ + if (pMga->SecondCrtc) { + if (flags == MODECHECK_FINAL) { + if (pMga->allowedWidth == 0) + pMga->allowedWidth = pScrn->virtualX; + if (mode->HDisplay != pMga->allowedWidth) + return(MODE_ONE_WIDTH); + } + } + + return(MODE_OK); + } else { + return(MODE_BAD); + } +} + + +/* + * This routine is required but since we can't easily blank the + * second display without risking powering off the monitor, return + * FALSE and let the X server do something generic. + */ +static Bool +MGASaveScreenCrtc2(ScreenPtr pScreen, int mode) +{ + return FALSE; +} + +/* Do screen blanking */ + +static Bool +MGASaveScreen(ScreenPtr pScreen, int mode) +{ + return vgaHWSaveScreen(pScreen, mode); +} + + +/* + * MGADisplayPowerManagementSet -- + * + * Sets VESA Display Power Management Signaling (DPMS) Mode. + * + * XXX This needs fixing for sync-on-green! + */ +void +MGADisplayPowerManagementSet(ScrnInfoPtr pScrn, int PowerManagementMode, + int flags) +{ + MGAPtr pMga = MGAPTR(pScrn); + unsigned char seq1 = 0, crtcext1 = 0; + + switch (PowerManagementMode) + { + case DPMSModeOn: + /* Screen: On; HSync: On, VSync: On */ + seq1 = 0x00; + crtcext1 = 0x00; + break; + case DPMSModeStandby: + /* Screen: Off; HSync: Off, VSync: On */ + seq1 = 0x20; + crtcext1 = 0x10; + break; + case DPMSModeSuspend: + /* Screen: Off; HSync: On, VSync: Off */ + seq1 = 0x20; + crtcext1 = 0x20; + break; + case DPMSModeOff: + /* Screen: Off; HSync: Off, VSync: Off */ + seq1 = 0x20; + crtcext1 = 0x30; + break; + } + /* XXX Prefer an implementation that doesn't depend on VGA specifics */ + OUTREG8(MGAREG_SEQ_INDEX, 0x01); /* Select SEQ1 */ + seq1 |= INREG8(MGAREG_SEQ_DATA) & ~0x20; + OUTREG8(MGAREG_SEQ_DATA, seq1); + OUTREG8(MGAREG_CRTCEXT_INDEX, 0x01); /* Select CRTCEXT1 */ + crtcext1 |= INREG8(MGAREG_CRTCEXT_DATA) & ~0x30; + OUTREG8(MGAREG_CRTCEXT_DATA, crtcext1); +} + + +void +MGADisplayPowerManagementSetCrtc2(ScrnInfoPtr pScrn, int PowerManagementMode, + int flags) +{ + MGAPtr pMga = MGAPTR(pScrn); + CARD32 val = INREG(MGAREG_C2CTL); + + if (PowerManagementMode==DPMSModeOn) { + /* Enable CRTC2 */ + val |= 0x1; + val &= ~(0x8); + OUTREG(MGAREG_C2CTL, val); + /* Restore normal MAVEN values */ + if (pMga->Maven) { + /* if TV MODE -- for later implementation + MAVW(MONEN, 0xb3); + MAVW(MONSET, 0x20); + MAVW(OUTMODE, 0x08); output: SVideo/Composite + MAVW(STABLE, 0x02); makes picture stable? + fixme? linux uses 0x14... + MAVW(TEST, (MAVR(TEST) & 0x10)); + + */ + /* else monitor mode */ + + xf86I2CWriteByte(pMga->Maven, MGAMAV_MONEN, 0xb2); + /* must be set to this in monitor mode */ + xf86I2CWriteByte(pMga->Maven, MGAMAV_MONSET, 0x20); + /* output: monitor mode */ + xf86I2CWriteByte(pMga->Maven, MGAMAV_OUTMODE, 0x03); + /* makes picture stable? */ + xf86I2CWriteByte(pMga->Maven, MGAMAV_STABLE, 0x22); + /* turn off test signal */ + xf86I2CWriteByte(pMga->Maven, MGAMAV_TEST, 0x00); + } + } + else { + /* Disable CRTC2 video */ + val |= 0x8; + val &= ~(0x1); + OUTREG(MGAREG_C2CTL, val); + + /* Disable MAVEN display */ + if (pMga->Maven) { + /* In order to blank the 2nd display, we must set some MAVEN registers. + * It seems that not always the same values work on different hardware so + * we try a few different (possibly redundant) ones. */ + /* xf86I2CWriteByte(pMga->Maven, MGAMAV_STABLE, 0x6a); */ + /* xf86I2CWriteByte(pMga->Maven, MGAMAV_TEST, 0x03); */ + /* xf86I2CWriteByte(pMga->Maven, MGAMAV_TEST, 0x10); */ + xf86I2CWriteByte(pMga->Maven, MGAMAV_OUTMODE, 0x80); + } + + } +} + + +static void +MGABlockHandler ( + int i, + pointer blockData, + pointer pTimeout, + pointer pReadmask +){ + ScreenPtr pScreen = screenInfo.screens[i]; + ScrnInfoPtr pScrn = xf86Screens[i]; + MGAPtr pMga = MGAPTR(pScrn); + + if(pMga->PaletteLoadCallback) + (*pMga->PaletteLoadCallback)(pScrn); + + pScreen->BlockHandler = pMga->BlockHandler; + (*pScreen->BlockHandler) (i, blockData, pTimeout, pReadmask); + pScreen->BlockHandler = MGABlockHandler; + + if(pMga->VideoTimerCallback) { + UpdateCurrentTime(); + (*pMga->VideoTimerCallback)(pScrn, currentTime.milliseconds); + } + + if(pMga->RenderCallback) + (*pMga->RenderCallback)(pScrn); +} + +#if defined (EXTRADEBUG) +/* + * some functions to track input/output in the server + */ + +CARD8 +MGAdbg_inreg8(ScrnInfoPtr pScrn,int addr,int verbose, char* func) +{ + CARD8 ret; + + ret = MMIO_IN8(MGAPTR(pScrn)->IOBase,addr); + if(verbose) + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "inreg8 : %s: 0x%8x = 0x%x\n",func, addr,ret); + return ret; +} + +CARD16 +MGAdbg_inreg16(ScrnInfoPtr pScrn,int addr,int verbose, char* func) +{ + CARD16 ret; + + ret = MMIO_IN16(MGAPTR(pScrn)->IOBase,addr); + if(verbose) + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "inreg16: %s: 0x%8x = 0x%x\n",func, addr,ret); + return ret; +} + +CARD32 +MGAdbg_inreg32(ScrnInfoPtr pScrn,int addr,int verbose, char* func) +{ + CARD32 ret; + + ret = MMIO_IN32(MGAPTR(pScrn)->IOBase,addr); + if(verbose) + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "inreg32: %s: 0x%8x = 0x%x\n",func, addr,ret); + return ret; +} + +void +MGAdbg_outreg8(ScrnInfoPtr pScrn,int addr,int val, char* func) +{ + CARD8 ret; + +#if 0 + if( addr = MGAREG_CRTCEXT_DATA ) + return; +#endif + if( addr != 0x3c00 ) { + ret = MGAdbg_inreg8(pScrn,addr,0,func); + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "outreg8 : %s: 0x%8x = 0x%x was 0x%x\n", + func,addr,val,ret); + } + else { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "outreg8 : %s: index 0x%x\n", + func,val); + } + MMIO_OUT8(MGAPTR(pScrn)->IOBase,addr,val); +} + +void +MGAdbg_outreg16(ScrnInfoPtr pScrn,int addr,int val, char* func) +{ + CARD16 ret; + +#if 0 + if (addr == MGAREG_CRTCEXT_INDEX) + return; +#endif + ret = MGAdbg_inreg16(pScrn,addr,0, func); + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "outreg16: %s: 0x%8x = 0x%x was 0x%x\n", + func,addr,val,ret); + MMIO_OUT16(MGAPTR(pScrn)->IOBase,addr,val); +} + +void +MGAdbg_outreg32(ScrnInfoPtr pScrn,int addr,int val, char* func) +{ + CARD32 ret; + + if (((addr & 0xff00) == 0x1c00) + && (addr != 0x1c04) +/* && (addr != 0x1c1c) */ + && (addr != 0x1c20) + && (addr != 0x1c24) + && (addr != 0x1c80) + && (addr != 0x1c8c) + && (addr != 0x1c94) + && (addr != 0x1c98) + && (addr != 0x1c9c) + ) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "%s: refused address 0x%x\n", + func,addr); + return; + } + ret = MGAdbg_inreg32(pScrn,addr,0, func); + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "outreg32: %s: 0x%8x = 0x%x was 0x%x\n", + func,addr,val,ret); + MMIO_OUT32(MGAPTR(pScrn)->IOBase,addr,val); +} +#endif /* DEBUG */ + +static void +MGAG100BlackMagic(ScrnInfoPtr pScrn) +{ + MGAPtr pMga = MGAPTR(pScrn); + + OUTREG(MGAREG_PLNWT, ~(CARD32)0x0); + /* reset memory */ + OUTREG(MGAREG_MACCESS, 1<<15); + usleep(10); +} + diff --git a/driver/xf86-video-mga/src/mga_esc.c b/driver/xf86-video-mga/src/mga_esc.c new file mode 100644 index 000000000..8beffa81c --- /dev/null +++ b/driver/xf86-video-mga/src/mga_esc.c @@ -0,0 +1,795 @@ +/* $XFree86$ */ +/**************************************************************************** +* mga_esc.c +* +* ESC call implementation +* +* (C) Matrox Graphics, Inc. +*****************************************************************************/ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#ifdef USEMGAHAL + +/* All drivers should typically include these */ +#include "xf86.h" +#include "xf86_OSproc.h" +#include "xf86Resources.h" + +/* All drivers need this */ + +#include "compiler.h" + +/* Drivers for PCI hardware need this */ +#include "xf86PciInfo.h" + +/* Drivers that need to access the PCI config space directly need this */ +#include "xf86Pci.h" + +/* All drivers initialising the SW cursor need this */ +#include "mipointer.h" + +/* All drivers implementing backing store need this */ +#include "mibstore.h" + +#include "micmap.h" + +#include "xf86DDC.h" +#include "xf86RAC.h" +#include "vbe.h" + +#include "fb.h" +#include "cfb8_32.h" +#include "dixstruct.h" + +#include "mga_reg.h" +#include "mga.h" +#include "mga_macros.h" + +/* ESC */ +LPMGAMODEINFO pMgaModeInfo[2] = {NULL}; +MGAMODEINFO TmpMgaModeInfo[2] = {{0}}; + +/* ESC Implementation */ +static void EscHLeft(ScrnInfoPtr pScrn, unsigned long *param, char *sResult, DisplayModePtr pMode); +static void EscHRight(ScrnInfoPtr pScrn, unsigned long *param, char *sResult, DisplayModePtr pMode); +static void EscVUp(ScrnInfoPtr pScrn, unsigned long *param, char *sResult, DisplayModePtr pMode); +static void EscVDown(ScrnInfoPtr pScrn, unsigned long *param, char *sResult, DisplayModePtr pMode); +static void EscHLarger(ScrnInfoPtr pScrn, unsigned long *param, char *sResult, DisplayModePtr pMode); +static void EscHSmaller(ScrnInfoPtr pScrn, unsigned long *param, char *sResult, DisplayModePtr pMode); +static void EscVTaller(ScrnInfoPtr pScrn, unsigned long *param, char *sResult, DisplayModePtr pMode); +static void EscVSmaller(ScrnInfoPtr pScrn, unsigned long *param, char *sResult, DisplayModePtr pMode); +static void EscRefresh(ScrnInfoPtr pScrn, unsigned long *param, char *sResult, DisplayModePtr pMode); +static void EscRestoreVidParm(ScrnInfoPtr pScrn, unsigned long *param, char *sResult, DisplayModePtr pMode); +static void EscRead(ScrnInfoPtr pScrn, unsigned long *param, char *sResult, DisplayModePtr pMode); +static void EscWrite(ScrnInfoPtr pScrn, unsigned long *param, char *sResult, DisplayModePtr pMode); +static void EscHal(ScrnInfoPtr pScrn, unsigned long *param, char *sResult, DisplayModePtr pMode); +static void EscTest(ScrnInfoPtr pScrn, unsigned long *param, char *sResult, DisplayModePtr pMode); +static void EscMerged(ScrnInfoPtr pScrn, unsigned long *param, char *sResult, DisplayModePtr pMode); + +static LPMGAMODEINFO GetModeInfoPtr(ULONG ulScreen); +static void GetVideoParameterStr(LPMGAMODEINFO pModeInfo, char *sResult); +static Bool convertNumber(unsigned long *pulNumber, char *sNumber); + + +static MGAEscFuncRec FunctionTable[] = { + {"hal", EscHal}, + {"test", EscTest}, + {"read", EscRead}, + {"write", EscWrite}, + {"left", EscHLeft}, + {"right", EscHRight}, + {"down", EscVDown}, + {"up", EscVUp}, + {"h+", EscHLarger}, + {"h-", EscHSmaller}, + {"v+", EscVTaller}, + {"v-", EscVSmaller}, + {"refresh", EscRefresh}, + {"undo", EscRestoreVidParm}, + {"merged", EscMerged}, + {NULL,NULL} +}; + + +void MGAFillDisplayModeStruct(DisplayModePtr pMode, LPMGAMODEINFO pModeInfo) +{ + pMode->Clock = pModeInfo->ulPixClock; + + pMode->HDisplay = pModeInfo->ulDispWidth; + pMode->HSyncStart = pModeInfo->ulDispWidth + + pModeInfo->ulHFPorch; + pMode->HSyncEnd = pModeInfo->ulDispWidth + + pModeInfo->ulHFPorch + + pModeInfo->ulHSync; + pMode->HTotal = pModeInfo->ulDispWidth + + pModeInfo->ulHFPorch + + pModeInfo->ulHSync + + pModeInfo->ulHBPorch; + + pMode->VDisplay = pModeInfo->ulDispHeight; + pMode->VSyncStart = pModeInfo->ulDispHeight + + pModeInfo->ulVFPorch; + pMode->VSyncEnd = pModeInfo->ulDispHeight + + pModeInfo->ulVFPorch + + pModeInfo->ulVSync; + pMode->VTotal = pModeInfo->ulDispHeight + + pModeInfo->ulVFPorch + + pModeInfo->ulVSync + + pModeInfo->ulVBPorch; + + pMode->VRefresh = pModeInfo->ulRefreshRate; +} + +static LPMGAMODEINFO GetModeInfoPtr(ULONG ulScreen) +{ + + if ( !TmpMgaModeInfo[ulScreen].ulDispWidth ) + { + TmpMgaModeInfo[ulScreen] = *pMgaModeInfo[ulScreen]; + } + + return &TmpMgaModeInfo[ulScreen]; +} + + +static void GetVideoParameterStr(LPMGAMODEINFO pModeInfo, char *sResult) +{ + sprintf(sResult, "%d %d %d %d %d %d %d %d %d %d %d", + pModeInfo->ulDispWidth, + pModeInfo->ulDispHeight, + pModeInfo->ulBpp, + pModeInfo->ulPixClock, + pModeInfo->ulHFPorch, + pModeInfo->ulHSync, + pModeInfo->ulHBPorch, + pModeInfo->ulVFPorch, + pModeInfo->ulVSync, + pModeInfo->ulVBPorch, + pModeInfo->flSignalMode); +} + + +static float GetVRefresh(LPMGAMODEINFO pModeInfo) +{ + ULONG ulHTotal; + ULONG ulVTotal; + + ulHTotal = + pModeInfo->ulDispWidth + + pModeInfo->ulHFPorch + + pModeInfo->ulHSync + + pModeInfo->ulHBPorch; + + ulVTotal = + pModeInfo->ulDispHeight + + pModeInfo->ulVFPorch + + pModeInfo->ulVSync + + pModeInfo->ulVBPorch; + + return ((float)pModeInfo->ulPixClock * 1000.0) / (ulHTotal * ulVTotal); +} + +static void EscHal(ScrnInfoPtr pScrn, unsigned long *param, char *sResult, DisplayModePtr pMode) +{ + MGAPtr pMGA = MGAPTR(pScrn); + + if(pMGA->HALLoaded) + strcpy(sResult, "YES"); + else + strcpy(sResult, "NO"); + +} + +static void EscTest(ScrnInfoPtr pScrn, unsigned long *param, char +*sResult, DisplayModePtr pMode) +{ + strcpy(sResult, "YES"); +} + +static void EscMerged(ScrnInfoPtr pScrn, unsigned long *param, char +*sResult, DisplayModePtr pMode) +{ + strcpy(sResult, "YES"); +} + +static void EscRead(ScrnInfoPtr pScrn, unsigned long *param, char *sResult, DisplayModePtr pMode) +{ + MGAPtr pMga = MGAPTR(pScrn); + ULONG ulSource, ulAddr, ulData; + UCHAR ucIndex; + + if ( (param[0] & 0xffff) < 2 ) + { + strcpy(sResult, "#error 1"); + return; + } + + + ulSource = param[1] >> 16; + ulAddr = param[1] & 0xffff; + + + switch( ulSource ) + { + case 0: + ulData = INREG(ulAddr); + sprintf(sResult, "MGA[%04X] = 0x%08X", ulAddr, ulData); + break; + case 1: + ucIndex = INREG8(0x3c00); + OUTREG8(0x3c00, (UCHAR)ulAddr); + ulData = (ULONG)INREG8(0x3c0a); + OUTREG8(0x3c00, ucIndex); + sprintf(sResult, "DAC[%02X] = 0x%02X", ulAddr, ulData); + break; + case 2: + ucIndex = INREG8(0x1fd4); + OUTREG8(0x1fd4, (UCHAR)ulAddr); + ulData = (ULONG)INREG8(0x1fd5); + OUTREG8(0x1fd4, ucIndex); + sprintf(sResult, "CRTC[%02X] = 0x%02X", ulAddr, ulData); + break; + case 3: + ucIndex = INREG8(0x1fde); + OUTREG8(0x1fde, (UCHAR)ulAddr); + ulData = (ULONG)INREG8(0x1fdf); + OUTREG8(0x1fde, ucIndex); + sprintf(sResult, "CRTCEXT[%02X] = 0x%02X", ulAddr, ulData); + break; + default: + strcpy(sResult, "ERROR# 2"); + break; + } +} + +static void EscWrite(ScrnInfoPtr pScrn, unsigned long *param, char *sResult, DisplayModePtr pMode) +{ + MGAPtr pMga = MGAPTR(pScrn); + ULONG ulSource, ulAddr, ulData; + UCHAR ucIndex; + + if ( (param[0] & 0xffff) < 3 ) + { + strcpy(sResult, "#error 1"); + return; + } + + ulSource = param[1] >> 16; + ulAddr = param[1] & 0xffff; + ulData = param[2]; + + + switch( ulSource ) + { + case 0: + OUTREG(ulAddr, ulData); + strcpy(sResult, "OK"); + break; + case 1: + ucIndex = INREG8(0x3c00); + OUTREG8(0x3c00, (UCHAR)ulAddr); + OUTREG8(0x3c0a, (UCHAR)ulData); + OUTREG8(0x3c00, ucIndex); + strcpy(sResult, "OK"); + break; + case 2: + ucIndex = INREG8(0x1fd4); + OUTREG8(0x1fd4, (UCHAR)ulAddr); + OUTREG8(0x1fd5, (UCHAR)ulData); + OUTREG8(0x1fd4, ucIndex); + strcpy(sResult, "OK"); + break; + case 3: + ucIndex = INREG8(0x1fde); + OUTREG8(0x1fde, (UCHAR)ulAddr); + OUTREG8(0x1fdf, (UCHAR)ulData); + OUTREG8(0x1fde, ucIndex); + strcpy(sResult, "OK"); + break; + default: + strcpy(sResult, "ERROR# 2"); + break; + } +} + +static void EscHLeft(ScrnInfoPtr pScrn, unsigned long *param, char *sResult, DisplayModePtr pMode) +{ + MGAPtr pMga = MGAPTR(pScrn); + LPMGAMODEINFO pModeInfo; + + pModeInfo = GetModeInfoPtr(param[0] >> 16); + + if ( !pMgaModeInfo ) + { + strcpy(sResult, "#error 1"); + return; + } + + + if (pModeInfo->ulHBPorch > (8 * param[1]) ) + { + pModeInfo->ulHBPorch -=8 * param[1]; + pModeInfo->ulHFPorch +=8 * param[1]; + MGASetMode(pMga->pBoard, pModeInfo); + } + + MGAFillDisplayModeStruct(pMode, pModeInfo); + + GetVideoParameterStr(pModeInfo, sResult); +} + + +static void EscHRight(ScrnInfoPtr pScrn, unsigned long *param, char *sResult, DisplayModePtr pMode) +{ + MGAPtr pMga = MGAPTR(pScrn); + LPMGAMODEINFO pModeInfo; + + pModeInfo = GetModeInfoPtr(param[0] >> 16); + + if ( !pMgaModeInfo ) + { + strcpy(sResult, "#error 1"); + return; + } + + if (pModeInfo->ulHFPorch > (8 * param[1]) ) + { + pModeInfo->ulHFPorch -=8 * param[1]; + pModeInfo->ulHBPorch +=8 * param[1]; + MGASetMode(pMga->pBoard, pModeInfo); + } + + MGAFillDisplayModeStruct(pMode, pModeInfo); + + GetVideoParameterStr(pModeInfo, sResult); +} + + + +static void EscVUp(ScrnInfoPtr pScrn, unsigned long *param, char *sResult, DisplayModePtr pMode) +{ + MGAPtr pMga = MGAPTR(pScrn); + LPMGAMODEINFO pModeInfo; + + pModeInfo = GetModeInfoPtr(param[0] >> 16); + + if ( !pMgaModeInfo ) + { + strcpy(sResult, "#error 1"); + return; + } + + if (pModeInfo->ulVBPorch > (param[1]) ) + { + pModeInfo->ulVBPorch -= param[1]; + pModeInfo->ulVFPorch += param[1]; + MGASetMode(pMga->pBoard, pModeInfo); + } + + MGAFillDisplayModeStruct(pMode, pModeInfo); + + GetVideoParameterStr(pModeInfo, sResult); +} + + +static void EscVDown(ScrnInfoPtr pScrn, unsigned long *param, char *sResult, DisplayModePtr pMode) +{ + MGAPtr pMga = MGAPTR(pScrn); + LPMGAMODEINFO pModeInfo; + + pModeInfo = GetModeInfoPtr(param[0] >> 16); + + if ( !pMgaModeInfo ) + { + strcpy(sResult, "#error 1"); + return; + } + + if (pModeInfo->ulVFPorch >= (param[1]) ) + { + pModeInfo->ulVFPorch -= param[1]; + pModeInfo->ulVBPorch += param[1]; + MGASetMode(pMga->pBoard, pModeInfo); + } + + MGAFillDisplayModeStruct(pMode, pModeInfo); + + GetVideoParameterStr(pModeInfo, sResult); +} + + +static void EscHLarger(ScrnInfoPtr pScrn, unsigned long *param, char *sResult, DisplayModePtr pMode) +{ + MGAPtr pMga = MGAPTR(pScrn); + LPMGAMODEINFO pModeInfo; + float fRefresh, fPixelClock; + ULONG ulStep; + + pModeInfo = GetModeInfoPtr(param[0] >> 16); + + if ( !pMgaModeInfo ) + { + strcpy(sResult, "#error 1"); + return; + } + + if ((param[0] & 0xffff) > 1) + { + + ulStep = param[1] * 8; + } + else + { + + ulStep = 8; + } + + fRefresh = GetVRefresh(pModeInfo); + fPixelClock = (float)pModeInfo->ulPixClock; + if (pModeInfo->ulHBPorch >= ulStep ) + { + pModeInfo->ulHBPorch -= ulStep; + } + else + { + pModeInfo->ulHBPorch = 0; + } + pModeInfo->ulPixClock = (ULONG)( (fRefresh * fPixelClock) / GetVRefresh(pModeInfo)); + MGASetMode(pMga->pBoard, pModeInfo); + + MGAFillDisplayModeStruct(pMode, pModeInfo); + + GetVideoParameterStr(pModeInfo, sResult); +} + + +static void EscHSmaller(ScrnInfoPtr pScrn, unsigned long *param, char *sResult, DisplayModePtr pMode) +{ + MGAPtr pMga = MGAPTR(pScrn); + LPMGAMODEINFO pModeInfo; + float fRefresh, fPixelClock; + ULONG ulStep; + + pModeInfo = GetModeInfoPtr(param[0] >> 16); + + if ( !pMgaModeInfo ) + { + strcpy(sResult, "#error 1"); + return; + } + + if ((param[0] & 0xffff) > 1) + { + + ulStep = param[1] * 8; + } + else + { + + ulStep = 8; + } + + + fRefresh = GetVRefresh(pModeInfo); + fPixelClock = (float)pModeInfo->ulPixClock; + pModeInfo->ulHBPorch += ulStep; + pModeInfo->ulPixClock = (ULONG)( (fRefresh * fPixelClock) / GetVRefresh(pModeInfo)); + + MGASetMode(pMga->pBoard, pModeInfo); + + MGAFillDisplayModeStruct(pMode, pModeInfo); + + GetVideoParameterStr(pModeInfo, sResult); +} + +static void EscVTaller(ScrnInfoPtr pScrn, unsigned long *param, char *sResult, DisplayModePtr pMode) +{ + MGAPtr pMga = MGAPTR(pScrn); + LPMGAMODEINFO pModeInfo; + float fRefresh, fPixelClock; + ULONG ulStep; + + pModeInfo = GetModeInfoPtr(param[0] >> 16); + + if ( !pMgaModeInfo ) + { + strcpy(sResult, "#error 1"); + return; + } + + if ((param[0] & 0xffff) > 1) + { + + ulStep = param[1]; + } + else + { + + ulStep = 1; + } + + fRefresh = GetVRefresh(pModeInfo); + fPixelClock = (float)pModeInfo->ulPixClock; + + if (pModeInfo->ulVBPorch >= ulStep ) + { + pModeInfo->ulVBPorch -= ulStep; + } + else + { + pModeInfo->ulVBPorch = 0; + } + + pModeInfo->ulPixClock = (ULONG)( (fRefresh * fPixelClock) / GetVRefresh(pModeInfo)); + MGASetMode(pMga->pBoard, pModeInfo); + + MGAFillDisplayModeStruct(pMode, pModeInfo); + + GetVideoParameterStr(pModeInfo, sResult); +} + +static void EscVSmaller(ScrnInfoPtr pScrn, unsigned long *param, char *sResult, DisplayModePtr pMode) +{ + MGAPtr pMga = MGAPTR(pScrn); + LPMGAMODEINFO pModeInfo; + float fRefresh, fPixelClock; + ULONG ulStep; + + pModeInfo = GetModeInfoPtr(param[0] >> 16); + + if ( !pMgaModeInfo ) + { + strcpy(sResult, "#error 1"); + return; + } + + if ((param[0] & 0xffff) > 1) + { + + ulStep = param[1]; + } + else + { + + ulStep = 1; + } + + + fRefresh = GetVRefresh(pModeInfo); + fPixelClock = (float)pModeInfo->ulPixClock; + pModeInfo->ulVFPorch += ulStep; + pModeInfo->ulPixClock = (ULONG)( (fRefresh * fPixelClock) / GetVRefresh(pModeInfo)); + MGASetMode(pMga->pBoard, pModeInfo); + + MGAFillDisplayModeStruct(pMode, pModeInfo); + + GetVideoParameterStr(pModeInfo, sResult); +} + + +static void EscRefresh(ScrnInfoPtr pScrn, unsigned long *param, char *sResult, DisplayModePtr pMode) +{ + MGAPtr pMga = MGAPTR(pScrn); + LPMGAMODEINFO pModeInfo; + float fRefresh, fPixelClock; + + pModeInfo = GetModeInfoPtr(param[0] >> 16); + + if ( !pMgaModeInfo ) + { + strcpy(sResult, "#error 1"); + return; + } + + if ((param[0] & 0xffff) < 2) + { + strcpy(sResult, "#error 1"); + return; + } + + fRefresh = GetVRefresh(pModeInfo); + + fPixelClock = (float)pModeInfo->ulPixClock; + pModeInfo->ulPixClock = (ULONG)( ((float)param[1] * fPixelClock) / fRefresh); + + pModeInfo->ulRefreshRate = param[1]; + + MGASetMode(pMga->pBoard, pModeInfo); + + MGAFillDisplayModeStruct(pMode, pModeInfo); + + GetVideoParameterStr(pModeInfo, sResult); +} + +static void EscRestoreVidParm(ScrnInfoPtr pScrn, unsigned long *param, char *sResult, DisplayModePtr pMode) +{ + MGAPtr pMga = MGAPTR(pScrn); + + TmpMgaModeInfo[param[0] >> 16].ulDispWidth = 0; + MGASetMode(pMga->pBoard, pMgaModeInfo[param[0] >> 16]); + + MGAFillDisplayModeStruct(pMode, pMgaModeInfo[param[0] >> 16]); + + GetVideoParameterStr(pMgaModeInfo[param[0] >> 16], sResult); +} + +static Bool convertNumber(unsigned long *pulNumber, char *sNumber) +{ + unsigned long i, ulDigit, shiftHex; + Bool bResult = TRUE; + + if (sNumber == NULL) + { + return FALSE; + } + + + /* Convert number */ + if ( (sNumber[0] == '0') && (sNumber[1] == 'x') ) + { + shiftHex = 0; + *pulNumber = 0; + + for (i = strlen(sNumber) - 1; i > 1; i--) + { + if (shiftHex > 28) + { + bResult = FALSE; + break; + } + + if ( !isxdigit(sNumber[i]) ) + { + bResult = FALSE; + break; + } + + ulDigit = toupper(sNumber[i]) - '0'; + if (ulDigit > 9) + { + ulDigit -= 7; + } + *pulNumber += ulDigit << shiftHex; + shiftHex += 4; + } + } + else + { + for (i = 0; i < strlen(sNumber); i++) + { + if ( !isdigit(sNumber[i]) ) + { + bResult = FALSE; + break; + } + } + *pulNumber = atoi(sNumber); + } + + return bResult; +} + +static Bool GetEscCommand(char *cmdline, EscCmdStruct *escCmd) +{ + unsigned long i, paramIndex, ulHI; + Bool bResult; + char *pParameter, *function; + + bResult = TRUE; /* success */ + + function = strtok(cmdline, " \t\n,"); + + + escCmd->parameters[0] = 0; + if (function) + { + /* Find Screen */ + if (function[1] == ':' ) + { + escCmd->parameters[0] = (unsigned long)(function[0] - '0') << 16; + strncpy(escCmd->function, function+2, 32); + } + else + { + strncpy(escCmd->function, function, 32); + } + + } + else + { + strcpy(escCmd->function, "#ERROR -1"); + escCmd->parameters[0] = 0; + return FALSE; + } + + paramIndex = 1; + while ( (pParameter = strtok(NULL, " \t\n,")) != NULL ) + { + if (paramIndex > 31) + { + /* 32 parameters supported */ + break; + } + + i = 0; + while(pParameter[i] && pParameter[i] != ':') + { + i++; + } + + if ( pParameter[i] ) + { + pParameter[i] = '\0'; + bResult = convertNumber(&escCmd->parameters[paramIndex], &pParameter[i+1]); + bResult |= convertNumber(&ulHI, pParameter); + escCmd->parameters[paramIndex] &= 0xffff; + escCmd->parameters[paramIndex] += ulHI << 16; + pParameter[i] = ':'; + } + else + { + bResult = convertNumber(&escCmd->parameters[paramIndex], pParameter); + } + + + if (!bResult) + { + break; + } + paramIndex++; + } + + escCmd->parameters[0] += paramIndex; + return bResult; + +} + +void MGAExecuteEscCmd(ScrnInfoPtr pScrn, char *cmdline , char *sResult, DisplayModePtr pMode) +{ + int i = 0; + int ulScreen = 0; + MGAPtr pMga = MGAPTR(pScrn); + EscCmdStruct EscCmd; + + if (pMga->SecondCrtc) + { + ulScreen = 1; + } + else + { + ulScreen = 0; + } + + + if (FunctionTable[0].function && GetEscCommand(cmdline, &EscCmd) ) + { + i = 0; + + while ( FunctionTable[i].function && strcmp(FunctionTable[i].function, EscCmd.function) ) + { + i++; + } + + if (FunctionTable[i].function) + { + EscCmd.parameters[0] &= 0xffff; + EscCmd.parameters[0] |= ulScreen << 16; + + FunctionTable[i].funcptr(pScrn, EscCmd.parameters, sResult, pMode); + } + else + { + strcpy(sResult, "error# -1"); + } + } + else + { + strcpy(sResult, "error# -1"); + } +} +#else +int mga_foo; +#endif diff --git a/driver/xf86-video-mga/src/mga_exa.c b/driver/xf86-video-mga/src/mga_exa.c new file mode 100644 index 000000000..3242ea884 --- /dev/null +++ b/driver/xf86-video-mga/src/mga_exa.c @@ -0,0 +1,810 @@ +/* + * Copyright 2006 Red Hat, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software") + * to deal in the software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * them Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTIBILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES, OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT, OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Adam Jackson <ajax@nwnk.net> + * Tilman Sauerbeck <tilman@code-monkey.de> + */ + +/* + * Sources: + * - mga kdrive accel by Anders Carlsson + * - mga g400 Render accel by Damien Ciabrini + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include "xf86.h" + +#include "mga.h" +#include "mga_reg.h" +#include "mga_macros.h" + +#include "exa.h" +#ifdef XF86DRI +#include "mga_dri.h" +#endif + +#include "xf86PciInfo.h" + +#if 0 +#define DEBUG_MSG(x) ErrorF x +#else +#define DEBUG_MSG(x) +#endif + +#define PMGA(x) \ + MGAPtr pMga = xf86Screens[x->drawable.pScreen->myNum]->driverPrivate; + +#define QUIESCE_DMA(x) \ + CHECK_DMA_QUIESCENT(pMga, xf86Screens[x->drawable.pScreen->myNum]); + +/* stuff stolen from mga_storm.c */ +#define BLIT_LEFT 1 +#define BLIT_UP 4 + +/* FIXME + * We could use MGADWG_BLK for GXcopy if HaveSDRAM is FALSE. + * That will only work in some situations though (see mga_storm.c + * for details). + */ +static const CARD32 mgaRop[16] = { + /* GXclear */ MGADWG_RPL | 0x00000000, /* 0 */ + /* GXand */ MGADWG_RSTR | 0x00080000, /* src AND dst */ + /* GXandReverse */ MGADWG_RSTR | 0x00040000, /* src AND NOT dst */ + /* GXcopy */ MGADWG_RSTR | 0x000c0000, /* src */ + /* GXandInverted */ MGADWG_RSTR | 0x00020000, /* NOT src AND dst */ + /* GXnoop */ MGADWG_RSTR | 0x000a0000, /* dst */ + /* GXxor */ MGADWG_RSTR | 0x00060000, /* src XOR dst */ + /* GXor */ MGADWG_RSTR | 0x000e0000, /* src OR dst */ + /* GXnor */ MGADWG_RSTR | 0x00010000, /* NOT src AND NOT dst */ + /* GXequiv */ MGADWG_RSTR | 0x00090000, /* NOT src XOR dst */ + /* GXinvert */ MGADWG_RSTR | 0x00050000, /* NOT dst */ + /* GXorReverse */ MGADWG_RSTR | 0x000d0000, /* src OR NOT dst */ + /* GXcopyInverted */ MGADWG_RPL | 0x00030000, /* NOT src */ + /* GXorInverted */ MGADWG_RSTR | 0x000b0000, /* NOT src OR dst */ + /* GXnand */ MGADWG_RSTR | 0x00070000, /* NOT src OR NOT dst */ + /* GXset */ MGADWG_RPL | 0x000f0000 /* 1 */ +}; + +static const struct { + Bool dst_alpha; + Bool src_alpha; + CARD32 blend_cntl; +} mgaBlendOp[] = { + /* Clear */ + {0, 0, MGA_SRC_ZERO | MGA_DST_ZERO}, + /* Src */ + {0, 0, MGA_SRC_ONE | MGA_DST_ZERO}, + /* Dst */ + {0, 0, MGA_SRC_ZERO | MGA_DST_ONE}, + /* Over */ + {0, 1, MGA_SRC_ONE | MGA_DST_ONE_MINUS_SRC_ALPHA}, + /* OverReverse */ + {1, 0, MGA_SRC_ONE_MINUS_DST_ALPHA | MGA_DST_ONE}, + /* In */ + {1, 0, MGA_SRC_DST_ALPHA | MGA_DST_ZERO}, + /* InReverse */ + {0, 1, MGA_SRC_ZERO | MGA_DST_SRC_ALPHA}, + /* Out */ + {1, 0, MGA_SRC_ONE_MINUS_DST_ALPHA | MGA_DST_ZERO}, + /* OutReverse */ + {0, 1, MGA_SRC_ZERO | MGA_DST_ONE_MINUS_SRC_ALPHA}, + /* Atop */ + {1, 1, MGA_SRC_DST_ALPHA | MGA_DST_ONE_MINUS_SRC_ALPHA}, + /* AtopReverse */ + {1, 1, MGA_SRC_ONE_MINUS_DST_ALPHA | MGA_DST_SRC_ALPHA}, + /* Xor */ + {1, 1, MGA_SRC_ONE_MINUS_DST_ALPHA | MGA_DST_ONE_MINUS_SRC_ALPHA}, + /* Add */ + {0, 0, MGA_SRC_ONE | MGA_DST_ONE}, +}; + +static CARD32 +mgaGetPixmapPitch(PixmapPtr pPix) +{ + return exaGetPixmapPitch(pPix) / (pPix->drawable.bitsPerPixel >> 3); +} + +static CARD32 +mgaGetMACCESS(PixmapPtr pixmap, PicturePtr pict) +{ + switch (pixmap->drawable.bitsPerPixel) { + case 8: + return MGAMAC_PW8 | MGAMAC_BYPASS332 | MGAMAC_NODITHER; + case 16: + if (pict && + (pict->format == PICT_x1r5g5b5 || pict->format == PICT_a1r5g5b5)) + return MGAMAC_PW16 | MGAMAC_DIT555; + else + return MGAMAC_PW16; + case 24: + return MGAMAC_PW24; + default: + return MGAMAC_PW32; + } +} + +static Bool +mgaSetup(MGAPtr pMga, PixmapPtr pixmap, PicturePtr pict, int wait) +{ + WAITFIFO(wait + 4); + + /* Set the format of the destination pixmap */ + OUTREG(MGAREG_MACCESS, mgaGetMACCESS(pixmap, pict)); + + OUTREG(MGAREG_CXBNDRY, 0xffff0000); + OUTREG(MGAREG_YTOP, 0x00000000); + OUTREG(MGAREG_YBOT, 0x007fffff); + + return TRUE; +} + +static void +mgaNoopDone(PixmapPtr pPixmap) +{ +} + +static Bool +mgaPrepareSolid(PixmapPtr pPixmap, int alu, Pixel planemask, Pixel fg) +{ + PMGA(pPixmap); + int dwgctl; + + /* FIXME + * Is this needed here? We don't use DMA stuff here... + */ + QUIESCE_DMA(pPixmap); + + /* We must pad planemask and fg depending on the format of the + * destination pixmap + */ + switch (pPixmap->drawable.bitsPerPixel) { + case 8: + fg |= fg << 8; + planemask |= planemask << 8; + /* fall through */ + case 16: + fg |= fg << 16; + planemask |= planemask << 16; + break; + } + + dwgctl = MGADWG_TRAP | MGADWG_SOLID | MGADWG_ARZERO | + MGADWG_SGNZERO | MGADWG_SHIFTZERO | mgaRop[alu]; + + mgaSetup(pMga, pPixmap, NULL, 5); + + OUTREG(MGAREG_PITCH, mgaGetPixmapPitch(pPixmap)); + OUTREG(MGAREG_DSTORG, exaGetPixmapOffset(pPixmap)); + OUTREG(MGAREG_FCOL, fg); + OUTREG(MGAREG_PLNWT, planemask); + OUTREG(MGAREG_DWGCTL, dwgctl); + + return TRUE; +} + +static void +mgaSolid(PixmapPtr pPixmap, int x1, int y1, int x2, int y2) +{ + PMGA(pPixmap); + + WAITFIFO(2); + OUTREG(MGAREG_FXBNDRY, (x2 << 16) | (x1 & 0xffff)); + OUTREG(MGAREG_YDSTLEN | MGAREG_EXEC, (y1 << 16) | (y2 - y1)); +} + +static Bool +mgaPrepareCopy(PixmapPtr pSrc, PixmapPtr pDst, int xdir, int ydir, int alu, + Pixel planemask) +{ + PMGA(pSrc); + int blit_direction = 0; + int dwgctl = 0; + + /* FIXME + * Is this needed here? We don't use DMA stuff here... + */ + QUIESCE_DMA(pSrc); + + DEBUG_MSG(("s: %x@%x d: %x@%x xdir %d ydir %d alu %d pm %d\n", + exaGetPixmapOffset(pSrc), exaGetPixmapPitch(pSrc), + exaGetPixmapOffset(pDst), exaGetPixmapPitch(pDst), + xdir, ydir, alu, planemask)); + + if (xdir < 0) + blit_direction |= BLIT_LEFT; + + if (ydir < 0) + blit_direction |= BLIT_UP; + + pMga->BltScanDirection = blit_direction; + + dwgctl = mgaRop[alu] | MGADWG_SHIFTZERO | MGADWG_BITBLT | MGADWG_BFCOL; + pMga->src_pitch = mgaGetPixmapPitch(pSrc); + + mgaSetup(pMga, pDst, NULL, 7); + OUTREG(MGAREG_PITCH, mgaGetPixmapPitch(pDst)); + OUTREG(MGAREG_SRCORG, exaGetPixmapOffset(pSrc)); + OUTREG(MGAREG_DSTORG, exaGetPixmapOffset(pDst)); + OUTREG(MGAREG_DWGCTL, dwgctl); + OUTREG(MGAREG_SGN, blit_direction); + OUTREG(MGAREG_PLNWT, planemask); + OUTREG(MGAREG_AR5, (ydir < 0 ? -1 : 1) * pMga->src_pitch); + + return TRUE; +} + +static void +mgaCopy(PixmapPtr pDst, int srcx, int srcy, int dstx, int dsty, int w, int h) +{ + PMGA(pDst); + int start, end; + + DEBUG_MSG((" %d,%d -> %d,%d %dx%d\n", srcx, srcy, dstx,dsty, w, h)); + + w--; + + if (pMga->BltScanDirection & BLIT_UP) { + srcy += h - 1; + dsty += h - 1; + } + + start = end = srcy * pMga->src_pitch + srcx; + + if (pMga->BltScanDirection & BLIT_LEFT) + start += w; + else + end += w; + + DEBUG_MSG((" end %d start %d dstx %d dsty %d w %d h %d\n", + end, start, dstx, dsty, w, h)); + + WAITFIFO(4); + OUTREG(MGAREG_AR0, end); + OUTREG(MGAREG_AR3, start); + OUTREG(MGAREG_FXBNDRY, ((dstx + w) << 16) | (dstx & 0xffff)); + OUTREG(MGAREG_YDSTLEN | MGAREG_EXEC, (dsty << 16) | h); +} + +static int +MGA_LOG2(int val) +{ + int ret = 0; + + if (val == 1) + return 0; + + while (val >> ret) + ret++; + + return ((1 << (ret - 1)) == val) ? (ret - 1) : ret; +} + +static CARD32 +mgaGetTexFormat(PicturePtr pPict) +{ + static const struct { + int fmt; + CARD32 card_fmt; + } *ptr, texformats[] = { + { PICT_a8r8g8b8, MGA_TW32 }, + { PICT_x8r8g8b8, MGA_TW32 }, + { PICT_r5g6b5, MGA_TW16 }, + { PICT_a1r5g5b5, MGA_TW15 }, + { PICT_x1r5g5b5, MGA_TW15 }, + { PICT_a4r4g4b4, MGA_TW12 }, + { PICT_x4r4g4b4, MGA_TW12 }, + { PICT_a8, MGA_TW8A }, + { 0, 0} + }; + + for (ptr = texformats; ptr->fmt; ptr++) + if (ptr->fmt == pPict->format) + return ptr->card_fmt; + + return 0; +} + +static Bool +mgaCheckSourceTexture(int tmu, PicturePtr pPict) +{ + int w = pPict->pDrawable->width; + int h = pPict->pDrawable->height; + + if ((w > 2047) || (h > 2047)){ + DEBUG_MSG(("Picture w/h too large (%dx%d)\n", w, h)); + return FALSE; + } + + if (!mgaGetTexFormat(pPict)) { + DEBUG_MSG(("Unsupported picture format 0x%x\n", pPict->format)); + return FALSE; + } + + if (pPict->repeat && ((w & (w - 1)) != 0 || (h & (h - 1)) != 0)) { + DEBUG_MSG(("NPOT repeat unsupported (%dx%d)\n", w, h)); + return FALSE; + } + + if (pPict->filter != PictFilterNearest && + pPict->filter != PictFilterBilinear) { + DEBUG_MSG(("Unsupported filter 0x%x\n", pPict->filter)); + return FALSE; + } + + return TRUE; +} + +static Bool +mgaCheckComposite(int op, PicturePtr pSrcPict, PicturePtr pMaskPict, + PicturePtr pDstPict) +{ + if (op >= sizeof(mgaBlendOp) / sizeof(mgaBlendOp[0])) { + DEBUG_MSG(("unsupported op %x\n", op)); + return FALSE; + } + + if (!mgaCheckSourceTexture(0, pSrcPict)) + return FALSE; + + if (pMaskPict) { + if (!mgaCheckSourceTexture(1, pMaskPict)) + return FALSE; + + if (pMaskPict->componentAlpha) { + DEBUG_MSG(("Component alpha unsupported\n")); + return FALSE; + } + } + + if (PICT_FORMAT_TYPE(pDstPict->format) == PICT_TYPE_ABGR) { + DEBUG_MSG(("render to (A)BGR unsupported\n")); + return FALSE; + } + + /* FIXME + * Doing this operation in hardware is broken atm :/ + */ + if (op == PictOpAdd && pSrcPict->format == PICT_a8 && + pDstPict->format == PICT_a8) + return FALSE; + + return TRUE; +} + +static void +PrepareSourceTexture(int tmu, PicturePtr pSrcPicture, PixmapPtr pSrc) +{ + PMGA(pSrc); + int pitch = mgaGetPixmapPitch(pSrc); + int w = pSrc->drawable.width; + int h = pSrc->drawable.height; + int w_log2 = MGA_LOG2(w); + int h_log2 = MGA_LOG2(h); + + int texctl = MGA_PITCHLIN | ((pitch & (2048 - 1)) << 9) | + MGA_NOPERSPECTIVE | MGA_TAKEY; + int texctl2 = MGA_G400_TC2_MAGIC | MGA_TC2_CKSTRANSDIS; + int texfilter = MGA_FILTERALPHA | (0x10 << 21); + + texctl |= mgaGetTexFormat(pSrcPicture); + + if (pSrcPicture->filter == PictFilterBilinear) + texfilter |= MGA_MAG_BILIN | MGA_MIN_BILIN; + else + texfilter |= MGA_MAG_NRST | MGA_MIN_NRST; + + if (!pSrcPicture->repeat) + texctl |= MGA_CLAMPUV; + + if (tmu == 1) + texctl2 |= MGA_TC2_DUALTEX | MGA_TC2_SELECT_TMU1; + + WAITFIFO(6); + OUTREG(MGAREG_TEXCTL2, texctl2); + OUTREG(MGAREG_TEXCTL, texctl); + + /* Source (texture) address + pitch */ + OUTREG(MGAREG_TEXORG, exaGetPixmapOffset(pSrc)); + OUTREG(MGAREG_TEXWIDTH, (w - 1) << 18 | ((8 - w_log2) & 63) << 9 | w_log2); + OUTREG(MGAREG_TEXHEIGHT, (h - 1) << 18 | ((8 - h_log2) & 63) << 9 | h_log2); + + /* Set blit filtering flags */ + OUTREG(MGAREG_TEXFILTER, texfilter); + + if (tmu == 1) { + WAITFIFO(1); + OUTREG(MGAREG_TEXCTL2, texctl2 & ~MGA_TC2_SELECT_TMU1); + } +} + +/* + * The formals params are the elements of the following matrix: + * + * Dest Transform Src + * coords coords + * / Xdst \ / X_incx X_incy X_init \ / Xsrc \ + * | Ydst | = | Y_incx Y_incy Y_init | x | Ysrc | + * \ 1 / \ H_incx H_incy H_init / \ 1 / + * + * matrix elements are 32bits fixed points (16.16) + * mga_fx_* is the size of the fixed point for the TMU + */ +static void +setTMIncrementsRegs(PixmapPtr pPix, int X_incx, int X_incy, int X_init, + int Y_incx, int Y_incy, int Y_init, + int H_incx, int H_incy, int H_init, + int mga_fx_width_size, int mga_fx_height_size) +{ + PMGA(pPix); + + int decalw = mga_fx_width_size - 16; + int decalh = mga_fx_height_size - 16; + + /* Convert 16 bits fixpoint -> MGA variable size fixpoint */ + if (decalw >= 0) { + X_incx <<= decalw; + X_incy <<= decalw; + X_init <<= decalw; + } else { + decalw = -decalw; + X_incx >>= decalw; + X_incy >>= decalw; + X_init >>= decalw; + } + + /* Convert 16 bits fixpoint -> MGA variable size fixpoint */ + if (decalh >= 0) { + Y_incx <<= decalh; + Y_incy <<= decalh; + Y_init <<= decalh; + } else { + decalh = -decalh; + Y_incx >>= decalh; + Y_incy >>= decalh; + Y_init >>= decalh; + } + + /* Set TM registers */ + WAITFIFO(9); + OUTREG(MGAREG_TMR0, X_incx); + OUTREG(MGAREG_TMR1, Y_incx); + OUTREG(MGAREG_TMR2, X_incy); + OUTREG(MGAREG_TMR3, Y_incy); + OUTREG(MGAREG_TMR4, H_incx); + OUTREG(MGAREG_TMR5, H_incy); + OUTREG(MGAREG_TMR6, X_init); + OUTREG(MGAREG_TMR7, Y_init); + OUTREG(MGAREG_TMR8, H_init); +} + +/* XXX these look like magic */ +#define C_ARG1_CUR 0x0 +#define C_ARG1_ALPHA MGA_TDS_COLOR_ARG1_REPLICATEALPHA +#define C_ARG2_DIFFUSE MGA_TDS_COLOR_ARG2_DIFFUSE +#define C_ARG2_FCOL MGA_TDS_COLOR_ARG2_FCOL +#define C_ARG2_PREV MGA_TDS_COLOR_ARG2_PREVSTAGE +#define C_ARG1_INV MGA_TDS_COLOR_ARG1_INV +#define C_ARG2_INV MGA_TDS_COLOR_ARG2_INV +#define COLOR_MUL MGA_TDS_COLOR_SEL_MUL +#define COLOR_ARG1 MGA_TDS_COLOR_SEL_ARG1 +#define COLOR_ARG2 MGA_TDS_COLOR_SEL_ARG2 +#define A_ARG1_CUR 0x0 +#define A_ARG2_IGN A_ARG2_DIFFUSE +#define A_ARG2_FCOL MGA_TDS_ALPHA_ARG2_FCOL +#define A_ARG2_DIFFUSE MGA_TDS_ALPHA_ARG2_DIFFUSE +#define A_ARG2_PREV MGA_TDS_ALPHA_ARG2_PREVSTAGE +#define ALPHA_MUL MGA_TDS_ALPHA_SEL_MUL +#define ALPHA_ARG1 MGA_TDS_ALPHA_SEL_ARG1 +#define ALPHA_ARG2 MGA_TDS_ALPHA_SEL_ARG2 + +static Bool +mgaPrepareComposite(int op, PicturePtr pSrcPict, PicturePtr pMaskPict, + PicturePtr pDstPict, PixmapPtr pSrc, PixmapPtr pMask, + PixmapPtr pDst) +{ + PMGA(pDst); + CARD32 fcol = 0xff000000, ds0 = 0, ds1 = 0, cmd, blendcntl; + + mgaSetup(pMga, pDst, pDstPict, 2); + OUTREG(MGAREG_DSTORG, exaGetPixmapOffset(pDst)); + OUTREG(MGAREG_PITCH, mgaGetPixmapPitch(pDst)); + + PrepareSourceTexture(0, pSrcPict, pSrc); + + if (pMask) + PrepareSourceTexture(1, pMaskPict, pMask); + else + PrepareSourceTexture(1, pSrcPict, pSrc); + + /* For A8 writes, the desired alpha value needs to be replicated + * to the color channels - if the source texture doesn't have an + * alpha channel, set it to 0xff instead. + * Otherwise, use the color channels if available, or set them + * to black. + */ + if (pDstPict->format == PICT_a8 && !PICT_FORMAT_A(pSrcPict->format)) { + fcol = 0xffffffff; + ds0 |= C_ARG2_FCOL | COLOR_ARG2; /* C = 0xff */ + } else if (pDstPict->format == PICT_a8) + ds0 |= C_ARG1_ALPHA | COLOR_ARG1; /* C = As */ + else if (pSrcPict->format == PICT_a8) + ds0 |= C_ARG2_FCOL | COLOR_ARG2; /* C = 0 */ + else + ds0 |= C_ARG1_CUR | COLOR_ARG1; /* C = Cs */ + + /* If the source texture has an alpha channel, use it. + * Otherwise, set the alpha channel to 0xff (see FCOL setting above). + */ + if (PICT_FORMAT_A(pSrcPict->format)) + ds0 |= A_ARG1_CUR | ALPHA_ARG1; /* A = As */ + else + ds0 |= A_ARG2_FCOL | ALPHA_ARG2; /* A = 0xff */ + + if (!pMask) + ds1 = ds0; + else { + /* As or Am might be NULL. in this case we don't multiply because, + * the alpha component holds garbage. + */ + if (!PICT_FORMAT_A(pMaskPict->format)) + ds1 |= C_ARG2_PREV | COLOR_ARG2; /* C = Cs */ + else + ds1 |= C_ARG1_ALPHA | C_ARG2_PREV | COLOR_MUL; /* C = Am * Cs */ + + if (!PICT_FORMAT_A(pMaskPict->format)) + ds1 |= A_ARG2_PREV | ALPHA_ARG2; /* A = As */ + else if (!PICT_FORMAT_A(pSrcPict->format)) + ds1 |= A_ARG1_CUR | ALPHA_ARG1; /* A = Am */ + else + ds1 |= A_ARG1_CUR | A_ARG2_PREV | ALPHA_MUL; /* A = Am * As */ + } + + cmd = MGADWG_TEXTURE_TRAP | MGADWG_I | 0x000c0000 | + MGADWG_SHIFTZERO | MGADWG_SGNZERO | MGADWG_ARZERO; + blendcntl = mgaBlendOp[op].blend_cntl; + + if (!PICT_FORMAT_A(pDstPict->format) && mgaBlendOp[op].dst_alpha) { + int sblend = blendcntl & MGA_SRC_BLEND_MASK; + + if (sblend == MGA_SRC_DST_ALPHA) + blendcntl = (blendcntl & ~MGA_SRC_BLEND_MASK) | MGA_SRC_ONE; + else if (sblend == MGA_SRC_ONE_MINUS_DST_ALPHA) + blendcntl = (blendcntl & ~MGA_SRC_BLEND_MASK) | MGA_SRC_ZERO; + } + + if (!PICT_FORMAT_A(pSrcPict->format) && mgaBlendOp[op].src_alpha) { + int dblend = blendcntl & MGA_DST_BLEND_MASK; + + if (dblend == MGA_DST_SRC_ALPHA) + blendcntl = (blendcntl & ~MGA_DST_BLEND_MASK) | MGA_DST_ONE; + else if (dblend == MGA_DST_ONE_MINUS_SRC_ALPHA) + blendcntl = (blendcntl & ~MGA_DST_BLEND_MASK) | MGA_DST_ZERO; + } + + WAITFIFO(5); + OUTREG(MGAREG_FCOL, fcol); + OUTREG(MGAREG_TDUALSTAGE0, ds0); + OUTREG(MGAREG_TDUALSTAGE1, ds1); + OUTREG(MGAREG_DWGCTL, cmd); + OUTREG(MGAREG_ALPHACTRL, MGA_ALPHACHANNEL | blendcntl); + + pMga->currentSrcPicture = pSrcPict; + pMga->currentMaskPicture = pMaskPict; + pMga->currentSrc = pSrc; + pMga->currentMask = pMask; + + pMga->src_w2 = MGA_LOG2 (pSrc->drawable.width); + pMga->src_h2 = MGA_LOG2 (pSrc->drawable.height); + + if (pMask) { + pMga->mask_w2 = MGA_LOG2 (pMask->drawable.width); + pMga->mask_h2 = MGA_LOG2 (pMask->drawable.height); + } + + return TRUE; +} + +static void +mgaComposite(PixmapPtr pDst, int srcx, int srcy, int maskx, int masky, + int dstx, int dsty, int w, int h) +{ + PMGA(pDst); + PictTransformPtr t; + int texctl2; + + srcx %= pMga->currentSrc->drawable.width; + srcy %= pMga->currentSrc->drawable.height; + + if (pMga->currentMask) { + maskx %= pMga->currentMask->drawable.width; + masky %= pMga->currentMask->drawable.height; + } + + t = pMga->currentSrcPicture->transform; + + if (t) + setTMIncrementsRegs(pMga->currentSrc, + t->matrix[0][0], + t->matrix[0][1], + t->matrix[0][2] + (srcx << 16), + t->matrix[1][0], + t->matrix[1][1], + t->matrix[1][2] + (srcy << 16), + t->matrix[2][0], + t->matrix[2][1], + t->matrix[2][2], + 20 - pMga->src_w2, + 20 - pMga->src_h2); + else + setTMIncrementsRegs(pMga->currentSrc, + 1 << 16, 0, srcx << 16, + 0, 1 << 16, srcy << 16, + 0, 0, 1 << 16, + 20 - pMga->src_w2, + 20 - pMga->src_h2); + + if (pMga->currentMask) { + texctl2 = MGA_G400_TC2_MAGIC | MGA_TC2_CKSTRANSDIS | MGA_TC2_DUALTEX; + + WAITFIFO(1); + OUTREG(MGAREG_TEXCTL2, texctl2 | MGA_TC2_SELECT_TMU1); + + t = pMga->currentMaskPicture->transform; + + if (t) + setTMIncrementsRegs(pMga->currentMask, + t->matrix[0][0], + t->matrix[0][1], + t->matrix[0][2] + (maskx << 16), + t->matrix[1][0], + t->matrix[1][1], + t->matrix[1][2] + (masky << 16), + t->matrix[2][0], + t->matrix[2][1], + t->matrix[2][2], + 20 - pMga->mask_w2, + 20 - pMga->mask_h2); + else + setTMIncrementsRegs(pMga->currentMask, + 1 << 16, 0, maskx << 16, + 0, 1 << 16, masky << 16, + 0, 0, 1 << 16, + 20 - pMga->mask_w2, + 20 - pMga->mask_h2); + + WAITFIFO(1); + OUTREG(MGAREG_TEXCTL2, texctl2 & ~MGA_TC2_SELECT_TMU1); + } + + WAITFIFO(2); + OUTREG(MGAREG_FXBNDRY, ((dstx + w) << 16) | (dstx & 0xffff)); + OUTREG(MGAREG_YDSTLEN | MGAREG_EXEC, (dsty << 16) | (h & 0xffff)); +} + +static Bool +mgaUploadToScreen(PixmapPtr pDst, int x, int y, int w, int h, + char *src, int src_pitch) +{ + PMGA(pDst); + int bytes_padded = ((pDst->drawable.bitsPerPixel * w + 31) / 32) * 4; + + QUIESCE_DMA(pDst); + + mgaSetup(pMga, pDst, NULL, 10); + + OUTREG(MGAREG_OPMODE, MGAOPM_DMA_BLIT); + OUTREG(MGAREG_DSTORG, exaGetPixmapOffset(pDst)); + OUTREG(MGAREG_PITCH, mgaGetPixmapPitch(pDst)); + OUTREG(MGAREG_PLNWT, 0xffffffff); + OUTREG(MGAREG_DWGCTL, MGADWG_ILOAD | MGADWG_BFCOL | + MGADWG_SGNZERO | MGADWG_SHIFTZERO | + MGADWG_RSTR | 0x000c0000); + OUTREG(MGAREG_AR0, w - 1); + OUTREG(MGAREG_AR3, 0); + OUTREG(MGAREG_AR5, 0); + OUTREG(MGAREG_FXBNDRY, ((x + w - 1) << 16) | (x & 0xffff)); + OUTREG(MGAREG_YDSTLEN | MGAREG_EXEC, (y << 16) | (h & 0xffff)); + + while (h--) { + memcpy (pMga->ILOADBase, src, bytes_padded); + src += src_pitch; + } + + return TRUE; +} + +static void +mgaWaitMarker(ScreenPtr pScreen, int marker) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + MGAPtr pMga = pScrn->driverPrivate; + + WAITFIFO(1); + + OUTREG(MGAREG_CACHEFLUSH, 0); + + /* wait until the "drawing engine busy" bit is unset */ + while (INREG (MGAREG_Status) & 0x10000); +} + +Bool +mgaExaInit(ScreenPtr pScreen) +{ + ExaDriverPtr pExa; + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + MGAPtr pMga = pScrn->driverPrivate; + + pExa = exaDriverAlloc(); + if (!pExa) { + pMga->NoAccel = TRUE; + return FALSE; + } + + pMga->ExaDriver = pExa; + + pExa->exa_major = EXA_VERSION_MAJOR; + pExa->exa_minor = EXA_VERSION_MINOR; + + pExa->flags = EXA_OFFSCREEN_PIXMAPS | EXA_OFFSCREEN_ALIGN_POT; + pExa->memoryBase = pMga->FbStart; + pExa->memorySize = pMga->FbUsableSize - 4096; + pExa->offScreenBase = (pScrn->virtualX * pScrn->virtualY * + pScrn->bitsPerPixel / 8) + 4096; + + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "X %d Y %d bpp %d\n", + pScrn->virtualX, pScrn->virtualY, pScrn->bitsPerPixel); + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Start at %p, size %x, osb %x\n", + pExa->memoryBase, pExa->memorySize, pExa->offScreenBase); + + /* In PW24 mode, we need to align to "3 64-bytes" */ + pExa->pixmapOffsetAlign = 192; + + /* Pitch alignment is in sets of 32 pixels, and we need to cover + * 32bpp, so it's 128 bytes. + */ + pExa->pixmapPitchAlign = 128; + + pExa->maxX = 2048; + pExa->maxY = 2048; + + pExa->WaitMarker = mgaWaitMarker; + pExa->PrepareSolid = mgaPrepareSolid; + pExa->Solid = mgaSolid; + pExa->DoneSolid = mgaNoopDone; + pExa->PrepareCopy = mgaPrepareCopy; + pExa->Copy = mgaCopy; + pExa->DoneCopy = mgaNoopDone; + + if (pMga->Chipset == PCI_CHIP_MGAG400) { + pExa->CheckComposite = mgaCheckComposite; + pExa->PrepareComposite = mgaPrepareComposite; + pExa->Composite = mgaComposite; + pExa->DoneComposite = mgaNoopDone; + } + + pExa->UploadToScreen = mgaUploadToScreen; + + return exaDriverInit(pScreen, pExa); +} diff --git a/driver/xf86-video-mga/src/mga_g450pll.c b/driver/xf86-video-mga/src/mga_g450pll.c new file mode 100644 index 000000000..69f049746 --- /dev/null +++ b/driver/xf86-video-mga/src/mga_g450pll.c @@ -0,0 +1,518 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_g450pll.c,v 1.8tsi Exp $ */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +/* All drivers should typically include these */ +#include "xf86.h" +#include "xf86_OSproc.h" + +/* Drivers for PCI hardware need this */ +#include "xf86PciInfo.h" + +/* Drivers that need to access the PCI config space directly need this */ +#include "xf86Pci.h" + +#include "mga_reg.h" +#include "mga.h" + +#define MNP_TABLE_SIZE 64 +#define CLKSEL_MGA 0x0c +#define PLLLOCK 0x40 + +static CARD32 G450ApplyPFactor(ScrnInfoPtr pScrn, CARD8 ucP, CARD32 *pulFIn) +{ + if(!(ucP & 0x40)) + { + *pulFIn = *pulFIn / (2L << (ucP & 3)); + } + + return TRUE; +} + + +static CARD32 G450RemovePFactor(ScrnInfoPtr pScrn, CARD8 ucP, CARD32 *pulFIn) +{ + if(!(ucP & 0x40)) + { + *pulFIn = *pulFIn * (2L << (ucP & 3)); + } + + return TRUE; +} + + +static CARD32 G450CalculVCO(ScrnInfoPtr pScrn, CARD32 ulMNP, CARD32 *pulF) +{ + CARD8 ucM, ucN; + + ucM = (CARD8)((ulMNP >> 16) & 0xff); + ucN = (CARD8)((ulMNP >> 8) & 0xff); + + *pulF = (27000 * (2 * (ucN + 2)) + ((ucM + 1) >> 1)) / (ucM + 1); + + return TRUE; +} + + +static CARD32 G450CalculDeltaFreq(ScrnInfoPtr pScrn, CARD32 ulF1, + CARD32 ulF2, CARD32 *pulDelta) +{ + if(ulF2 < ulF1) + { + *pulDelta = ((ulF1 - ulF2) * 1000) / ulF1; + } + else + { + *pulDelta = ((ulF2 - ulF1) * 1000) / ulF1; + } + + return TRUE; +} + + + + +static CARD32 G450FindNextPLLParam(ScrnInfoPtr pScrn, CARD32 ulFout, + CARD32 *pulPLLMNP) +{ + CARD8 ucM, ucN, ucP, ucS; + CARD32 ulVCO, ulVCOMin; + + ucM = (CARD8)((*pulPLLMNP >> 16) & 0xff); + ucN = (CARD8)((*pulPLLMNP >> 8) & 0xff); + ucP = (CARD8)(*pulPLLMNP & 0x43); + + ulVCOMin = 256000; + + if(ulVCOMin >= (255L * 8000)) + { + ulVCOMin = 230000; + } + + if((ucM == 9) && (ucP & 0x40)) + { + *pulPLLMNP = 0xffffffff; + } else if (ucM == 9) + { + if(ucP) + { + ucP--; + } + else + { + ucP = 0x40; + } + ucM = 0; + } + else + { + ucM++; + } + + ulVCO = ulFout; + + G450RemovePFactor(pScrn, ucP, &ulVCO); + + if(ulVCO < ulVCOMin) + { + *pulPLLMNP = 0xffffffff; + } + + if(*pulPLLMNP != 0xffffffff) + { + ucN = (CARD8)(((ulVCO * (ucM+1) + 27000)/(27000 * 2)) - 2); + + ucS = 5; + if(ulVCO < 1300000) ucS = 4; + if(ulVCO < 1100000) ucS = 3; + if(ulVCO < 900000) ucS = 2; + if(ulVCO < 700000) ucS = 1; + if(ulVCO < 550000) ucS = 0; + + ucP |= (CARD8)(ucS << 3); + + *pulPLLMNP &= 0xff000000; + *pulPLLMNP |= (CARD32)ucM << 16; + *pulPLLMNP |= (CARD32)ucN << 8; + *pulPLLMNP |= (CARD32)ucP; + +#ifdef DEBUG + ErrorF("FINS_S: VCO = %d, S = %02X, *pulPLLMNP = %08X\n", ulVCO, (ULONG)ucS, *pulPLLMNP); +#endif + } + + return TRUE; +} + + +static CARD32 G450FindFirstPLLParam(ScrnInfoPtr pScrn, CARD32 ulFout, + CARD32 *pulPLLMNP) +{ + CARD8 ucP; + CARD32 ulVCO; + CARD32 ulVCOMax; + + /* Default value */ + ulVCOMax = 1300000; + + if(ulFout > (ulVCOMax/2)) + { + ucP = 0x40; + ulVCO = ulFout; + } + else + { + ucP = 3; + ulVCO = ulFout; + G450RemovePFactor(pScrn, ucP, &ulVCO); + while(ucP && (ulVCO > ulVCOMax)) + { + ucP--; + ulVCO = ulFout; + G450RemovePFactor(pScrn, ucP, &ulVCO); + } + } + + if(ulVCO > ulVCOMax) + { + *pulPLLMNP = 0xffffffff; + } + else + { + /* Pixel clock: 1 */ + *pulPLLMNP = (1 << 24) + 0xff0000 + ucP; + G450FindNextPLLParam(pScrn, ulFout, pulPLLMNP); + } + + return TRUE; + +} + + +static CARD32 G450WriteMNP(ScrnInfoPtr pScrn, CARD32 ulMNP) +{ + MGAPtr pMga = MGAPTR(pScrn); + + if (!pMga->SecondCrtc) { + outMGAdac(MGA1064_PIX_PLLC_M, (CARD8)(ulMNP >> 16)); + outMGAdac(MGA1064_PIX_PLLC_N, (CARD8)(ulMNP >> 8)); + outMGAdac(MGA1064_PIX_PLLC_P, (CARD8) ulMNP); + } else { + outMGAdac(MGA1064_VID_PLL_M, (CARD8)(ulMNP >> 16)); + outMGAdac(MGA1064_VID_PLL_N, (CARD8)(ulMNP >> 8)); + outMGAdac(MGA1064_VID_PLL_P, (CARD8) ulMNP); + } + return TRUE; +} + +static CARD32 G450ReadMNP(ScrnInfoPtr pScrn) +{ + MGAPtr pMga = MGAPTR(pScrn); + CARD32 ret = 0; + + if (!pMga->SecondCrtc) { + ret = (CARD8)inMGAdac(MGA1064_PIX_PLLC_M) << 16; + ret |= (CARD8)inMGAdac(MGA1064_PIX_PLLC_N) << 8; + ret |= (CARD8)inMGAdac(MGA1064_PIX_PLLC_P); + } else { + ret = (CARD8)inMGAdac(MGA1064_VID_PLL_M) << 16; + ret |= (CARD8)inMGAdac(MGA1064_VID_PLL_N) << 8; + ret |= (CARD8)inMGAdac(MGA1064_VID_PLL_P); + } + return ret; +} + + +static CARD32 G450CompareMNP(ScrnInfoPtr pScrn, CARD32 ulFout, CARD32 ulMNP1, + CARD32 ulMNP2, long *pulResult) +{ + CARD32 ulFreq, ulDelta1, ulDelta2; + + G450CalculVCO(pScrn, ulMNP1, &ulFreq); + G450ApplyPFactor(pScrn, (CARD8) ulMNP1, &ulFreq); + G450CalculDeltaFreq(pScrn, ulFout, ulFreq, &ulDelta1); + + G450CalculVCO(pScrn, ulMNP2, &ulFreq); + G450ApplyPFactor(pScrn, (CARD8) ulMNP2, &ulFreq); + G450CalculDeltaFreq(pScrn, ulFout, ulFreq, &ulDelta2); + + if(ulDelta1 < ulDelta2) + { + *pulResult = -1; + } + else if(ulDelta1 > ulDelta2) + { + *pulResult = 1; + } + else + { + *pulResult = 0; + } + + if((ulDelta1 <= 5) && (ulDelta2 <= 5)) + { + if((ulMNP1 & 0xff0000) < (ulMNP2 & 0xff0000)) + { + *pulResult = -1; + } + else if((ulMNP1 & 0xff0000) > (ulMNP2 & 0xff0000)) + { + *pulResult = 1; + } + } + + return TRUE; +} + + +static CARD32 G450IsPllLocked(ScrnInfoPtr pScrn, Bool *lpbLocked) +{ + CARD32 ulFallBackCounter, ulLockCount, ulCount; + CARD8 ucPLLStatus; + + MGAPtr pMga = MGAPTR(pScrn); + + /* Pixel PLL */ + if (!pMga->SecondCrtc) + OUTREG8(0x3c00, 0x4f); /* Pixel PLL */ + else + OUTREG8(0x3c00, 0x8c); /* Video PLL */ + + ulFallBackCounter = 0; + + do + { + ucPLLStatus = INREG8(0x3c0a); + ulFallBackCounter++; + } while(!(ucPLLStatus & PLLLOCK) && (ulFallBackCounter < 1000)); + + ulLockCount = 0; + if(ulFallBackCounter < 1000) + { + for(ulCount = 0; ulCount < 100; ulCount++) + { + ucPLLStatus = INREG8(0x3c0a); + if(ucPLLStatus & PLLLOCK) + { + ulLockCount++; + } + } + } + + *lpbLocked = ulLockCount >= 90; + + return TRUE; +} + + +double MGAG450SetPLLFreq(ScrnInfoPtr pScrn, long f_out) +{ + Bool bFoundValidPLL; + Bool bLocked; + CARD8 ucMisc, ucSIndex, ucSTable[4]; + CARD32 ulMaxIndex; + CARD32 ulMNP; + CARD32 ulMNPTable[MNP_TABLE_SIZE]; + CARD32 ulIndex; + CARD32 ulTryMNP; + long lCompareResult; + MGAPtr pMga = MGAPTR(pScrn); + +#ifdef DEBUG + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Restoring PLLClk = %d\n",f_out); +#endif + G450FindFirstPLLParam(pScrn, f_out, &ulMNP); + ulMNPTable[0] = ulMNP; + G450FindNextPLLParam(pScrn, f_out, &ulMNP); + ulMaxIndex = 1; + while(ulMNP != 0xffffffff) + { + int ulIndex; + Bool bSkipValue; + + bSkipValue = FALSE; + if(ulMaxIndex == MNP_TABLE_SIZE) + { + G450CompareMNP(pScrn, f_out, ulMNP, ulMNPTable[MNP_TABLE_SIZE - 1], + &lCompareResult); + + if(lCompareResult > 0) + { + bSkipValue = TRUE; + } + else + { + ulMaxIndex--; + } + } + + if(!bSkipValue) + { + for(ulIndex = ulMaxIndex; !bSkipValue && (ulIndex > 0); ulIndex--) + { + G450CompareMNP(pScrn, f_out, ulMNP, ulMNPTable[ulIndex - 1], + &lCompareResult); + + if(lCompareResult < 0) + { + ulMNPTable[ulIndex] = ulMNPTable[ulIndex - 1]; + } + else + { + break; + } + } + ulMNPTable[ulIndex] = ulMNP; + ulMaxIndex++; + } + + G450FindNextPLLParam(pScrn, f_out, &ulMNP); + } + + bFoundValidPLL = FALSE; + ulMNP = 0; + + /* For pixel pll */ + if (!pMga->SecondCrtc) { + ucMisc = INREG8(0x1FCC); + OUTREG8(0x1fc2, (CARD8)(ucMisc | CLKSEL_MGA)); + } + + for(ulIndex = 0; !bFoundValidPLL && (ulIndex < ulMaxIndex); ulIndex++) + { + ulTryMNP = ulMNPTable[ulIndex]; + + ucSTable[3] = 0xff; + ucSTable[2] = 0xff; + ucSTable[0] = (CARD8) (ulTryMNP & 0x38); + + if (ucSTable[0] != 0) { + ucSTable[1] = ucSTable[0] - 8; + if (ucSTable[0] != 0x38) { + ucSTable[2] = ucSTable[0] + 8; + } + } else { + ucSTable[1] = 8; + } + + for(ucSIndex = 0; !bFoundValidPLL && (ucSTable[ucSIndex] != 0xff); + ucSIndex++) { + ulTryMNP &= 0xffffffc7; + ulTryMNP |= (CARD32)ucSTable[ucSIndex]; + + bLocked = TRUE; + if((ulMNPTable[ulIndex] & 0xff00) < 0x300 || + (ulMNPTable[ulIndex] & 0xff00) > 0x7a00) + { + bLocked = FALSE; + } + + if(bLocked) + { + G450WriteMNP(pScrn, ulTryMNP - 0x300); + G450IsPllLocked(pScrn, &bLocked); + } + + if(bLocked) + { + G450WriteMNP(pScrn, ulTryMNP + 0x300); + G450IsPllLocked(pScrn, &bLocked); + } + + if(bLocked) + { + G450WriteMNP(pScrn, ulTryMNP - 0x200); + G450IsPllLocked(pScrn, &bLocked); + } + + if(bLocked) + { + G450WriteMNP(pScrn, ulTryMNP + 0x200); + G450IsPllLocked(pScrn, &bLocked); + } + + if(bLocked) + { + G450WriteMNP(pScrn, ulTryMNP - 0x100); + G450IsPllLocked(pScrn, &bLocked); + } + + if(bLocked) + { + G450WriteMNP(pScrn, ulTryMNP + 0x100); + G450IsPllLocked(pScrn, &bLocked); + } + + if(bLocked) + { + G450WriteMNP(pScrn, ulTryMNP); + G450IsPllLocked(pScrn, &bLocked); + } + else if(!ulMNP) + { + G450WriteMNP(pScrn, ulTryMNP); + G450IsPllLocked(pScrn, &bLocked); + if(bLocked) + { + ulMNP = ulMNPTable[ulIndex]; + } + bLocked = FALSE; + } + + if(bLocked) + { + bFoundValidPLL = TRUE; + } + } + } + + if(!bFoundValidPLL) + { + if(ulMNP) + { + G450WriteMNP(pScrn, ulMNP); + } + else + { + G450WriteMNP(pScrn, ulMNPTable[0]); + } + } + + return TRUE; +} + +long +MGAG450SavePLLFreq(ScrnInfoPtr pScrn) +{ + CARD32 ulMNP = G450ReadMNP(pScrn); + CARD8 ucP; + CARD32 freq; + + G450CalculVCO(pScrn, ulMNP, &freq); + ucP = (CARD8)(ulMNP & 0x03); + G450ApplyPFactor(pScrn, ucP, &freq); + +#ifdef DEBUG + xf86DrvMsg(pScrn->scrnIndex,X_INFO,"Saved PLLClk = %d\n",freq); +#endif + return freq; +} + +#ifdef DEBUG +void +MGAG450PrintPLL(ScrnInfoPtr pScrn) +{ + CARD32 ulMNP = G450ReadMNP(pScrn); + CARD8 ucP; + CARD32 freq; + + G450CalculVCO(pScrn, ulMNP, &freq); + ucP = (CARD8)(ulMNP & 0x03); + G450ApplyPFactor(pScrn, ucP, &freq); + + xf86DrvMsg(pScrn->scrnIndex,X_INFO,"MGAGClock = %d -- MNP = 0x%x\n", + freq,ulMNP); +} +#endif diff --git a/driver/xf86-video-mga/src/mga_halmod.c b/driver/xf86-video-mga/src/mga_halmod.c new file mode 100644 index 000000000..94e1f1839 --- /dev/null +++ b/driver/xf86-video-mga/src/mga_halmod.c @@ -0,0 +1,42 @@ +/* $XFree86$ */ +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include "xf86Module.h" + +#ifdef XFree86LOADER + +#define HAL_MAJOR_VERSION 1 +#define HAL_MINOR_VERSION 0 +#define HAL_PATCHLEVEL 0 + +static MODULESETUPPROTO(halSetup); + +static XF86ModuleVersionInfo halVersRec = +{ + "mga_hal", + MODULEVENDORSTRING, + MODINFOSTRING1, + MODINFOSTRING2, + XORG_VERSION_CURRENT, + HAL_MAJOR_VERSION, HAL_MINOR_VERSION, HAL_PATCHLEVEL, + ABI_CLASS_VIDEODRV, /* This is a video driver */ + ABI_VIDEODRV_VERSION, + MOD_CLASS_NONE, + {0,0,0,0} +}; + +/* + * This is the module init data. + * Its name has to be the driver name followed by ModuleData. + */ +_X_EXPORT XF86ModuleData mga_halModuleData = { &halVersRec, halSetup, NULL }; + +static pointer +halSetup(pointer module, pointer opts, int *errmaj, int *errmin) +{ + return (pointer)1; +} + +#endif /* XFree86LOADER */ diff --git a/driver/xf86-video-mga/src/mga_hwcurs.c b/driver/xf86-video-mga/src/mga_hwcurs.c new file mode 100644 index 000000000..464bad034 --- /dev/null +++ b/driver/xf86-video-mga/src/mga_hwcurs.c @@ -0,0 +1,43 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_hwcurs.c,v 1.8tsi Exp $ */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include "xf86.h" +#include "xf86_OSproc.h" + +#include "xf86Pci.h" +#include "xf86PciInfo.h" + +#include "mga.h" +#include "mga_reg.h" + +Bool +MGAHWCursorInit(ScreenPtr pScreen) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + MGAPtr pMga = MGAPTR(pScrn); + MGARamdacPtr MGAdac = &pMga->Dac; + xf86CursorInfoPtr infoPtr; + + if (!MGAdac->isHwCursor) + return FALSE; + + infoPtr = xf86CreateCursorInfoRec(); + if(!infoPtr) return FALSE; + + pMga->CursorInfoRec = infoPtr; + + infoPtr->MaxWidth = MGAdac->CursorMaxWidth; + infoPtr->MaxHeight = MGAdac->CursorMaxHeight; + infoPtr->Flags = MGAdac->CursorFlags; + infoPtr->SetCursorColors = MGAdac->SetCursorColors; + infoPtr->SetCursorPosition = MGAdac->SetCursorPosition; + infoPtr->LoadCursorImage = MGAdac->LoadCursorImage; + infoPtr->HideCursor = MGAdac->HideCursor; + infoPtr->ShowCursor = MGAdac->ShowCursor; + infoPtr->UseHWCursor = MGAdac->UseHWCursor; + + return(xf86InitCursor(pScreen, infoPtr)); +} diff --git a/driver/xf86-video-mga/src/mga_macros.h b/driver/xf86-video-mga/src/mga_macros.h new file mode 100644 index 000000000..8a3221d04 --- /dev/null +++ b/driver/xf86-video-mga/src/mga_macros.h @@ -0,0 +1,85 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_macros.h,v 1.21 2001/09/26 12:59:17 alanh Exp $ */ + +#ifndef _MGA_MACROS_H_ +#define _MGA_MACROS_H_ + +#define RGBEQUAL(c) (!((((c) >> 8) ^ (c)) & 0xffff)) + +#ifdef XF86DRI +#define MGA_SYNC_XTAG 0x275f4200 + +#define MGABUSYWAIT() do { \ +OUTREG(MGAREG_DWGSYNC, MGA_SYNC_XTAG); \ +while(INREG(MGAREG_DWGSYNC) != MGA_SYNC_XTAG) ; \ +}while(0); + +#endif + +#define MGAISBUSY() (INREG8(MGAREG_Status + 2) & 0x01) + +#define WAITFIFO(cnt) \ + if(!pMga->UsePCIRetry) {\ + register int n = cnt; \ + if(n > pMga->FifoSize) n = pMga->FifoSize; \ + while(pMga->fifoCount < (n))\ + pMga->fifoCount = INREG8(MGAREG_FIFOSTATUS);\ + pMga->fifoCount -= n;\ + } + +#define XYADDRESS(x,y) \ + ((y) * pMga->CurrentLayout.displayWidth + (x) + pMga->YDstOrg) + +#define MAKEDMAINDEX(index) ((((index) >> 2) & 0x7f) | (((index) >> 6) & 0x80)) + +#define DMAINDICES(one,two,three,four) \ + ( MAKEDMAINDEX(one) | \ + (MAKEDMAINDEX(two) << 8) | \ + (MAKEDMAINDEX(three) << 16) | \ + (MAKEDMAINDEX(four) << 24) ) + +#define SET_PLANEMASK_REPLICATED(mask, rep_mask, bpp) \ + do { \ + if( (bpp != 24) \ + && !(pMga->AccelFlags & MGA_NO_PLANEMASK) \ + && ((mask) != pMga->PlaneMask)) { \ + pMga->PlaneMask = (mask); \ + OUTREG(MGAREG_PLNWT,(rep_mask)); \ + } \ + } while( 0 ) + +#define DISABLE_CLIP() { \ + pMga->AccelFlags &= ~CLIPPER_ON; \ + WAITFIFO(1); \ + OUTREG(MGAREG_CXBNDRY, 0xFFFF0000); } + +#ifdef XF86DRI +#define CHECK_DMA_QUIESCENT(pMGA, pScrn) { \ + if (!pMGA->haveQuiescense) { \ + pMGA->GetQuiescence( pScrn ); \ + } \ +} +#else +#define CHECK_DMA_QUIESCENT(pMGA, pScrn) +#endif + +#ifdef USEMGAHAL +#define HAL_CHIPSETS (pMga->is_HAL_chipset) + +#define MGA_HAL(x) { \ + MGAPtr pMga = MGAPTR(pScrn); \ + if (pMga->HALLoaded && HAL_CHIPSETS) { x; } \ +} +#define MGA_NOT_HAL(x) { \ + MGAPtr pMga = MGAPTR(pScrn); \ + if (!pMga->HALLoaded || !HAL_CHIPSETS) { x; } \ +} +#else +#define MGA_NOT_HAL(x) { x; } +#endif + +#define MGAISGx50(x) ((x)->is_Gx50) + +#define MGA_DH_NEEDS_HAL(x) (((x)->Chipset == PCI_CHIP_MGAG400) && \ + ((x)->ChipRev < 0x80)) + +#endif /* _MGA_MACROS_H_ */ diff --git a/driver/xf86-video-mga/src/mga_maven.h b/driver/xf86-video-mga/src/mga_maven.h new file mode 100644 index 000000000..219d91ec5 --- /dev/null +++ b/driver/xf86-video-mga/src/mga_maven.h @@ -0,0 +1,80 @@ +#define MODULE_BIT 0x00004000 + +/* Maven bus address */ +#define MAVEN_WRITE (0x1B<<1) +#define MAVEN_READ ((0x1B<<1)|1) + +#define I2C_CLOCK 0x20 +#define I2C_DATA 0x10 + +/* MGA-TVO-C I2C (G200), Maven (G400) */ +#define I2C_CLOCK 0x20 +#define I2C_DATA 0x10 +/* primary head DDC for Mystique(?), G100, G200, G400 */ +#define DDC1_CLK 0x08 +#define DDC1_DATA 0x02 +/* primary head DDC for Millennium, Millennium II */ +#define DDC1B_CLK 0x10 +#define DDC1B_DATA 0x04 +/* secondary head DDC for G400, G450 and G550 */ +#define DDC2_CLK 0x04 +#define DDC2_DATA 0x01 + +/*MAVEN registers (<= G400) */ +#define MGAMAV_PGM 0x3E +#define MGAMAV_PIXPLLM 0x80 +#define MGAMAV_PIXPLLN 0x81 +#define MGAMAV_PIXPLLP 0x82 +#define MGAMAV_GAMMA1 0x83 +#define MGAMAV_GAMMA2 0x84 +#define MGAMAV_GAMMA3 0x85 +#define MGAMAV_GAMMA4 0x86 +#define MGAMAV_GAMMA5 0x87 +#define MGAMAV_GAMMA6 0x88 +#define MGAMAV_GAMMA7 0x89 +#define MGAMAV_GAMMA8 0x8A +#define MGAMAV_GAMMA9 0x8B +#define MGAMAV_MONSET 0x8C +#define MGAMAV_TEST 0x8D +#define MGAMAV_WREG_0X8E_L 0x8E +#define MGAMAV_WREG_0X8E_H 0x8F +#define MGAMAV_HSCALETV 0x90 +#define MGAMAV_TSCALETVL 0x91 +#define MGAMAV_TSCALETVH 0x92 +#define MGAMAV_FFILTER 0x93 +#define MGAMAV_MONEN 0x94 +#define MGAMAV_RESYNC 0x95 +#define MGAMAV_LASTLINEL 0x96 +#define MGAMAV_LASTLINEH 0x97 +#define MGAMAV_WREG_0X98_L 0x98 +#define MGAMAV_WREG_0X98_H 0x99 +#define MGAMAV_HSYNCLENL 0x9A +#define MGAMAV_HSYNCLENH 0x9B +#define MGAMAV_HSYNCSTRL 0x9C +#define MGAMAV_HSYNCSTRH 0x9D +#define MGAMAV_HDISPLAYL 0x9E +#define MGAMAV_HDISPLAYH 0x9F +#define MGAMAV_HTOTALL 0xA0 +#define MGAMAV_HTOTALH 0xA1 +#define MGAMAV_VSYNCLENL 0xA2 +#define MGAMAV_VSYNCLENH 0xA3 +#define MGAMAV_VSYNCSTRL 0xA4 +#define MGAMAV_VSYNCSTRH 0xA5 +#define MGAMAV_VDISPLAYL 0xA6 +#define MGAMAV_VDISPLAYH 0xA7 +#define MGAMAV_VTOTALL 0xA8 +#define MGAMAV_VTOTALH 0xA9 +#define MGAMAV_HVIDRSTL 0xAA +#define MGAMAV_HVIDRSTH 0xAB +#define MGAMAV_VVIDRSTL 0xAC +#define MGAMAV_VVIDRSTH 0xAD +#define MGAMAV_VSOMETHINGL 0xAE +#define MGAMAV_VSOMETHINGH 0xAF +#define MGAMAV_OUTMODE 0xB0 +#define MGAMAV_LOCK 0xB3 +#define MGAMAV_LUMA 0xB9 +#define MGAMAV_VDISPLAYTV 0xBE +#define MGAMAV_STABLE 0xBF +#define MGAMAV_HDISPLAYTV 0xC2 +#define MGAMAV_BREG_0XC6 0xC6 + diff --git a/driver/xf86-video-mga/src/mga_merge.c b/driver/xf86-video-mga/src/mga_merge.c new file mode 100644 index 000000000..3fdc6ed22 --- /dev/null +++ b/driver/xf86-video-mga/src/mga_merge.c @@ -0,0 +1,970 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_merge.c,v 1.4 2003/09/24 02:43:24 dawes Exp $ */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +/* All drivers should typically include these */ +#include "xf86.h" +#include "xf86_OSproc.h" +#include "xf86Resources.h" + +/* All drivers need this */ + +#include "compiler.h" + +/* Drivers for PCI hardware need this */ +#include "xf86PciInfo.h" +#include "mga.h" +#include "mga_macros.h" +#include "mga_reg.h" +#include "mga_merge.h" + +#include "fbdevhw.h" + +static int +StrToRanges(range* r, char* s) { + float num=0.0; + int rangenum=0; + Bool gotdash = FALSE; + Bool nextdash = FALSE; + char* strnum=NULL; + do { + switch(*s) { + case '0': case '1': case '2': case '3': case '4': case '5': + case '6': case '7': case '8': case '9': case '.': + if(strnum == NULL) { + strnum = s; + gotdash = nextdash; + nextdash = FALSE; + } + + break; + case '-': + case ' ': case 0: + if(strnum == NULL) break; /*is extra seperator */ + if(strnum != NULL) sscanf(strnum,"%f",&num); + if(gotdash) /*if wasn't singlet: correct. */ + r[rangenum-1].hi = num; + else { /*first, assume singlet */ + r[rangenum].lo = num; + r[rangenum].hi = num; + rangenum++; + } + strnum = NULL; + if(*s == '-') + nextdash = (rangenum != 0); /*ignore dash if before any number.*/ + break; + default : + return 0; + } + } while(*(s++) != 0); /* run loop for every char including null terminator.*/ + + return rangenum; +} + + +/* Copys mode i, links the result to dest, and returns it. + * Links i and j in Private record. + * if dest is NULL, return value is copy of i linked to itself. + */ +static DisplayModePtr +CopyModeNLink(ScrnInfoPtr pScrn, DisplayModePtr dest, DisplayModePtr i, DisplayModePtr j, MgaScrn2Rel srel) { + DisplayModePtr mode; + int dx = 0,dy = 0; + /* start with first node */ + mode = xalloc(sizeof(DisplayModeRec)); + memcpy(mode,i, sizeof(DisplayModeRec)); + mode->Private = xalloc(sizeof(MergedDisplayModeRec)); + ((MergedDisplayModePtr)mode->Private)->Monitor1 = i; + ((MergedDisplayModePtr)mode->Private)->Monitor2 = j; + ((MergedDisplayModePtr)mode->Private)->Monitor2Pos = srel; + mode->PrivSize = 0; + + switch(srel) { + case mgaLeftOf: + case mgaRightOf: + dx = min(pScrn->virtualX,i->HDisplay + j->HDisplay) - mode->HDisplay; + dy = min(pScrn->virtualY, max(i->VDisplay,j->VDisplay)) - mode->VDisplay; + break; + case mgaAbove: + case mgaBelow: + dy = min(pScrn->virtualY,i->VDisplay + j->VDisplay) - mode->VDisplay; + dx = min(pScrn->virtualX, max(i->HDisplay,j->HDisplay)) - mode->HDisplay; + break; + case mgaClone: + dx = min(pScrn->virtualX, max(i->HDisplay,j->HDisplay)) - mode->HDisplay; + dy = min(pScrn->virtualY, max(i->VDisplay,j->VDisplay)) - mode->VDisplay; + break; + } + mode->HDisplay += dx; + mode->HSyncStart += dx; + mode->HSyncEnd += dx; + mode->HTotal += dx; + mode->VDisplay += dy; + mode->VSyncStart += dy; + mode->VSyncEnd += dy; + mode->VTotal += dy; + mode->Clock = 0; /* Shows we're in Merge mode. */ + + mode->next = mode; + mode->prev = mode; + + if(dest) { + /* Insert node after "dest" */ + mode->next = dest->next; + dest->next->prev = mode; + mode->prev = dest; + dest->next = mode; + } + + return mode; +} + +static DisplayModePtr +GetModeFromName(char* str, DisplayModePtr i) +{ + DisplayModePtr c = i; + if(!i) return NULL; + do { + if(strcmp(str,c->name) == 0) return c; + c = c->next; + } while(c != i); + return NULL; +} + +/* takes a config file string of MetaModes and generates a MetaModeList */ +static DisplayModePtr +GenerateModeList(ScrnInfoPtr pScrn, char* str, + DisplayModePtr i, DisplayModePtr j, MgaScrn2Rel srel) { + char* strmode = str; + char modename[256]; + Bool gotdash = FALSE; + MgaScrn2Rel sr; + + DisplayModePtr mode1 = NULL; + DisplayModePtr mode2 = NULL; + DisplayModePtr result = NULL; + do { + switch(*str) { + case 0: + case '-': + case ' ': + case ',': + case ';': + if((strmode != str)) {/*we got a mode */ + /* read new entry */ + strncpy(modename,strmode,str - strmode); + modename[str - strmode] = 0; + + if(gotdash) { + if(mode1 == NULL) return NULL; + mode2 = GetModeFromName(modename,j); + if(!mode2) { + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Mode: \"%s\" is not a supported mode for monitor 2\n",modename); + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Skipping metamode \"%s-%s\".\n",mode1->name,modename); + mode1 = NULL; + } + } else { + mode1 = GetModeFromName(modename,i); + if(!mode1) { + char* tmps = str; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Mode: \"%s\" is not a supported mode for monitor 1\n",modename); + /* find if a monitor2 mode follows */ + gotdash = FALSE; + while(*tmps == ' ' || *tmps == ';') tmps++; + if(*tmps == '-' || *tmps == ',') { /* skip the next mode */ + tmps++; + while(*tmps == ' ' || *tmps == ';') tmps++; /*skip spaces */ + while(*tmps && *tmps != ' ' && *tmps != ';' && *tmps != '-' && *tmps != ',') tmps++; /*skip modename */ + /* for error message */ + strncpy(modename,strmode,tmps - strmode); + modename[tmps - strmode] = 0; + str = tmps-1; + } + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Skipping metamode \"%s\".\n",modename); + mode1 = NULL; + } + } + gotdash = FALSE; + } + strmode = str+1; /* number starts on next char */ + gotdash |= (*str == '-' || *str == ','); + + if(*str != 0) break; /* if end of string, we wont get a chance to catch a char and run the + default case. do it now */ + + default: + if(!gotdash && mode1) { /* complete previous pair */ + sr = srel; + if(!mode2) { + mode2 = GetModeFromName(mode1->name,j); + sr = mgaClone; + } + if(!mode2) { + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Mode: \"%s\" is not a supported mode for monitor 2\n",mode1->name); + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Skipping clone mode \"%s\".\n", mode1->name); + mode1 = NULL; + } else { + result = CopyModeNLink(pScrn,result,mode1,mode2,sr); + mode1 = NULL; + mode2 = NULL; + } + } + break; + + } + } while(*(str++) != 0); + return result; +} + + +/* second CRTC init funcitons. Used to check monitor timings and refreshes. + * this function looses lots of maintainability points due to redundancy, + * but it still was the cleanest and least-intrusive way I found. */ + +Bool +MGAPreInitMergedFB(ScrnInfoPtr pScrn1, int flags) +{ + ScrnInfoPtr pScrn; + MGAPtr pMga; + MGAPtr pMga1; + MessageType from; + int i; + char* s; + ClockRangePtr clockRanges; +#ifdef USEMGAHAL + ULONG status; +#endif + MgaScrn2Rel Monitor2Pos; + + xf86DrvMsg(pScrn1->scrnIndex, X_INFO, "==== Start of second screen initialization ====\n"); + pScrn = xalloc(sizeof(ScrnInfoRec)); + memcpy(pScrn,pScrn1,sizeof(ScrnInfoRec)); + + pScrn->driverPrivate = NULL; + /* Allocate the MGARec driverPrivate */ + if (!MGAGetRec(pScrn)) { + return FALSE; + } + + pMga = MGAPTR(pScrn); +#ifdef USEMGAHAL + pMga->pMgaModeInfo = NULL; /*will be allocated later if NULL*/ +#endif + pMga1 = MGAPTR(pScrn1); + pMga1->pScrn2 = pScrn; + + /* Get the entity, and make sure it is PCI. */ + pMga->pEnt = pMga1->pEnt; + + /* Set pMga->device to the relevant Device section */ + pMga->device = pMga1->device; + + if (flags & PROBE_DETECT) { + MGAProbeDDC(pScrn, pMga->pEnt->index); /*FIXME make shure this probes second monitor */ + return TRUE; + } + + pMga->PciTag = pMga1->PciTag; + + pMga->Primary = pMga1->Primary; + + /* Set pScrn->monitor */ + { + pScrn->monitor = xalloc(sizeof(MonRec)); + /* copy everything we don't care about */ + memcpy(pScrn->monitor,pScrn1->monitor,sizeof(MonRec)); + pScrn->monitor->DDC = NULL; /*FIXME:have to try this */ + if ((s = xf86GetOptValString(pMga1->Options, OPTION_HSYNC2))) { + pScrn->monitor->nHsync = StrToRanges(pScrn->monitor->hsync,s); + } + if ((s = xf86GetOptValString(pMga1->Options, OPTION_VREFRESH2))) { + pScrn->monitor->nVrefresh = StrToRanges(pScrn->monitor->vrefresh,s); + } + + + + } + + pMga->SecondCrtc = TRUE; + pMga->HWCursor = FALSE; + pScrn->AdjustFrame = MGAAdjustMergeFrames; + pScrn1->AdjustFrame = MGAAdjustMergeFrames; + +/* if (!xf86SetDepthBpp(pScrn, 0, 0, 0, flags24)) FIXME:have to copy result form scrn1 + if (!xf86SetWeight(pScrn, zeros, zeros)) { +*/ + + /* We use a programamble clock */ + pScrn->progClock = TRUE; + + /* Collect all of the relevant option flags (fill in pScrn->options) */ + pScrn->options = pScrn1->options; + +/* xf86ProcessOptions(pScrn->scrnIndex, pScrn->options, pMga->Options);*/ + pMga->Options = pMga1->Options; + + + /* Set the bits per RGB for 8bpp mode */ + if (pScrn->depth == 8) + pScrn->rgbBits = 8; + + /* + * Set the Chipset and ChipRev, allowing config file entries to + * override. + */ + pScrn->chipset = pScrn1->chipset; + pMga->Chipset = pMga1->Chipset; + pMga->ChipRev = pMga1->ChipRev; + +#ifdef XF86DRI + pMga->agpMode = pMga1->agpMode; +#endif + + pMga->NoAccel = pMga1->NoAccel; + pMga->UsePCIRetry = pMga1->UsePCIRetry; + pMga->SyncOnGreen = pMga1->SyncOnGreen; + pMga->ShowCache = pMga1->ShowCache; + pMga->HasSDRAM = pMga1->HasSDRAM; + pMga->MemClk = pMga1->MemClk; + pMga->Overlay8Plus24 = pMga1->Overlay8Plus24; + pMga->colorKey = pMga1->colorKey; + pScrn->colorKey = pScrn1->colorKey; + pScrn->overlayFlags = pScrn1->overlayFlags; + pMga->videoKey = pMga1->videoKey; + /* unsupported options */ + pMga->HWCursor = FALSE; + pMga->ShadowFB = FALSE; + pMga->FBDev = FALSE; + + pMga->OverclockMem = pMga1->OverclockMem; + pMga->TexturedVideo = pMga1->TexturedVideo; + pMga->MergedFB = TRUE; + + pMga->Rotate = 0; + + switch (pMga->Chipset) { + case PCI_CHIP_MGA2064: + case PCI_CHIP_MGA2164: + case PCI_CHIP_MGA2164_AGP: + MGA2064SetupFuncs(pScrn); + break; + case PCI_CHIP_MGA1064: + case PCI_CHIP_MGAG100: + case PCI_CHIP_MGAG100_PCI: + case PCI_CHIP_MGAG200: + case PCI_CHIP_MGAG200_PCI: + case PCI_CHIP_MGAG200_SE_A_PCI: + case PCI_CHIP_MGAG200_SE_B_PCI: + case PCI_CHIP_MGAG400: + case PCI_CHIP_MGAG550: + MGAGSetupFuncs(pScrn); + break; + } + + pMga->FbAddress = pMga1->FbAddress; + pMga->FbBaseReg = pMga1->FbBaseReg; + pMga->PciInfo = pMga1->PciInfo; + pMga->IOAddress = pMga1->IOAddress; + pMga->ILOADAddress = pMga1->ILOADAddress; + pMga->BiosFrom = pMga1->BiosFrom; + pMga->BiosAddress = pMga1->BiosAddress; + + /* + * Read the BIOS data struct + */ + + mga_read_and_process_bios( pScrn ); + + /* HW bpp matches reported bpp */ + pMga->HwBpp = pMga1->HwBpp; + + /* + * Reset card if it isn't primary one + */ + if ( (!pMga->Primary && !pMga->FBDev) || xf86IsPc98() ) + MGASoftReset(pScrn); + + + pScrn->videoRam = pScrn1->videoRam; + pMga->FbMapSize = pMga1->FbMapSize; + pMga->SrcOrg = pMga1->SrcOrg; + pMga->DstOrg = pMga1->DstOrg; + + /* Set the bpp shift value */ + pMga->BppShifts[0] = 0; + pMga->BppShifts[1] = 1; + pMga->BppShifts[2] = 0; + pMga->BppShifts[3] = 2; + + /* + * fill MGAdac struct + * Warning: currently, it should be after RAM counting + */ + (*pMga->PreInit)(pScrn); + +#if !defined(__powerpc__) + + /* Read and print the Monitor DDC info */ +/* pScrn->monitor->DDC = MGAdoDDC(pScrn);*/ /*FIXME: have to try this*/ +#endif /* !__powerpc__ */ + + /* + * If the driver can do gamma correction, it should call xf86SetGamma() + * here. + */ + { + Gamma zeros = {0.0, 0.0, 0.0}; + + if (!xf86SetGamma(pScrn, zeros)) { + return FALSE; + } + } + + + /* Set the min pixel clock */ + pMga->MinClock = pMga1->MinClock; /* XXX Guess, need to check this */ + xf86DrvMsg(pScrn->scrnIndex, X_DEFAULT, "CRTC2: Min pixel clock is %d MHz\n", + pMga->MinClock / 1000); + /* Override on 2nd crtc */ + + if (pMga->ChipRev >= 0x80 || (pMga->Chipset == PCI_CHIP_MGAG550)) { + /* G450, G550 */ + pMga->MaxClock = 234000; + } else { + pMga->MaxClock = 135000; + } + xf86DrvMsg(pScrn->scrnIndex, X_DEFAULT, "CRTC2: Max pixel clock is %d MHz\n", + pMga->MaxClock / 1000); + /* + * Setup the ClockRanges, which describe what clock ranges are available, + * and what sort of modes they can be used for. + */ + clockRanges = xnfcalloc(sizeof(ClockRange), 1); + clockRanges->next = NULL; + clockRanges->minClock = pMga->MinClock; + clockRanges->maxClock = pMga->MaxClock; + clockRanges->clockIndex = -1; /* programmable */ + clockRanges->interlaceAllowed = TRUE; + clockRanges->doubleScanAllowed = TRUE; +#ifdef USEMGAHAL + MGA_HAL(clockRanges->interlaceAllowed = FALSE); + MGA_HAL(clockRanges->doubleScanAllowed = FALSE); +#endif + clockRanges->interlaceAllowed = FALSE; /*no interlace on CRTC2 */ + + clockRanges->ClockMulFactor = 1; + clockRanges->ClockDivFactor = 1; + /* Only set MemClk if appropriate for the ramdac */ + if (pMga->Dac.SetMemClk) { + if (pMga->MemClk == 0) { + pMga->MemClk = pMga->Dac.MemoryClock; + from = pMga->Dac.MemClkFrom; + } else + from = X_CONFIG; + xf86DrvMsg(pScrn->scrnIndex, from, "CRTC2: MCLK used is %.1f MHz\n", + pMga->MemClk / 1000.0); + } + + /* + * xf86ValidateModes will check that the mode HTotal and VTotal values + * don't exceed the chipset's limit if pScrn->maxHValue and + * pScrn->maxVValue are set. Since our MGAValidMode() already takes + * care of this, we don't worry about setting them here. + */ + { + int Pitches1[] = + {640, 768, 800, 960, 1024, 1152, 1280, 1600, 1920, 2048, 0}; + int Pitches2[] = + {512, 640, 768, 800, 832, 960, 1024, 1152, 1280, 1600, 1664, + 1920, 2048, 0}; + int *linePitches = NULL; + int minPitch = 256; + int maxPitch = 2048; + + switch(pMga->Chipset) { + case PCI_CHIP_MGA2064: + if (!pMga->NoAccel) { + linePitches = xalloc(sizeof(Pitches1)); + memcpy(linePitches, Pitches1, sizeof(Pitches1)); + minPitch = maxPitch = 0; + } + break; + case PCI_CHIP_MGA2164: + case PCI_CHIP_MGA2164_AGP: + case PCI_CHIP_MGA1064: + if (!pMga->NoAccel) { + linePitches = xalloc(sizeof(Pitches2)); + memcpy(linePitches, Pitches2, sizeof(Pitches2)); + minPitch = maxPitch = 0; + } + break; + case PCI_CHIP_MGAG100: + case PCI_CHIP_MGAG100_PCI: + maxPitch = 2048; + break; + case PCI_CHIP_MGAG200: + case PCI_CHIP_MGAG200_PCI: + case PCI_CHIP_MGAG200_SE_A_PCI: + case PCI_CHIP_MGAG200_SE_B_PCI: + case PCI_CHIP_MGAG400: + case PCI_CHIP_MGAG550: + maxPitch = 4096; + break; + } + + pScrn->modePool=NULL; + pScrn->modes = NULL; + i = xf86ValidateModes(pScrn, pScrn->monitor->Modes, + pScrn->display->modes, clockRanges, + linePitches, minPitch, maxPitch, + pMga->Roundings[(pScrn->bitsPerPixel >> 3) - 1] * + pScrn->bitsPerPixel, 128, 2048, + pScrn->display->virtualX, + pScrn->display->virtualY, + pMga->FbMapSize, + LOOKUP_BEST_REFRESH); + + if (linePitches) + xfree(linePitches); + } + + + if (i < 1 && pMga->FBDev) { + fbdevHWUseBuildinMode(pScrn); + pScrn->displayWidth = pScrn->virtualX; /* FIXME: might be wrong */ + i = 1; + } + if (i == -1) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "CRTC2: Validate Modes Failed\n"); + MGAFreeRec(pScrn); + return FALSE; + } + + /* Prune the modes marked as invalid */ + xf86PruneDriverModes(pScrn); + + if (i == 0 || pScrn->modes == NULL) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "CRTC2: No valid modes found\n"); + MGAFreeRec(pScrn); + return FALSE; + } +#ifdef USEMGAHAL + MGA_HAL( + + pMga->pBoard = pMga1->pBoard; + pMga->pClientStruct = pMga1->pClientStruct; + pMga->pMgaHwInfo = pMga1->pMgaHwInfo; + + + MGAFillModeInfoStruct(pScrn,NULL); + /* Fields usually handled by MGAFillModeInfoStruct, but are unavailable + * because no mode is given + */ + pMga->pMgaModeInfo->ulDispWidth = pScrn->virtualX; + pMga->pMgaModeInfo->ulDispHeight = pScrn->virtualY; + + if((status = MGAValidateMode(pMga->pBoard,pMga->pMgaModeInfo)) != 0) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "MGAValidateMode from HALlib found the mode to be invalid.\n" + "\tError: 0x%lx\n", status); + return FALSE; + } + pScrn->displayWidth = pMga->pMgaModeInfo->ulFBPitch; + ); /* MGA_HAL */ +#endif + + /* + * Set the CRTC parameters for all of the modes based on the type + * of mode, and the chipset's interlace requirements. + * + * Calling this is required if the mode->Crtc* values are used by the + * driver and if the driver doesn't provide code to set them. They + * are not pre-initialised at all. + */ +#ifdef USEMGAHAL + MGA_HAL(xf86SetCrtcForModes(pScrn, 0)); +#endif + MGA_NOT_HAL(xf86SetCrtcForModes(pScrn, INTERLACE_HALVE_V)); + + /* Set the current mode to the first in the list */ + pScrn->currentMode = pScrn->modes; + + /* Print the list of modes being used */ + xf86PrintModes(pScrn); + + /* Set display resolution */ + xf86SetDpi(pScrn, 0, 0); + + /* + * Compute the byte offset into the linear frame buffer where the + * frame buffer data should actually begin. According to DDK misc.c + * line 1023, if more than 4MB is to be displayed, YDSTORG must be set + * appropriately to align memory bank switching, and this requires a + * corresponding offset on linear frame buffer access. + * This is only needed for WRAM. + */ + + pMga->YDstOrg = pMga1->YDstOrg; + xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 2, "CRTC2: YDstOrg is set to %d\n", + pMga->YDstOrg); + pMga->FbUsableSize = pMga1->FbUsableSize; + pMga->FbCursorOffset = pMga1->FbCursorOffset; + + pMga->CurrentLayout.bitsPerPixel = pScrn->bitsPerPixel; + pMga->CurrentLayout.depth = pScrn->depth; + pMga->CurrentLayout.displayWidth = pScrn->displayWidth; + pMga->CurrentLayout.weight.red = pScrn->weight.red; + pMga->CurrentLayout.weight.green = pScrn->weight.green; + pMga->CurrentLayout.weight.blue = pScrn->weight.blue; + pMga->CurrentLayout.Overlay8Plus24 = pMga->Overlay8Plus24; + pMga->CurrentLayout.mode = pScrn->currentMode; + + + Monitor2Pos = mgaRightOf; + if ((s = xf86GetOptValString(pMga1->Options, OPTION_MONITOR2POS))) { + switch(s[0]) { + case 'L': case 'l': case 'G': case 'g': + Monitor2Pos = mgaLeftOf; + break; + case 'R': case 'r': case 'D': case 'd': + Monitor2Pos = mgaRightOf; + break; + + case 'A': case 'a': case 'H': case 'h': + Monitor2Pos = mgaAbove; + break; + + case 'B': case 'b': + Monitor2Pos = mgaBelow; + break; + + case 'C': case 'c': + Monitor2Pos = mgaClone; + break; + default: + Monitor2Pos = mgaRightOf; + break; + } + } + + /* Fool xf86 into thinking we have huge modes */ + /* Keep the original values somewhere */ + pMga1->M1modes = pScrn1->modes; + pMga1->M1currentMode = pScrn1->currentMode; + /* make a copy of the mode list, so we can modify it. */ + if ((s = xf86GetOptValString(pMga1->Options, OPTION_METAMODES))) { + pScrn1->modes = GenerateModeList(pScrn,s,pMga1->M1modes,pScrn->modes,Monitor2Pos); /*FIXME: free this list*/ + if(!pScrn1->modes) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Parse Error reading MetaModes, or No modes left.\n"); + return FALSE; + } + + pScrn1->modes = pScrn1->modes->next; + pScrn1->currentMode = pScrn1->modes; + } else { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "MetaModes option missing.\n"); + return FALSE; + } + xf86DrvMsg(pScrn1->scrnIndex, X_INFO, "==== End of second screen initialization ====\n"); + return TRUE; +} + +void +MGADisplayPowerManagementSetMerged(ScrnInfoPtr pScrn, int PowerManagementMode, + int flags) +{ + MGADisplayPowerManagementSet(pScrn,PowerManagementMode,flags); + MGADisplayPowerManagementSetCrtc2(pScrn,PowerManagementMode,flags); +} + +typedef struct _region { + int x0,x1,y0,y1; + } region; + +static Bool +InRegion(int x, int y, region r) { + return (r.x0 <= x) && (x < r.x1) && (r.y0 <= y) && (y < r.y1); +} + + +#define BOUND(test,low,hi) { \ + if(test < low) test = low; \ + if(test > hi) test = hi; } +#define REBOUND(low,hi,test) { \ + if(test < low) { \ + hi += test-low; \ + low = test; } \ + if(test > hi) { \ + low += test-hi; \ + hi = test; } } + void +MGAMergePointerMoved(int scrnIndex, int x, int y) +{ + ScrnInfoPtr pScr = xf86Screens[scrnIndex]; + MGAPtr pMga = MGAPTR(pScr); + ScrnInfoPtr pScr2 = pMga->pScrn2; + + region out,in1,in2,f2,f1; + + int deltax,deltay; + + /* for ease. */ + f1.x0 = pMga->M1frameX0; + f1.x1 = pMga->M1frameX1+1; + f1.y0 = pMga->M1frameY0; + f1.y1 = pMga->M1frameY1+1; + f2.x0 = pScr2->frameX0; + f2.x1 = pScr2->frameX1+1; + f2.y0 = pScr2->frameY0; + f2.y1 = pScr2->frameY1+1; + + + /*specify outer clipping region. crossing this causes all frames to move*/ + out.x0 = pScr->frameX0; + out.x1 = pScr->frameX1+1; + out.y0 = pScr->frameY0; + out.y1 = pScr->frameY1+1; + + /* + * specify inner sliding window. beeing outsize both frames, and inside + * the outer cliping window, causes corresponding frame to slide + */ + in1 = out; + in2 = out; + switch(((MergedDisplayModePtr)pScr->currentMode->Private)->Monitor2Pos) { + case mgaLeftOf : + in1.x0 = f1.x0; + in2.x1 = f2.x1; + break; + case mgaRightOf : + in1.x1 = f1.x1; + in2.x0 = f2.x0; + break; + case mgaBelow : + in1.y1 = f1.y1; + in2.y0 = f2.y0; + break; + case mgaAbove : + in1.y0 = f1.y0; + in2.y1 = f2.y1; + break; + case mgaClone : + break; + } + + + deltay = 0; + deltax = 0; + + if(InRegion(x,y,out)) { + if( InRegion(x,y, in1) && !InRegion(x,y, f1) ) { + REBOUND(f1.x0,f1.x1,x); + REBOUND(f1.y0,f1.y1,y); + deltax = 1; /*force frame update */ + } + if( InRegion(x,y, in2) && !InRegion(x,y, f2) ) { + REBOUND(f2.x0,f2.x1,x); + REBOUND(f2.y0,f2.y1,y); + deltax = 1; /*force frame update */ + } + } + else { /*outside outer clipping region*/ + if ( out.x0 > x) { + deltax = x - out.x0; + } + if ( out.x1 < x) { + deltax = x - out.x1; + } + f1.x0 += deltax; + f1.x1 += deltax; + f2.x0 += deltax; + f2.x1 += deltax; + pScr->frameX0 += deltax; + pScr->frameX1 += deltax; + + + if ( out.y0 > y) { + deltay = y - out.y0; + } + if ( out.y1 < y) { + deltay = y - out.y1; + } + f1.y0 += deltay; + f1.y1 += deltay; + f2.y0 += deltay; + f2.y1 += deltay; + pScr->frameY0 += deltay; + pScr->frameY1 += deltay; + } + + + if (deltax != 0 || deltay != 0) { + /* back to reality. */ + pMga->M1frameX0 = f1.x0; + pMga->M1frameY0 = f1.y0; + pScr2->frameX0 = f2.x0; + pScr2->frameY0 = f2.y0; + + /*Adjust Granularity */ + MGAAdjustGranularity(pScr,&pMga->M1frameX0,&pMga->M1frameY0); + MGAAdjustGranularity(pScr,&pScr2->frameX0,&pScr2->frameY0); + MGAAdjustGranularity(pScr,&pScr->frameX0,&pScr->frameY0); + + pMga->M1frameX1 = pMga->M1frameX0 + MDMPTR(pScr)->Monitor1->HDisplay -1; + pMga->M1frameY1 = pMga->M1frameY0 + MDMPTR(pScr)->Monitor1->VDisplay -1; + pScr2->frameX1 = pScr2->frameX0 + MDMPTR(pScr)->Monitor2->HDisplay -1; + pScr2->frameY1 = pScr2->frameY0 + MDMPTR(pScr)->Monitor2->VDisplay -1; + pScr->frameX1 = pScr->frameX0 + pScr->currentMode->HDisplay -1; + pScr->frameY1 = pScr->frameY0 + pScr->currentMode->VDisplay -1; + + MGAAdjustFrame(pScr->scrnIndex, pMga->M1frameX0, pMga->M1frameY0, 0); + MGAAdjustFrameCrtc2(pScr->scrnIndex, pScr2->frameX0, pScr2->frameY0, 0); + } + +/* if(pMga->PointerMoved) + (*pMga->PointerMoved)(scrnIndex, x, y); FIXME: do I need to call old func?*/ + +} + + +void +MGAAdjustMergeFrames(int scrnIndex, int x, int y, int flags) { + ScrnInfoPtr pScrn1 = xf86Screens[scrnIndex]; + MGAPtr pMga = MGAPTR(pScrn1); + ScrnInfoPtr pScrn2 = pMga->pScrn2; + int VTotal = pScrn1->currentMode->VDisplay; + int HTotal = pScrn1->currentMode->HDisplay; + int VMax = VTotal; + int HMax = HTotal; + + BOUND(x,0,pScrn1->virtualX-HTotal); + BOUND(y,0,pScrn1->virtualY-VTotal); + switch(MDMPTR(pScrn1)->Monitor2Pos) { + case mgaLeftOf: + pScrn2->frameX0 = x; + BOUND(pScrn2->frameY0,y,y + VMax - MDMPTR(pScrn1)->Monitor2->VDisplay); + pMga->M1frameX0 = x+MDMPTR(pScrn1)->Monitor2->HDisplay; + BOUND(pMga->M1frameY0,y,y + VMax - MDMPTR(pScrn1)->Monitor1->VDisplay); + break; + case mgaRightOf: + pMga->M1frameX0 = x; + BOUND(pMga->M1frameY0,y,y + VMax - MDMPTR(pScrn1)->Monitor1->VDisplay); + pScrn2->frameX0 = x+MDMPTR(pScrn1)->Monitor1->HDisplay; + BOUND(pScrn2->frameY0,y,y + VMax - MDMPTR(pScrn1)->Monitor2->VDisplay); + break; + case mgaAbove: + BOUND(pScrn2->frameX0,x,x + HMax - MDMPTR(pScrn1)->Monitor2->HDisplay); + pScrn2->frameY0 = y; + BOUND(pMga->M1frameX0,x,x + HMax - MDMPTR(pScrn1)->Monitor1->HDisplay); + pMga->M1frameY0 = y+MDMPTR(pScrn1)->Monitor2->VDisplay; + break; + case mgaBelow: + BOUND(pMga->M1frameX0,x,x + HMax - MDMPTR(pScrn1)->Monitor1->HDisplay); + pMga->M1frameY0 = y; + BOUND(pScrn2->frameX0,x,x + HMax - MDMPTR(pScrn1)->Monitor2->HDisplay); + pScrn2->frameY0 = y+MDMPTR(pScrn1)->Monitor1->VDisplay; + break; + case mgaClone: + BOUND(pMga->M1frameX0,x,x + HMax - MDMPTR(pScrn1)->Monitor1->HDisplay); + BOUND(pMga->M1frameY0,y,y + VMax - MDMPTR(pScrn1)->Monitor1->VDisplay); + BOUND(pScrn2->frameX0,x,x + HMax - MDMPTR(pScrn1)->Monitor2->HDisplay); + BOUND(pScrn2->frameY0,y,y + VMax - MDMPTR(pScrn1)->Monitor2->VDisplay); + break; + } + /* sanity checks. Make shure were not out of bounds */ + BOUND(pMga->M1frameX0,0,pScrn1->virtualX -MDMPTR(pScrn1)->Monitor1->HDisplay); + BOUND(pMga->M1frameY0,0,pScrn1->virtualY -MDMPTR(pScrn1)->Monitor1->VDisplay); + BOUND(pScrn2->frameX0,0,pScrn2->virtualX -MDMPTR(pScrn1)->Monitor2->HDisplay); + BOUND(pScrn2->frameY0,0,pScrn2->virtualY -MDMPTR(pScrn1)->Monitor2->VDisplay); + + pScrn1->frameX0 = x; + pScrn1->frameY0 = y; + + /* check granularity */ + MGAAdjustGranularity(pScrn1,&pMga->M1frameX0,&pMga->M1frameY0); + MGAAdjustGranularity(pScrn1,&pScrn2->frameX0,&pScrn2->frameY0); + MGAAdjustGranularity(pScrn1,&pScrn1->frameX0,&pScrn1->frameY0); + + /* complete shitty redundant info */ + pMga->M1frameX1 = pMga->M1frameX0 + MDMPTR(pScrn1)->Monitor1->HDisplay -1; + pMga->M1frameY1 = pMga->M1frameY0 + MDMPTR(pScrn1)->Monitor1->VDisplay -1; + pScrn2->frameX1 = pScrn2->frameX0 + MDMPTR(pScrn1)->Monitor2->HDisplay -1; + pScrn2->frameY1 = pScrn2->frameY0 + MDMPTR(pScrn1)->Monitor2->VDisplay -1; + pScrn1->frameX1 = pScrn1->frameX0 + pScrn1->currentMode->HDisplay -1; + pScrn1->frameY1 = pScrn1->frameY0 + pScrn1->currentMode->VDisplay -1; + + MGAAdjustFrame(scrnIndex, pMga->M1frameX0, pMga->M1frameY0, flags); + MGAAdjustFrameCrtc2(scrnIndex, pScrn2->frameX0, pScrn2->frameY0, flags); + return; +} + +Bool +MGACloseScreenMerged(int scrnIndex, ScreenPtr pScreen) { + ScrnInfoPtr pScrn1 = xf86Screens[scrnIndex]; + MGAPtr pMga = MGAPTR(pScrn1); + ScrnInfoPtr pScrn2 = pMga->pScrn2; + + if(pScrn2) { + xfree(pScrn2->monitor); + pScrn2->monitor = NULL; + + xfree(pScrn2); + pMga->pScrn2 = NULL; + } + + if(pScrn1->modes) { + pScrn1->currentMode = pScrn1->modes; + do { + DisplayModePtr p = pScrn1->currentMode->next; + if(pScrn1->currentMode->Private) + xfree(pScrn1->currentMode->Private); + xfree(pScrn1->currentMode); + pScrn1->currentMode = p; + }while( pScrn1->currentMode != pScrn1->modes); + } + + pScrn1->currentMode = pMga->M1currentMode; + pScrn1->modes = pMga->M1modes; + + return TRUE; +} + +Bool +MGASaveScreenMerged(ScreenPtr pScreen, int mode) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + MGAPtr pMga = MGAPTR(pScrn); + BOOL on = xf86IsUnblank(mode); + CARD8 reg; + + if (on) { +/* SetTimdeSinceLastInputEvent();*/ + + /* power on Dac1 */ + reg = inMGAdac(0x1E); + outMGAdac(0x1E, reg | 1); + /* power on Dac2 */ + reg = inMGAdac(0xA0); + outMGAdac(0xA0, reg | 1); + + } else { + /* power off Dac1 */ + reg = inMGAdac(0x1E); + outMGAdac(0x1E, reg & ~1); + /* power off Dac2 */ + reg = inMGAdac(0xA0); + outMGAdac(0xA0, reg & ~1); + + } + return TRUE; +} + + diff --git a/driver/xf86-video-mga/src/mga_merge.h b/driver/xf86-video-mga/src/mga_merge.h new file mode 100644 index 000000000..f823b23d5 --- /dev/null +++ b/driver/xf86-video-mga/src/mga_merge.h @@ -0,0 +1,19 @@ +/* Merged mode stuff */ +/* include file for mga_driver.c DO NOT try to generate a .o with this file.*/ + +void MGADisplayPowerManagementSetMerged(ScrnInfoPtr pScrn, + int PowerManagementMode, + int flags); +void MGAMergePointerMoved(int scrnIndex, int x, int y); +void MGAAdjustMergeFrames(int scrnIndex, int x, int y, int flags); +Bool MGAPreInitMergedFB(ScrnInfoPtr pScrn1, int flags); +Bool MGACloseScreenMerged(int scrnIndex, ScreenPtr pScreen); +Bool MGASaveScreenMerged(ScreenPtr pScreen, int mode); + +typedef struct _MergedDisplayModeRec { + DisplayModePtr Monitor1; + DisplayModePtr Monitor2; + MgaScrn2Rel Monitor2Pos; +} MergedDisplayModeRec, *MergedDisplayModePtr; + +#define MDMPTR(x) ((MergedDisplayModePtr)(x->currentMode->Private)) diff --git a/driver/xf86-video-mga/src/mga_reg.h b/driver/xf86-video-mga/src/mga_reg.h new file mode 100644 index 000000000..874c4ed81 --- /dev/null +++ b/driver/xf86-video-mga/src/mga_reg.h @@ -0,0 +1,594 @@ +/* $XConsortium: mgareg.h /main/2 1996/10/25 10:33:21 kaleb $ */ + + + +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_reg.h,v 1.18 2001/09/26 12:59:18 alanh Exp $ */ + + + +/* + * MGA Millennium (MGA2064W) functions + * MGA Mystique (MGA1064SG) functions + * + * Copyright 1996 The XFree86 Project, Inc. + * + * Authors + * Dirk Hohndel + * hohndel@XFree86.Org + * David Dawes + * dawes@XFree86.Org + * Contributors: + * Guy DESBIEF, Aix-en-provence, France + * g.desbief@aix.pacwan.net + * MGA1064SG Mystique register file + */ + + +#ifndef _MGA_REG_H_ +#define _MGA_REG_H_ + +#define MGAREG_DWGCTL 0x1c00 +#define MGAREG_MACCESS 0x1c04 +/* the following is a mystique only register */ +#define MGAREG_MCTLWTST 0x1c08 +#define MGAREG_ZORG 0x1c0c + +#define MGAREG_PAT0 0x1c10 +#define MGAREG_PAT1 0x1c14 +#define MGAREG_PLNWT 0x1c1c + +#define MGAREG_BCOL 0x1c20 +#define MGAREG_FCOL 0x1c24 + +#define MGAREG_SRC0 0x1c30 +#define MGAREG_SRC1 0x1c34 +#define MGAREG_SRC2 0x1c38 +#define MGAREG_SRC3 0x1c3c + +#define MGAREG_XYSTRT 0x1c40 +#define MGAREG_XYEND 0x1c44 + +#define MGAREG_SHIFT 0x1c50 +/* the following is a mystique only register */ +#define MGAREG_DMAPAD 0x1c54 +#define MGAREG_SGN 0x1c58 +#define MGAREG_LEN 0x1c5c + +#define MGAREG_AR0 0x1c60 +#define MGAREG_AR1 0x1c64 +#define MGAREG_AR2 0x1c68 +#define MGAREG_AR3 0x1c6c +#define MGAREG_AR4 0x1c70 +#define MGAREG_AR5 0x1c74 +#define MGAREG_AR6 0x1c78 + +#define MGAREG_CXBNDRY 0x1c80 +#define MGAREG_FXBNDRY 0x1c84 +#define MGAREG_YDSTLEN 0x1c88 +#define MGAREG_PITCH 0x1c8c + +#define MGAREG_YDST 0x1c90 +#define MGAREG_YDSTORG 0x1c94 +#define MGAREG_YTOP 0x1c98 +#define MGAREG_YBOT 0x1c9c + +#define MGAREG_CXLEFT 0x1ca0 +#define MGAREG_CXRIGHT 0x1ca4 +#define MGAREG_FXLEFT 0x1ca8 +#define MGAREG_FXRIGHT 0x1cac + +#define MGAREG_XDST 0x1cb0 + +#define MGAREG_DR0 0x1cc0 +#define MGAREG_DR1 0x1cc4 +#define MGAREG_DR2 0x1cc8 +#define MGAREG_DR3 0x1ccc + +#define MGAREG_DR4 0x1cd0 +#define MGAREG_DR5 0x1cd4 +#define MGAREG_DR6 0x1cd8 +#define MGAREG_DR7 0x1cdc + +#define MGAREG_DR8 0x1ce0 +#define MGAREG_DR9 0x1ce4 +#define MGAREG_DR10 0x1ce8 +#define MGAREG_DR11 0x1cec + +#define MGAREG_DR12 0x1cf0 +#define MGAREG_DR13 0x1cf4 +#define MGAREG_DR14 0x1cf8 +#define MGAREG_DR15 0x1cfc + +#define MGAREG_SRCORG 0x2cb4 +#define MGAREG_DSTORG 0x2cb8 + +/* add or or this to one of the previous "power registers" to start + the drawing engine */ + +#define MGAREG_EXEC 0x0100 + +#define MGAREG_FIFOSTATUS 0x1e10 +#define MGAREG_Status 0x1e14 +#define MGAREG_CACHEFLUSH 0x1fff +#define MGAREG_ICLEAR 0x1e18 +#define MGAREG_IEN 0x1e1c + +#define MGAREG_VCOUNT 0x1e20 + +#define MGAREG_Reset 0x1e40 + +#define MGAREG_OPMODE 0x1e54 + +/* Warp Registers */ +#define MGAREG_WIADDR 0x1dc0 +#define MGAREG_WIADDR2 0x1dd8 +#define MGAREG_WGETMSB 0x1dc8 +#define MGAREG_WVRTXSZ 0x1dcc +#define MGAREG_WACCEPTSEQ 0x1dd4 +#define MGAREG_WMISC 0x1e70 + +/* OPMODE register additives */ + +#define MGAOPM_DMA_GENERAL (0x00 << 2) +#define MGAOPM_DMA_BLIT (0x01 << 2) +#define MGAOPM_DMA_VECTOR (0x10 << 2) + +/* MACCESS register additives */ +#define MGAMAC_PW8 0x00 +#define MGAMAC_PW16 0x01 +#define MGAMAC_PW24 0x03 /* not a typo */ +#define MGAMAC_PW32 0x02 /* not a typo */ +#define MGAMAC_BYPASS332 0x10000000 +#define MGAMAC_NODITHER 0x40000000 +#define MGAMAC_DIT555 0x80000000 + +/* DWGCTL register additives */ + +/* Lines */ + +#define MGADWG_LINE_OPEN 0x00 +#define MGADWG_AUTOLINE_OPEN 0x01 +#define MGADWG_LINE_CLOSE 0x02 +#define MGADWG_AUTOLINE_CLOSE 0x03 + +/* Trapezoids */ +#define MGADWG_TRAP 0x04 +#define MGADWG_TEXTURE_TRAP 0x06 + +/* BitBlts */ + +#define MGADWG_BITBLT 0x08 +#define MGADWG_FBITBLT 0x0c +#define MGADWG_ILOAD 0x09 +#define MGADWG_ILOAD_SCALE 0x0d +#define MGADWG_ILOAD_FILTER 0x0f +#define MGADWG_ILOAD_HIQH 0x07 +#define MGADWG_ILOAD_HIQHV 0x0e +#define MGADWG_IDUMP 0x0a + +/* atype access to WRAM */ + +#define MGADWG_RPL ( 0x00 << 4 ) +#define MGADWG_RSTR ( 0x01 << 4 ) +#define MGADWG_ZI ( 0x03 << 4 ) +#define MGADWG_BLK ( 0x04 << 4 ) +#define MGADWG_I ( 0x07 << 4 ) + +/* specifies whether bit blits are linear or xy */ +#define MGADWG_LINEAR ( 0x01 << 7 ) + +/* z drawing mode. use MGADWG_NOZCMP for always */ + +#define MGADWG_NOZCMP ( 0x00 << 8 ) +#define MGADWG_ZE ( 0x02 << 8 ) +#define MGADWG_ZNE ( 0x03 << 8 ) +#define MGADWG_ZLT ( 0x04 << 8 ) +#define MGADWG_ZLTE ( 0x05 << 8 ) +#define MGADWG_GT ( 0x06 << 8 ) +#define MGADWG_GTE ( 0x07 << 8 ) + +/* use this to force colour expansion circuitry to do its stuff */ + +#define MGADWG_SOLID ( 0x01 << 11 ) + +/* ar register at zero */ + +#define MGADWG_ARZERO ( 0x01 << 12 ) + +#define MGADWG_SGNZERO ( 0x01 << 13 ) + +#define MGADWG_SHIFTZERO ( 0x01 << 14 ) + +/* See table on 4-43 for bop ALU operations */ + +/* See table on 4-44 for translucidity masks */ + +#define MGADWG_BMONOLEF ( 0x00 << 25 ) +#define MGADWG_BMONOWF ( 0x04 << 25 ) +#define MGADWG_BPLAN ( 0x01 << 25 ) + +/* note that if bfcol is specified and you're doing a bitblt, it causes + a fbitblt to be performed, so check that you obey the fbitblt rules */ + +#define MGADWG_BFCOL ( 0x02 << 25 ) +#define MGADWG_BUYUV ( 0x0e << 25 ) +#define MGADWG_BU32BGR ( 0x03 << 25 ) +#define MGADWG_BU32RGB ( 0x07 << 25 ) +#define MGADWG_BU24BGR ( 0x0b << 25 ) +#define MGADWG_BU24RGB ( 0x0f << 25 ) + +#define MGADWG_PATTERN ( 0x01 << 29 ) +#define MGADWG_TRANSC ( 0x01 << 30 ) +#define MGAREG_MISC_WRITE 0x3c2 +#define MGAREG_MISC_READ 0x3cc +#define MGAREG_MISC_IOADSEL (0x1 << 0) +#define MGAREG_MISC_RAMMAPEN (0x1 << 1) +#define MGAREG_MISC_CLK_SEL_VGA25 (0x0 << 2) +#define MGAREG_MISC_CLK_SEL_VGA28 (0x1 << 2) +#define MGAREG_MISC_CLK_SEL_MGA_PIX (0x2 << 2) +#define MGAREG_MISC_CLK_SEL_MGA_MSK (0x3 << 2) +#define MGAREG_MISC_VIDEO_DIS (0x1 << 4) +#define MGAREG_MISC_HIGH_PG_SEL (0x1 << 5) + +/* MMIO VGA registers */ +#define MGAREG_SEQ_INDEX 0x1fc4 +#define MGAREG_SEQ_DATA 0x1fc5 +#define MGAREG_CRTC_INDEX 0x1fd4 +#define MGAREG_CRTC_DATA 0x1fd5 +#define MGAREG_CRTCEXT_INDEX 0x1fde +#define MGAREG_CRTCEXT_DATA 0x1fdf + + + +/* MGA bits for registers PCI_OPTION_REG */ +#define MGA1064_OPT_SYS_CLK_PCI ( 0x00 << 0 ) +#define MGA1064_OPT_SYS_CLK_PLL ( 0x01 << 0 ) +#define MGA1064_OPT_SYS_CLK_EXT ( 0x02 << 0 ) +#define MGA1064_OPT_SYS_CLK_MSK ( 0x03 << 0 ) + +#define MGA1064_OPT_SYS_CLK_DIS ( 0x01 << 2 ) +#define MGA1064_OPT_G_CLK_DIV_1 ( 0x01 << 3 ) +#define MGA1064_OPT_M_CLK_DIV_1 ( 0x01 << 4 ) + +#define MGA1064_OPT_SYS_PLL_PDN ( 0x01 << 5 ) +#define MGA1064_OPT_VGA_ION ( 0x01 << 8 ) + +/* MGA registers in PCI config space */ +#define PCI_MGA_INDEX 0x44 +#define PCI_MGA_DATA 0x48 +#define PCI_MGA_OPTION2 0x50 +#define PCI_MGA_OPTION3 0x54 + +#define RAMDAC_OFFSET 0x3c00 + +/* TVP3026 direct registers */ + +#define TVP3026_INDEX 0x00 +#define TVP3026_WADR_PAL 0x00 +#define TVP3026_COL_PAL 0x01 +#define TVP3026_PIX_RD_MSK 0x02 +#define TVP3026_RADR_PAL 0x03 +#define TVP3026_CUR_COL_ADDR 0x04 +#define TVP3026_CUR_COL_DATA 0x05 +#define TVP3026_DATA 0x0a +#define TVP3026_CUR_RAM 0x0b +#define TVP3026_CUR_XLOW 0x0c +#define TVP3026_CUR_XHI 0x0d +#define TVP3026_CUR_YLOW 0x0e +#define TVP3026_CUR_YHI 0x0f + +/* TVP3026 indirect registers */ + +#define TVP3026_SILICON_REV 0x01 +#define TVP3026_CURSOR_CTL 0x06 +#define TVP3026_LATCH_CTL 0x0f +#define TVP3026_TRUE_COLOR_CTL 0x18 +#define TVP3026_MUX_CTL 0x19 +#define TVP3026_CLK_SEL 0x1a +#define TVP3026_PAL_PAGE 0x1c +#define TVP3026_GEN_CTL 0x1d +#define TVP3026_MISC_CTL 0x1e +#define TVP3026_GEN_IO_CTL 0x2a +#define TVP3026_GEN_IO_DATA 0x2b +#define TVP3026_PLL_ADDR 0x2c +#define TVP3026_PIX_CLK_DATA 0x2d +#define TVP3026_MEM_CLK_DATA 0x2e +#define TVP3026_LOAD_CLK_DATA 0x2f +#define TVP3026_KEY_RED_LOW 0x32 +#define TVP3026_KEY_RED_HI 0x33 +#define TVP3026_KEY_GREEN_LOW 0x34 +#define TVP3026_KEY_GREEN_HI 0x35 +#define TVP3026_KEY_BLUE_LOW 0x36 +#define TVP3026_KEY_BLUE_HI 0x37 +#define TVP3026_KEY_CTL 0x38 +#define TVP3026_MCLK_CTL 0x39 +#define TVP3026_SENSE_TEST 0x3a +#define TVP3026_TEST_DATA 0x3b +#define TVP3026_CRC_LSB 0x3c +#define TVP3026_CRC_MSB 0x3d +#define TVP3026_CRC_CTL 0x3e +#define TVP3026_ID 0x3f +#define TVP3026_RESET 0xff + + +/* MGA1064 DAC Register file */ +/* MGA1064 direct registers */ + +#define MGA1064_INDEX 0x00 +#define MGA1064_WADR_PAL 0x00 +#define MGA1064_COL_PAL 0x01 +#define MGA1064_PIX_RD_MSK 0x02 +#define MGA1064_RADR_PAL 0x03 +#define MGA1064_DATA 0x0a + +#define MGA1064_CUR_XLOW 0x0c +#define MGA1064_CUR_XHI 0x0d +#define MGA1064_CUR_YLOW 0x0e +#define MGA1064_CUR_YHI 0x0f + +/* MGA1064 indirect registers */ +#define MGA1064_DVI_PIPE_CTL 0x03 +#define MGA1064_CURSOR_BASE_ADR_LOW 0x04 +#define MGA1064_CURSOR_BASE_ADR_HI 0x05 +#define MGA1064_CURSOR_CTL 0x06 +#define MGA1064_CURSOR_COL0_RED 0x08 +#define MGA1064_CURSOR_COL0_GREEN 0x09 +#define MGA1064_CURSOR_COL0_BLUE 0x0a + +#define MGA1064_CURSOR_COL1_RED 0x0c +#define MGA1064_CURSOR_COL1_GREEN 0x0d +#define MGA1064_CURSOR_COL1_BLUE 0x0e + +#define MGA1064_CURSOR_COL2_RED 0x010 +#define MGA1064_CURSOR_COL2_GREEN 0x011 +#define MGA1064_CURSOR_COL2_BLUE 0x012 + +#define MGA1064_VREF_CTL 0x018 + +#define MGA1064_MUL_CTL 0x19 +#define MGA1064_MUL_CTL_8bits 0x0 +#define MGA1064_MUL_CTL_15bits 0x01 +#define MGA1064_MUL_CTL_16bits 0x02 +#define MGA1064_MUL_CTL_24bits 0x03 +#define MGA1064_MUL_CTL_32bits 0x04 +#define MGA1064_MUL_CTL_2G8V16bits 0x05 +#define MGA1064_MUL_CTL_G16V16bits 0x06 +#define MGA1064_MUL_CTL_32_24bits 0x07 + +#define MGAGDAC_XVREFCTRL 0x18 +#define MGA1064_PIX_CLK_CTL 0x1a +#define MGA1064_PIX_CLK_CTL_CLK_DIS ( 0x01 << 2 ) +#define MGA1064_PIX_CLK_CTL_CLK_POW_DOWN ( 0x01 << 3 ) +#define MGA1064_PIX_CLK_CTL_SEL_PCI ( 0x00 << 0 ) +#define MGA1064_PIX_CLK_CTL_SEL_PLL ( 0x01 << 0 ) +#define MGA1064_PIX_CLK_CTL_SEL_EXT ( 0x02 << 0 ) +#define MGA1064_PIX_CLK_CTL_SEL_MSK ( 0x03 << 0 ) + +#define MGA1064_GEN_CTL 0x1d +#define MGA1064_MISC_CTL 0x1e +#define MGA1064_MISC_CTL_DAC_POW_DN ( 0x01 << 0 ) +#define MGA1064_MISC_CTL_VGA ( 0x01 << 1 ) +#define MGA1064_MISC_CTL_DIS_CON ( 0x03 << 1 ) +#define MGA1064_MISC_CTL_MAFC ( 0x02 << 1 ) +#define MGA1064_MISC_CTL_VGA8 ( 0x01 << 3 ) +#define MGA1064_MISC_CTL_DAC_RAM_CS ( 0x01 << 4 ) + +#define MGA1064_GEN_IO_CTL 0x2a +#define MGA1064_GEN_IO_DATA 0x2b +#define MGA1064_SYS_PLL_M 0x2c +#define MGA1064_SYS_PLL_N 0x2d +#define MGA1064_SYS_PLL_P 0x2e +#define MGA1064_SYS_PLL_STAT 0x2f +#define MGA1064_ZOOM_CTL 0x38 +#define MGA1064_SENSE_TST 0x3a + +#define MGA1064_CRC_LSB 0x3c +#define MGA1064_CRC_MSB 0x3d +#define MGA1064_CRC_CTL 0x3e +#define MGA1064_COL_KEY_MSK_LSB 0x40 +#define MGA1064_COL_KEY_MSK_MSB 0x41 +#define MGA1064_COL_KEY_LSB 0x42 +#define MGA1064_COL_KEY_MSB 0x43 +#define MGA1064_PIX_PLLA_M 0x44 +#define MGA1064_PIX_PLLA_N 0x45 +#define MGA1064_PIX_PLLA_P 0x46 +#define MGA1064_PIX_PLLB_M 0x48 +#define MGA1064_PIX_PLLB_N 0x49 +#define MGA1064_PIX_PLLB_P 0x4a +#define MGA1064_PIX_PLLC_M 0x4c +#define MGA1064_PIX_PLLC_N 0x4d +#define MGA1064_PIX_PLLC_P 0x4e + +#define MGA1064_PIX_PLL_STAT 0x4f + +/*Added for G450 dual head*/ +/* Supported PLL*/ +#define __PIXEL_PLL 1 +#define __SYSTEM_PLL 2 +#define __VIDEO_PLL 3 + +#define MGA1064_VID_PLL_P 0x8D +#define MGA1064_VID_PLL_M 0x8E +#define MGA1064_VID_PLL_N 0x8F + +#define MGA1064_DISP_CTL 0x8a +#define MGA1064_SYNC_CTL 0x8b +#define MGA1064_PWR_CTL 0xa0 +#define MGA1064_PAN_CTL 0xa2 + +/* Using crtc2 */ +#define MGAREG2_C2CTL 0x10 +#define MGAREG2_C2HPARAM 0x14 +#define MGAREG2_C2HSYNC 0x18 +#define MGAREG2_C2VPARAM 0x1c +#define MGAREG2_C2VSYNC 0x20 +#define MGAREG2_C2STARTADD0 0x28 + +#define MGAREG2_C2OFFSET 0x40 +#define MGAREG2_C2DATACTL 0x4c + +#define MGAREG_C2CTL 0x3c10 +#define MGAREG_C2HPARAM 0x3c14 +#define MGAREG_C2HSYNC 0x3c18 +#define MGAREG_C2VPARAM 0x3c1c +#define MGAREG_C2VSYNC 0x3c20 +#define MGAREG_C2STARTADD0 0x3c28 + +#define MGAREG_C2OFFSET 0x3c40 +#define MGAREG_C2DATACTL 0x3c4c + +#define MGA1064_DISP_CTL 0x8a +#define MGA1064_SYNC_CTL 0x8b +#define MGA1064_PWR_CTL 0xa0 + +/* video register */ + +#define MGAREG_BESA1C3ORG 0x3d60 +#define MGAREG_BESA1CORG 0x3d10 +#define MGAREG_BESA1ORG 0x3d00 +#define MGAREG_BESCTL 0x3d20 +#define MGAREG_BESGLOBCTL 0x3dc0 +#define MGAREG_BESHCOORD 0x3d28 +#define MGAREG_BESHISCAL 0x3d30 +#define MGAREG_BESHSRCEND 0x3d3c +#define MGAREG_BESHSRCLST 0x3d50 +#define MGAREG_BESHSRCST 0x3d38 +#define MGAREG_BESLUMACTL 0x3d40 +#define MGAREG_BESPITCH 0x3d24 +#define MGAREG_BESV1SRCLST 0x3d54 +#define MGAREG_BESV1WGHT 0x3d48 +#define MGAREG_BESVCOORD 0x3d2c +#define MGAREG_BESVISCAL 0x3d34 + +/* texture engine registers */ + +#define MGAREG_TMR0 0x2c00 +#define MGAREG_TMR1 0x2c04 +#define MGAREG_TMR2 0x2c08 +#define MGAREG_TMR3 0x2c0c +#define MGAREG_TMR4 0x2c10 +#define MGAREG_TMR5 0x2c14 +#define MGAREG_TMR6 0x2c18 +#define MGAREG_TMR7 0x2c1c +#define MGAREG_TMR8 0x2c20 +#define MGAREG_TEXORG 0x2c24 +#define MGAREG_TEXWIDTH 0x2c28 +#define MGAREG_TEXHEIGHT 0x2c2c +#define MGAREG_TEXCTL 0x2c30 +# define MGA_TW4 (0x00000000) +# define MGA_TW8 (0x00000001) +# define MGA_TW15 (0x00000002) +# define MGA_TW16 (0x00000003) +# define MGA_TW12 (0x00000004) +# define MGA_TW32 (0x00000006) +# define MGA_TW8A (0x00000007) +# define MGA_TW8AL (0x00000008) +# define MGA_TW422 (0x0000000A) +# define MGA_TW422UYVY (0x0000000B) +# define MGA_PITCHLIN (0x00000100) +# define MGA_NOPERSPECTIVE (0x00200000) +# define MGA_TAKEY (0x02000000) +# define MGA_TAMASK (0x04000000) +# define MGA_CLAMPUV (0x18000000) +# define MGA_TEXMODULATE (0x20000000) +#define MGAREG_TEXCTL2 0x2c3c +# define MGA_G400_TC2_MAGIC (0x00008000) +# define MGA_TC2_DECALBLEND (0x00000001) +# define MGA_TC2_IDECAL (0x00000002) +# define MGA_TC2_DECALDIS (0x00000004) +# define MGA_TC2_CKSTRANSDIS (0x00000010) +# define MGA_TC2_BORDEREN (0x00000020) +# define MGA_TC2_SPECEN (0x00000040) +# define MGA_TC2_DUALTEX (0x00000080) +# define MGA_TC2_TABLEFOG (0x00000100) +# define MGA_TC2_BUMPMAP (0x00000200) +# define MGA_TC2_SELECT_TMU1 (0x80000000) +#define MGAREG_TEXTRANS 0x2c34 +#define MGAREG_TEXTRANSHIGH 0x2c38 +#define MGAREG_TEXFILTER 0x2c58 +# define MGA_MIN_NRST (0x00000000) +# define MGA_MIN_BILIN (0x00000002) +# define MGA_MIN_ANISO (0x0000000D) +# define MGA_MAG_NRST (0x00000000) +# define MGA_MAG_BILIN (0x00000020) +# define MGA_FILTERALPHA (0x00100000) +#define MGAREG_ALPHASTART 0x2c70 +#define MGAREG_ALPHAXINC 0x2c74 +#define MGAREG_ALPHAYINC 0x2c78 +#define MGAREG_ALPHACTRL 0x2c7c +# define MGA_SRC_ZERO (0x00000000) +# define MGA_SRC_ONE (0x00000001) +# define MGA_SRC_DST_COLOR (0x00000002) +# define MGA_SRC_ONE_MINUS_DST_COLOR (0x00000003) +# define MGA_SRC_ALPHA (0x00000004) +# define MGA_SRC_ONE_MINUS_SRC_ALPHA (0x00000005) +# define MGA_SRC_DST_ALPHA (0x00000006) +# define MGA_SRC_ONE_MINUS_DST_ALPHA (0x00000007) +# define MGA_SRC_SRC_ALPHA_SATURATE (0x00000008) +# define MGA_SRC_BLEND_MASK (0x0000000f) +# define MGA_DST_ZERO (0x00000000) +# define MGA_DST_ONE (0x00000010) +# define MGA_DST_SRC_COLOR (0x00000020) +# define MGA_DST_ONE_MINUS_SRC_COLOR (0x00000030) +# define MGA_DST_SRC_ALPHA (0x00000040) +# define MGA_DST_ONE_MINUS_SRC_ALPHA (0x00000050) +# define MGA_DST_DST_ALPHA (0x00000060) +# define MGA_DST_ONE_MINUS_DST_ALPHA (0x00000070) +# define MGA_DST_BLEND_MASK (0x00000070) +# define MGA_ALPHACHANNEL (0x00000100) +# define MGA_VIDEOALPHA (0x00000200) +# define MGA_DIFFUSEDALPHA (0x01000000) +# define MGA_MODULATEDALPHA (0x02000000) +#define MGAREG_TDUALSTAGE0 (0x2CF8) +#define MGAREG_TDUALSTAGE1 (0x2CFC) +# define MGA_TDS_COLOR_ARG2_DIFFUSE (0x00000000) +# define MGA_TDS_COLOR_ARG2_SPECULAR (0x00000001) +# define MGA_TDS_COLOR_ARG2_FCOL (0x00000002) +# define MGA_TDS_COLOR_ARG2_PREVSTAGE (0x00000003) +# define MGA_TDS_COLOR_ALPHA_DIFFUSE (0x00000000) +# define MGA_TDS_COLOR_ALPHA_FCOL (0x00000004) +# define MGA_TDS_COLOR_ALPHA_CURRTEX (0x00000008) +# define MGA_TDS_COLOR_ALPHA_PREVTEX (0x0000000c) +# define MGA_TDS_COLOR_ALPHA_PREVSTAGE (0x00000010) +# define MGA_TDS_COLOR_ARG1_REPLICATEALPHA (0x00000020) +# define MGA_TDS_COLOR_ARG1_INV (0x00000040) +# define MGA_TDS_COLOR_ARG2_REPLICATEALPHA (0x00000080) +# define MGA_TDS_COLOR_ARG2_INV (0x00000100) +# define MGA_TDS_COLOR_ALPHA1INV (0x00000200) +# define MGA_TDS_COLOR_ALPHA2INV (0x00000400) +# define MGA_TDS_COLOR_ARG1MUL_ALPHA1 (0x00000800) +# define MGA_TDS_COLOR_ARG2MUL_ALPHA2 (0x00001000) +# define MGA_TDS_COLOR_ARG1ADD_MULOUT (0x00002000) +# define MGA_TDS_COLOR_ARG2ADD_MULOUT (0x00004000) +# define MGA_TDS_COLOR_MODBRIGHT_2X (0x00008000) +# define MGA_TDS_COLOR_MODBRIGHT_4X (0x00010000) +# define MGA_TDS_COLOR_ADD_SUB (0x00000000) +# define MGA_TDS_COLOR_ADD_ADD (0x00020000) +# define MGA_TDS_COLOR_ADD2X (0x00040000) +# define MGA_TDS_COLOR_ADDBIAS (0x00080000) +# define MGA_TDS_COLOR_BLEND (0x00100000) +# define MGA_TDS_COLOR_SEL_ARG1 (0x00000000) +# define MGA_TDS_COLOR_SEL_ARG2 (0x00200000) +# define MGA_TDS_COLOR_SEL_ADD (0x00400000) +# define MGA_TDS_COLOR_SEL_MUL (0x00600000) +# define MGA_TDS_ALPHA_ARG1_INV (0x00800000) +# define MGA_TDS_ALPHA_ARG2_DIFFUSE (0x00000000) +# define MGA_TDS_ALPHA_ARG2_FCOL (0x01000000) +# define MGA_TDS_ALPHA_ARG2_PREVTEX (0x02000000) +# define MGA_TDS_ALPHA_ARG2_PREVSTAGE (0x03000000) +# define MGA_TDS_ALPHA_ARG2_INV (0x04000000) +# define MGA_TDS_ALPHA_ADD (0x08000000) +# define MGA_TDS_ALPHA_ADDBIAS (0x10000000) +# define MGA_TDS_ALPHA_ADD2X (0x20000000) +# define MGA_TDS_ALPHA_SEL_ARG1 (0x00000000) +# define MGA_TDS_ALPHA_SEL_ARG2 (0x40000000) +# define MGA_TDS_ALPHA_SEL_ADD (0x80000000) +# define MGA_TDS_ALPHA_SEL_MUL (0xc0000000) + +#define MGAREG_DWGSYNC 0x2c4c + +#define MGAREG_AGP_PLL 0x1e4c +#define MGA_AGP2XPLL_ENABLE 0x1 +#define MGA_AGP2XPLL_DISABLE 0x0 + +#endif diff --git a/driver/xf86-video-mga/src/mga_sarea.h b/driver/xf86-video-mga/src/mga_sarea.h new file mode 100644 index 000000000..c5ffbbc25 --- /dev/null +++ b/driver/xf86-video-mga/src/mga_sarea.h @@ -0,0 +1,222 @@ +/* $XFree86$ */ + +/* + * Copyright 2000 Gareth Hughes + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * GARETH HUGHES BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Gareth Hughes <gareth@valinux.com> + */ + +#ifndef __MGA_SAREA_H__ +#define __MGA_SAREA_H__ + +/* WARNING: If you change any of these defines, make sure to change + * the kernel include file as well (mga_drm.h) + */ +#ifndef __MGA_SAREA_DEFINES__ +#define __MGA_SAREA_DEFINES__ + +/* WARP pipe flags + */ +#define MGA_F 0x1 /* fog */ +#define MGA_A 0x2 /* alpha */ +#define MGA_S 0x4 /* specular */ +#define MGA_T2 0x8 /* multitexture */ + +#define MGA_WARP_TGZ 0 +#define MGA_WARP_TGZF (MGA_F) +#define MGA_WARP_TGZA (MGA_A) +#define MGA_WARP_TGZAF (MGA_F|MGA_A) +#define MGA_WARP_TGZS (MGA_S) +#define MGA_WARP_TGZSF (MGA_S|MGA_F) +#define MGA_WARP_TGZSA (MGA_S|MGA_A) +#define MGA_WARP_TGZSAF (MGA_S|MGA_F|MGA_A) +#define MGA_WARP_T2GZ (MGA_T2) +#define MGA_WARP_T2GZF (MGA_T2|MGA_F) +#define MGA_WARP_T2GZA (MGA_T2|MGA_A) +#define MGA_WARP_T2GZAF (MGA_T2|MGA_A|MGA_F) +#define MGA_WARP_T2GZS (MGA_T2|MGA_S) +#define MGA_WARP_T2GZSF (MGA_T2|MGA_S|MGA_F) +#define MGA_WARP_T2GZSA (MGA_T2|MGA_S|MGA_A) +#define MGA_WARP_T2GZSAF (MGA_T2|MGA_S|MGA_F|MGA_A) + +#define MGA_MAX_G200_PIPES 8 /* no multitex */ +#define MGA_MAX_G400_PIPES 16 +#define MGA_MAX_WARP_PIPES MGA_MAX_G400_PIPES +#define MGA_WARP_UCODE_SIZE 32768 /* in bytes */ + +#define MGA_CARD_TYPE_G200 1 +#define MGA_CARD_TYPE_G400 2 + + +#define MGA_FRONT 0x1 +#define MGA_BACK 0x2 +#define MGA_DEPTH 0x4 + +/* What needs to be changed for the current vertex dma buffer? + */ +#define MGA_UPLOAD_CONTEXT 0x1 +#define MGA_UPLOAD_TEX0 0x2 +#define MGA_UPLOAD_TEX1 0x4 +#define MGA_UPLOAD_PIPE 0x8 +#define MGA_UPLOAD_TEX0IMAGE 0x10 +#define MGA_UPLOAD_TEX1IMAGE 0x20 +#define MGA_UPLOAD_2D 0x40 +#define MGA_WAIT_AGE 0x80 /* handled client-side */ +#define MGA_UPLOAD_CLIPRECTS 0x100 /* handled client-side */ +#if 0 +#define MGA_DMA_FLUSH 0x200 /* set when someone gets the lock + quiescent */ +#endif + +/* 32 buffers of 64k each, total 1 meg. + */ +#define MGA_BUFFER_SIZE (1 << 16) +#define MGA_NUM_BUFFERS 128 + +/* Keep these small for testing. + */ +#define MGA_NR_SAREA_CLIPRECTS 8 + +/* 2 heaps (1 for card, 1 for agp), each divided into upto 128 + * regions, subject to a minimum region size of (1<<16) == 64k. + * + * Clients may subdivide regions internally, but when sharing between + * clients, the region size is the minimum granularity. + */ + +#define MGA_CARD_HEAP 0 +#define MGA_AGP_HEAP 1 +#define MGA_NR_TEX_HEAPS 2 +#define MGA_NR_TEX_REGIONS 16 +#define MGA_LOG_MIN_TEX_REGION_SIZE 16 + +#endif /* __MGA_SAREA_DEFINES__ */ + + +/* Setup registers for 3D context + */ +typedef struct { + unsigned int dstorg; + unsigned int maccess; + unsigned int plnwt; + unsigned int dwgctl; + unsigned int alphactrl; + unsigned int fogcolor; + unsigned int wflag; + unsigned int tdualstage0; + unsigned int tdualstage1; + unsigned int fcol; + unsigned int stencil; + unsigned int stencilctl; +} mga_context_regs_t; + +/* Setup registers for 2D, X server + */ +typedef struct { + unsigned int pitch; +} mga_server_regs_t; + +/* Setup registers for each texture unit + */ +typedef struct { + unsigned int texctl; + unsigned int texctl2; + unsigned int texfilter; + unsigned int texbordercol; + unsigned int texorg; + unsigned int texwidth; + unsigned int texheight; + unsigned int texorg1; + unsigned int texorg2; + unsigned int texorg3; + unsigned int texorg4; +} mga_texture_regs_t; + +/* General ageing mechanism + */ +typedef struct { + unsigned int head; /* Position of head pointer */ + unsigned int wrap; /* Primary DMA wrap count */ +} mga_age_t; + + +/* WARNING: Do not change the SAREA structure without changing the kernel + * as well. + */ +typedef struct { + /* The channel for communication of state information to the kernel + * on firing a vertex dma buffer. + */ + mga_context_regs_t ContextState; + mga_server_regs_t ServerState; + mga_texture_regs_t TexState[2]; + unsigned int WarpPipe; + unsigned int dirty; + unsigned int vertsize; + + /* The current cliprects, or a subset thereof. + */ + drm_clip_rect_t boxes[MGA_NR_SAREA_CLIPRECTS]; + unsigned int nbox; + + /* Information about the most recently used 3d drawable. The + * client fills in the req_* fields, the server fills in the + * exported_ fields and puts the cliprects into boxes, above. + * + * The client clears the exported_drawable field before + * clobbering the boxes data. + */ + unsigned int req_drawable; /* the X drawable id */ + unsigned int req_draw_buffer; /* MGA_FRONT or MGA_BACK */ + + unsigned int exported_drawable; + unsigned int exported_index; + unsigned int exported_stamp; + unsigned int exported_buffers; + unsigned int exported_nfront; /* FIXME: verify signedness... */ + unsigned int exported_nback; + int exported_back_x, exported_front_x, exported_w; + int exported_back_y, exported_front_y, exported_h; + drm_clip_rect_t exported_boxes[MGA_NR_SAREA_CLIPRECTS]; + + /* Counters for aging textures and for client-side throttling. + */ + unsigned int status[4]; + unsigned int last_wrap; + + mga_age_t last_frame; + unsigned int last_enqueue; /* last time a buffer was enqueued */ + unsigned int last_dispatch; /* age of the most recently dispatched buffer */ + unsigned int last_quiescent; /* */ + + /* LRU lists for texture memory in agp space and on the card. + */ + drmTextureRegion texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS+1]; + unsigned int texAge[MGA_NR_TEX_HEAPS]; + + /* Last context that uploaded statel + */ + int ctxOwner; +} MGASAREAPrivRec, *MGASAREAPrivPtr; + +#endif diff --git a/driver/xf86-video-mga/src/mga_shadow.c b/driver/xf86-video-mga/src/mga_shadow.c new file mode 100644 index 000000000..94f199c9d --- /dev/null +++ b/driver/xf86-video-mga/src/mga_shadow.c @@ -0,0 +1,256 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_shadow.c,v 1.1 1999/08/14 10:49:48 dawes Exp $ */ + +/* + Copyright (c) 1999, The XFree86 Project Inc. + Written by Mark Vojkovich <markv@valinux.com> +*/ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include "xf86.h" +#include "xf86_OSproc.h" +#include "xf86Resources.h" +#include "xf86PciInfo.h" +#include "xf86Pci.h" +#include "mga_reg.h" +#include "mga.h" +#include "shadowfb.h" +#include "servermd.h" + + + +void +MGARefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox) +{ + MGAPtr pMga = MGAPTR(pScrn); + int width, height, Bpp, FBPitch; + unsigned char *src, *dst; + + Bpp = pScrn->bitsPerPixel >> 3; + FBPitch = BitmapBytePad(pScrn->displayWidth * pScrn->bitsPerPixel); + + while(num--) { + width = (pbox->x2 - pbox->x1) * Bpp; + height = pbox->y2 - pbox->y1; + src = pMga->ShadowPtr + (pbox->y1 * pMga->ShadowPitch) + + (pbox->x1 * Bpp); + dst = pMga->FbStart + (pbox->y1 * FBPitch) + (pbox->x1 * Bpp); + + while(height--) { + memcpy(dst, src, width); + dst += FBPitch; + src += pMga->ShadowPitch; + } + + pbox++; + } +} + +void +MGAPointerMoved(int index, int x, int y) +{ + ScrnInfoPtr pScrn = xf86Screens[index]; + MGAPtr pMga = MGAPTR(pScrn); + int newX, newY; + + if(pMga->Rotate == 1) { + newX = pScrn->pScreen->height - y - 1; + newY = x; + } else { + newX = y; + newY = pScrn->pScreen->width - x - 1; + } + + (*pMga->PointerMoved)(index, newX, newY); +} + +void +MGARefreshArea8(ScrnInfoPtr pScrn, int num, BoxPtr pbox) +{ + MGAPtr pMga = MGAPTR(pScrn); + int count, width, height, y1, y2, dstPitch, srcPitch; + CARD8 *dstPtr, *srcPtr, *src; + CARD32 *dst; + + dstPitch = pScrn->displayWidth; + srcPitch = -pMga->Rotate * pMga->ShadowPitch; + + while(num--) { + width = pbox->x2 - pbox->x1; + y1 = pbox->y1 & ~3; + y2 = (pbox->y2 + 3) & ~3; + height = (y2 - y1) >> 2; /* in dwords */ + + if(pMga->Rotate == 1) { + dstPtr = pMga->FbStart + + (pbox->x1 * dstPitch) + pScrn->virtualX - y2; + srcPtr = pMga->ShadowPtr + ((1 - y2) * srcPitch) + pbox->x1; + } else { + dstPtr = pMga->FbStart + + ((pScrn->virtualY - pbox->x2) * dstPitch) + y1; + srcPtr = pMga->ShadowPtr + (y1 * srcPitch) + pbox->x2 - 1; + } + + while(width--) { + src = srcPtr; + dst = (CARD32*)dstPtr; + count = height; + while(count--) { + *(dst++) = src[0] | (src[srcPitch] << 8) | + (src[srcPitch * 2] << 16) | + (src[srcPitch * 3] << 24); + src += srcPitch * 4; + } + srcPtr += pMga->Rotate; + dstPtr += dstPitch; + } + + pbox++; + } +} + + +void +MGARefreshArea16(ScrnInfoPtr pScrn, int num, BoxPtr pbox) +{ + MGAPtr pMga = MGAPTR(pScrn); + int count, width, height, y1, y2, dstPitch, srcPitch; + CARD16 *dstPtr, *srcPtr, *src; + CARD32 *dst; + + dstPitch = pScrn->displayWidth; + srcPitch = -pMga->Rotate * pMga->ShadowPitch >> 1; + + while(num--) { + width = pbox->x2 - pbox->x1; + y1 = pbox->y1 & ~1; + y2 = (pbox->y2 + 1) & ~1; + height = (y2 - y1) >> 1; /* in dwords */ + + if(pMga->Rotate == 1) { + dstPtr = (CARD16*)pMga->FbStart + + (pbox->x1 * dstPitch) + pScrn->virtualX - y2; + srcPtr = (CARD16*)pMga->ShadowPtr + + ((1 - y2) * srcPitch) + pbox->x1; + } else { + dstPtr = (CARD16*)pMga->FbStart + + ((pScrn->virtualY - pbox->x2) * dstPitch) + y1; + srcPtr = (CARD16*)pMga->ShadowPtr + + (y1 * srcPitch) + pbox->x2 - 1; + } + + while(width--) { + src = srcPtr; + dst = (CARD32*)dstPtr; + count = height; + while(count--) { + *(dst++) = src[0] | (src[srcPitch] << 16); + src += srcPitch * 2; + } + srcPtr += pMga->Rotate; + dstPtr += dstPitch; + } + + pbox++; + } +} + + +/* this one could be faster */ +void +MGARefreshArea24(ScrnInfoPtr pScrn, int num, BoxPtr pbox) +{ + MGAPtr pMga = MGAPTR(pScrn); + int count, width, height, y1, y2, dstPitch, srcPitch; + CARD8 *dstPtr, *srcPtr, *src; + CARD32 *dst; + + dstPitch = BitmapBytePad(pScrn->displayWidth * 24); + srcPitch = -pMga->Rotate * pMga->ShadowPitch; + + while(num--) { + width = pbox->x2 - pbox->x1; + y1 = pbox->y1 & ~3; + y2 = (pbox->y2 + 3) & ~3; + height = (y2 - y1) >> 2; /* blocks of 3 dwords */ + + if(pMga->Rotate == 1) { + dstPtr = pMga->FbStart + + (pbox->x1 * dstPitch) + ((pScrn->virtualX - y2) * 3); + srcPtr = pMga->ShadowPtr + ((1 - y2) * srcPitch) + (pbox->x1 * 3); + } else { + dstPtr = pMga->FbStart + + ((pScrn->virtualY - pbox->x2) * dstPitch) + (y1 * 3); + srcPtr = pMga->ShadowPtr + (y1 * srcPitch) + (pbox->x2 * 3) - 3; + } + + while(width--) { + src = srcPtr; + dst = (CARD32*)dstPtr; + count = height; + while(count--) { + dst[0] = src[0] | (src[1] << 8) | (src[2] << 16) | + (src[srcPitch] << 24); + dst[1] = src[srcPitch + 1] | (src[srcPitch + 2] << 8) | + (src[srcPitch * 2] << 16) | + (src[(srcPitch * 2) + 1] << 24); + dst[2] = src[(srcPitch * 2) + 2] | (src[srcPitch * 3] << 8) | + (src[(srcPitch * 3) + 1] << 16) | + (src[(srcPitch * 3) + 2] << 24); + dst += 3; + src += srcPitch * 4; + } + srcPtr += pMga->Rotate * 3; + dstPtr += dstPitch; + } + + pbox++; + } +} + +void +MGARefreshArea32(ScrnInfoPtr pScrn, int num, BoxPtr pbox) +{ + MGAPtr pMga = MGAPTR(pScrn); + int count, width, height, dstPitch, srcPitch; + CARD32 *dstPtr, *srcPtr, *src, *dst; + + dstPitch = pScrn->displayWidth; + srcPitch = -pMga->Rotate * pMga->ShadowPitch >> 2; + + while(num--) { + width = pbox->x2 - pbox->x1; + height = pbox->y2 - pbox->y1; + + if(pMga->Rotate == 1) { + dstPtr = (CARD32*)pMga->FbStart + + (pbox->x1 * dstPitch) + pScrn->virtualX - pbox->y2; + srcPtr = (CARD32*)pMga->ShadowPtr + + ((1 - pbox->y2) * srcPitch) + pbox->x1; + } else { + dstPtr = (CARD32*)pMga->FbStart + + ((pScrn->virtualY - pbox->x2) * dstPitch) + pbox->y1; + srcPtr = (CARD32*)pMga->ShadowPtr + + (pbox->y1 * srcPitch) + pbox->x2 - 1; + } + + while(width--) { + src = srcPtr; + dst = dstPtr; + count = height; + while(count--) { + *(dst++) = *src; + src += srcPitch; + } + srcPtr += pMga->Rotate; + dstPtr += dstPitch; + } + + pbox++; + } +} + + + diff --git a/driver/xf86-video-mga/src/mga_storm.c b/driver/xf86-video-mga/src/mga_storm.c new file mode 100644 index 000000000..417675fe4 --- /dev/null +++ b/driver/xf86-video-mga/src/mga_storm.c @@ -0,0 +1,2746 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_storm.c,v 1.99tsi Exp $ */ + +#define PSZ 8 + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +/* All drivers should typically include these */ +#include "xf86.h" +#include "xf86_OSproc.h" + +/* For correct __inline__ usage */ +#include "compiler.h" + +/* Drivers that need to access the PCI config space directly need this */ +#include "xf86Pci.h" + +/* Drivers for PCI hardware need this */ +#include "xf86PciInfo.h" + +/* Drivers that use XAA need this */ +#include "xaa.h" +#include "xaalocal.h" +#include "xf86fbman.h" +#include "miline.h" +#include "servermd.h" + +#ifdef XF86DRI +#include "cfb.h" +#include "GL/glxtokens.h" +#endif + +#include "mga.h" +#include "mga_reg.h" +#include "mga_macros.h" + +#ifdef XF86DRI +#include "mga_dri.h" +#endif + +#define REPLICATE_8(r) (((r) & 0x0ff) | (((r) & 0x0ff) << 8) \ + | (((r) & 0x0ff) << 16) | (((r) & 0x0ff) << 24)) +#define REPLICATE_16(r) (((r) & 0x0000ffff) | (((r) & 0x0000ffff) << 16)) +#define REPLICATE_24(r) (((r) & 0x00ffffff) | (((r) & 0x00ffffff) << 24)) +#define REPLICATE_32(r) (r) + + +#define SET_FOREGROUND_REPLICATED(c, rep_c) \ + if((c) != pMga->FgColor) { \ + pMga->FgColor = (c); \ + OUTREG(MGAREG_FCOL,(rep_c)); \ + } + +#define SET_BACKGROUND_REPLICATED(c, rep_c) \ + if((c) != pMga->BgColor) { \ + pMga->BgColor = (c); \ + OUTREG(MGAREG_BCOL,(rep_c)); \ + } + + +#define MGAMoveDWORDS(d,s,c) \ +do { \ + write_mem_barrier(); \ + XAAMoveDWORDS((d),(s),(c)); \ +} while (0) + +static void mgaSetupForSolidFill( ScrnInfoPtr pScrn, int color, + int rop, unsigned int planemask ); + +static void mgaSetupForScreenToScreenCopy( ScrnInfoPtr pScrn, + int xdir, int ydir, int rop, unsigned int planemask, int trans ); + +static void mgaSubsequentScreenToScreenCopy( ScrnInfoPtr pScrn, + int srcX, int srcY, int dstX, int dstY, int w, int h ); + +static void mgaSubsequentScreenToScreenCopy_FastBlit( ScrnInfoPtr pScrn, + int srcX, int srcY, int dstX, int dstY, int w, int h ); + +static void mgaSetupForScanlineCPUToScreenColorExpandFill( ScrnInfoPtr pScrn, + int fg, int bg, int rop, unsigned int planemask ); + +static void mgaSubsequentScanlineCPUToScreenColorExpandFill( ScrnInfoPtr pScrn, + int x, int y, int w, int h, int skipleft ); + +static void mgaSubsequentColorExpandScanline( ScrnInfoPtr pScrn, int bufno ); + +static void mgaSubsequentColorExpandScanlineIndirect( ScrnInfoPtr pScrn, + int bufno ); + +static void mgaSubsequentSolidFillRect( ScrnInfoPtr pScrn, int x, int y, + int w, int h ); + +static void mgaSubsequentSolidFillTrap( ScrnInfoPtr pScrn, int y, int h, + int left, int dxL, int dyL, int eL, int right, int dxR, int dyR, int eR ); + +static void mgaSubsequentSolidHorVertLine( ScrnInfoPtr pScrn, int x, int y, + int len, int dir ); + +static void mgaSubsequentSolidTwoPointLine( ScrnInfoPtr pScrn, int x1, int y1, + int x2, int y2, int flags ); + +static void mgaSetupForMono8x8PatternFill( ScrnInfoPtr pScrn, + int patx, int paty, int fg, int bg, int rop, unsigned int planemask ); + +static void mgaSubsequentMono8x8PatternFillRect( ScrnInfoPtr pScrn, + int patx, int paty, int x, int y, int w, int h ); + +static void mgaSubsequentMono8x8PatternFillRect_Additional( ScrnInfoPtr pScrn, + int patx, int paty, int x, int y, int w, int h ); + +static void mgaSubsequentMono8x8PatternFillTrap( ScrnInfoPtr pScrn, + int patx, int paty, int y, int h, int left, int dxL, int dyL, int eL, + int right, int dxR, int dyR, int eR ); + +static void mgaSetupForScanlineImageWrite( ScrnInfoPtr pScrn, int rop, + unsigned int planemask, int transparency_color, int bpp, int depth ); + +static void mgaSubsequentScanlineImageWriteRect( ScrnInfoPtr pScrn, + int x, int y, int w, int h, int skipleft ); + +static void mgaSubsequentImageWriteScanline( ScrnInfoPtr pScrn, int num ); + +static void mgaSetupForPlanarScreenToScreenColorExpandFill( ScrnInfoPtr pScrn, + int fg, int bg, int rop, unsigned int planemask ); + +static void mgaSubsequentPlanarScreenToScreenColorExpandFill( ScrnInfoPtr pScrn, + int x, int y, int w, int h, int srcx, int srcy, int skipleft ); + +static void mgaSetupForScreenToScreenColorExpandFill( ScrnInfoPtr pScrn, + int fg, int bg, int rop, unsigned int planemask ); + +static void mgaSubsequentScreenToScreenColorExpandFill( ScrnInfoPtr pScrn, + int x, int y, int w, int h, int srcx, int srcy, int skipleft ); + +#if X_BYTE_ORDER == X_LITTLE_ENDIAN +static void mgaSetupForDashedLine( ScrnInfoPtr pScrn, int fg, int bg, + int rop, unsigned int planemask, int length, unsigned char *pattern ); + +static void mgaSubsequentDashedTwoPointLine( ScrnInfoPtr pScrn, + int x1, int y1, int x2, int y2, int flags, int phase ); +#endif + +void mgaRestoreAccelState( ScrnInfoPtr pScrn ); + +#ifdef XF86DRI +void mgaDRIInitBuffers(WindowPtr pWin, RegionPtr prgn, CARD32 index); +void mgaDRIMoveBuffers(WindowPtr pParent, DDXPointRec ptOldOrg, + RegionPtr prgnSrc, CARD32 index); +#endif + +extern void MGASetClippingRectangle(ScrnInfoPtr pScrn, int x1, int y1, + int x2, int y2); +extern void MGADisableClipping(ScrnInfoPtr pScrn); +extern void MGAFillSolidRectsDMA(ScrnInfoPtr pScrn, int fg, int rop, + unsigned int planemask, int nBox, BoxPtr pBox); +extern void MGAFillSolidSpansDMA(ScrnInfoPtr pScrn, int fg, int rop, + unsigned int planemask, int n, DDXPointPtr ppt, + int *pwidth, int fSorted); +extern void MGAFillMono8x8PatternRectsTwoPass(ScrnInfoPtr pScrn, int fg, int bg, + int rop, unsigned int planemask, int nBox, + BoxPtr pBox, int pattern0, int pattern1, + int xorigin, int yorigin); +extern void MGAValidatePolyArc(GCPtr, unsigned long, DrawablePtr); +extern void MGAValidatePolyPoint(GCPtr, unsigned long, DrawablePtr); +extern void MGAFillCacheBltRects(ScrnInfoPtr, int, unsigned int, int, BoxPtr, + int, int, XAACacheInfoPtr); + + +static __inline__ void +common_replicate_colors_and_mask( unsigned int fg, unsigned int bg, + unsigned int pm, + unsigned int bpp, + unsigned int * rep_fg, + unsigned int * rep_bg, + unsigned int * rep_pm ) +{ + switch( bpp ) { + case 8: + *rep_fg = REPLICATE_8( fg ); + *rep_bg = REPLICATE_8( bg ); + *rep_pm = REPLICATE_8( pm ); + break; + case 16: + *rep_fg = REPLICATE_16( fg ); + *rep_bg = REPLICATE_16( bg ); + *rep_pm = REPLICATE_16( pm ); + break; + case 24: + *rep_fg = REPLICATE_24( fg ); + *rep_bg = REPLICATE_24( bg ); + *rep_pm = REPLICATE_24( pm ); + break; + case 32: + *rep_fg = REPLICATE_32( fg ); + *rep_bg = REPLICATE_32( bg ); + *rep_pm = REPLICATE_32( pm ); + break; + } +} + + +#ifdef RENDER + +static Bool MGASetupForCPUToScreenAlphaTexture(ScrnInfoPtr pScrn, int op, + CARD16 red, CARD16 green, CARD16 blue, CARD16 alpha, int alphaType, + CARD8 *alphaPtr, int alphaPitch, int width, int height, int flags); + +static Bool MGASetupForCPUToScreenAlphaTextureFaked(ScrnInfoPtr Scrn, int op, + CARD16 red, CARD16 green, CARD16 blue, CARD16 alpha, int alphaType, + CARD8 *alphaPtr, int alphaPitch, int width, int height, int flags); + +static Bool MGASetupForCPUToScreenTexture(ScrnInfoPtr pScrn, int op, + int texType, CARD8 *texPtr, int texPitch, int width, int height, + int flags); + +static void MGASubsequentCPUToScreenTexture(ScrnInfoPtr pScrn, int dstx, + int dsty, int srcx, int srcy, int width, int height); + +#include "mipict.h" +#include "dixstruct.h" + +CARD32 MGAAlphaTextureFormats[2] = {PICT_a8, 0}; +CARD32 MGATextureFormats[2] = {PICT_a8r8g8b8, 0}; + +static void +RemoveLinear (FBLinearPtr linear) +{ + MGAPtr pMga = (MGAPtr)(linear->devPrivate.ptr); + + pMga->LinearScratch = NULL; /* just lost our scratch */ +} + +static void +RenderCallback (ScrnInfoPtr pScrn) +{ + MGAPtr pMga = MGAPTR(pScrn); + + if((currentTime.milliseconds > pMga->RenderTime) && pMga->LinearScratch) { + xf86FreeOffscreenLinear(pMga->LinearScratch); + pMga->LinearScratch = NULL; + } + + if(!pMga->LinearScratch) + pMga->RenderCallback = NULL; +} + +#define RENDER_DELAY 15000 + +static Bool +AllocateLinear ( + ScrnInfoPtr pScrn, + int sizeNeeded +){ + MGAPtr pMga = MGAPTR(pScrn); + + pMga->RenderTime = currentTime.milliseconds + RENDER_DELAY; + pMga->RenderCallback = RenderCallback; + + if(pMga->LinearScratch) { + if(pMga->LinearScratch->size >= sizeNeeded) + return TRUE; + else { + if(xf86ResizeOffscreenLinear(pMga->LinearScratch, sizeNeeded)) + return TRUE; + + xf86FreeOffscreenLinear(pMga->LinearScratch); + pMga->LinearScratch = NULL; + } + } + + pMga->LinearScratch = xf86AllocateOffscreenLinear( + pScrn->pScreen, sizeNeeded, 32, + NULL, RemoveLinear, pMga); + + return (pMga->LinearScratch != NULL); +} + +static int +GetPowerOfTwo(int w) +{ + int Pof2 = 0; + int i = 12; + + while(--i) { + if(w & (1 << i)) { + Pof2 = i; + if(w & ((1 << i) - 1)) + Pof2++; + break; + } + } + return Pof2; +} + + +static int tex_padw, tex_padh; + +Bool MGASetupForCPUToScreenAlphaTextureFaked( ScrnInfoPtr pScrn, int op, + CARD16 red, CARD16 green, + CARD16 blue, CARD16 alpha, + int alphaType, CARD8 *alphaPtr, + int alphaPitch, int width, + int height, int flags ) +{ + int log2w, log2h, pitch, sizeNeeded, offset; + unsigned int texctl, dwgctl, alphactrl; + MGAPtr pMga = MGAPTR(pScrn); + + if(op != PictOpOver) /* only one tested */ + return FALSE; + + if((width > 2048) || (height > 2048)) + return FALSE; + + log2w = GetPowerOfTwo(width); + log2h = GetPowerOfTwo(height); + + CHECK_DMA_QUIESCENT(pMga, pScrn); + + if(pMga->Overlay8Plus24) { + WAITFIFO(1); + SET_PLANEMASK_REPLICATED( 0x00ffffff, 0xffffffff, 32 ); + } + + pitch = (width + 15) & ~15; + sizeNeeded = pitch * height; + if(pScrn->bitsPerPixel == 16) + sizeNeeded <<= 1; + + if(!AllocateLinear(pScrn, sizeNeeded)) + return FALSE; + + offset = pMga->LinearScratch->offset << 1; + if(pScrn->bitsPerPixel == 32) + offset <<= 1; + + if(pMga->AccelInfoRec->NeedToSync) + MGAStormSync(pScrn); + + XAA_888_plus_PICT_a8_to_8888( + (blue >> 8) | (green & 0xff00) | ((red & 0xff00) << 8), + alphaPtr, alphaPitch, (CARD32*)(pMga->FbStart + offset), + pitch, width, height); + + tex_padw = 1 << log2w; + tex_padh = 1 << log2h; + + WAITFIFO(15); + OUTREG(MGAREG_TMR0, (1 << 20) / tex_padw); /* sx inc */ + OUTREG(MGAREG_TMR1, 0); /* sy inc */ + OUTREG(MGAREG_TMR2, 0); /* tx inc */ + OUTREG(MGAREG_TMR3, (1 << 20) / tex_padh); /* ty inc */ + OUTREG(MGAREG_TMR4, 0x00000000); + OUTREG(MGAREG_TMR5, 0x00000000); + OUTREG(MGAREG_TMR8, 0x00010000); + OUTREG(MGAREG_TEXORG, offset); + OUTREG(MGAREG_TEXWIDTH, log2w | (((8 - log2w) & 63) << 9) | + ((width - 1) << 18)); + OUTREG(MGAREG_TEXHEIGHT, log2h | (((8 - log2h) & 63) << 9) | + ((height - 1) << 18)); + + texctl = MGA_TW32 | MGA_PITCHLIN | MGA_TAKEY | MGA_CLAMPUV | + ((pitch & 0x07FF) << 9); + dwgctl = MGADWG_TEXTURE_TRAP | MGADWG_I | MGADWG_ARZERO | + MGADWG_SGNZERO | MGADWG_SHIFTZERO | 0xc0000; + alphactrl = MGA_SRC_ALPHA | MGA_DST_ONE_MINUS_SRC_ALPHA | + MGA_ALPHACHANNEL; + + OUTREG(MGAREG_TEXCTL, texctl); + OUTREG(MGAREG_TEXCTL2, MGA_TC2_DECALDIS | MGA_TC2_CKSTRANSDIS); + OUTREG(MGAREG_DWGCTL, dwgctl); + OUTREG(MGAREG_TEXFILTER, ((0x1e << 20) | MGA_MAG_BILIN)); + OUTREG(MGAREG_ALPHACTRL, alphactrl); + + return TRUE; +} + +Bool +MGASetupForCPUToScreenAlphaTexture ( + ScrnInfoPtr pScrn, + int op, + CARD16 red, + CARD16 green, + CARD16 blue, + CARD16 alpha, + int alphaType, + CARD8 *alphaPtr, + int alphaPitch, + int width, + int height, + int flags +){ + int log2w, log2h, i, pitch, sizeNeeded, offset; + unsigned int texctl, dwgctl, alphactrl; + CARD8 *dst; + MGAPtr pMga = MGAPTR(pScrn); + + if(op != PictOpOver) /* only one tested */ + return FALSE; + + if((width > 2048) || (height > 2048)) + return FALSE; + + log2w = GetPowerOfTwo(width); + log2h = GetPowerOfTwo(height); + + CHECK_DMA_QUIESCENT(pMga, pScrn); + + if(pMga->Overlay8Plus24) { + WAITFIFO(1); + SET_PLANEMASK_REPLICATED( 0x00ffffff, 0xffffffff, 32 ); + } + + pitch = (width + 15) & ~15; + sizeNeeded = (pitch * height) >> 1; + if(pScrn->bitsPerPixel == 32) + sizeNeeded >>= 1; + + if(!AllocateLinear(pScrn, sizeNeeded)) + return FALSE; + + offset = pMga->LinearScratch->offset << 1; + if(pScrn->bitsPerPixel == 32) + offset <<= 1; + + if(pMga->AccelInfoRec->NeedToSync) + MGAStormSync(pScrn); + + i = height; + dst = pMga->FbStart + offset; + while(i--) { + memcpy(dst, alphaPtr, width); + dst += pitch; + alphaPtr += alphaPitch; + } + + tex_padw = 1 << log2w; + tex_padh = 1 << log2h; + + + WAITFIFO(12); + OUTREG(MGAREG_DR4, red << 7); /* red start */ + OUTREG(MGAREG_DR6, 0); + OUTREG(MGAREG_DR7, 0); + OUTREG(MGAREG_DR8, green << 7); /* green start */ + OUTREG(MGAREG_DR10, 0); + OUTREG(MGAREG_DR11, 0); + OUTREG(MGAREG_DR12, blue << 7); /* blue start */ + OUTREG(MGAREG_DR14, 0); + OUTREG(MGAREG_DR15, 0); + OUTREG(MGAREG_ALPHASTART, alpha << 7); /* alpha start */ + OUTREG(MGAREG_ALPHAXINC, 0); + OUTREG(MGAREG_ALPHAYINC, 0); + + WAITFIFO(15); + OUTREG(MGAREG_TMR0, (1 << 20) / tex_padw); /* sx inc */ + OUTREG(MGAREG_TMR1, 0); /* sy inc */ + OUTREG(MGAREG_TMR2, 0); /* tx inc */ + OUTREG(MGAREG_TMR3, (1 << 20) / tex_padh); /* ty inc */ + OUTREG(MGAREG_TMR4, 0x00000000); + OUTREG(MGAREG_TMR5, 0x00000000); + OUTREG(MGAREG_TMR8, 0x00010000); + OUTREG(MGAREG_TEXORG, offset); + OUTREG(MGAREG_TEXWIDTH, log2w | (((8 - log2w) & 63) << 9) | + ((width - 1) << 18)); + OUTREG(MGAREG_TEXHEIGHT, log2h | (((8 - log2h) & 63) << 9) | + ((height - 1) << 18)); + + texctl = MGA_TW8A | MGA_PITCHLIN | MGA_TAKEY | MGA_CLAMPUV | + MGA_TEXMODULATE | + ((pitch & 0x07FF) << 9); + dwgctl = MGADWG_TEXTURE_TRAP | MGADWG_I | MGADWG_ARZERO | + MGADWG_SGNZERO | MGADWG_SHIFTZERO | 0xc0000; + alphactrl = MGA_SRC_ONE | MGA_DST_ONE_MINUS_SRC_ALPHA | + MGA_ALPHACHANNEL | MGA_MODULATEDALPHA; + + OUTREG(MGAREG_TEXCTL, texctl); + OUTREG(MGAREG_TEXCTL2, MGA_TC2_DECALDIS | MGA_TC2_CKSTRANSDIS); + OUTREG(MGAREG_DWGCTL, dwgctl); + OUTREG(MGAREG_TEXFILTER, ((0x1e << 20) | MGA_MAG_BILIN)); + OUTREG(MGAREG_ALPHACTRL, alphactrl); + + return TRUE; +} + + +Bool +MGASetupForCPUToScreenTexture ( + ScrnInfoPtr pScrn, + int op, + int texType, + CARD8 *texPtr, + int texPitch, + int width, + int height, + int flags +){ + int log2w, log2h, i, pitch, sizeNeeded, offset; + unsigned int texctl, dwgctl, alphactrl; + MGAPtr pMga = MGAPTR(pScrn); + + if(op != PictOpOver) /* only one tested */ + return FALSE; + + if((width > 2048) || (height > 2048)) + return FALSE; + + log2w = GetPowerOfTwo(width); + log2h = GetPowerOfTwo(height); + + CHECK_DMA_QUIESCENT(pMga, pScrn); + + if(pMga->Overlay8Plus24) { + WAITFIFO(1); + SET_PLANEMASK_REPLICATED( 0x00ffffff, 0xffffffff, 32 ); + } + + pitch = (width + 15) & ~15; + sizeNeeded = pitch * height; + if(pScrn->bitsPerPixel == 16) + sizeNeeded <<= 1; + + if(!AllocateLinear(pScrn, sizeNeeded)) + return FALSE; + + offset = pMga->LinearScratch->offset << 1; + if(pScrn->bitsPerPixel == 32) + offset <<= 1; + + if(pMga->AccelInfoRec->NeedToSync) + MGAStormSync(pScrn); + + { + CARD8 *dst = (CARD8*)(pMga->FbStart + offset); + i = height; + while(i--) { + memcpy(dst, texPtr, width << 2); + texPtr += texPitch; + dst += pitch << 2; + } + } + + tex_padw = 1 << log2w; + tex_padh = 1 << log2h; + + WAITFIFO(15); + OUTREG(MGAREG_TMR0, (1 << 20) / tex_padw); /* sx inc */ + OUTREG(MGAREG_TMR1, 0); /* sy inc */ + OUTREG(MGAREG_TMR2, 0); /* tx inc */ + OUTREG(MGAREG_TMR3, (1 << 20) / tex_padh); /* ty inc */ + OUTREG(MGAREG_TMR4, 0x00000000); + OUTREG(MGAREG_TMR5, 0x00000000); + OUTREG(MGAREG_TMR8, 0x00010000); + OUTREG(MGAREG_TEXORG, offset); + OUTREG(MGAREG_TEXWIDTH, log2w | (((8 - log2w) & 63) << 9) | + ((width - 1) << 18)); + OUTREG(MGAREG_TEXHEIGHT, log2h | (((8 - log2h) & 63) << 9) | + ((height - 1) << 18)); + + texctl = MGA_TW32 | MGA_PITCHLIN | MGA_TAKEY | MGA_CLAMPUV | + ((pitch & 0x07FF) << 9); + dwgctl = MGADWG_TEXTURE_TRAP | MGADWG_I | MGADWG_ARZERO | + MGADWG_SGNZERO | MGADWG_SHIFTZERO | 0xc0000; + alphactrl = MGA_SRC_ONE | MGA_DST_ONE_MINUS_SRC_ALPHA | + MGA_ALPHACHANNEL; + + OUTREG(MGAREG_TEXCTL, texctl); + OUTREG(MGAREG_TEXCTL2, MGA_TC2_DECALDIS | MGA_TC2_CKSTRANSDIS); + OUTREG(MGAREG_DWGCTL, dwgctl); + OUTREG(MGAREG_TEXFILTER, ((0x1e << 20) | MGA_MAG_BILIN)); + OUTREG(MGAREG_ALPHACTRL, alphactrl); + + return TRUE; +} +void +MGASubsequentCPUToScreenTexture ( + ScrnInfoPtr pScrn, + int dstx, + int dsty, + int srcx, + int srcy, + int width, + int height +){ + MGAPtr pMga = MGAPTR(pScrn); + + WAITFIFO(4); + OUTREG(MGAREG_TMR6, (srcx << 20) / tex_padw); + OUTREG(MGAREG_TMR7, (srcy << 20) / tex_padh); + OUTREG(MGAREG_FXBNDRY, ((dstx + width) << 16) | (dstx & 0xffff)); + OUTREG(MGAREG_YDSTLEN + MGAREG_EXEC, (dsty << 16) | height); + + pMga->AccelInfoRec->NeedToSync = TRUE; +} + + +#endif /* defined(RENDER) */ + +Bool mgaAccelInit( ScreenPtr pScreen ) +{ + XAAInfoRecPtr infoPtr; + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + MGAPtr pMga = MGAPTR(pScrn); + int maxFastBlitMem, maxlines; + Bool doRender = FALSE; + BoxRec AvailFBArea; + int i; + + pMga->ScratchBuffer = xalloc(((pScrn->displayWidth * pMga->CurrentLayout.bitsPerPixel) + 127) >> 3); + if(!pMga->ScratchBuffer) return FALSE; + + pMga->AccelInfoRec = infoPtr = XAACreateInfoRec(); + if(!infoPtr) return FALSE; + + pMga->RenderTime = 0; + pMga->LinearScratch = 0; + + pMga->MaxFastBlitY = 0; + pMga->MaxBlitDWORDS = 0x40000 >> 5; + + switch (pMga->Chipset) { + case PCI_CHIP_MGA2064: + pMga->AccelFlags = BLK_OPAQUE_EXPANSION | FASTBLT_BUG; + break; + case PCI_CHIP_MGA2164: + case PCI_CHIP_MGA2164_AGP: + pMga->AccelFlags = BLK_OPAQUE_EXPANSION | + TRANSC_SOLID_FILL | + USE_RECTS_FOR_LINES; + break; + case PCI_CHIP_MGAG200_SE_A_PCI: + case PCI_CHIP_MGAG200_SE_B_PCI: + case PCI_CHIP_MGAG400: + case PCI_CHIP_MGAG550: + case PCI_CHIP_MGAG200: + case PCI_CHIP_MGAG200_PCI: + pMga->AccelFlags = TRANSC_SOLID_FILL | + TWO_PASS_COLOR_EXPAND; + break; + case PCI_CHIP_MGA1064: + pMga->AccelFlags = 0; + break; + case PCI_CHIP_MGAG100: + case PCI_CHIP_MGAG100_PCI: + default: + pMga->AccelFlags = MGA_NO_PLANEMASK; + break; + } + + /* all should be able to use this now with the bug fixes */ + pMga->AccelFlags |= USE_LINEAR_EXPANSION; + + if ((pMga->FbMapSize > 8*1024*1024) && (pScrn->depth == 8)) { + pMga->AccelFlags |= LARGE_ADDRESSES; + } + + if (pMga->CurrentLayout.bitsPerPixel == 24) { + pMga->AccelFlags |= MGA_NO_PLANEMASK; + } + + if (pMga->SecondCrtc) { + pMga->HasFBitBlt = FALSE; + } + + if(pMga->HasSDRAM) { + pMga->Atype = pMga->AtypeNoBLK = MGAAtypeNoBLK; + pMga->AccelFlags &= ~TWO_PASS_COLOR_EXPAND; + } else { + pMga->Atype = MGAAtype; + pMga->AtypeNoBLK = MGAAtypeNoBLK; + } + + /* fill out infoPtr here */ + infoPtr->Flags = PIXMAP_CACHE | + OFFSCREEN_PIXMAPS | + LINEAR_FRAMEBUFFER | + MICROSOFT_ZERO_LINE_BIAS; + + /* sync */ + infoPtr->Sync = MGAStormSync; + + /* screen to screen copy */ + infoPtr->ScreenToScreenCopyFlags = NO_TRANSPARENCY; + infoPtr->SetupForScreenToScreenCopy = + mgaSetupForScreenToScreenCopy; + infoPtr->SubsequentScreenToScreenCopy = mgaSubsequentScreenToScreenCopy; + + if(pMga->HasFBitBlt) { + infoPtr->FillCacheBltRects = MGAFillCacheBltRects; + infoPtr->FillCacheBltRectsFlags = NO_TRANSPARENCY; + } + /* solid fills */ + infoPtr->SetupForSolidFill = mgaSetupForSolidFill; + infoPtr->SubsequentSolidFillRect = mgaSubsequentSolidFillRect; + infoPtr->SubsequentSolidFillTrap = mgaSubsequentSolidFillTrap; + + /* solid lines */ + infoPtr->SetupForSolidLine = infoPtr->SetupForSolidFill; + infoPtr->SubsequentSolidHorVertLine = mgaSubsequentSolidHorVertLine; + infoPtr->SubsequentSolidTwoPointLine = mgaSubsequentSolidTwoPointLine; + + /* clipping */ + infoPtr->SetClippingRectangle = MGASetClippingRectangle; + infoPtr->DisableClipping = MGADisableClipping; + infoPtr->ClippingFlags = HARDWARE_CLIP_SOLID_LINE | + HARDWARE_CLIP_DASHED_LINE | + HARDWARE_CLIP_SOLID_FILL | + HARDWARE_CLIP_MONO_8x8_FILL; + +#if X_BYTE_ORDER == X_LITTLE_ENDIAN + /* dashed lines */ + infoPtr->DashedLineFlags = LINE_PATTERN_MSBFIRST_LSBJUSTIFIED; + infoPtr->SetupForDashedLine = mgaSetupForDashedLine; + infoPtr->SubsequentDashedTwoPointLine = mgaSubsequentDashedTwoPointLine; + infoPtr->DashPatternMaxLength = 128; +#endif + + /* 8x8 mono patterns */ + infoPtr->Mono8x8PatternFillFlags = HARDWARE_PATTERN_PROGRAMMED_BITS | + HARDWARE_PATTERN_PROGRAMMED_ORIGIN | + HARDWARE_PATTERN_SCREEN_ORIGIN | + BIT_ORDER_IN_BYTE_MSBFIRST; + infoPtr->SetupForMono8x8PatternFill = mgaSetupForMono8x8PatternFill; + infoPtr->SubsequentMono8x8PatternFillRect = + mgaSubsequentMono8x8PatternFillRect; + infoPtr->SubsequentMono8x8PatternFillTrap = + mgaSubsequentMono8x8PatternFillTrap; + + /* cpu to screen color expansion */ + infoPtr->ScanlineCPUToScreenColorExpandFillFlags = + CPU_TRANSFER_PAD_DWORD | + SCANLINE_PAD_DWORD | +#if X_BYTE_ORDER == X_BIG_ENDIAN + BIT_ORDER_IN_BYTE_MSBFIRST | +#else + BIT_ORDER_IN_BYTE_LSBFIRST | +#endif + LEFT_EDGE_CLIPPING | + LEFT_EDGE_CLIPPING_NEGATIVE_X; + + if(pMga->ILOADBase) { + pMga->ColorExpandBase = pMga->ILOADBase; + } else { + pMga->ColorExpandBase = pMga->IOBase; + } + infoPtr->SetupForScanlineCPUToScreenColorExpandFill = + mgaSetupForScanlineCPUToScreenColorExpandFill; + infoPtr->SubsequentScanlineCPUToScreenColorExpandFill = + mgaSubsequentScanlineCPUToScreenColorExpandFill; + infoPtr->SubsequentColorExpandScanline = mgaSubsequentColorExpandScanline; + infoPtr->NumScanlineColorExpandBuffers = 1; + infoPtr->ScanlineColorExpandBuffers = &(pMga->ColorExpandBase); + + /* screen to screen color expansion */ + if(pMga->AccelFlags & USE_LINEAR_EXPANSION) { + infoPtr->ScreenToScreenColorExpandFillFlags = + BIT_ORDER_IN_BYTE_LSBFIRST; + infoPtr->SetupForScreenToScreenColorExpandFill = + mgaSetupForScreenToScreenColorExpandFill; + infoPtr->SubsequentScreenToScreenColorExpandFill = + mgaSubsequentScreenToScreenColorExpandFill; + } + else if ( pMga->CurrentLayout.bitsPerPixel != 24 ) { + /* Alternate (but slower) planar expansions */ + infoPtr->SetupForScreenToScreenColorExpandFill = + mgaSetupForPlanarScreenToScreenColorExpandFill; + infoPtr->SubsequentScreenToScreenColorExpandFill = + mgaSubsequentPlanarScreenToScreenColorExpandFill; + infoPtr->CacheColorExpandDensity = pMga->CurrentLayout.bitsPerPixel; + infoPtr->CacheMonoStipple = XAAGetCachePlanarMonoStipple(); + + /* It's faster to blit the stipples if you have fastbilt + */ + if(pMga->HasFBitBlt) + infoPtr->ScreenToScreenColorExpandFillFlags = TRANSPARENCY_ONLY; + } + + /* image writes */ + infoPtr->ScanlineImageWriteFlags = CPU_TRANSFER_PAD_DWORD | + SCANLINE_PAD_DWORD | + LEFT_EDGE_CLIPPING | + LEFT_EDGE_CLIPPING_NEGATIVE_X | + NO_TRANSPARENCY | + NO_GXCOPY; + + infoPtr->SetupForScanlineImageWrite = mgaSetupForScanlineImageWrite; + infoPtr->SubsequentScanlineImageWriteRect = + mgaSubsequentScanlineImageWriteRect; + infoPtr->SubsequentImageWriteScanline = mgaSubsequentImageWriteScanline; + infoPtr->NumScanlineImageWriteBuffers = 1; + infoPtr->ScanlineImageWriteBuffers = &(pMga->ScratchBuffer); + + + /* midrange replacements */ + + if(pMga->ILOADBase && pMga->UsePCIRetry && infoPtr->SetupForSolidFill) { + infoPtr->FillSolidRects = MGAFillSolidRectsDMA; + infoPtr->FillSolidSpans = MGAFillSolidSpansDMA; + } + + if(pMga->AccelFlags & TWO_PASS_COLOR_EXPAND) { + if(infoPtr->SetupForMono8x8PatternFill) + infoPtr->FillMono8x8PatternRects = + MGAFillMono8x8PatternRectsTwoPass; + } + + if(infoPtr->SetupForSolidFill) { + infoPtr->ValidatePolyArc = MGAValidatePolyArc; + infoPtr->PolyArcMask = GCFunction | GCLineWidth | GCPlaneMask | + GCLineStyle | GCFillStyle; + infoPtr->ValidatePolyPoint = MGAValidatePolyPoint; + infoPtr->PolyPointMask = GCFunction | GCPlaneMask; + } + if(pMga->AccelFlags & MGA_NO_PLANEMASK) { + infoPtr->ScanlineImageWriteFlags |= NO_PLANEMASK; + infoPtr->ScreenToScreenCopyFlags |= NO_PLANEMASK; + infoPtr->ScanlineCPUToScreenColorExpandFillFlags |= NO_PLANEMASK; + infoPtr->SolidFillFlags |= NO_PLANEMASK; + infoPtr->SolidLineFlags |= NO_PLANEMASK; +#if X_BYTE_ORDER == X_LITTLE_ENDIAN + infoPtr->DashedLineFlags |= NO_PLANEMASK; +#endif + infoPtr->Mono8x8PatternFillFlags |= NO_PLANEMASK; + infoPtr->ScreenToScreenColorExpandFillFlags |= NO_PLANEMASK; + infoPtr->FillSolidRectsFlags |= NO_PLANEMASK; + infoPtr->FillSolidSpansFlags |= NO_PLANEMASK; + infoPtr->FillMono8x8PatternRectsFlags |= NO_PLANEMASK; + infoPtr->FillCacheBltRectsFlags |= NO_PLANEMASK; + } + + + maxFastBlitMem = (pMga->Interleave ? 4096 : 2048) * 1024; + + if(pMga->FbMapSize > maxFastBlitMem) { + pMga->MaxFastBlitY = maxFastBlitMem / (pScrn->displayWidth * pMga->CurrentLayout.bitsPerPixel / 8); + } + + switch (pMga->Chipset) { + case PCI_CHIP_MGAG200_SE_A_PCI: + case PCI_CHIP_MGAG200_SE_B_PCI: + maxlines = (min(pMga->FbUsableSize, 1*1024*1024)) / + (pScrn->displayWidth * pMga->CurrentLayout.bitsPerPixel / 8); + break; + default: + maxlines = (min(pMga->FbUsableSize, 16*1024*1024)) / + (pScrn->displayWidth * pMga->CurrentLayout.bitsPerPixel / 8); + break; + } + +#ifdef XF86DRI + if ( pMga->directRenderingEnabled ) { + MGADRIServerPrivatePtr pMGADRIServer = pMga->DRIServerInfo; + BoxRec MemBox; + int cpp = pScrn->bitsPerPixel / 8; + int widthBytes = pScrn->displayWidth * cpp; + int bufferSize = ((pScrn->virtualY * widthBytes + MGA_BUFFER_ALIGN) + & ~MGA_BUFFER_ALIGN); + int scanlines; + + pMGADRIServer->frontOffset = 0; + pMGADRIServer->frontPitch = widthBytes; + + /* Try for front, back, depth, and two framebuffers worth of + * pixmap cache. Should be enough for a fullscreen background + * image plus some leftovers. + */ + pMGADRIServer->textureSize = pMga->FbMapSize - 5 * bufferSize; + + /* If that gives us less than half the available memory, let's + * be greedy and grab some more. Sorry, I care more about 3D + * performance than playing nicely, and you'll get around a full + * framebuffer's worth of pixmap cache anyway. + */ + if ( pMGADRIServer->textureSize < (int)pMga->FbMapSize / 2 ) { + pMGADRIServer->textureSize = pMga->FbMapSize - 4 * bufferSize; + } + + /* Check to see if there is more room available after the maximum + * scanline for textures. + */ + if ( (int)pMga->FbMapSize - maxlines * widthBytes - bufferSize * 2 + > pMGADRIServer->textureSize ) { + pMGADRIServer->textureSize = (pMga->FbMapSize - + maxlines * widthBytes - + bufferSize * 2); + } + + /* Set a minimum usable local texture heap size. This will fit + * two 256x256x32bpp textures. + */ + if ( pMGADRIServer->textureSize < 512 * 1024 ) { + pMGADRIServer->textureOffset = 0; + pMGADRIServer->textureSize = 0; + } + + /* Reserve space for textures */ + pMGADRIServer->textureOffset = (pMga->FbMapSize - + pMGADRIServer->textureSize + + MGA_BUFFER_ALIGN) & ~MGA_BUFFER_ALIGN; + + /* Reserve space for the shared depth buffer */ + pMGADRIServer->depthOffset = (pMGADRIServer->textureOffset - + bufferSize + + MGA_BUFFER_ALIGN) & ~MGA_BUFFER_ALIGN; + pMGADRIServer->depthPitch = widthBytes; + + /* Reserve space for the shared back buffer */ + pMGADRIServer->backOffset = (pMGADRIServer->depthOffset - bufferSize + + MGA_BUFFER_ALIGN) & ~MGA_BUFFER_ALIGN; + pMGADRIServer->backPitch = widthBytes; + + scanlines = pMGADRIServer->backOffset / widthBytes - 1; + if ( scanlines > maxlines ) scanlines = maxlines; + + MemBox.x1 = 0; + MemBox.y1 = 0; + MemBox.x2 = pScrn->displayWidth; + MemBox.y2 = scanlines; + + if ( !xf86InitFBManager( pScreen, &MemBox ) ) { + xf86DrvMsg( pScrn->scrnIndex, X_ERROR, + "Memory manager initialization to (%d,%d) (%d,%d) failed\n", + MemBox.x1, MemBox.y1, MemBox.x2, MemBox.y2 ); + return FALSE; + } else { + int width, height; + + xf86DrvMsg( pScrn->scrnIndex, X_INFO, + "Memory manager initialized to (%d,%d) (%d,%d)\n", + MemBox.x1, MemBox.y1, MemBox.x2, MemBox.y2 ); + + if ( xf86QueryLargestOffscreenArea( pScreen, &width, + &height, 0, 0, 0 ) ) { + xf86DrvMsg( pScrn->scrnIndex, X_INFO, + "Largest offscreen area available: %d x %d\n", + width, height ); + } + } + + xf86DrvMsg( pScrn->scrnIndex, X_INFO, + "Reserved back buffer at offset 0x%x\n", + pMGADRIServer->backOffset ); + xf86DrvMsg( pScrn->scrnIndex, X_INFO, + "Reserved depth buffer at offset 0x%x\n", + pMGADRIServer->depthOffset ); + xf86DrvMsg( pScrn->scrnIndex, X_INFO, + "Reserved %d kb for textures at offset 0x%x\n", + pMGADRIServer->textureSize/1024, + pMGADRIServer->textureOffset ); + } + else +#endif /* defined(XF86DRI) */ + { + AvailFBArea.x1 = 0; + AvailFBArea.x2 = pScrn->displayWidth; + AvailFBArea.y1 = 0; + AvailFBArea.y2 = maxlines; + + /* + * Need to keep a strip of memory to the right of screen to workaround + * a display problem with the second CRTC. + */ + if (pMga->SecondCrtc) + AvailFBArea.x2 = pScrn->virtualX; + + xf86InitFBManager(pScreen, &AvailFBArea); + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Using %d lines for offscreen " + "memory.\n", + maxlines - pScrn->virtualY); + + } + + for (i = 0; i < pScrn->numEntities; i++) { + if (xf86IsEntityShared(pScrn->entityList[i])) { + infoPtr->RestoreAccelState = mgaRestoreAccelState; + break; + } + } + +#ifdef RENDER + if(doRender && ((pScrn->bitsPerPixel == 32) || (pScrn->bitsPerPixel == 16))) + { + if(pMga->Chipset == PCI_CHIP_MGAG400 || pMga->Chipset == PCI_CHIP_MGAG550) { + infoPtr->CPUToScreenAlphaTextureFlags = XAA_RENDER_NO_TILE; + infoPtr->SetupForCPUToScreenAlphaTexture = + MGASetupForCPUToScreenAlphaTexture; + } else { + infoPtr->CPUToScreenAlphaTextureFlags = XAA_RENDER_NO_TILE | + XAA_RENDER_NO_SRC_ALPHA; + infoPtr->SetupForCPUToScreenAlphaTexture = + MGASetupForCPUToScreenAlphaTextureFaked; + } + infoPtr->SubsequentCPUToScreenAlphaTexture = + MGASubsequentCPUToScreenTexture; + infoPtr->CPUToScreenAlphaTextureFormats = MGAAlphaTextureFormats; + + infoPtr->SetupForCPUToScreenTexture = MGASetupForCPUToScreenTexture; + infoPtr->SubsequentCPUToScreenTexture = MGASubsequentCPUToScreenTexture; + infoPtr->CPUToScreenTextureFlags = XAA_RENDER_NO_TILE; + infoPtr->CPUToScreenTextureFormats = MGATextureFormats; + } +#endif /* defined(RENDER) */ + + return(XAAInit(pScreen, infoPtr)); +} + + +/* Support for multiscreen */ +void mgaRestoreAccelState(ScrnInfoPtr pScrn) +{ + MGAPtr pMga = MGAPTR(pScrn); + MGAFBLayout *pLayout = &pMga->CurrentLayout; + unsigned int replicate_fg = 0; + unsigned int replicate_bg = 0; + unsigned int replicate_pm = 0; + + MGAStormSync(pScrn); + WAITFIFO(12); + pMga->SrcOrg = 0; + OUTREG(MGAREG_MACCESS, pMga->MAccess); + OUTREG(MGAREG_PITCH, pLayout->displayWidth); + OUTREG(MGAREG_YDSTORG, pMga->YDstOrg); + + + common_replicate_colors_and_mask( pMga->FgColor, pMga->BgColor, + pMga->PlaneMask, pLayout->bitsPerPixel, + & replicate_fg, & replicate_bg, + & replicate_pm ); + + if( (pLayout->bitsPerPixel != 24) + && ((pMga->AccelFlags & MGA_NO_PLANEMASK) == 0) ) { + OUTREG( MGAREG_PLNWT, replicate_pm ); + } + + OUTREG( MGAREG_BCOL, replicate_bg ); + OUTREG( MGAREG_FCOL, replicate_fg ); + + OUTREG(MGAREG_SRCORG, pMga->realSrcOrg); + OUTREG(MGAREG_DSTORG, pMga->DstOrg); +#if X_BYTE_ORDER == X_LITTLE_ENDIAN + OUTREG(MGAREG_OPMODE, MGAOPM_DMA_BLIT ); +#else + OUTREG(MGAREG_OPMODE, MGAOPM_DMA_BLIT | 0x10000); +#endif + OUTREG(MGAREG_CXBNDRY, 0xFFFF0000); /* (maxX << 16) | minX */ + OUTREG(MGAREG_YTOP, 0x00000000); /* minPixelPointer */ + OUTREG(MGAREG_YBOT, 0x007FFFFF); /* maxPixelPointer */ + pMga->AccelFlags &= ~CLIPPER_ON; +} + + +CARD32 MGAAtype[16] = { + MGADWG_RPL | 0x00000000, MGADWG_RSTR | 0x00080000, + MGADWG_RSTR | 0x00040000, MGADWG_BLK | 0x000c0000, + MGADWG_RSTR | 0x00020000, MGADWG_RSTR | 0x000a0000, + MGADWG_RSTR | 0x00060000, MGADWG_RSTR | 0x000e0000, + MGADWG_RSTR | 0x00010000, MGADWG_RSTR | 0x00090000, + MGADWG_RSTR | 0x00050000, MGADWG_RSTR | 0x000d0000, + MGADWG_RPL | 0x00030000, MGADWG_RSTR | 0x000b0000, + MGADWG_RSTR | 0x00070000, MGADWG_RPL | 0x000f0000 +}; + + +CARD32 MGAAtypeNoBLK[16] = { + MGADWG_RPL | 0x00000000, MGADWG_RSTR | 0x00080000, + MGADWG_RSTR | 0x00040000, MGADWG_RPL | 0x000c0000, + MGADWG_RSTR | 0x00020000, MGADWG_RSTR | 0x000a0000, + MGADWG_RSTR | 0x00060000, MGADWG_RSTR | 0x000e0000, + MGADWG_RSTR | 0x00010000, MGADWG_RSTR | 0x00090000, + MGADWG_RSTR | 0x00050000, MGADWG_RSTR | 0x000d0000, + MGADWG_RPL | 0x00030000, MGADWG_RSTR | 0x000b0000, + MGADWG_RSTR | 0x00070000, MGADWG_RPL | 0x000f0000 +}; + + +Bool +MGAStormAccelInit(ScreenPtr pScreen) +{ + return mgaAccelInit( pScreen ); +} + + + +void +MGAStormSync(ScrnInfoPtr pScrn) +{ + MGAPtr pMga = MGAPTR(pScrn); + + CHECK_DMA_QUIESCENT(pMga, pScrn); + + /* MGAISBUSY() reportedly causes a freeze for Mystique revision 2 and older */ + if (!(pMga->Chipset == PCI_CHIP_MGA1064 && (pMga->ChipRev >= 0 && pMga->ChipRev <= 2))) + while(MGAISBUSY()); + /* flush cache before a read (mga-1064g 5.1.6) */ + OUTREG8(MGAREG_CRTC_INDEX, 0); + if(pMga->AccelFlags & CLIPPER_ON) { + pMga->AccelFlags &= ~CLIPPER_ON; + OUTREG(MGAREG_CXBNDRY, 0xFFFF0000); + } +} + + +void MGAStormEngineInit( ScrnInfoPtr pScrn ) +{ + long maccess = 0; + MGAPtr pMga = MGAPTR(pScrn); + MGAFBLayout *pLayout = &pMga->CurrentLayout; + CARD32 opmode; + static const unsigned int maccess_table[5] = { + /* bpp: 8 16 24 32 */ + 0, 0, 1, 3, 2 + }; + static const unsigned int opmode_table[5] = { + /* bpp: 8 16 24 32 */ + 0x00000, 0x00000, 0x10000, 0x20000, 0x20000 + }; + + CHECK_DMA_QUIESCENT(pMga, pScrn); + + if ((pMga->Chipset == PCI_CHIP_MGAG100) + || (pMga->Chipset == PCI_CHIP_MGAG100_PCI)) + maccess = 1 << 14; + + opmode = INREG(MGAREG_OPMODE); + + maccess |= maccess_table[ pLayout->bitsPerPixel / 8 ]; + if ( pLayout->depth == 15 ) { + maccess |= (1 << 31); + } + + opmode |= opmode_table[ pLayout->bitsPerPixel / 8 ]; +#if X_BYTE_ORDER == X_LITTLE_ENDIAN + opmode &= ~0x30000; +#endif + + pMga->SetupForSolidFill = mgaSetupForSolidFill; + pMga->SubsequentSolidFillRect = mgaSubsequentSolidFillRect; + pMga->RestoreAccelState = mgaRestoreAccelState; + + + pMga->fifoCount = 0; + + while(MGAISBUSY()); + + if(!pMga->FifoSize) { + pMga->FifoSize = INREG8(MGAREG_FIFOSTATUS); + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "%i DWORD fifo\n", + pMga->FifoSize); + } + + OUTREG(MGAREG_PITCH, pLayout->displayWidth); + OUTREG(MGAREG_YDSTORG, pMga->YDstOrg); + OUTREG(MGAREG_MACCESS, maccess); + pMga->MAccess = maccess; + pMga->PlaneMask = ~0; + /* looks like this doesn't apply to mga g100 pci */ + + if ((pMga->Chipset != PCI_CHIP_MGAG100) + && (pMga->Chipset != PCI_CHIP_MGAG100_PCI)) + OUTREG(MGAREG_PLNWT, pMga->PlaneMask); + + pMga->FgColor = 0; + OUTREG(MGAREG_FCOL, pMga->FgColor); + pMga->BgColor = 0; + OUTREG(MGAREG_BCOL, pMga->BgColor); + OUTREG(MGAREG_OPMODE, MGAOPM_DMA_BLIT | opmode); + + /* put clipping in a known state */ + OUTREG(MGAREG_CXBNDRY, 0xFFFF0000); /* (maxX << 16) | minX */ + OUTREG(MGAREG_YTOP, 0x00000000); /* minPixelPointer */ + OUTREG(MGAREG_YBOT, 0x007FFFFF); /* maxPixelPointer */ + pMga->AccelFlags &= ~CLIPPER_ON; + + switch(pMga->Chipset) { + case PCI_CHIP_MGAG550: + case PCI_CHIP_MGAG400: + case PCI_CHIP_MGAG200: + case PCI_CHIP_MGAG200_PCI: + case PCI_CHIP_MGAG200_SE_A_PCI: + case PCI_CHIP_MGAG200_SE_B_PCI: + pMga->SrcOrg = 0; + OUTREG(MGAREG_SRCORG, pMga->realSrcOrg); + OUTREG(MGAREG_DSTORG, pMga->DstOrg); + break; + default: + break; + } + + xf86SetLastScrnFlag(pScrn->entityList[0], pScrn->scrnIndex); +} + + +void MGASetClippingRectangle( + ScrnInfoPtr pScrn, + int x1, int y1, int x2, int y2 +){ + MGAPtr pMga = MGAPTR(pScrn); + + CHECK_DMA_QUIESCENT(pMga, pScrn); + + WAITFIFO(3); + OUTREG(MGAREG_CXBNDRY,(x2 << 16) | x1); + OUTREG(MGAREG_YTOP, (y1 * pScrn->displayWidth) + pMga->YDstOrg); + OUTREG(MGAREG_YBOT, (y2 * pScrn->displayWidth) + pMga->YDstOrg); + pMga->AccelFlags |= CLIPPER_ON; +} + +void MGADisableClipping(ScrnInfoPtr pScrn) +{ + MGAPtr pMga = MGAPTR(pScrn); + + CHECK_DMA_QUIESCENT(pMga, pScrn); + + WAITFIFO(3); + OUTREG(MGAREG_CXBNDRY, 0xFFFF0000); /* (maxX << 16) | minX */ + OUTREG(MGAREG_YTOP, 0x00000000); /* minPixelPointer */ + OUTREG(MGAREG_YBOT, 0x007FFFFF); /* maxPixelPointer */ + pMga->AccelFlags &= ~CLIPPER_ON; +} + + +static CARD32 +common_setup_for_pattern_fill( MGAPtr pMga, int fg, int bg, int rop, + int planemask, + CARD32 * reg_data, unsigned int count, + CARD32 cmd ) +{ + unsigned int replicate_fg = 0; + unsigned int replicate_bg = 0; + unsigned int replicate_pm = 0; + unsigned int i; + + + common_replicate_colors_and_mask( fg, bg, planemask, + pMga->CurrentLayout.bitsPerPixel, + & replicate_fg, & replicate_bg, + & replicate_pm ); + + + if( bg == -1 ) { + if ( (pMga->CurrentLayout.bitsPerPixel == 24) && !RGBEQUAL(fg) ) { + cmd |= MGADWG_TRANSC | pMga->AtypeNoBLK[rop]; + } + else { + cmd |= MGADWG_TRANSC | pMga->Atype[rop]; + } + + WAITFIFO( count + 3 ); + } + else { + /* (Packed) 24-bit is a funky mode. We only use the Atype table in + * 24-bit if the components of the foreground color and the components + * of the background color are the same (e.g., fg = 0xf8f8f8 and bg = + * 0x131313). + */ + + if( ((pMga->AccelFlags & BLK_OPAQUE_EXPANSION) != 0) + && ((pMga->CurrentLayout.bitsPerPixel != 24) + || (RGBEQUAL(fg) && RGBEQUAL(bg))) ) { + cmd |= pMga->Atype[rop]; + } + else { + cmd |= pMga->AtypeNoBLK[rop]; + } + + WAITFIFO( count + 4 ); + SET_BACKGROUND_REPLICATED( bg, replicate_bg ); + } + + SET_FOREGROUND_REPLICATED( fg, replicate_fg ); + SET_PLANEMASK_REPLICATED( planemask, replicate_pm, + pMga->CurrentLayout.bitsPerPixel ); + + /* FIXME: Is this the right order? */ + + for ( i = 0 ; i < count ; i++ ) { + OUTREG( reg_data[0], reg_data[1] ); + reg_data += 2; + } + + OUTREG(MGAREG_DWGCTL, cmd); + + return cmd; +} + + + /*********************************************\ + | Screen-to-Screen Copy | + \*********************************************/ + +#define BLIT_LEFT 1 +#define BLIT_UP 4 + +void mgaDoSetupForScreenToScreenCopy( ScrnInfoPtr pScrn, int xdir, int ydir, + int rop, unsigned int planemask, + int trans, unsigned bpp ) +{ + MGAPtr pMga = MGAPTR(pScrn); + CARD32 dwgctl = pMga->AtypeNoBLK[rop] | MGADWG_SHIFTZERO | + MGADWG_BITBLT | MGADWG_BFCOL; + unsigned int tmp; + unsigned int replicated_trans = 0; + unsigned int replicated_mask = 0; + + + CHECK_DMA_QUIESCENT(pMga, pScrn); + + pMga->AccelInfoRec->SubsequentScreenToScreenCopy = + mgaSubsequentScreenToScreenCopy; + + pMga->BltScanDirection = 0; + if(ydir == -1) pMga->BltScanDirection |= BLIT_UP; + if(xdir == -1) + pMga->BltScanDirection |= BLIT_LEFT; + else if(pMga->HasFBitBlt && (rop == GXcopy) && !pMga->DrawTransparent) + pMga->AccelInfoRec->SubsequentScreenToScreenCopy = + mgaSubsequentScreenToScreenCopy_FastBlit; + + + common_replicate_colors_and_mask( trans, 0, planemask, bpp, + & replicated_trans, & tmp, + & replicated_mask ); + + if(pMga->DrawTransparent) { + dwgctl |= MGADWG_TRANSC; + WAITFIFO(2); + + SET_FOREGROUND_REPLICATED( trans, replicated_trans ); + SET_BACKGROUND_REPLICATED( ~0, ~0 ); + } + + WAITFIFO(4); + OUTREG(MGAREG_DWGCTL, dwgctl); + OUTREG(MGAREG_SGN, pMga->BltScanDirection); + + SET_PLANEMASK_REPLICATED( planemask, replicated_mask, bpp ); + OUTREG(MGAREG_AR5, ydir * pMga->CurrentLayout.displayWidth); +} + + +void mgaSetupForScreenToScreenCopy( ScrnInfoPtr pScrn, int xdir, int ydir, + int rop, unsigned int planemask, + int trans ) +{ + MGAPtr pMga = MGAPTR(pScrn); + + mgaDoSetupForScreenToScreenCopy( pScrn, xdir, ydir, rop, planemask, trans, + pMga->CurrentLayout.bitsPerPixel ); +} + + +void mgaSubsequentScreenToScreenCopy( ScrnInfoPtr pScrn, + int srcX, int srcY, int dstX, int dstY, + int w, int h ) +{ + int start, end, SrcOrg = 0, DstOrg = 0; + MGAPtr pMga = MGAPTR(pScrn); + + if (pMga->AccelFlags & LARGE_ADDRESSES) { + const unsigned int display_bit_width = + (pMga->CurrentLayout.displayWidth * pMga->CurrentLayout.bitsPerPixel); + + SrcOrg = ((srcY & ~1023) * display_bit_width) >> 9; + DstOrg = ((dstY & ~1023) * display_bit_width) >> 9; + dstY &= 1023; + } + + if(pMga->BltScanDirection & BLIT_UP) { + srcY += h - 1; + dstY += h - 1; + } + + w--; + start = end = XYADDRESS(srcX, srcY); + + if(pMga->BltScanDirection & BLIT_LEFT) start += w; + else end += w; + + if (pMga->AccelFlags & LARGE_ADDRESSES) { + WAITFIFO(7); + if(DstOrg) + OUTREG(MGAREG_DSTORG, (DstOrg << 6) + pMga->DstOrg); + if(SrcOrg != pMga->SrcOrg) { + pMga->SrcOrg = SrcOrg; + OUTREG(MGAREG_SRCORG, (SrcOrg << 6) + pMga->realSrcOrg); + } + if(SrcOrg) { + SrcOrg = (SrcOrg << 9) / pMga->CurrentLayout.bitsPerPixel; + end -= SrcOrg; + start -= SrcOrg; + } + OUTREG(MGAREG_AR0, end); + OUTREG(MGAREG_AR3, start); + OUTREG(MGAREG_FXBNDRY, ((dstX + w) << 16) | (dstX & 0xffff)); + OUTREG(MGAREG_YDSTLEN + MGAREG_EXEC, (dstY << 16) | h); + if(DstOrg) + OUTREG(MGAREG_DSTORG, pMga->DstOrg); + } else { + WAITFIFO(4); + OUTREG(MGAREG_AR0, end); + OUTREG(MGAREG_AR3, start); + OUTREG(MGAREG_FXBNDRY, ((dstX + w) << 16) | (dstX & 0xffff)); + OUTREG(MGAREG_YDSTLEN + MGAREG_EXEC, (dstY << 16) | h); + } +} + + +void mgaSubsequentScreenToScreenCopy_FastBlit( ScrnInfoPtr pScrn, + int srcX, int srcY, + int dstX, int dstY, + int w, int h ) +{ + int start, end; + MGAPtr pMga = MGAPTR(pScrn); + static const unsigned int masks[5] = { + 0, 0x07f, 0x03f, 0x7f, 0x1f + }; + + if(pMga->BltScanDirection & BLIT_UP) { + srcY += h - 1; + dstY += h - 1; + } + + w--; + start = XYADDRESS(srcX, srcY); + end = start + w; + + /* we assume the driver asserts screen pitches such that + we can always use fastblit for scrolling */ + if(((srcX ^ dstX) & masks[ pMga->CurrentLayout.bitsPerPixel / 8 ]) == 0) { + if(pMga->MaxFastBlitY) { + if(pMga->BltScanDirection & BLIT_UP) { + if((srcY >= pMga->MaxFastBlitY) || + (dstY >= pMga->MaxFastBlitY)) + goto FASTBLIT_BAILOUT; + } else { + if(((srcY + h) > pMga->MaxFastBlitY) || + ((dstY + h) > pMga->MaxFastBlitY)) + goto FASTBLIT_BAILOUT; + } + } + + /* Millennium 1 fastblit bug fix */ + if(pMga->AccelFlags & FASTBLT_BUG) { + int fxright = dstX + w; + int tmp_dstX = dstX; + int tmp_fxright = fxright; + static const unsigned shift_tab[5] = { + 0, 6, 5, 6, 4 + }; + const unsigned shift = shift_tab[pMga->CurrentLayout.bitsPerPixel / 8]; + + if (pMga->CurrentLayout.bitsPerPixel == 24) { + tmp_dstX *= 3; + tmp_fxright = fxright * 3 + 2; + } + + if( (tmp_dstX & (1 << shift)) + && (((tmp_fxright >> shift) - (tmp_dstX >> shift)) & 7) == 7) { + fxright = (tmp_fxright | (1 << shift)); + if (pMga->CurrentLayout.bitsPerPixel == 24) { + fxright /= 3; + } + + WAITFIFO(8); + OUTREG(MGAREG_CXRIGHT, dstX + w); + OUTREG(MGAREG_DWGCTL, 0x040A400C); + OUTREG(MGAREG_AR0, end); + OUTREG(MGAREG_AR3, start); + OUTREG(MGAREG_FXBNDRY, (fxright << 16) | (dstX & 0xffff)); + OUTREG(MGAREG_YDSTLEN + MGAREG_EXEC, (dstY << 16) | h); + OUTREG(MGAREG_DWGCTL, pMga->AtypeNoBLK[GXcopy] | + MGADWG_SHIFTZERO | MGADWG_BITBLT | MGADWG_BFCOL); + OUTREG(MGAREG_CXRIGHT, 0xFFFF); + return; + } + } + + WAITFIFO(6); + OUTREG(MGAREG_DWGCTL, 0x040A400C); + OUTREG(MGAREG_AR0, end); + OUTREG(MGAREG_AR3, start); + OUTREG(MGAREG_FXBNDRY, ((dstX + w) << 16) | (dstX & 0xffff)); + OUTREG(MGAREG_YDSTLEN + MGAREG_EXEC, (dstY << 16) | h); + OUTREG(MGAREG_DWGCTL, pMga->AtypeNoBLK[GXcopy] | MGADWG_SHIFTZERO | + MGADWG_BITBLT | MGADWG_BFCOL); + return; + } + +FASTBLIT_BAILOUT: + + WAITFIFO(4); + OUTREG(MGAREG_AR0, end); + OUTREG(MGAREG_AR3, start); + OUTREG(MGAREG_FXBNDRY, ((dstX + w) << 16) | (dstX & 0xffff)); + OUTREG(MGAREG_YDSTLEN + MGAREG_EXEC, (dstY << 16) | h); +} + + /******************\ + | Solid Fills | + \******************/ + +void mgaDoSetupForSolidFill( ScrnInfoPtr pScrn, int color, int rop, + unsigned int planemask, unsigned int bpp ) +{ + MGAPtr pMga = MGAPTR(pScrn); + unsigned int tmp; + unsigned int replicated_color = 0; + unsigned int replicated_planemask = 0; + + common_replicate_colors_and_mask( color, 0, planemask, bpp, + & replicated_color, & tmp, + & replicated_planemask ); + + CHECK_DMA_QUIESCENT(pMga, pScrn); + + if ( (bpp == 24) && !RGBEQUAL(color) ) { + pMga->FilledRectCMD = MGADWG_TRAP | MGADWG_SOLID | MGADWG_ARZERO | + MGADWG_SGNZERO | MGADWG_SHIFTZERO | + MGADWG_BMONOLEF | pMga->AtypeNoBLK[rop]; + } + else { + pMga->FilledRectCMD = MGADWG_TRAP | MGADWG_SOLID | MGADWG_ARZERO | + MGADWG_SGNZERO | MGADWG_SHIFTZERO | + MGADWG_BMONOLEF | pMga->Atype[rop]; + } + + pMga->SolidLineCMD = MGADWG_SOLID | MGADWG_SHIFTZERO | MGADWG_BFCOL | + pMga->AtypeNoBLK[rop]; + + if(pMga->AccelFlags & TRANSC_SOLID_FILL) + pMga->FilledRectCMD |= MGADWG_TRANSC; + + WAITFIFO(3); + if ( color != pMga->FgColor ) { + pMga->FgColor = color; + OUTREG( MGAREG_FCOL, replicated_color ); + } + + if ( (bpp != 24) + && !(pMga->AccelFlags & MGA_NO_PLANEMASK) + && (planemask != pMga->PlaneMask) ) { + pMga->PlaneMask = planemask; + OUTREG( MGAREG_PLNWT, replicated_planemask ); + } + + OUTREG(MGAREG_DWGCTL, pMga->FilledRectCMD); +} + +void mgaSetupForSolidFill( ScrnInfoPtr pScrn, int color, int rop, + unsigned int planemask ) +{ + MGAPtr pMga = MGAPTR(pScrn); + + mgaDoSetupForSolidFill( pScrn, color, rop, planemask, + pMga->CurrentLayout.bitsPerPixel ); +} + +void mgaSubsequentSolidFillRect( ScrnInfoPtr pScrn, + int x, int y, int w, int h ) +{ + MGAPtr pMga = MGAPTR(pScrn); + + WAITFIFO(2); + OUTREG(MGAREG_FXBNDRY, ((x + w) << 16) | (x & 0xffff)); + OUTREG(MGAREG_YDSTLEN + MGAREG_EXEC, (y << 16) | h); +} + +void mgaSubsequentSolidFillTrap( ScrnInfoPtr pScrn, int y, int h, + int left, int dxL, int dyL, int eL, + int right, int dxR, int dyR, int eR ) +{ + MGAPtr pMga = MGAPTR(pScrn); + int sdxl = (dxL < 0); + int ar2 = sdxl? dxL : -dxL; + int sdxr = (dxR < 0); + int ar5 = sdxr? dxR : -dxR; + + WAITFIFO(11); + OUTREG(MGAREG_DWGCTL, + pMga->FilledRectCMD & ~(MGADWG_ARZERO | MGADWG_SGNZERO)); + OUTREG(MGAREG_AR0, dyL); + OUTREG(MGAREG_AR1, ar2 - eL); + OUTREG(MGAREG_AR2, ar2); + OUTREG(MGAREG_AR4, ar5 - eR); + OUTREG(MGAREG_AR5, ar5); + OUTREG(MGAREG_AR6, dyR); + OUTREG(MGAREG_SGN, (sdxl << 1) | (sdxr << 5)); + OUTREG(MGAREG_FXBNDRY, ((right + 1) << 16) | (left & 0xffff)); + OUTREG(MGAREG_YDSTLEN + MGAREG_EXEC, (y << 16) | h); + OUTREG(MGAREG_DWGCTL, pMga->FilledRectCMD); +} + + + /***************\ + | Solid Lines | + \***************/ + +void mgaSubsequentSolidHorVertLine( ScrnInfoPtr pScrn, int x, int y, + int len, int dir ) +{ + MGAPtr pMga = MGAPTR(pScrn); + + if(dir == DEGREES_0) { + WAITFIFO(2); + OUTREG(MGAREG_FXBNDRY, ((x + len) << 16) | (x & 0xffff)); + OUTREG(MGAREG_YDSTLEN + MGAREG_EXEC, (y << 16) | 1); + } else if(pMga->AccelFlags & USE_RECTS_FOR_LINES) { + WAITFIFO(2); + OUTREG(MGAREG_FXBNDRY, ((x + 1) << 16) | (x & 0xffff)); + OUTREG(MGAREG_YDSTLEN + MGAREG_EXEC, (y << 16) | len); + } else { + WAITFIFO(4); + OUTREG(MGAREG_DWGCTL, pMga->SolidLineCMD | MGADWG_AUTOLINE_OPEN); + OUTREG(MGAREG_XYSTRT, (y << 16) | (x & 0xffff)); + OUTREG(MGAREG_XYEND + MGAREG_EXEC, ((y + len) << 16) | (x & 0xffff)); + OUTREG(MGAREG_DWGCTL, pMga->FilledRectCMD); + } +} + + +void mgaSubsequentSolidTwoPointLine( ScrnInfoPtr pScrn, int x1, int y1, + int x2, int y2, int flags ) +{ + MGAPtr pMga = MGAPTR(pScrn); + + WAITFIFO(4); + OUTREG(MGAREG_DWGCTL, pMga->SolidLineCMD | + ((flags & OMIT_LAST) ? MGADWG_AUTOLINE_OPEN : MGADWG_AUTOLINE_CLOSE)); + OUTREG(MGAREG_XYSTRT, (y1 << 16) | (x1 & 0xFFFF)); + OUTREG(MGAREG_XYEND + MGAREG_EXEC, (y2 << 16) | (x2 & 0xFFFF)); + OUTREG(MGAREG_DWGCTL, pMga->FilledRectCMD); +} + + + /***************************\ + | 8x8 Mono Pattern Fills | + \***************************/ + + +void mgaSetupForMono8x8PatternFill( ScrnInfoPtr pScrn, + int patx, int paty, int fg, int bg, + int rop, unsigned int planemask ) +{ + MGAPtr pMga = MGAPTR(pScrn); + XAAInfoRecPtr infoRec = pMga->AccelInfoRec; + CARD32 regs[4]; + + CHECK_DMA_QUIESCENT(pMga, pScrn); + + infoRec->SubsequentMono8x8PatternFillRect = + mgaSubsequentMono8x8PatternFillRect; + + regs[0] = MGAREG_PAT0; + regs[1] = patx; + regs[2] = MGAREG_PAT1; + regs[3] = paty; + + pMga->PatternRectCMD = common_setup_for_pattern_fill( pMga, fg, bg, rop, + planemask, regs, 2, + (MGADWG_TRAP + | MGADWG_ARZERO + | MGADWG_SGNZERO + | MGADWG_BMONOLEF) ); +} + + +void mgaSubsequentMono8x8PatternFillRect( ScrnInfoPtr pScrn, + int patx, int paty, + int x, int y, int w, int h ) +{ + MGAPtr pMga = MGAPTR(pScrn); + + WAITFIFO(3); + OUTREG(MGAREG_SHIFT, (paty << 4) | patx); + OUTREG(MGAREG_FXBNDRY, ((x + w) << 16) | (x & 0xffff)); + OUTREG(MGAREG_YDSTLEN + MGAREG_EXEC, (y << 16) | h); + pMga->AccelInfoRec->SubsequentMono8x8PatternFillRect = + mgaSubsequentMono8x8PatternFillRect_Additional; +} + +static void mgaSubsequentMono8x8PatternFillRect_Additional( ScrnInfoPtr pScrn, + int patx, int paty, + int x, int y, + int w, int h ) +{ + MGAPtr pMga = MGAPTR(pScrn); + + WAITFIFO(2); + OUTREG(MGAREG_FXBNDRY, ((x + w) << 16) | (x & 0xffff)); + OUTREG(MGAREG_YDSTLEN + MGAREG_EXEC, (y << 16) | h); +} + + +void mgaSubsequentMono8x8PatternFillTrap( ScrnInfoPtr pScrn, + int patx, int paty, + int y, int h, + int left, int dxL, int dyL, int eL, + int right, int dxR, int dyR, int eR ) +{ + MGAPtr pMga = MGAPTR(pScrn); + + int sdxl = (dxL < 0) ? (1<<1) : 0; + int ar2 = sdxl? dxL : -dxL; + int sdxr = (dxR < 0) ? (1<<5) : 0; + int ar5 = sdxr? dxR : -dxR; + + WAITFIFO(12); + OUTREG(MGAREG_SHIFT, (paty << 4) | patx); + OUTREG(MGAREG_DWGCTL, + pMga->PatternRectCMD & ~(MGADWG_ARZERO | MGADWG_SGNZERO)); + OUTREG(MGAREG_AR0, dyL); + OUTREG(MGAREG_AR1, ar2 - eL); + OUTREG(MGAREG_AR2, ar2); + OUTREG(MGAREG_AR4, ar5 - eR); + OUTREG(MGAREG_AR5, ar5); + OUTREG(MGAREG_AR6, dyR); + OUTREG(MGAREG_SGN, sdxl | sdxr); + OUTREG(MGAREG_FXBNDRY, ((right + 1) << 16) | (left & 0xffff)); + OUTREG(MGAREG_YDSTLEN + MGAREG_EXEC, (y << 16) | h); + OUTREG(MGAREG_DWGCTL, pMga->PatternRectCMD); +} + + /***********************\ + | Color Expand Rect | + \***********************/ + + +void mgaSetupForScanlineCPUToScreenColorExpandFill( ScrnInfoPtr pScrn, + int fg, int bg, + int rop, + unsigned int planemask ) +{ + MGAPtr pMga = MGAPTR(pScrn); + + + CHECK_DMA_QUIESCENT(pMga, pScrn); + + (void) common_setup_for_pattern_fill( pMga, fg, bg, rop, + planemask, NULL, 0, + MGADWG_ILOAD | MGADWG_LINEAR + | MGADWG_SGNZERO | MGADWG_SHIFTZERO + | MGADWG_BMONOLEF ); +} + + +void mgaSubsequentScanlineCPUToScreenColorExpandFill( ScrnInfoPtr pScrn, + int x, int y, int w, int h, + int skipleft ) +{ + MGAPtr pMga = MGAPTR(pScrn); + + pMga->AccelFlags |= CLIPPER_ON; + pMga->expandDWORDs = (w + 31) >> 5; + if((pMga->expandDWORDs * h) > pMga->MaxBlitDWORDS) { + pMga->expandHeight = pMga->MaxBlitDWORDS / pMga->expandDWORDs; + pMga->expandRemaining = h / pMga->expandHeight; + if(!(h = h % pMga->expandHeight)) { + pMga->expandRemaining--; + h = pMga->expandHeight; + } + pMga->expandY = y + h; + } else + pMga->expandRemaining = 0; + pMga->expandRows = h; + + WAITFIFO(5); + OUTREG(MGAREG_CXBNDRY, ((x + w - 1) << 16) | ((x + skipleft) & 0xFFFF)); + w = pMga->expandDWORDs << 5; /* source is dword padded */ + OUTREG(MGAREG_AR0, (w * h) - 1); + OUTREG(MGAREG_AR3, 0); /* crashes occasionally without this */ + OUTREG(MGAREG_FXBNDRY, ((x + w - 1) << 16) | (x & 0xFFFF)); + OUTREG(MGAREG_YDSTLEN + MGAREG_EXEC, (y << 16) | h); + +#if defined(__alpha__) + if(1) /* force indirect always on Alpha */ +#else + if(pMga->expandDWORDs > pMga->FifoSize) +#endif + { + pMga->AccelInfoRec->SubsequentColorExpandScanline = + mgaSubsequentColorExpandScanlineIndirect; + pMga->AccelInfoRec->ScanlineColorExpandBuffers = + (unsigned char**)(&pMga->ScratchBuffer); + } else { + pMga->AccelInfoRec->SubsequentColorExpandScanline = + mgaSubsequentColorExpandScanline; + pMga->AccelInfoRec->ScanlineColorExpandBuffers = + (unsigned char**)(&pMga->ColorExpandBase); + WAITFIFO(pMga->expandDWORDs); + } +} + + +void mgaSubsequentColorExpandScanlineIndirect( ScrnInfoPtr pScrn, + int bufno ) +{ + MGAPtr pMga = MGAPTR(pScrn); + int dwords = pMga->expandDWORDs; + CARD32 *src = (CARD32*)(pMga->ScratchBuffer); + + while(dwords > pMga->FifoSize) { + WAITFIFO(pMga->FifoSize); + MGAMoveDWORDS((CARD32*)(pMga->ColorExpandBase), src, pMga->FifoSize); + src += pMga->FifoSize; + dwords -= pMga->FifoSize; + } + + WAITFIFO(dwords); + MGAMoveDWORDS((CARD32*)(pMga->ColorExpandBase), src, dwords); + + if(!(--pMga->expandRows)) { + if(pMga->expandRemaining) { + WAITFIFO(3); + OUTREG(MGAREG_AR0,((pMga->expandDWORDs<< 5)*pMga->expandHeight)-1); + OUTREG(MGAREG_AR3, 0); /* crashes occasionally without this */ + OUTREG(MGAREG_YDSTLEN + MGAREG_EXEC, (pMga->expandY << 16) | + pMga->expandHeight); + pMga->expandY += pMga->expandHeight; + pMga->expandRows = pMga->expandHeight; + pMga->expandRemaining--; + } else { + DISABLE_CLIP(); + } + } +} + + +void mgaSubsequentColorExpandScanline( ScrnInfoPtr pScrn, + int bufno ) +{ + MGAPtr pMga = MGAPTR(pScrn); + + if(--pMga->expandRows) { + WAITFIFO(pMga->expandDWORDs); + } else if(pMga->expandRemaining) { + WAITFIFO(3); + OUTREG(MGAREG_AR0,((pMga->expandDWORDs<<5)*pMga->expandHeight)-1); + OUTREG(MGAREG_AR3, 0); /* crashes occasionally without this */ + OUTREG(MGAREG_YDSTLEN + MGAREG_EXEC, (pMga->expandY << 16) | + pMga->expandHeight); + pMga->expandY += pMga->expandHeight; + pMga->expandRows = pMga->expandHeight; + pMga->expandRemaining--; + WAITFIFO(pMga->expandDWORDs); + } else { + DISABLE_CLIP(); + } +} + + + /*******************\ + | Image Writes | + \*******************/ + + +void mgaSetupForScanlineImageWrite( ScrnInfoPtr pScrn, int rop, + unsigned int planemask, + int transparency_color, + int bpp, int depth ) +{ + MGAPtr pMga = MGAPTR(pScrn); + unsigned int replicate_pm = 0; + + switch( pMga->CurrentLayout.bitsPerPixel ) { + case 8: + replicate_pm = REPLICATE_8( planemask ); + break; + case 16: + replicate_pm = REPLICATE_16( planemask ); + break; + case 24: + replicate_pm = REPLICATE_24( planemask ); + break; + case 32: + replicate_pm = REPLICATE_32( planemask ); + break; + } + + CHECK_DMA_QUIESCENT(pMga, pScrn); + + WAITFIFO(3); + OUTREG(MGAREG_AR5, 0); + SET_PLANEMASK_REPLICATED( planemask, replicate_pm, + pMga->CurrentLayout.bitsPerPixel ); + OUTREG(MGAREG_DWGCTL, MGADWG_ILOAD | MGADWG_BFCOL | MGADWG_SHIFTZERO | + MGADWG_SGNZERO | pMga->AtypeNoBLK[rop]); +} + + +void mgaSubsequentScanlineImageWriteRect( ScrnInfoPtr pScrn, + int x, int y, int w, int h, + int skipleft ) +{ + MGAPtr pMga = MGAPTR(pScrn); + + pMga->AccelFlags |= CLIPPER_ON; + pMga->expandRows = h; + pMga->expandDWORDs = ((w * pMga->CurrentLayout.bitsPerPixel) + 31) >> 5; + + WAITFIFO(5); + OUTREG(MGAREG_CXBNDRY, 0xFFFF0000 | ((x + skipleft) & 0xFFFF)); + OUTREG(MGAREG_AR0, w - 1); + OUTREG(MGAREG_AR3, 0); + OUTREG(MGAREG_FXBNDRY, ((x + w - 1) << 16) | (x & 0xFFFF)); + OUTREG(MGAREG_YDSTLEN + MGAREG_EXEC, (y << 16) | h); +} + + +void mgaSubsequentImageWriteScanline( ScrnInfoPtr pScrn, int bufno ) +{ + MGAPtr pMga = MGAPTR(pScrn); + int dwords = pMga->expandDWORDs; + CARD32 *src = (CARD32*)(pMga->ScratchBuffer); + + while(dwords > pMga->FifoSize) { + WAITFIFO(pMga->FifoSize); + MGAMoveDWORDS((CARD32*)(pMga->ColorExpandBase), src, pMga->FifoSize); + src += pMga->FifoSize; + dwords -= pMga->FifoSize; + } + + WAITFIFO(dwords); + MGAMoveDWORDS((CARD32*)(pMga->ColorExpandBase), src, dwords); + + if(!(--pMga->expandRows)) { + DISABLE_CLIP(); + } +} + + +#if X_BYTE_ORDER == X_LITTLE_ENDIAN + + /***************************\ + | Dashed Lines | + \***************************/ + +void mgaSetupForDashedLine( ScrnInfoPtr pScrn, + int fg, int bg, int rop, + unsigned int planemask, int length, + unsigned char *pattern ) +{ + MGAPtr pMga = MGAPTR(pScrn); + CARD32 *DashPattern = (CARD32*)pattern; + CARD32 NiceDashPattern = DashPattern[0]; + int dwords = (length + 31) >> 5; + unsigned int replicate_fg = 0; + unsigned int replicate_bg = 0; + unsigned int replicate_pm = 0; + + + common_replicate_colors_and_mask( fg, bg, planemask, + pMga->CurrentLayout.bitsPerPixel, + & replicate_fg, & replicate_bg, + & replicate_pm ); + + CHECK_DMA_QUIESCENT(pMga, pScrn); + + pMga->DashCMD = MGADWG_BFCOL | pMga->AtypeNoBLK[rop]; + pMga->StyleLen = length - 1; + + if(bg == -1) { + pMga->DashCMD |= MGADWG_TRANSC; + WAITFIFO(dwords + 2); + } else { + WAITFIFO(dwords + 3); + SET_BACKGROUND_REPLICATED( bg, replicate_bg ); + } + + SET_PLANEMASK_REPLICATED( planemask, replicate_pm, + pMga->CurrentLayout.bitsPerPixel ); + SET_FOREGROUND_REPLICATED( fg, replicate_fg ); + + + /* We see if we can draw horizontal lines as 8x8 pattern fills. This is + * worthwhile since the pattern fills can use block mode and the default X + * pattern is 8 pixels long. The forward pattern is the top scanline, the + * backwards pattern is the next one. + */ + switch(length) { + case 2: NiceDashPattern |= NiceDashPattern << 2; + case 4: NiceDashPattern |= NiceDashPattern << 4; + case 8: { + NiceDashPattern |= byte_reversed[NiceDashPattern] << 16; + NiceDashPattern |= NiceDashPattern << 8; + pMga->NiceDashCMD = MGADWG_TRAP | MGADWG_ARZERO | + MGADWG_SGNZERO | MGADWG_BMONOLEF; + pMga->AccelFlags |= NICE_DASH_PATTERN; + + if( bg == -1 ) { + if ( (pMga->CurrentLayout.bitsPerPixel == 24) && !RGBEQUAL(fg) ) { + pMga->NiceDashCMD |= MGADWG_TRANSC | pMga->AtypeNoBLK[rop]; + } + else { + pMga->NiceDashCMD |= MGADWG_TRANSC | pMga->Atype[rop]; + } + } + else { + /* (Packed) 24-bit is a funky mode. We only use the Atype table + * in 24-bit if the components of the foreground color and the + * components of the background color are the same (e.g., fg = + * 0xf8f8f8 and bg = 0x131313). + */ + + if( ((pMga->AccelFlags & BLK_OPAQUE_EXPANSION) != 0) + && ((pMga->CurrentLayout.bitsPerPixel != 24) + || (RGBEQUAL(fg) && RGBEQUAL(bg))) ) { + pMga->NiceDashCMD |= pMga->Atype[rop]; + } + else { + pMga->NiceDashCMD |= pMga->AtypeNoBLK[rop]; + } + } + OUTREG(MGAREG_SRC0, NiceDashPattern); + break; + } + default: { + pMga->AccelFlags &= ~NICE_DASH_PATTERN; + switch (dwords) { + case 4: OUTREG(MGAREG_SRC3, DashPattern[3]); + case 3: OUTREG(MGAREG_SRC2, DashPattern[2]); + case 2: OUTREG(MGAREG_SRC1, DashPattern[1]); + default: OUTREG(MGAREG_SRC0, DashPattern[0]); + } + } + } +} + + +void mgaSubsequentDashedTwoPointLine( ScrnInfoPtr pScrn, + int x1, int y1, int x2, int y2, + int flags, int phase ) +{ + MGAPtr pMga = MGAPTR(pScrn); + + WAITFIFO(4); + if((pMga->AccelFlags & NICE_DASH_PATTERN) && (y1 == y2)) { + OUTREG(MGAREG_DWGCTL, pMga->NiceDashCMD); + if(x2 < x1) { + if(flags & OMIT_LAST) x2++; + OUTREG(MGAREG_SHIFT, ((-y1 & 0x07) << 4) | + ((7 - phase - x1) & 0x07)); + OUTREG(MGAREG_FXBNDRY, ((x1 + 1) << 16) | (x2 & 0xffff)); + } else { + if(!flags) x2++; + OUTREG(MGAREG_SHIFT, (((1 - y1) & 0x07) << 4) | + ((phase - x1) & 0x07)); + OUTREG(MGAREG_FXBNDRY, (x2 << 16) | (x1 & 0xffff)); + } + OUTREG(MGAREG_YDSTLEN + MGAREG_EXEC, (y1 << 16) | 1); + } else { + OUTREG(MGAREG_SHIFT, (pMga->StyleLen << 16 ) | + (pMga->StyleLen - phase)); + OUTREG(MGAREG_DWGCTL, pMga->DashCMD | ((flags & OMIT_LAST) ? + MGADWG_AUTOLINE_OPEN : MGADWG_AUTOLINE_CLOSE)); + OUTREG(MGAREG_XYSTRT, (y1 << 16) | (x1 & 0xFFFF)); + OUTREG(MGAREG_XYEND + MGAREG_EXEC, (y2 << 16) | (x2 & 0xFFFF)); + } +} +#endif /* X_BYTE_ORDER == X_LITTLE_ENDIAN */ + + + /******************************************\ + | Planar Screen to Screen Color Expansion | + \******************************************/ + +void mgaSetupForPlanarScreenToScreenColorExpandFill( ScrnInfoPtr pScrn, + int fg, int bg, + int rop, + unsigned int planemask ) +{ + MGAPtr pMga = MGAPTR(pScrn); + CARD32 mgaCMD = pMga->AtypeNoBLK[rop] | MGADWG_BITBLT | + MGADWG_SGNZERO | MGADWG_BPLAN; + CARD32 regs[2]; + + + regs[0] = MGAREG_AR5; + regs[1] = pScrn->displayWidth; + + CHECK_DMA_QUIESCENT(pMga, pScrn); + + (void) common_setup_for_pattern_fill( pMga, fg, bg, 0, planemask, regs, 1, + mgaCMD ); +} + + +void mgaSubsequentPlanarScreenToScreenColorExpandFill( ScrnInfoPtr pScrn, + int x, int y, int w, int h, + int srcx, int srcy, + int skipleft ) +{ + MGAPtr pMga = MGAPTR(pScrn); + int start, end; + + w--; + start = XYADDRESS(srcx, srcy) + skipleft; + end = start + w; + + WAITFIFO(4); + OUTREG(MGAREG_AR3, start); + OUTREG(MGAREG_AR0, end); + OUTREG(MGAREG_FXBNDRY, ((x + w) << 16) | (x & 0xffff)); + OUTREG(MGAREG_YDSTLEN + MGAREG_EXEC, (y << 16) | h); +} + + + /***********************************\ + | Screen to Screen Color Expansion | + \***********************************/ + +void mgaSetupForScreenToScreenColorExpandFill( ScrnInfoPtr pScrn, + int fg, int bg, + int rop, + unsigned int planemask ) +{ + MGAPtr pMga = MGAPTR(pScrn); + CARD32 regs[2]; + + regs[0] = MGAREG_AR5; + regs[1] = pScrn->displayWidth * pMga->CurrentLayout.bitsPerPixel; + + CHECK_DMA_QUIESCENT(pMga, pScrn); + + (void) common_setup_for_pattern_fill( pMga, fg, bg, rop, planemask, + regs, 1, + MGADWG_BITBLT | MGADWG_SGNZERO + | MGADWG_SHIFTZERO ); +} + + +void mgaSubsequentScreenToScreenColorExpandFill( ScrnInfoPtr pScrn, + int x, int y, int w, int h, + int srcx, int srcy, + int skipleft ) +{ + MGAPtr pMga = MGAPTR(pScrn); + const unsigned int display_bit_width = + (pMga->CurrentLayout.displayWidth * pMga->CurrentLayout.bitsPerPixel); + int start, end, next, num; + Bool resetDstOrg = FALSE; + + if (pMga->AccelFlags & LARGE_ADDRESSES) { + const int DstOrg = ((y & ~1023) * display_bit_width) >> 9; + const int SrcOrg = ((srcy & ~1023) * display_bit_width) >> 9; + + y &= 1023; + srcy &= 1023; + + WAITFIFO(2); + if(DstOrg) { + OUTREG(MGAREG_DSTORG, (DstOrg << 6) + pMga->DstOrg); + resetDstOrg = TRUE; + } + if(SrcOrg != pMga->SrcOrg) { + pMga->SrcOrg = SrcOrg; + OUTREG(MGAREG_SRCORG, (SrcOrg << 6) + pMga->realSrcOrg); + } + } + + w--; + start = (XYADDRESS(srcx, srcy) * pMga->CurrentLayout.bitsPerPixel) + + skipleft; + end = start + w + (display_bit_width * (h - 1)); + + /* src cannot split a 2 Meg boundary from SrcOrg */ + if(!((start ^ end) & 0xff000000)) { + WAITFIFO(4); + OUTREG(MGAREG_AR3, start); + OUTREG(MGAREG_AR0, start + w); + OUTREG(MGAREG_FXBNDRY, ((x + w) << 16) | (x & 0xffff)); + OUTREG(MGAREG_YDSTLEN + MGAREG_EXEC, (y << 16) | h); + } else { + while(h) { + next = (start + 0x00ffffff) & 0xff000000; + if(next <= (start + w)) { + num = next - start - 1; + + WAITFIFO(7); + OUTREG(MGAREG_AR3, start); + OUTREG(MGAREG_AR0, start + num); + OUTREG(MGAREG_FXBNDRY, ((x + num) << 16) | (x & 0xffff)); + OUTREG(MGAREG_YDSTLEN + MGAREG_EXEC, (y << 16) | 1); + + OUTREG(MGAREG_AR3, next); + OUTREG(MGAREG_AR0, start + w ); + OUTREG(MGAREG_FXBNDRY + MGAREG_EXEC, ((x + w) << 16) | + ((x + num + 1) & 0xffff)); + start += display_bit_width; + h--; y++; + } else { + num = ((next - start - w)/display_bit_width) + 1; + if(num > h) num = h; + + WAITFIFO(4); + OUTREG(MGAREG_AR3, start); + OUTREG(MGAREG_AR0, start + w); + OUTREG(MGAREG_FXBNDRY, ((x + w) << 16) | (x & 0xffff)); + OUTREG(MGAREG_YDSTLEN + MGAREG_EXEC, (y << 16) | num); + + start += num * display_bit_width; + h -= num; y += num; + } + } + } + + if(resetDstOrg) { + WAITFIFO(1); + OUTREG(MGAREG_DSTORG, pMga->DstOrg); + } +} + + +void +MGAFillSolidRectsDMA( + ScrnInfoPtr pScrn, + int fg, int rop, + unsigned int planemask, + int nBox, /* number of rectangles to fill */ + BoxPtr pBox /* Pointer to first rectangle to fill */ +){ + MGAPtr pMga = MGAPTR(pScrn); + XAAInfoRecPtr infoRec = pMga->AccelInfoRec; + CARD32 *base = (CARD32*)pMga->ILOADBase; + + CHECK_DMA_QUIESCENT(pMga, pScrn); + + SET_SYNC_FLAG(infoRec); + (*infoRec->SetupForSolidFill)(pScrn, fg, rop, planemask); + + if(nBox & 1) { + OUTREG(MGAREG_FXBNDRY, ((pBox->x2) << 16) | (pBox->x1 & 0xffff)); + OUTREG(MGAREG_YDSTLEN + MGAREG_EXEC, + (pBox->y1 << 16) | (pBox->y2 - pBox->y1)); + nBox--; pBox++; + } + + if(!nBox) return; + + OUTREG(MGAREG_OPMODE, MGAOPM_DMA_GENERAL); + while(nBox) { + base[0] = DMAINDICES(MGAREG_FXBNDRY, MGAREG_YDSTLEN + MGAREG_EXEC, + MGAREG_FXBNDRY, MGAREG_YDSTLEN + MGAREG_EXEC); + base[1] = ((pBox->x2) << 16) | (pBox->x1 & 0xffff); + base[2] = (pBox->y1 << 16) | (pBox->y2 - pBox->y1); + pBox++; + base[3] = ((pBox->x2) << 16) | (pBox->x1 & 0xffff); + base[4] = (pBox->y1 << 16) | (pBox->y2 - pBox->y1); + pBox++; + base += 5; nBox -= 2; + } + OUTREG(MGAREG_OPMODE, MGAOPM_DMA_BLIT); +} + +void +MGAFillSolidSpansDMA( + ScrnInfoPtr pScrn, + int fg, int rop, + unsigned int planemask, + int n, + DDXPointPtr ppt, + int *pwidth, int fSorted +){ + MGAPtr pMga = MGAPTR(pScrn); + XAAInfoRecPtr infoRec = pMga->AccelInfoRec; + CARD32 *base = (CARD32*)pMga->ILOADBase; + + CHECK_DMA_QUIESCENT(pMga, pScrn); + SET_SYNC_FLAG(infoRec); + + if(infoRec->ClipBox) { + OUTREG(MGAREG_CXBNDRY, + ((infoRec->ClipBox->x2 - 1) << 16) | infoRec->ClipBox->x1); + OUTREG(MGAREG_YTOP, + (infoRec->ClipBox->y1 * pScrn->displayWidth) + pMga->YDstOrg); + OUTREG(MGAREG_YBOT, + ((infoRec->ClipBox->y2 - 1) * pScrn->displayWidth) + pMga->YDstOrg); + } + + (*infoRec->SetupForSolidFill)(pScrn, fg, rop, planemask); + + if(n & 1) { + OUTREG(MGAREG_FXBNDRY, ((ppt->x + *pwidth) << 16) | (ppt->x & 0xffff)); + OUTREG(MGAREG_YDSTLEN + MGAREG_EXEC, (ppt->y << 16) | 1); + ppt++; pwidth++; n--; + } + + if(n) { + if(n > 838860) n = 838860; /* maximum number we have room for */ + + OUTREG(MGAREG_OPMODE, MGAOPM_DMA_GENERAL); + while(n) { + base[0] = DMAINDICES(MGAREG_FXBNDRY, MGAREG_YDSTLEN + MGAREG_EXEC, + MGAREG_FXBNDRY, MGAREG_YDSTLEN + MGAREG_EXEC); + base[1] = ((ppt->x + *(pwidth++)) << 16) | (ppt->x & 0xffff); + base[2] = (ppt->y << 16) | 1; + ppt++; + base[3] = ((ppt->x + *(pwidth++)) << 16) | (ppt->x & 0xffff); + base[4] = (ppt->y << 16) | 1; + ppt++; + base += 5; n -= 2; + } + OUTREG(MGAREG_OPMODE, MGAOPM_DMA_BLIT); + } + + if(infoRec->ClipBox) { + OUTREG(MGAREG_CXBNDRY, 0xFFFF0000); /* (maxX << 16) | minX */ + OUTREG(MGAREG_YTOP, 0x00000000); /* minPixelPointer */ + OUTREG(MGAREG_YBOT, 0x007FFFFF); /* maxPixelPointer */ + } +} + + +void +MGAFillMono8x8PatternRectsTwoPass( + ScrnInfoPtr pScrn, + int fg, int bg, int rop, + unsigned int planemask, + int nBoxInit, + BoxPtr pBoxInit, + int pattern0, int pattern1, + int xorg, int yorg +){ + MGAPtr pMga = MGAPTR(pScrn); + XAAInfoRecPtr infoRec = pMga->AccelInfoRec; + int nBox, SecondPassColor; + BoxPtr pBox; + + CHECK_DMA_QUIESCENT(pMga, pScrn); + + if((rop == GXcopy) && (bg != -1)) { + SecondPassColor = bg; + bg = -1; + } else SecondPassColor = -1; + + WAITFIFO(1); + OUTREG(MGAREG_SHIFT, (((-yorg) & 0x07) << 4) | ((-xorg) & 0x07)); + +SECOND_PASS: + + nBox = nBoxInit; + pBox = pBoxInit; + + (*infoRec->SetupForMono8x8PatternFill)(pScrn, pattern0, pattern1, + fg, bg, rop, planemask); + + while(nBox--) { + WAITFIFO(2); + OUTREG(MGAREG_FXBNDRY, ((pBox->x2) << 16) | (pBox->x1 & 0xffff)); + OUTREG(MGAREG_YDSTLEN + MGAREG_EXEC, + (pBox->y1 << 16) | (pBox->y2 - pBox->y1)); + pBox++; + } + + if(SecondPassColor != -1) { + fg = SecondPassColor; + SecondPassColor = -1; + pattern0 = ~pattern0; + pattern1 = ~pattern1; + goto SECOND_PASS; + } + + SET_SYNC_FLAG(infoRec); +} + + +void +MGAValidatePolyArc( + GCPtr pGC, + unsigned long changes, + DrawablePtr pDraw +){ + ScrnInfoPtr pScrn = xf86Screens[pGC->pScreen->myNum]; + MGAPtr pMga = MGAPTR(pScrn); + Bool fullPlanemask = TRUE; + + if((pGC->planemask & pMga->AccelInfoRec->FullPlanemask) != + pMga->AccelInfoRec->FullPlanemask) + { + if(pMga->AccelFlags & MGA_NO_PLANEMASK) return; + fullPlanemask = FALSE; + } + + if(!pGC->lineWidth && + (pGC->fillStyle == FillSolid) && + (pGC->lineStyle == LineSolid) && + ((pGC->alu != GXcopy) || !fullPlanemask)) + { + pGC->ops->PolyArc = MGAPolyArcThinSolid; + } +} + +static void +MGAPolyPoint ( + DrawablePtr pDraw, + GCPtr pGC, + int mode, + int npt, + xPoint *ppt +){ + int numRects = REGION_NUM_RECTS(pGC->pCompositeClip); + XAAInfoRecPtr infoRec; + BoxPtr pbox; + MGAPtr pMga; + int xorg, yorg; + ScrnInfoPtr pScrn; + + if(!numRects) return; + + if(numRects != 1) { + XAAGetFallbackOps()->PolyPoint(pDraw, pGC, mode, npt, ppt); + return; + } + + infoRec = GET_XAAINFORECPTR_FROM_GC(pGC); + pScrn = infoRec->pScrn; + pMga = MGAPTR(pScrn); + xorg = pDraw->x; + yorg = pDraw->y; + + pbox = REGION_RECTS(pGC->pCompositeClip); + + (*infoRec->SetClippingRectangle)(infoRec->pScrn, + pbox->x1, pbox->y1, pbox->x2 - 1, pbox->y2 - 1); + (*infoRec->SetupForSolidFill)(infoRec->pScrn, pGC->fgPixel, pGC->alu, + pGC->planemask); + + if(mode == CoordModePrevious) { + while(npt--) { + xorg += ppt->x; + yorg += ppt->y; + WAITFIFO(2); + OUTREG(MGAREG_FXBNDRY, ((xorg + 1) << 16) | (xorg & 0xffff)); + OUTREG(MGAREG_YDSTLEN + MGAREG_EXEC, (yorg << 16) | 1); + ppt++; + } + } else { + int x; + while(npt--) { + x = ppt->x + xorg; + WAITFIFO(2); + OUTREG(MGAREG_FXBNDRY, ((x + 1) << 16) | (x & 0xffff)); + OUTREG(MGAREG_YDSTLEN + MGAREG_EXEC, ((ppt->y + yorg) << 16) | 1); + ppt++; + } + } + + (*infoRec->DisableClipping)(infoRec->pScrn); + + SET_SYNC_FLAG(infoRec); +} + + +void +MGAValidatePolyPoint( + GCPtr pGC, + unsigned long changes, + DrawablePtr pDraw +){ + ScrnInfoPtr pScrn = xf86Screens[pGC->pScreen->myNum]; + MGAPtr pMga = MGAPTR(pScrn); + Bool fullPlanemask = TRUE; + + pGC->ops->PolyPoint = XAAGetFallbackOps()->PolyPoint; + + if((pGC->planemask & pMga->AccelInfoRec->FullPlanemask) != + pMga->AccelInfoRec->FullPlanemask) + { + if(pMga->AccelFlags & MGA_NO_PLANEMASK) return; + fullPlanemask = FALSE; + } + + if((pGC->alu != GXcopy) || !fullPlanemask) + pGC->ops->PolyPoint = MGAPolyPoint; +} + + +void +MGAFillCacheBltRects( + ScrnInfoPtr pScrn, + int rop, + unsigned int planemask, + int nBox, + BoxPtr pBox, + int xorg, int yorg, + XAACacheInfoPtr pCache +){ + XAAInfoRecPtr infoRec = GET_XAAINFORECPTR_FROM_SCRNINFOPTR(pScrn); + int x, y, phaseY, phaseX, skipleft, height, width, w, blit_w, blit_h, start; + + CHECK_DMA_QUIESCENT(MGAPTR(pScrn), pScrn); + + (*infoRec->SetupForScreenToScreenCopy)(pScrn, 1, 1, rop, planemask, + pCache->trans_color); + + while(nBox--) { + y = pBox->y1; + phaseY = (y - yorg) % pCache->orig_h; + if(phaseY < 0) phaseY += pCache->orig_h; + phaseX = (pBox->x1 - xorg) % pCache->orig_w; + if(phaseX < 0) phaseX += pCache->orig_w; + height = pBox->y2 - y; + width = pBox->x2 - pBox->x1; + start = phaseY ? (pCache->orig_h - phaseY) : 0; + + /* This is optimized for WRAM */ + + if ((rop == GXcopy) && (height >= (pCache->orig_h + start))) { + w = width; skipleft = phaseX; x = pBox->x1; + blit_h = pCache->orig_h; + + while(1) { + blit_w = pCache->w - skipleft; + if(blit_w > w) blit_w = w; + (*infoRec->SubsequentScreenToScreenCopy)(pScrn, + pCache->x + skipleft, pCache->y, + x, y + start, blit_w, blit_h); + w -= blit_w; + if(!w) break; + x += blit_w; + skipleft = (skipleft + blit_w) % pCache->orig_w; + } + height -= blit_h; + + if(start) { + (*infoRec->SubsequentScreenToScreenCopy)(pScrn, + pBox->x1, y + blit_h, pBox->x1, y, width, start); + height -= start; + y += start; + } + start = blit_h; + + while(height) { + if(blit_h > height) blit_h = height; + (*infoRec->SubsequentScreenToScreenCopy)(pScrn, + pBox->x1, y, + pBox->x1, y + start, width, blit_h); + height -= blit_h; + start += blit_h; + blit_h <<= 1; + } + } else { + while(1) { + w = width; skipleft = phaseX; x = pBox->x1; + blit_h = pCache->h - phaseY; + if(blit_h > height) blit_h = height; + + while(1) { + blit_w = pCache->w - skipleft; + if(blit_w > w) blit_w = w; + (*infoRec->SubsequentScreenToScreenCopy)(pScrn, + pCache->x + skipleft, pCache->y + phaseY, + x, y, blit_w, blit_h); + w -= blit_w; + if(!w) break; + x += blit_w; + skipleft = (skipleft + blit_w) % pCache->orig_w; + } + height -= blit_h; + if(!height) break; + y += blit_h; + phaseY = (phaseY + blit_h) % pCache->orig_h; + } + } + pBox++; + } + + SET_SYNC_FLAG(infoRec); +} + + +#if defined(XF86DRI) +void +mgaDRIInitBuffers(WindowPtr pWin, RegionPtr prgn, CARD32 index) +{ + ScreenPtr pScreen = pWin->drawable.pScreen; + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + MGAPtr pMga = MGAPTR(pScrn); + BoxPtr pbox = REGION_RECTS(prgn); + int nbox = REGION_NUM_RECTS(prgn); + + CHECK_DMA_QUIESCENT(MGAPTR(pScrn), pScrn); + + mgaSetupForSolidFill(pScrn, 0, GXcopy, -1); + while (nbox--) { + MGASelectBuffer(pScrn, MGA_BACK); + mgaSubsequentSolidFillRect(pScrn, pbox->x1, pbox->y1, + pbox->x2-pbox->x1, pbox->y2-pbox->y1); + MGASelectBuffer(pScrn, MGA_DEPTH); + mgaSubsequentSolidFillRect(pScrn, pbox->x1, pbox->y1, + pbox->x2-pbox->x1, pbox->y2-pbox->y1); + pbox++; + } + MGASelectBuffer(pScrn, MGA_FRONT); + + pMga->AccelInfoRec->NeedToSync = TRUE; +} + +/* + This routine is a modified form of XAADoBitBlt with the calls to + ScreenToScreenBitBlt built in. My routine has the prgnSrc as source + instead of destination. My origin is upside down so the ydir cases + are reversed. +*/ + +void +mgaDRIMoveBuffers(WindowPtr pParent, DDXPointRec ptOldOrg, + RegionPtr prgnSrc, CARD32 index) +{ + ScreenPtr pScreen = pParent->drawable.pScreen; + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + MGAPtr pMga = MGAPTR(pScrn); + int nbox; + BoxPtr pbox, pboxTmp, pboxNext, pboxBase, pboxNew1, pboxNew2; + DDXPointPtr pptTmp, pptNew1, pptNew2; + int xdir, ydir; + int dx, dy; + DDXPointPtr pptSrc; + int screenwidth = pScrn->virtualX; + int screenheight = pScrn->virtualY; + + CHECK_DMA_QUIESCENT(MGAPTR(pScrn), pScrn); + + pbox = REGION_RECTS(prgnSrc); + nbox = REGION_NUM_RECTS(prgnSrc); + pboxNew1 = 0; + pptNew1 = 0; + pboxNew2 = 0; + pboxNew2 = 0; + pptSrc = &ptOldOrg; + + dx = pParent->drawable.x - ptOldOrg.x; + dy = pParent->drawable.y - ptOldOrg.y; + + /* If the copy will overlap in Y, reverse the order */ + if (dy>0) { + ydir = -1; + + if (nbox>1) { + /* Keep ordering in each band, reverse order of bands */ + pboxNew1 = (BoxPtr)ALLOCATE_LOCAL(sizeof(BoxRec)*nbox); + if (!pboxNew1) return; + pptNew1 = (DDXPointPtr)ALLOCATE_LOCAL(sizeof(DDXPointRec)*nbox); + if (!pptNew1) { + DEALLOCATE_LOCAL(pboxNew1); + return; + } + pboxBase = pboxNext = pbox+nbox-1; + while (pboxBase >= pbox) { + while ((pboxNext >= pbox) && (pboxBase->y1 == pboxNext->y1)) + pboxNext--; + pboxTmp = pboxNext+1; + pptTmp = pptSrc + (pboxTmp - pbox); + while (pboxTmp <= pboxBase) { + *pboxNew1++ = *pboxTmp++; + *pptNew1++ = *pptTmp++; + } + pboxBase = pboxNext; + } + pboxNew1 -= nbox; + pbox = pboxNew1; + pptNew1 -= nbox; + pptSrc = pptNew1; + } + } else { + /* No changes required */ + ydir = 1; + } + + /* If the regions will overlap in X, reverse the order */ + if (dx>0) { + xdir = -1; + + if (nbox > 1) { + /*reverse orderof rects in each band */ + pboxNew2 = (BoxPtr)ALLOCATE_LOCAL(sizeof(BoxRec)*nbox); + pptNew2 = (DDXPointPtr)ALLOCATE_LOCAL(sizeof(DDXPointRec)*nbox); + if (!pboxNew2 || !pptNew2) { + if (pptNew2) DEALLOCATE_LOCAL(pptNew2); + if (pboxNew2) DEALLOCATE_LOCAL(pboxNew2); + if (pboxNew1) { + DEALLOCATE_LOCAL(pptNew1); + DEALLOCATE_LOCAL(pboxNew1); + } + return; + } + pboxBase = pboxNext = pbox; + while (pboxBase < pbox+nbox) { + while ((pboxNext < pbox+nbox) && + (pboxNext->y1 == pboxBase->y1)) + pboxNext++; + pboxTmp = pboxNext; + pptTmp = pptSrc + (pboxTmp - pbox); + while (pboxTmp != pboxBase) { + *pboxNew2++ = *--pboxTmp; + *pptNew2++ = *--pptTmp; + } + pboxBase = pboxNext; + } + pboxNew2 -= nbox; + pbox = pboxNew2; + pptNew2 -= nbox; + pptSrc = pptNew2; + } + } else { + /* No changes are needed */ + xdir = 1; + } + + mgaSetupForScreenToScreenCopy(pScrn, xdir, ydir, GXcopy, -1, -1); + for ( ; nbox-- ; pbox++) { + int x1 = pbox->x1; + int y1 = pbox->y1; + int destx = x1 + dx; + int desty = y1 + dy; + int w = pbox->x2 - x1 + 1; + int h = pbox->y2 - y1 + 1; + + if ( destx < 0 ) x1 -= destx, w += destx, destx = 0; + if ( desty < 0 ) y1 -= desty, h += desty, desty = 0; + if ( destx + w > screenwidth ) w = screenwidth - destx; + if ( desty + h > screenheight ) h = screenheight - desty; + if ( w <= 0 ) continue; + if ( h <= 0 ) continue; + + MGASelectBuffer(pScrn, MGA_BACK); + mgaSubsequentScreenToScreenCopy(pScrn, x1, y1, destx, desty, w, h); + MGASelectBuffer(pScrn, MGA_DEPTH); + mgaSubsequentScreenToScreenCopy(pScrn, x1, y1, destx, desty, w, h); + } + MGASelectBuffer(pScrn, MGA_FRONT); + + if (pboxNew2) { + DEALLOCATE_LOCAL(pptNew2); + DEALLOCATE_LOCAL(pboxNew2); + } + if (pboxNew1) { + DEALLOCATE_LOCAL(pptNew1); + DEALLOCATE_LOCAL(pboxNew1); + } + + pMga->AccelInfoRec->NeedToSync = TRUE; +} + +#endif /* XF86DRI */ diff --git a/driver/xf86-video-mga/src/mga_ucode.h b/driver/xf86-video-mga/src/mga_ucode.h new file mode 100644 index 000000000..2921ceb13 --- /dev/null +++ b/driver/xf86-video-mga/src/mga_ucode.h @@ -0,0 +1,11610 @@ +/* + * GLX Hardware Device Driver for Matrox G200/G400 + * + * Warp Engine Microcode + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * MATROX GRAPHICS INC., OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE + * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * (c) 1999 Matrox Graphics Inc. + * + */ + + +unsigned char WARP_G200_tgz[] = { + +0x00, 0x80, 0x00, 0xE8, +0x00, 0x80, 0x00, 0xE8, + +0x00, 0x80, 0x00, 0xE8, +0x00, 0x80, 0x00, 0xE8, + +0x00, 0x80, 0x00, 0xE8, +0x00, 0x80, 0x00, 0xE8, + +0x00, 0x80, 0x00, 0xE8, +0x00, 0x80, 0x00, 0xE8, + +0x00, 0x80, 0x00, 0xE8, +0x00, 0x80, 0x00, 0xE8, + +0x00, 0x98, 0xA0, 0xE9, +0x40, 0x40, 0xD8, 0xEC, + +0xFF, 0x80, 0xC0, 0xE9, +0x00, 0x80, 0x00, 0xE8, + +0x1F, 0xD7, 0x18, 0xBD, +0x3F, 0xD7, 0x22, 0xBD, + +0x81, 0x04, +0x89, 0x04, +0x01, 0x04, +0x09, 0x04, + +0xC9, 0x41, 0xC0, 0xEC, +0x11, 0x04, +0x00, 0xE0, + +0x41, 0xCC, 0x41, 0xCD, +0x49, 0xCC, 0x49, 0xCD, + +0xD1, 0x41, 0xC0, 0xEC, +0x51, 0xCC, 0x51, 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0xBD, +0x3B, 0xD7, 0x1B, 0xBD, + +0x46, 0x80, 0x46, 0xCF, +0x57, 0x80, 0x57, 0xCF, + +0x66, 0x33, 0x66, 0xCF, +0x47, 0x3B, 0x47, 0xCF, + +0x56, 0x33, 0x56, 0xCF, +0x67, 0x3B, 0x67, 0xCF, + +0x0B, 0x48, 0xA0, 0xE8, +0x1B, 0x58, 0xA0, 0xE8, + +0x2B, 0x68, 0xA0, 0xE8, +0x0C, 0x49, 0xA0, 0xE8, + +0x1C, 0x59, 0xA0, 0xE8, +0x2C, 0x69, 0xA0, 0xE8, + +0x0B, 0x00, +0x1B, 0x00, +0x2B, 0x00, +0x00, 0xE0, + +0x0C, 0x00, +0x1C, 0x00, +0x2C, 0x00, +0x00, 0xE0, + +0x0B, 0x65, +0x1B, 0x65, +0x2B, 0x65, +0x00, 0xE0, + +0x0C, 0x65, +0x1C, 0x65, +0x2C, 0x65, +0x00, 0xE0, + +0x0B, 0x1B, 0x60, 0xEC, +0x34, 0xD7, 0x34, 0xAD, + +0x2B, 0x80, 0x60, 0xEC, +0x0C, 0x1C, 0x60, 0xEC, + +0x3C, 0xD7, 0x3C, 0xAD, +0x2C, 0x80, 0x60, 0xEC, + +0x0B, 0x2B, 0xDE, 0xE8, +0x1B, 0x80, 0xDE, 0xE8, + +0x34, 0x80, 0x34, 0xBD, +0x3C, 0x80, 0x3C, 0xBD, + +0x33, 0xD7, 0x0B, 0xBD, +0x3B, 0xD7, 0x1B, 0xBD, + +0x48, 0x80, 0x48, 0xCF, +0x59, 0x80, 0x59, 0xCF, + +0x68, 0x33, 0x68, 0xCF, +0x49, 0x3B, 0x49, 0xCF, + +0xBA, 0xFF, 0x20, 0xEA, +0x00, 0x80, 0x00, 0xE8, + +0x58, 0x33, 0x58, 0xCF, +0x69, 0x3B, 0x69, 0xCF, + +0x79, 0xFF, 0x20, 0xEA, +0x57, 0xC0, 0xBF, 0xEA, + +0x00, 0x80, 0xA0, 0xE9, +0x00, 0x00, 0xD8, 0xEC, + +}; +unsigned char WARP_G400_t2gzaf[] = { + +0x00, 0x8A, 0x98, 0xE9, +0x00, 0x80, 0x00, 0xE8, + +0x00, 0x80, 0xA0, 0xE9, +0x00, 0x00, 0xD8, 0xEC, + +0xFF, 0x80, 0xC0, 0xE9, +0x00, 0x80, 0x00, 0xE8, + +0x0A, 0x40, 0x50, 0xBF, +0x2A, 0x40, 0x60, 0xBF, + +0x32, 0x41, 0x51, 0xBF, +0x3A, 0x41, 0x61, 0xBF, + +0xC3, 0x6B, +0xD3, 0x6B, +0x00, 0x8A, 0x98, 0xE9, + +0x73, 0x7B, 0xC8, 0xEC, +0x96, 0xE2, +0x41, 0x04, + +0x7B, 0x43, 0xA0, 0xE8, +0x73, 0x53, 0xA0, 0xE8, + +0xAD, 0xEE, 0x23, 0x9F, +0x00, 0xE0, +0x51, 0x04, + +0x90, 0xE2, +0x61, 0x04, +0x31, 0x46, 0xB1, 0xE8, + +0x51, 0x41, 0xE0, 0xEC, +0x39, 0x67, 0xB1, 0xE8, + +0x00, 0x04, +0x46, 0xE2, +0x73, 0x63, 0xA0, 0xE8, + +0x61, 0x41, 0xE0, 0xEC, +0x31, 0x00, +0x39, 0x00, + +0x81, 0x80, 0x15, 0xEA, +0x10, 0x04, +0x20, 0x04, + +0x61, 0x51, 0xE0, 0xEC, +0x2F, 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0x66, 0xA0, 0xE8, +0x0C, 0x47, 0xA0, 0xE8, + +0x1C, 0x57, 0xA0, 0xE8, +0x2C, 0x67, 0xA0, 0xE8, + +0x0B, 0x00, +0x1B, 0x00, +0x2B, 0x00, +0x00, 0xE0, + +0x0C, 0x00, +0x1C, 0x00, +0x2C, 0x00, +0x00, 0xE0, + +0x0B, 0x65, +0x1B, 0x65, +0x2B, 0x65, +0x00, 0xE0, + +0x0C, 0x65, +0x1C, 0x65, +0x2C, 0x65, +0x00, 0xE0, + +0x0B, 0x1B, 0x60, 0xEC, +0x36, 0xD7, 0x36, 0xAD, + +0x2B, 0x80, 0x60, 0xEC, +0x0C, 0x1C, 0x60, 0xEC, + +0x3E, 0xD7, 0x3E, 0xAD, +0x2C, 0x80, 0x60, 0xEC, + +0x0B, 0x2B, 0xDE, 0xE8, +0x1B, 0x80, 0xDE, 0xE8, + +0x36, 0x80, 0x36, 0xBD, +0x3E, 0x80, 0x3E, 0xBD, + +0x33, 0xD7, 0x0B, 0xBD, +0x3B, 0xD7, 0x1B, 0xBD, + +0x46, 0x80, 0x46, 0xCF, +0x57, 0x80, 0x57, 0xCF, + +0x66, 0x33, 0x66, 0xCF, +0x47, 0x3B, 0x47, 0xCF, + +0x56, 0x33, 0x56, 0xCF, +0x67, 0x3B, 0x67, 0xCF, + +0x0B, 0x48, 0xA0, 0xE8, +0x1B, 0x58, 0xA0, 0xE8, + +0x2B, 0x68, 0xA0, 0xE8, +0x0C, 0x49, 0xA0, 0xE8, + +0x1C, 0x59, 0xA0, 0xE8, +0x2C, 0x69, 0xA0, 0xE8, + +0x0B, 0x00, +0x1B, 0x00, +0x2B, 0x00, +0x00, 0xE0, + +0x0C, 0x00, +0x1C, 0x00, +0x2C, 0x00, +0x00, 0xE0, + +0x0B, 0x65, +0x1B, 0x65, +0x2B, 0x65, +0x00, 0xE0, + +0x0C, 0x65, +0x1C, 0x65, +0x2C, 0x65, +0x00, 0xE0, + +0x0B, 0x1B, 0x60, 0xEC, +0x34, 0xD7, 0x34, 0xAD, + +0x2B, 0x80, 0x60, 0xEC, +0x0C, 0x1C, 0x60, 0xEC, + +0x3C, 0xD7, 0x3C, 0xAD, +0x2C, 0x80, 0x60, 0xEC, + +0x0B, 0x2B, 0xDE, 0xE8, +0x1B, 0x80, 0xDE, 0xE8, + +0x34, 0x80, 0x34, 0xBD, +0x3C, 0x80, 0x3C, 0xBD, + +0x33, 0xD7, 0x0B, 0xBD, +0x3B, 0xD7, 0x1B, 0xBD, + +0x48, 0x80, 0x48, 0xCF, +0x59, 0x80, 0x59, 0xCF, + +0x68, 0x33, 0x68, 0xCF, +0x49, 0x3B, 0x49, 0xCF, + +0xB5, 0xFF, 0x20, 0xEA, +0x00, 0x80, 0x00, 0xE8, + +0x58, 0x33, 0x58, 0xCF, +0x69, 0x3B, 0x69, 0xCF, + +0x74, 0xFF, 0x20, 0xEA, +0x57, 0xC0, 0xBF, 0xEA, + +0x00, 0x80, 0xA0, 0xE9, +0x00, 0x00, 0xD8, 0xEC, + +}; +unsigned char WARP_G400_t2gzf[] = { + +0x00, 0x8A, 0x98, 0xE9, +0x00, 0x80, 0x00, 0xE8, + +0x00, 0x80, 0xA0, 0xE9, +0x00, 0x00, 0xD8, 0xEC, + +0xFF, 0x80, 0xC0, 0xE9, +0x00, 0x80, 0x00, 0xE8, + +0x0A, 0x40, 0x50, 0xBF, +0x2A, 0x40, 0x60, 0xBF, + +0x32, 0x41, 0x51, 0xBF, +0x3A, 0x41, 0x61, 0xBF, + +0xC3, 0x6B, +0xD3, 0x6B, +0x00, 0x8A, 0x98, 0xE9, + +0x73, 0x7B, 0xC8, 0xEC, +0x96, 0xE2, +0x41, 0x04, + +0x7B, 0x43, 0xA0, 0xE8, +0x73, 0x53, 0xA0, 0xE8, + +0xAD, 0xEE, 0x23, 0x9F, +0x00, 0xE0, +0x51, 0x04, + +0x90, 0xE2, +0x61, 0x04, +0x31, 0x46, 0xB1, 0xE8, + +0x51, 0x41, 0xE0, 0xEC, +0x39, 0x67, 0xB1, 0xE8, + +0x00, 0x04, +0x46, 0xE2, +0x73, 0x63, 0xA0, 0xE8, + +0x61, 0x41, 0xE0, 0xEC, +0x31, 0x00, +0x39, 0x00, + +0x7D, 0x80, 0x15, 0xEA, +0x10, 0x04, +0x20, 0x04, + +0x61, 0x51, 0xE0, 0xEC, +0x2F, 0x41, 0x60, 0xEA, + +0x31, 0x20, +0x39, 0x20, +0x1F, 0x42, 0xA0, 0xE8, + +0x2A, 0x42, 0x52, 0xBF, +0x0F, 0x52, 0xA0, 0xE8, + +0x1A, 0x42, 0x62, 0xBF, +0x1E, 0x51, 0x60, 0xEA, + +0x73, 0x7B, 0xC8, 0xEC, +0x0E, 0x61, 0x60, 0xEA, + +0x32, 0x40, 0x50, 0xBD, +0x22, 0x40, 0x60, 0xBD, + +0x12, 0x41, 0x51, 0xBD, +0x3A, 0x41, 0x61, 0xBD, + +0xBF, 0x2F, 0x0E, 0xBD, +0x97, 0xE2, +0x7B, 0x72, + +0x32, 0x20, +0x22, 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+ +0x8B, 0x3C, 0x20, 0xE9, +0x37, 0x50, 0x60, 0xBD, + +0x57, 0x0D, 0x20, 0xE9, +0x35, 0x51, 0x61, 0xBD, + +0x2B, 0x50, 0x20, 0xE9, +0x1D, 0x37, 0xE1, 0xEA, + +0x1E, 0x35, 0xE1, 0xEA, +0x00, 0xE0, +0x0E, 0x77, + +0x24, 0x51, 0x20, 0xE9, +0x9A, 0xFF, 0x20, 0xEA, + +0x16, 0x0E, 0x20, 0xE9, +0x57, 0x2E, 0xBF, 0xEA, + +0x0B, 0x46, 0xA0, 0xE8, +0x1B, 0x56, 0xA0, 0xE8, + +0x2B, 0x66, 0xA0, 0xE8, +0x0C, 0x47, 0xA0, 0xE8, + +0x1C, 0x57, 0xA0, 0xE8, +0x2C, 0x67, 0xA0, 0xE8, + +0x0B, 0x00, +0x1B, 0x00, +0x2B, 0x00, +0x00, 0xE0, + +0x0C, 0x00, +0x1C, 0x00, +0x2C, 0x00, +0x00, 0xE0, + +0x0B, 0x65, +0x1B, 0x65, +0x2B, 0x65, +0x00, 0xE0, + +0x0C, 0x65, +0x1C, 0x65, +0x2C, 0x65, +0x00, 0xE0, + +0x0B, 0x1B, 0x60, 0xEC, +0x36, 0xD7, 0x36, 0xAD, + +0x2B, 0x80, 0x60, 0xEC, +0x0C, 0x1C, 0x60, 0xEC, + +0x3E, 0xD7, 0x3E, 0xAD, +0x2C, 0x80, 0x60, 0xEC, + +0x0B, 0x2B, 0xDE, 0xE8, +0x1B, 0x80, 0xDE, 0xE8, + +0x36, 0x80, 0x36, 0xBD, +0x3E, 0x80, 0x3E, 0xBD, + +0x33, 0xD7, 0x0B, 0xBD, +0x3B, 0xD7, 0x1B, 0xBD, + +0x46, 0x80, 0x46, 0xCF, +0x57, 0x80, 0x57, 0xCF, + +0x66, 0x33, 0x66, 0xCF, +0x47, 0x3B, 0x47, 0xCF, + +0x56, 0x33, 0x56, 0xCF, +0x67, 0x3B, 0x67, 0xCF, + +0x0B, 0x48, 0xA0, 0xE8, +0x1B, 0x58, 0xA0, 0xE8, + +0x2B, 0x68, 0xA0, 0xE8, +0x0C, 0x49, 0xA0, 0xE8, + +0x1C, 0x59, 0xA0, 0xE8, +0x2C, 0x69, 0xA0, 0xE8, + +0x0B, 0x00, +0x1B, 0x00, +0x2B, 0x00, +0x00, 0xE0, + +0x0C, 0x00, +0x1C, 0x00, +0x2C, 0x00, +0x00, 0xE0, + +0x0B, 0x65, +0x1B, 0x65, +0x2B, 0x65, +0x00, 0xE0, + +0x0C, 0x65, +0x1C, 0x65, +0x2C, 0x65, +0x00, 0xE0, + +0x0B, 0x1B, 0x60, 0xEC, +0x34, 0xD7, 0x34, 0xAD, + +0x2B, 0x80, 0x60, 0xEC, +0x0C, 0x1C, 0x60, 0xEC, + +0x3C, 0xD7, 0x3C, 0xAD, +0x2C, 0x80, 0x60, 0xEC, + +0x0B, 0x2B, 0xDE, 0xE8, +0x1B, 0x80, 0xDE, 0xE8, + +0x34, 0x80, 0x34, 0xBD, +0x3C, 0x80, 0x3C, 0xBD, + +0x33, 0xD7, 0x0B, 0xBD, +0x3B, 0xD7, 0x1B, 0xBD, + +0x48, 0x80, 0x48, 0xCF, +0x59, 0x80, 0x59, 0xCF, + +0x68, 0x33, 0x68, 0xCF, +0x49, 0x3B, 0x49, 0xCF, + +0xBB, 0xFF, 0x20, 0xEA, +0x00, 0x80, 0x00, 0xE8, + +0x58, 0x33, 0x58, 0xCF, +0x69, 0x3B, 0x69, 0xCF, + +0x78, 0xFF, 0x20, 0xEA, +0x57, 0xC0, 0xBF, 0xEA, + +0x00, 0x80, 0xA0, 0xE9, +0x00, 0x00, 0xD8, 0xEC, + +}; +unsigned char WARP_G400_t2gzs[] = { + +0x00, 0x8A, 0x98, 0xE9, +0x00, 0x80, 0x00, 0xE8, + +0x00, 0x80, 0xA0, 0xE9, +0x00, 0x00, 0xD8, 0xEC, + +0xFF, 0x80, 0xC0, 0xE9, +0x00, 0x80, 0x00, 0xE8, + +0x0A, 0x40, 0x50, 0xBF, +0x2A, 0x40, 0x60, 0xBF, + +0x32, 0x41, 0x51, 0xBF, +0x3A, 0x41, 0x61, 0xBF, + +0xC3, 0x6B, +0xD3, 0x6B, +0x00, 0x8A, 0x98, 0xE9, + +0x73, 0x7B, 0xC8, 0xEC, +0x96, 0xE2, +0x41, 0x04, + +0x7B, 0x43, 0xA0, 0xE8, +0x73, 0x53, 0xA0, 0xE8, + +0xAD, 0xEE, 0x23, 0x9F, +0x00, 0xE0, +0x51, 0x04, + +0x90, 0xE2, +0x61, 0x04, +0x31, 0x46, 0xB1, 0xE8, + +0x51, 0x41, 0xE0, 0xEC, +0x39, 0x67, 0xB1, 0xE8, + +0x00, 0x04, +0x46, 0xE2, +0x73, 0x63, 0xA0, 0xE8, + +0x61, 0x41, 0xE0, 0xEC, +0x31, 0x00, +0x39, 0x00, + +0x85, 0x80, 0x15, 0xEA, +0x10, 0x04, +0x20, 0x04, + +0x61, 0x51, 0xE0, 0xEC, +0x2F, 0x41, 0x60, 0xEA, + +0x31, 0x20, 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0xE8, + +0x2B, 0x68, 0xA0, 0xE8, +0x0C, 0x49, 0xA0, 0xE8, + +0x1C, 0x59, 0xA0, 0xE8, +0x2C, 0x69, 0xA0, 0xE8, + +0x0B, 0x00, +0x1B, 0x00, +0x2B, 0x00, +0x00, 0xE0, + +0x0C, 0x00, +0x1C, 0x00, +0x2C, 0x00, +0x00, 0xE0, + +0x0B, 0x65, +0x1B, 0x65, +0x2B, 0x65, +0x00, 0xE0, + +0x0C, 0x65, +0x1C, 0x65, +0x2C, 0x65, +0x00, 0xE0, + +0x0B, 0x1B, 0x60, 0xEC, +0x34, 0xD7, 0x34, 0xAD, + +0x2B, 0x80, 0x60, 0xEC, +0x0C, 0x1C, 0x60, 0xEC, + +0x3C, 0xD7, 0x3C, 0xAD, +0x2C, 0x80, 0x60, 0xEC, + +0x0B, 0x2B, 0xDE, 0xE8, +0x1B, 0x80, 0xDE, 0xE8, + +0x34, 0x80, 0x34, 0xBD, +0x3C, 0x80, 0x3C, 0xBD, + +0x33, 0xD7, 0x0B, 0xBD, +0x3B, 0xD7, 0x1B, 0xBD, + +0x48, 0x80, 0x48, 0xCF, +0x59, 0x80, 0x59, 0xCF, + +0x68, 0x33, 0x68, 0xCF, +0x49, 0x3B, 0x49, 0xCF, + +0xB2, 0xFF, 0x20, 0xEA, +0x00, 0x80, 0x00, 0xE8, + +0x58, 0x33, 0x58, 0xCF, +0x69, 0x3B, 0x69, 0xCF, + +0x70, 0xFF, 0x20, 0xEA, +0x57, 0xC0, 0xBF, 0xEA, + +0x00, 0x80, 0xA0, 0xE9, +0x00, 0x00, 0xD8, 0xEC, + +}; +unsigned char WARP_G400_t2gzsa[] = { + +0x00, 0x8A, 0x98, 0xE9, +0x00, 0x80, 0x00, 0xE8, + +0x00, 0x80, 0xA0, 0xE9, +0x00, 0x00, 0xD8, 0xEC, + +0xFF, 0x80, 0xC0, 0xE9, +0x00, 0x80, 0x00, 0xE8, + +0x0A, 0x40, 0x50, 0xBF, +0x2A, 0x40, 0x60, 0xBF, + +0x32, 0x41, 0x51, 0xBF, +0x3A, 0x41, 0x61, 0xBF, + +0xC3, 0x6B, +0xD3, 0x6B, +0x00, 0x8A, 0x98, 0xE9, + +0x73, 0x7B, 0xC8, 0xEC, +0x96, 0xE2, +0x41, 0x04, + +0x7B, 0x43, 0xA0, 0xE8, +0x73, 0x53, 0xA0, 0xE8, + +0xAD, 0xEE, 0x23, 0x9F, +0x00, 0xE0, +0x51, 0x04, + +0x90, 0xE2, +0x61, 0x04, +0x31, 0x46, 0xB1, 0xE8, + +0x51, 0x41, 0xE0, 0xEC, +0x39, 0x67, 0xB1, 0xE8, + +0x00, 0x04, +0x46, 0xE2, +0x73, 0x63, 0xA0, 0xE8, + +0x61, 0x41, 0xE0, 0xEC, +0x31, 0x00, +0x39, 0x00, + +0x8A, 0x80, 0x15, 0xEA, +0x10, 0x04, +0x20, 0x04, + +0x61, 0x51, 0xE0, 0xEC, +0x2F, 0x41, 0x60, 0xEA, + +0x31, 0x20, +0x39, 0x20, +0x1F, 0x42, 0xA0, 0xE8, + +0x2A, 0x42, 0x52, 0xBF, +0x0F, 0x52, 0xA0, 0xE8, + +0x1A, 0x42, 0x62, 0xBF, +0x1E, 0x51, 0x60, 0xEA, + +0x73, 0x7B, 0xC8, 0xEC, +0x0E, 0x61, 0x60, 0xEA, + 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0x00, +0x24, 0x00, +0x2C, 0x00, +0x00, 0xE0, + +0x1C, 0x65, +0x23, 0x65, +0x2B, 0x65, +0x00, 0xE0, + +0x1D, 0x65, +0x24, 0x65, +0x2C, 0x65, +0x00, 0xE0, + +0x1C, 0x23, 0x60, 0xEC, +0x36, 0xD7, 0x36, 0xAD, + +0x2B, 0x80, 0x60, 0xEC, +0x1D, 0x24, 0x60, 0xEC, + +0x3E, 0xD7, 0x3E, 0xAD, +0x2C, 0x80, 0x60, 0xEC, + +0x1C, 0x2B, 0xDE, 0xE8, +0x23, 0x80, 0xDE, 0xE8, + +0x36, 0x80, 0x36, 0xBD, +0x3E, 0x80, 0x3E, 0xBD, + +0x33, 0xD7, 0x1C, 0xBD, +0x3B, 0xD7, 0x23, 0xBD, + +0x46, 0x80, 0x46, 0xCF, +0x4F, 0x80, 0x4F, 0xCF, + +0x56, 0x33, 0x56, 0xCF, +0x47, 0x3B, 0x47, 0xCF, + +0xD6, 0xFF, 0x20, 0xEA, +0x00, 0x80, 0x00, 0xE8, + +0x4E, 0x33, 0x4E, 0xCF, +0x57, 0x3B, 0x57, 0xCF, + +0x9D, 0xFF, 0x20, 0xEA, +0x57, 0xC0, 0xBF, 0xEA, + +0x00, 0x80, 0xA0, 0xE9, +0x00, 0x00, 0xD8, 0xEC, + +}; +unsigned char WARP_G400_tgza[] = { + +0x00, 0x88, 0x98, 0xE9, +0x00, 0x80, 0x00, 0xE8, + +0x00, 0x80, 0xA0, 0xE9, +0x00, 0x00, 0xD8, 0xEC, + +0xFF, 0x80, 0xC0, 0xE9, +0x00, 0x80, 0x00, 0xE8, + +0x22, 0x40, 0x48, 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0xDE, 0xE8, + +0x36, 0x80, 0x36, 0xBD, +0x3E, 0x80, 0x3E, 0xBD, + +0x33, 0xD7, 0x1C, 0xBD, +0x3B, 0xD7, 0x23, 0xBD, + +0x46, 0x80, 0x46, 0xCF, +0x4F, 0x80, 0x4F, 0xCF, + +0x56, 0x33, 0x56, 0xCF, +0x47, 0x3B, 0x47, 0xCF, + +0xD3, 0xFF, 0x20, 0xEA, +0x00, 0x80, 0x00, 0xE8, + +0x4E, 0x33, 0x4E, 0xCF, +0x57, 0x3B, 0x57, 0xCF, + +0x99, 0xFF, 0x20, 0xEA, +0x57, 0xC0, 0xBF, 0xEA, + +0x00, 0x80, 0xA0, 0xE9, +0x00, 0x00, 0xD8, 0xEC, + +}; +unsigned char WARP_G400_tgzaf[] = { + +0x00, 0x88, 0x98, 0xE9, +0x00, 0x80, 0x00, 0xE8, + +0x00, 0x80, 0xA0, 0xE9, +0x00, 0x00, 0xD8, 0xEC, + +0xFF, 0x80, 0xC0, 0xE9, +0x00, 0x80, 0x00, 0xE8, + +0x22, 0x40, 0x48, 0xBF, +0x2A, 0x40, 0x50, 0xBF, + +0x32, 0x41, 0x49, 0xBF, +0x3A, 0x41, 0x51, 0xBF, + +0xC3, 0x6B, +0xCB, 0x6B, +0x00, 0x88, 0x98, 0xE9, + +0x73, 0x7B, 0xC8, 0xEC, +0x96, 0xE2, +0x41, 0x04, + +0x7B, 0x43, 0xA0, 0xE8, +0x73, 0x4B, 0xA0, 0xE8, + +0xAD, 0xEE, 0x29, 0x9F, +0x00, 0xE0, +0x49, 0x04, + +0x90, 0xE2, +0x51, 0x04, +0x31, 0x46, 0xB1, 0xE8, + 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0x26, 0x20, 0xE9, +0x57, 0x2E, 0xBF, 0xEA, + +0x1C, 0x46, 0xA0, 0xE8, +0x23, 0x4E, 0xA0, 0xE8, + +0x2B, 0x56, 0xA0, 0xE8, +0x1D, 0x47, 0xA0, 0xE8, + +0x24, 0x4F, 0xA0, 0xE8, +0x2C, 0x57, 0xA0, 0xE8, + +0x1C, 0x00, +0x23, 0x00, +0x2B, 0x00, +0x00, 0xE0, + +0x1D, 0x00, +0x24, 0x00, +0x2C, 0x00, +0x00, 0xE0, + +0x1C, 0x65, +0x23, 0x65, +0x2B, 0x65, +0x00, 0xE0, + +0x1D, 0x65, +0x24, 0x65, +0x2C, 0x65, +0x00, 0xE0, + +0x1C, 0x23, 0x60, 0xEC, +0x36, 0xD7, 0x36, 0xAD, + +0x2B, 0x80, 0x60, 0xEC, +0x1D, 0x24, 0x60, 0xEC, + +0x3E, 0xD7, 0x3E, 0xAD, +0x2C, 0x80, 0x60, 0xEC, + +0x1C, 0x2B, 0xDE, 0xE8, +0x23, 0x80, 0xDE, 0xE8, + +0x36, 0x80, 0x36, 0xBD, +0x3E, 0x80, 0x3E, 0xBD, + +0x33, 0xD7, 0x1C, 0xBD, +0x3B, 0xD7, 0x23, 0xBD, + +0x46, 0x80, 0x46, 0xCF, +0x4F, 0x80, 0x4F, 0xCF, + +0x56, 0x33, 0x56, 0xCF, +0x47, 0x3B, 0x47, 0xCF, + +0xD3, 0xFF, 0x20, 0xEA, +0x00, 0x80, 0x00, 0xE8, + +0x4E, 0x33, 0x4E, 0xCF, +0x57, 0x3B, 0x57, 0xCF, + +0x98, 0xFF, 0x20, 0xEA, +0x57, 0xC0, 0xBF, 0xEA, + +0x00, 0x80, 0xA0, 0xE9, +0x00, 0x00, 0xD8, 0xEC, + +}; +unsigned char WARP_G400_tgzs[] = { + +0x00, 0x88, 0x98, 0xE9, +0x00, 0x80, 0x00, 0xE8, + +0x00, 0x80, 0xA0, 0xE9, +0x00, 0x00, 0xD8, 0xEC, + +0xFF, 0x80, 0xC0, 0xE9, +0x00, 0x80, 0x00, 0xE8, + +0x22, 0x40, 0x48, 0xBF, +0x2A, 0x40, 0x50, 0xBF, + +0x32, 0x41, 0x49, 0xBF, +0x3A, 0x41, 0x51, 0xBF, + +0xC3, 0x6B, +0xCB, 0x6B, +0x00, 0x88, 0x98, 0xE9, + +0x73, 0x7B, 0xC8, 0xEC, +0x96, 0xE2, +0x41, 0x04, + +0x7B, 0x43, 0xA0, 0xE8, +0x73, 0x4B, 0xA0, 0xE8, + +0xAD, 0xEE, 0x29, 0x9F, +0x00, 0xE0, +0x49, 0x04, + +0x90, 0xE2, +0x51, 0x04, +0x31, 0x46, 0xB1, 0xE8, + +0x49, 0x41, 0xC0, 0xEC, +0x39, 0x57, 0xB1, 0xE8, + +0x00, 0x04, +0x46, 0xE2, +0x73, 0x53, 0xA0, 0xE8, + +0x51, 0x41, 0xC0, 0xEC, +0x31, 0x00, +0x39, 0x00, + +0x65, 0x80, 0x15, 0xEA, +0x08, 0x04, +0x10, 0x04, + +0x51, 0x49, 0xC0, 0xEC, +0x2F, 0x41, 0x60, 0xEA, + +0x31, 0x20, +0x39, 0x20, +0x1F, 0x42, 0xA0, 0xE8, + +0x2A, 0x42, 0x4A, 0xBF, +0x27, 0x4A, 0xA0, 0xE8, + +0x1A, 0x42, 0x52, 0xBF, +0x1E, 0x49, 0x60, 0xEA, + +0x73, 0x7B, 0xC8, 0xEC, +0x26, 0x51, 0x60, 0xEA, + +0x32, 0x40, 0x48, 0xBD, +0x22, 0x40, 0x50, 0xBD, + +0x12, 0x41, 0x49, 0xBD, +0x3A, 0x41, 0x51, 0xBD, + +0xBF, 0x2F, 0x26, 0xBD, +0x00, 0xE0, +0x7B, 0x72, + +0x32, 0x20, +0x22, 0x20, +0x12, 0x20, +0x3A, 0x20, + +0x46, 0x31, 0x46, 0xBF, +0x4E, 0x31, 0x4E, 0xBF, + +0xB3, 0xE2, 0x2D, 0x9F, +0x00, 0x80, 0x00, 0xE8, + +0x56, 0x31, 0x56, 0xBF, +0x47, 0x39, 0x47, 0xBF, + +0x4F, 0x39, 0x4F, 0xBF, +0x57, 0x39, 0x57, 0xBF, + +0x57, 0x80, 0x07, 0xEA, +0x24, 0x41, 0x20, 0xE9, + +0x42, 0x73, 0xF8, 0xEC, +0x00, 0xE0, +0x2D, 0x73, + +0x33, 0x72, +0x0C, 0xE3, +0xA5, 0x2F, 0x1E, 0xBD, + +0x43, 0x43, 0x2D, 0xDF, +0x4B, 0x4B, 0x2D, 0xDF, + +0xAE, 0x1E, 0x26, 0xBD, +0x58, 0xE3, +0x33, 0x66, + +0x53, 0x53, 0x2D, 0xDF, +0x00, 0x80, 0x00, 0xE8, + +0xB8, 0x38, 0x33, 0xBF, +0x00, 0xE0, +0x59, 0xE3, + +0x1E, 0x12, 0x41, 0xE9, +0x1A, 0x22, 0x41, 0xE9, + +0x2B, 0x40, 0x3D, 0xE9, +0x3F, 0x4B, 0xA0, 0xE8, + +0x2D, 0x73, +0x30, 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+ +0x1E, 0x35, 0xE1, 0xEA, +0x00, 0xE0, +0x26, 0x77, + +0x24, 0x49, 0x20, 0xE9, +0xA2, 0xFF, 0x20, 0xEA, + +0x16, 0x26, 0x20, 0xE9, +0x57, 0x2E, 0xBF, 0xEA, + +0x1C, 0x46, 0xA0, 0xE8, +0x23, 0x4E, 0xA0, 0xE8, + +0x2B, 0x56, 0xA0, 0xE8, +0x1D, 0x47, 0xA0, 0xE8, + +0x24, 0x4F, 0xA0, 0xE8, +0x2C, 0x57, 0xA0, 0xE8, + +0x1C, 0x00, +0x23, 0x00, +0x2B, 0x00, +0x00, 0xE0, + +0x1D, 0x00, +0x24, 0x00, +0x2C, 0x00, +0x00, 0xE0, + +0x1C, 0x65, +0x23, 0x65, +0x2B, 0x65, +0x00, 0xE0, + +0x1D, 0x65, +0x24, 0x65, +0x2C, 0x65, +0x00, 0xE0, + +0x1C, 0x23, 0x60, 0xEC, +0x36, 0xD7, 0x36, 0xAD, + +0x2B, 0x80, 0x60, 0xEC, +0x1D, 0x24, 0x60, 0xEC, + +0x3E, 0xD7, 0x3E, 0xAD, +0x2C, 0x80, 0x60, 0xEC, + +0x1C, 0x2B, 0xDE, 0xE8, +0x23, 0x80, 0xDE, 0xE8, + +0x36, 0x80, 0x36, 0xBD, +0x3E, 0x80, 0x3E, 0xBD, + +0x33, 0xD7, 0x1C, 0xBD, +0x3B, 0xD7, 0x23, 0xBD, + +0x46, 0x80, 0x46, 0xCF, +0x4F, 0x80, 0x4F, 0xCF, + +0x56, 0x33, 0x56, 0xCF, +0x47, 0x3B, 0x47, 0xCF, + +0xCA, 0xFF, 0x20, 0xEA, +0x00, 0x80, 0x00, 0xE8, + +0x4E, 0x33, 0x4E, 0xCF, +0x57, 0x3B, 0x57, 0xCF, + +0x90, 0xFF, 0x20, 0xEA, +0x57, 0xC0, 0xBF, 0xEA, + +0x00, 0x80, 0xA0, 0xE9, +0x00, 0x00, 0xD8, 0xEC, + +}; +unsigned char WARP_G400_tgzsa[] = { + +0x00, 0x88, 0x98, 0xE9, +0x00, 0x80, 0x00, 0xE8, + +0x00, 0x80, 0xA0, 0xE9, +0x00, 0x00, 0xD8, 0xEC, + +0xFF, 0x80, 0xC0, 0xE9, +0x00, 0x80, 0x00, 0xE8, + +0x22, 0x40, 0x48, 0xBF, +0x2A, 0x40, 0x50, 0xBF, + +0x32, 0x41, 0x49, 0xBF, +0x3A, 0x41, 0x51, 0xBF, + +0xC3, 0x6B, +0xCB, 0x6B, +0x00, 0x88, 0x98, 0xE9, + +0x73, 0x7B, 0xC8, 0xEC, +0x96, 0xE2, +0x41, 0x04, + +0x7B, 0x43, 0xA0, 0xE8, +0x73, 0x4B, 0xA0, 0xE8, + +0xAD, 0xEE, 0x29, 0x9F, +0x00, 0xE0, +0x49, 0x04, + +0x90, 0xE2, +0x51, 0x04, +0x31, 0x46, 0xB1, 0xE8, + +0x49, 0x41, 0xC0, 0xEC, +0x39, 0x57, 0xB1, 0xE8, + +0x00, 0x04, +0x46, 0xE2, +0x73, 0x53, 0xA0, 0xE8, + +0x51, 0x41, 0xC0, 0xEC, +0x31, 0x00, +0x39, 0x00, + +0x6A, 0x80, 0x15, 0xEA, +0x08, 0x04, +0x10, 0x04, + +0x51, 0x49, 0xC0, 0xEC, +0x2F, 0x41, 0x60, 0xEA, + +0x31, 0x20, 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+0x57, 0x3B, 0x57, 0xCF, + +0x87, 0xFF, 0x20, 0xEA, +0x57, 0xC0, 0xBF, 0xEA, + +0x00, 0x80, 0xA0, 0xE9, +0x00, 0x00, 0xD8, 0xEC, + +}; +unsigned char WARP_G400_tgzsf[] = { + +0x00, 0x88, 0x98, 0xE9, +0x00, 0x80, 0x00, 0xE8, + +0x00, 0x80, 0xA0, 0xE9, +0x00, 0x00, 0xD8, 0xEC, + +0xFF, 0x80, 0xC0, 0xE9, +0x00, 0x80, 0x00, 0xE8, + +0x22, 0x40, 0x48, 0xBF, +0x2A, 0x40, 0x50, 0xBF, + +0x32, 0x41, 0x49, 0xBF, +0x3A, 0x41, 0x51, 0xBF, + +0xC3, 0x6B, +0xCB, 0x6B, +0x00, 0x88, 0x98, 0xE9, + +0x73, 0x7B, 0xC8, 0xEC, +0x96, 0xE2, +0x41, 0x04, + +0x7B, 0x43, 0xA0, 0xE8, +0x73, 0x4B, 0xA0, 0xE8, + +0xAD, 0xEE, 0x29, 0x9F, +0x00, 0xE0, +0x49, 0x04, + +0x90, 0xE2, +0x51, 0x04, +0x31, 0x46, 0xB1, 0xE8, + +0x49, 0x41, 0xC0, 0xEC, +0x39, 0x57, 0xB1, 0xE8, + +0x00, 0x04, +0x46, 0xE2, +0x73, 0x53, 0xA0, 0xE8, + +0x51, 0x41, 0xC0, 0xEC, +0x31, 0x00, +0x39, 0x00, + +0x6A, 0x80, 0x15, 0xEA, +0x08, 0x04, +0x10, 0x04, + +0x51, 0x49, 0xC0, 0xEC, +0x2F, 0x41, 0x60, 0xEA, + +0x31, 0x20, +0x39, 0x20, +0x1F, 0x42, 0xA0, 0xE8, + +0x2A, 0x42, 0x4A, 0xBF, +0x27, 0x4A, 0xA0, 0xE8, + +0x1A, 0x42, 0x52, 0xBF, +0x1E, 0x49, 0x60, 0xEA, + +0x73, 0x7B, 0xC8, 0xEC, +0x26, 0x51, 0x60, 0xEA, + +0x32, 0x40, 0x48, 0xBD, +0x22, 0x40, 0x50, 0xBD, + +0x12, 0x41, 0x49, 0xBD, +0x3A, 0x41, 0x51, 0xBD, + +0xBF, 0x2F, 0x26, 0xBD, +0x00, 0xE0, +0x7B, 0x72, + +0x32, 0x20, +0x22, 0x20, +0x12, 0x20, +0x3A, 0x20, + +0x46, 0x31, 0x46, 0xBF, +0x4E, 0x31, 0x4E, 0xBF, + +0xB3, 0xE2, 0x2D, 0x9F, +0x00, 0x80, 0x00, 0xE8, + +0x56, 0x31, 0x56, 0xBF, +0x47, 0x39, 0x47, 0xBF, + +0x4F, 0x39, 0x4F, 0xBF, +0x57, 0x39, 0x57, 0xBF, + +0x5C, 0x80, 0x07, 0xEA, +0x24, 0x41, 0x20, 0xE9, + +0x42, 0x73, 0xF8, 0xEC, +0x00, 0xE0, +0x2D, 0x73, + +0x33, 0x72, +0x0C, 0xE3, +0xA5, 0x2F, 0x1E, 0xBD, + +0x43, 0x43, 0x2D, 0xDF, +0x4B, 0x4B, 0x2D, 0xDF, + +0xAE, 0x1E, 0x26, 0xBD, +0x58, 0xE3, +0x33, 0x66, + +0x53, 0x53, 0x2D, 0xDF, +0x00, 0x80, 0x00, 0xE8, + +0xB8, 0x38, 0x33, 0xBF, +0x00, 0xE0, +0x59, 0xE3, + +0x1E, 0x12, 0x41, 0xE9, +0x1A, 0x22, 0x41, 0xE9, + +0x2B, 0x40, 0x3D, 0xE9, +0x3F, 0x4B, 0xA0, 0xE8, + +0x2D, 0x73, +0x30, 0x76, +0x05, 0x80, 0x3D, 0xEA, + +0x37, 0x43, 0xA0, 0xE8, +0x3D, 0x53, 0xA0, 0xE8, + +0x48, 0x70, 0xF8, 0xEC, +0x2B, 0x48, 0x3C, 0xE9, + +0x1F, 0x27, 0xBC, 0xE8, +0x00, 0x80, 0x00, 0xE8, + +0x00, 0x80, 0x00, 0xE8, +0x00, 0x80, 0x00, 0xE8, + +0x15, 0xC0, 0x20, 0xE9, +0x15, 0xC0, 0x20, 0xE9, + +0x15, 0xC0, 0x20, 0xE9, +0x15, 0xC0, 0x20, 0xE9, + +0x18, 0x3A, 0x41, 0xE9, +0x1D, 0x32, 0x41, 0xE9, + +0x2A, 0x40, 0x20, 0xE9, +0x56, 0x3D, 0x56, 0xDF, + +0x46, 0x37, 0x46, 0xDF, +0x4E, 0x3F, 0x4E, 0xDF, + +0x16, 0x30, 0x20, 0xE9, +0x4F, 0x3F, 0x4F, 0xDF, + +0x47, 0x37, 0x47, 0xDF, +0x57, 0x3D, 0x57, 0xDF, + +0x32, 0x32, 0x2D, 0xDF, +0x22, 0x22, 0x2D, 0xDF, + +0x12, 0x12, 0x2D, 0xDF, +0x3A, 0x3A, 0x2D, 0xDF, + +0x27, 0xCF, 0x74, 0xC2, +0x37, 0xCF, 0x74, 0xC4, + +0x0A, 0x44, 0x4C, 0xB0, +0x02, 0x44, 0x54, 0xB0, + +0x3D, 0xCF, 0x74, 0xC0, +0x34, 0x37, 0x20, 0xE9, + +0x31, 0x53, 0x2F, 0x9F, +0x38, 0x27, 0x20, 0xE9, + +0x39, 0xE5, 0x2C, 0x9F, +0x3C, 0x3D, 0x20, 0xE9, + +0x2A, 0x44, 0x4C, 0xB2, +0x1A, 0x44, 0x54, 0xB2, + +0x2E, 0x80, 0x3A, 0xEA, +0x0A, 0x20, +0x02, 0x20, + +0x27, 0xCF, 0x75, 0xC0, +0x2A, 0x20, +0x1A, 0x20, + +0x30, 0x50, 0x2E, 0x9F, +0x32, 0x31, 0x5F, 0xE9, + +0x38, 0x21, 0x2C, 0x9F, +0x33, 0x39, 0x5F, 0xE9, + +0x3D, 0xCF, 0x75, 0xC2, +0x37, 0xCF, 0x75, 0xC4, + +0x31, 0x53, 0x2F, 0x9F, +0xA6, 0x27, 0x20, 0xE9, + +0x39, 0xE5, 0x2C, 0x9F, +0xA3, 0x3D, 0x20, 0xE9, + +0x2A, 0x44, 0x4C, 0xB4, +0x1A, 0x44, 0x54, 0xB4, + +0x0A, 0x45, 0x4D, 0xB0, +0x02, 0x45, 0x55, 0xB0, + +0x88, 0x73, 0x5E, 0xE9, +0x2A, 0x20, +0x1A, 0x20, + +0xA0, 0x37, 0x20, 0xE9, +0x0A, 0x20, +0x02, 0x20, + +0x31, 0x53, 0x2F, 0x9F, +0x3E, 0x30, 0x4F, 0xE9, + +0x39, 0xE5, 0x2C, 0x9F, +0x3F, 0x38, 0x4F, 0xE9, + +0x30, 0x50, 0x2E, 0x9F, +0x3A, 0x31, 0x4F, 0xE9, + +0x38, 0x21, 0x2C, 0x9F, +0x3B, 0x39, 0x4F, 0xE9, + +0x2A, 0x45, 0x4D, 0xB2, +0x1A, 0x45, 0x55, 0xB2, + +0x0A, 0x45, 0x4D, 0xB4, +0x02, 0x45, 0x55, 0xB4, + +0x27, 0xCF, 0x75, 0xC6, +0x2A, 0x20, +0x1A, 0x20, + +0xA7, 0x30, 0x4F, 0xE9, +0x0A, 0x20, +0x02, 0x20, + +0x31, 0x53, 0x2F, 0x9F, +0x31, 0x27, 0x20, 0xE9, + +0x39, 0xE5, 0x2C, 0x9F, +0xA8, 0x38, 0x4F, 0xE9, + +0x2A, 0x45, 0x4D, 0xB6, +0x1A, 0x45, 0x55, 0xB6, + +0x30, 0x50, 0x2E, 0x9F, +0x36, 0x31, 0x4F, 0xE9, + +0x38, 0x21, 0x2C, 0x9F, +0x37, 0x39, 0x4F, 0xE9, + +0x00, 0x80, 0x00, 0xE8, +0x2A, 0x20, +0x1A, 0x20, + +0x2A, 0x46, 0x4E, 0xBF, +0x1A, 0x46, 0x56, 0xBF, + +0x31, 0x53, 0x2F, 0x9F, +0xA4, 0x31, 0x4F, 0xE9, + +0x39, 0xE5, 0x2C, 0x9F, +0xA5, 0x39, 0x4F, 0xE9, + +0x0A, 0x47, 0x4F, 0xBF, +0x02, 0x47, 0x57, 0xBF, + +0x31, 0x53, 0x2F, 0x9F, +0xA1, 0x30, 0x4F, 0xE9, + +0x39, 0xE5, 0x2C, 0x9F, +0xA2, 0x38, 0x4F, 0xE9, + +0x2A, 0x43, 0x4B, 0xBF, +0x1A, 0x43, 0x53, 0xBF, + +0x30, 0x50, 0x2E, 0x9F, +0x35, 0x31, 0x4F, 0xE9, + +0x38, 0x21, 0x2C, 0x9F, +0x39, 0x39, 0x4F, 0xE9, + +0x31, 0x53, 0x2F, 0x9F, +0x80, 0x31, 0x57, 0xE9, + +0x39, 0xE5, 0x2C, 0x9F, +0x81, 0x39, 0x57, 0xE9, + +0x37, 0x48, 0x50, 0xBD, +0x8A, 0x36, 0x20, 0xE9, + +0x86, 0x76, 0x57, 0xE9, +0x8B, 0x3E, 0x20, 0xE9, + +0x82, 0x30, 0x57, 0xE9, +0x87, 0x77, 0x57, 0xE9, + +0x83, 0x38, 0x57, 0xE9, +0x35, 0x49, 0x51, 0xBD, + +0x84, 0x31, 0x5E, 0xE9, +0x30, 0x1F, 0x5F, 0xE9, + +0x85, 0x39, 0x5E, 0xE9, +0x57, 0x25, 0x20, 0xE9, + +0x2B, 0x48, 0x20, 0xE9, +0x1D, 0x37, 0xE1, 0xEA, + +0x1E, 0x35, 0xE1, 0xEA, +0x00, 0xE0, +0x26, 0x77, + +0x24, 0x49, 0x20, 0xE9, +0x9D, 0xFF, 0x20, 0xEA, + +0x16, 0x26, 0x20, 0xE9, +0x57, 0x2E, 0xBF, 0xEA, + +0x1C, 0x46, 0xA0, 0xE8, +0x23, 0x4E, 0xA0, 0xE8, + +0x2B, 0x56, 0xA0, 0xE8, +0x1D, 0x47, 0xA0, 0xE8, + +0x24, 0x4F, 0xA0, 0xE8, +0x2C, 0x57, 0xA0, 0xE8, + +0x1C, 0x00, +0x23, 0x00, +0x2B, 0x00, +0x00, 0xE0, + +0x1D, 0x00, +0x24, 0x00, +0x2C, 0x00, +0x00, 0xE0, + +0x1C, 0x65, +0x23, 0x65, +0x2B, 0x65, +0x00, 0xE0, + +0x1D, 0x65, +0x24, 0x65, +0x2C, 0x65, +0x00, 0xE0, + +0x1C, 0x23, 0x60, 0xEC, +0x36, 0xD7, 0x36, 0xAD, + +0x2B, 0x80, 0x60, 0xEC, +0x1D, 0x24, 0x60, 0xEC, + +0x3E, 0xD7, 0x3E, 0xAD, +0x2C, 0x80, 0x60, 0xEC, + +0x1C, 0x2B, 0xDE, 0xE8, +0x23, 0x80, 0xDE, 0xE8, + +0x36, 0x80, 0x36, 0xBD, +0x3E, 0x80, 0x3E, 0xBD, + +0x33, 0xD7, 0x1C, 0xBD, +0x3B, 0xD7, 0x23, 0xBD, + +0x46, 0x80, 0x46, 0xCF, +0x4F, 0x80, 0x4F, 0xCF, + +0x56, 0x33, 0x56, 0xCF, +0x47, 0x3B, 0x47, 0xCF, + +0xC5, 0xFF, 0x20, 0xEA, +0x00, 0x80, 0x00, 0xE8, + +0x4E, 0x33, 0x4E, 0xCF, +0x57, 0x3B, 0x57, 0xCF, + +0x8B, 0xFF, 0x20, 0xEA, +0x57, 0xC0, 0xBF, 0xEA, + +0x00, 0x80, 0xA0, 0xE9, +0x00, 0x00, 0xD8, 0xEC, + +}; diff --git a/driver/xf86-video-mga/src/mga_vga.c b/driver/xf86-video-mga/src/mga_vga.c new file mode 100644 index 000000000..fbbfc607e --- /dev/null +++ b/driver/xf86-video-mga/src/mga_vga.c @@ -0,0 +1,220 @@ +#include "misc.h" +#include "xf86.h" +#include "xf86_OSproc.h" +#include "vgaHW.h" +#include "compiler.h" +#include "xf86cmap.h" + +#define TEXT_AMOUNT 16384 +#define FONT_AMOUNT (8*8192) + +void +MGAG200SERestoreFonts(ScrnInfoPtr scrninfp, vgaRegPtr restore) +{ + vgaHWPtr hwp = VGAHWPTR(scrninfp); + int savedIOBase; + unsigned char miscOut, attr10, gr1, gr3, gr4, gr5, gr6, gr8, seq2, seq4; + Bool doMap = FALSE; + + /* If nothing to do, return now */ + if (!hwp->FontInfo1 && !hwp->FontInfo2 && !hwp->TextInfo) + return; + + if (hwp->Base == NULL) { + doMap = TRUE; + if (!vgaHWMapMem(scrninfp)) { + xf86DrvMsg(scrninfp->scrnIndex, X_ERROR, + "vgaHWRestoreFonts: vgaHWMapMem() failed\n"); + return; + } + } + + /* save the registers that are needed here */ + miscOut = hwp->readMiscOut(hwp); + attr10 = hwp->readAttr(hwp, 0x10); + gr1 = hwp->readGr(hwp, 0x01); + gr3 = hwp->readGr(hwp, 0x03); + gr4 = hwp->readGr(hwp, 0x04); + gr5 = hwp->readGr(hwp, 0x05); + gr6 = hwp->readGr(hwp, 0x06); + gr8 = hwp->readGr(hwp, 0x08); + seq2 = hwp->readSeq(hwp, 0x02); + seq4 = hwp->readSeq(hwp, 0x04); + + /* save hwp->IOBase and temporarily set it for colour mode */ + savedIOBase = hwp->IOBase; + hwp->IOBase = VGA_IOBASE_COLOR; + + /* Force into colour mode */ + hwp->writeMiscOut(hwp, miscOut | 0x01); + + vgaHWBlankScreen(scrninfp, FALSE); + + /* + * here we temporarily switch to 16 colour planar mode, to simply + * copy the font-info and saved text. + * + * BUG ALERT: The (S)VGA's segment-select register MUST be set correctly! + */ +#if 0 + hwp->writeAttr(hwp, 0x10, 0x01); /* graphics mode */ +#endif + if (scrninfp->depth == 4) { + /* GJA */ + hwp->writeGr(hwp, 0x03, 0x00); /* don't rotate, write unmodified */ + hwp->writeGr(hwp, 0x08, 0xFF); /* write all bits in a byte */ + hwp->writeGr(hwp, 0x01, 0x00); /* all planes come from CPU */ + } + + if (hwp->FontInfo1) { + hwp->writeSeq(hwp, 0x02, 0x04); /* write to plane 2 */ + hwp->writeSeq(hwp, 0x04, 0x06); /* enable plane graphics */ + hwp->writeGr(hwp, 0x04, 0x02); /* read plane 2 */ + hwp->writeGr(hwp, 0x05, 0x00); /* write mode 0, read mode 0 */ + hwp->writeGr(hwp, 0x06, 0x05); /* set graphics */ + slowbcopy_tobus(hwp->FontInfo1, hwp->Base, FONT_AMOUNT); + } + + if (hwp->FontInfo2) { + hwp->writeSeq(hwp, 0x02, 0x08); /* write to plane 3 */ + hwp->writeSeq(hwp, 0x04, 0x06); /* enable plane graphics */ + hwp->writeGr(hwp, 0x04, 0x03); /* read plane 3 */ + hwp->writeGr(hwp, 0x05, 0x00); /* write mode 0, read mode 0 */ + hwp->writeGr(hwp, 0x06, 0x05); /* set graphics */ + slowbcopy_tobus(hwp->FontInfo2, hwp->Base, FONT_AMOUNT); + } + + if (hwp->TextInfo) { + hwp->writeSeq(hwp, 0x02, 0x01); /* write to plane 0 */ + hwp->writeSeq(hwp, 0x04, 0x06); /* enable plane graphics */ + hwp->writeGr(hwp, 0x04, 0x00); /* read plane 0 */ + hwp->writeGr(hwp, 0x05, 0x00); /* write mode 0, read mode 0 */ + hwp->writeGr(hwp, 0x06, 0x05); /* set graphics */ + slowbcopy_tobus(hwp->TextInfo, hwp->Base, TEXT_AMOUNT); + hwp->writeSeq(hwp, 0x02, 0x02); /* write to plane 1 */ + hwp->writeSeq(hwp, 0x04, 0x06); /* enable plane graphics */ + hwp->writeGr(hwp, 0x04, 0x01); /* read plane 1 */ + hwp->writeGr(hwp, 0x05, 0x00); /* write mode 0, read mode 0 */ + hwp->writeGr(hwp, 0x06, 0x05); /* set graphics */ + slowbcopy_tobus((unsigned char *)hwp->TextInfo + TEXT_AMOUNT, + hwp->Base, TEXT_AMOUNT); + } + + /* restore the registers that were changed */ + hwp->writeMiscOut(hwp, miscOut); + hwp->writeAttr(hwp, 0x10, attr10); + hwp->writeGr(hwp, 0x01, gr1); + hwp->writeGr(hwp, 0x03, gr3); + hwp->writeGr(hwp, 0x04, gr4); + hwp->writeGr(hwp, 0x05, gr5); + hwp->writeGr(hwp, 0x06, gr6); + hwp->writeGr(hwp, 0x08, gr8); + hwp->writeSeq(hwp, 0x02, seq2); + hwp->writeSeq(hwp, 0x04, seq4); + hwp->IOBase = savedIOBase; + + vgaHWBlankScreen(scrninfp, TRUE); + + if (doMap) + vgaHWUnmapMem(scrninfp); +} + + +void +MGAG200SESaveFonts(ScrnInfoPtr scrninfp, vgaRegPtr save) +{ + vgaHWPtr hwp = VGAHWPTR(scrninfp); + int savedIOBase; + unsigned char miscOut, attr10, gr4, gr5, gr6, seq2, seq4; + Bool doMap = FALSE; + + if (hwp->Base == NULL) { + doMap = TRUE; + if (!vgaHWMapMem(scrninfp)) { + xf86DrvMsg(scrninfp->scrnIndex, X_ERROR, + "vgaHWSaveFonts: vgaHWMapMem() failed\n"); + return; + } + } + + /* If in graphics mode, don't save anything */ + attr10 = hwp->readAttr(hwp, 0x10); + if (attr10 & 0x01) + return; + + /* save the registers that are needed here */ + miscOut = hwp->readMiscOut(hwp); + gr4 = hwp->readGr(hwp, 0x04); + gr5 = hwp->readGr(hwp, 0x05); + gr6 = hwp->readGr(hwp, 0x06); + seq2 = hwp->readSeq(hwp, 0x02); + seq4 = hwp->readSeq(hwp, 0x04); + + /* save hwp->IOBase and temporarily set it for colour mode */ + savedIOBase = hwp->IOBase; + hwp->IOBase = VGA_IOBASE_COLOR; + + /* Force into colour mode */ + hwp->writeMiscOut(hwp, miscOut | 0x01); + + vgaHWBlankScreen(scrninfp, FALSE); + + /* + * get the character sets, and text screen if required + */ + /* + * Here we temporarily switch to 16 colour planar mode, to simply + * copy the font-info + * + * BUG ALERT: The (S)VGA's segment-select register MUST be set correctly! + */ +#if 0 + hwp->writeAttr(hwp, 0x10, 0x01); /* graphics mode */ +#endif + if (hwp->FontInfo1 || (hwp->FontInfo1 = xalloc(FONT_AMOUNT))) { + hwp->writeSeq(hwp, 0x02, 0x04); /* write to plane 2 */ + hwp->writeSeq(hwp, 0x04, 0x06); /* enable plane graphics */ + hwp->writeGr(hwp, 0x04, 0x02); /* read plane 2 */ + hwp->writeGr(hwp, 0x05, 0x00); /* write mode 0, read mode 0 */ + hwp->writeGr(hwp, 0x06, 0x05); /* set graphics */ + slowbcopy_frombus(hwp->Base, hwp->FontInfo1, FONT_AMOUNT); + } + if (hwp->FontInfo2 || (hwp->FontInfo2 = xalloc(FONT_AMOUNT))) { + hwp->writeSeq(hwp, 0x02, 0x08); /* write to plane 3 */ + hwp->writeSeq(hwp, 0x04, 0x06); /* enable plane graphics */ + hwp->writeGr(hwp, 0x04, 0x03); /* read plane 3 */ + hwp->writeGr(hwp, 0x05, 0x00); /* write mode 0, read mode 0 */ + hwp->writeGr(hwp, 0x06, 0x05); /* set graphics */ + slowbcopy_frombus(hwp->Base, hwp->FontInfo2, FONT_AMOUNT); + } + if (hwp->TextInfo || (hwp->TextInfo = xalloc(2 * TEXT_AMOUNT))) { + hwp->writeSeq(hwp, 0x02, 0x01); /* write to plane 0 */ + hwp->writeSeq(hwp, 0x04, 0x06); /* enable plane graphics */ + hwp->writeGr(hwp, 0x04, 0x00); /* read plane 0 */ + hwp->writeGr(hwp, 0x05, 0x00); /* write mode 0, read mode 0 */ + hwp->writeGr(hwp, 0x06, 0x05); /* set graphics */ + slowbcopy_frombus(hwp->Base, hwp->TextInfo, TEXT_AMOUNT); + hwp->writeSeq(hwp, 0x02, 0x02); /* write to plane 1 */ + hwp->writeSeq(hwp, 0x04, 0x06); /* enable plane graphics */ + hwp->writeGr(hwp, 0x04, 0x01); /* read plane 1 */ + hwp->writeGr(hwp, 0x05, 0x00); /* write mode 0, read mode 0 */ + hwp->writeGr(hwp, 0x06, 0x05); /* set graphics */ + slowbcopy_frombus(hwp->Base, + (unsigned char *)hwp->TextInfo + TEXT_AMOUNT, TEXT_AMOUNT); + } + + /* Restore clobbered registers */ + hwp->writeAttr(hwp, 0x10, attr10); + hwp->writeGr(hwp, 0x04, gr4); + hwp->writeGr(hwp, 0x05, gr5); + hwp->writeGr(hwp, 0x06, gr6); + hwp->writeSeq(hwp, 0x02, seq2); + hwp->writeSeq(hwp, 0x04, seq4); + hwp->writeMiscOut(hwp, miscOut); + hwp->IOBase = savedIOBase; + + vgaHWBlankScreen(scrninfp, TRUE); + + if (doMap) + vgaHWUnmapMem(scrninfp); +} diff --git a/driver/xf86-video-mga/src/mga_video.c b/driver/xf86-video-mga/src/mga_video.c new file mode 100644 index 000000000..30ae6fcb2 --- /dev/null +++ b/driver/xf86-video-mga/src/mga_video.c @@ -0,0 +1,1260 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_video.c,v 1.33tsi Exp $ */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include "xf86.h" +#include "xf86_OSproc.h" +#include "xf86Resources.h" +#include "compiler.h" +#include "xf86PciInfo.h" +#include "xf86Pci.h" +#include "xf86fbman.h" +#include "regionstr.h" + +#include "mga_reg.h" +#include "mga.h" +#include "mga_macros.h" +#include "xf86xv.h" +#include <X11/extensions/Xv.h> +#include "xaa.h" + +#ifdef USE_XAA +#include "xaa.h" +#include "xaalocal.h" +#endif + +#include "dixstruct.h" +#include "fourcc.h" + +#define OFF_DELAY 250 /* milliseconds */ +#define FREE_DELAY 15000 + +#define OFF_TIMER 0x01 +#define FREE_TIMER 0x02 +#define CLIENT_VIDEO_ON 0x04 + +#define TIMER_MASK (OFF_TIMER | FREE_TIMER) + +#define MGA_MAX_PORTS 32 + +static void MGAInitOffscreenImages(ScreenPtr); + +static XF86VideoAdaptorPtr MGASetupImageVideoOverlay(ScreenPtr); +static int MGASetPortAttributeOverlay(ScrnInfoPtr, Atom, INT32, pointer); +static int MGAGetPortAttributeOverlay(ScrnInfoPtr, Atom ,INT32 *, pointer); + +static XF86VideoAdaptorPtr MGASetupImageVideoTexture(ScreenPtr); +static int MGASetPortAttributeTexture(ScrnInfoPtr, Atom, INT32, pointer); +static int MGAGetPortAttributeTexture(ScrnInfoPtr, Atom ,INT32 *, pointer); + +static void MGAStopVideo(ScrnInfoPtr, pointer, Bool); +static void MGAQueryBestSize(ScrnInfoPtr, Bool, short, short, short, short, + unsigned int *, unsigned int *, pointer); +static int MGAPutImage(ScrnInfoPtr, short, short, short, short, short, + short, short, short, int, unsigned char*, short, + short, Bool, RegionPtr, pointer, DrawablePtr); +static int MGAQueryImageAttributes(ScrnInfoPtr, int, unsigned short *, + unsigned short *, int *, int *); +static void MGAFreeMemory(ScrnInfoPtr pScrn, void *mem_struct); + +static void MGAResetVideoOverlay(ScrnInfoPtr); + +static void MGAVideoTimerCallback(ScrnInfoPtr pScrn, Time time); + + +#define MAKE_ATOM(a) MakeAtom(a, sizeof(a) - 1, TRUE) + +static Atom xvBrightness, xvContrast, xvColorKey, xvDoubleBuffer; + +#ifdef USE_EXA +static void +MGAVideoSave(ScreenPtr pScreen, ExaOffscreenArea *area) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + MGAPtr pMga = MGAPTR(pScrn); + MGAPortPrivPtr pPriv = pMga->portPrivate; + + if (pPriv->video_memory == area) + pPriv->video_memory = NULL; +} +#endif /* USE_EXA */ + +void MGAInitVideo(ScreenPtr pScreen) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + XF86VideoAdaptorPtr *adaptors, *newAdaptors = NULL; + XF86VideoAdaptorPtr newAdaptor = NULL; + MGAPtr pMga = MGAPTR(pScrn); + int num_adaptors; + + if((pScrn->bitsPerPixel != 8) && !pMga->NoAccel && + (pMga->SecondCrtc == FALSE) && + ((pMga->Chipset == PCI_CHIP_MGAG200) || + (pMga->Chipset == PCI_CHIP_MGAG200_PCI) || + (pMga->Chipset == PCI_CHIP_MGAG400) || + (pMga->Chipset == PCI_CHIP_MGAG550))) + { + if((pMga->Overlay8Plus24 || pMga->TexturedVideo) && + (pScrn->bitsPerPixel != 24)) + { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Using texture video\n"); + newAdaptor = MGASetupImageVideoTexture(pScreen); + pMga->TexturedVideo = TRUE; + } else { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Using overlay video\n"); + newAdaptor = MGASetupImageVideoOverlay(pScreen); + pMga->TexturedVideo = FALSE; + } + if(!pMga->Overlay8Plus24) + MGAInitOffscreenImages(pScreen); + } + + num_adaptors = xf86XVListGenericAdaptors(pScrn, &adaptors); + + if(newAdaptor) { + if(!num_adaptors) { + num_adaptors = 1; + adaptors = &newAdaptor; + } else { + newAdaptors = /* need to free this someplace */ + xalloc((num_adaptors + 1) * sizeof(XF86VideoAdaptorPtr*)); + if(newAdaptors) { + memcpy(newAdaptors, adaptors, num_adaptors * + sizeof(XF86VideoAdaptorPtr)); + newAdaptors[num_adaptors] = newAdaptor; + adaptors = newAdaptors; + num_adaptors++; + } + } + } + + if(num_adaptors) + xf86XVScreenInit(pScreen, adaptors, num_adaptors); + + if(newAdaptors) + xfree(newAdaptors); +} + +/* client libraries expect an encoding */ +static XF86VideoEncodingRec DummyEncoding[2] = +{ + { /* overlay limit */ + 0, + "XV_IMAGE", + 1024, 1024, + {1, 1} + }, + { /* texture limit */ + 0, + "XV_IMAGE", + 2046, 2046, + {1, 1} + } +}; + +#define NUM_FORMATS 6 + +static XF86VideoFormatRec Formats[NUM_FORMATS] = +{ + {15, TrueColor}, {16, TrueColor}, {24, TrueColor}, + {15, DirectColor}, {16, DirectColor}, {24, DirectColor} +}; + +#define NUM_ATTRIBUTES_OVERLAY 4 + +static XF86AttributeRec Attributes[NUM_ATTRIBUTES_OVERLAY] = +{ + {XvSettable | XvGettable, 0, (1 << 24) - 1, "XV_COLORKEY"}, + {XvSettable | XvGettable, -128, 127, "XV_BRIGHTNESS"}, + {XvSettable | XvGettable, 0, 255, "XV_CONTRAST"}, + {XvSettable | XvGettable, 0, 1, "XV_DOUBLE_BUFFER"} +}; + +#define NUM_IMAGES 4 + +static XF86ImageRec Images[NUM_IMAGES] = +{ + XVIMAGE_YUY2, + XVIMAGE_YV12, + XVIMAGE_I420, + XVIMAGE_UYVY +}; + +static void +MGAResetVideoOverlay(ScrnInfoPtr pScrn) +{ + MGAPtr pMga = MGAPTR(pScrn); + MGAPortPrivPtr pPriv = pMga->portPrivate; + + CHECK_DMA_QUIESCENT(pMga, pScrn); + + outMGAdac(0x51, 0x01); /* keying on */ + outMGAdac(0x52, 0xff); /* full mask */ + outMGAdac(0x53, 0xff); + outMGAdac(0x54, 0xff); + + outMGAdac(0x55, (pPriv->colorKey & pScrn->mask.red) >> + pScrn->offset.red); + outMGAdac(0x56, (pPriv->colorKey & pScrn->mask.green) >> + pScrn->offset.green); + outMGAdac(0x57, (pPriv->colorKey & pScrn->mask.blue) >> + pScrn->offset.blue); + + OUTREG(MGAREG_BESLUMACTL, ((pPriv->brightness & 0xff) << 16) | + (pPriv->contrast & 0xff)); +} + + +static XF86VideoAdaptorPtr +MGAAllocAdaptor(ScrnInfoPtr pScrn, Bool doublebuffer) +{ + XF86VideoAdaptorPtr adapt; + MGAPtr pMga = MGAPTR(pScrn); + MGAPortPrivPtr pPriv; + int i; + + if(!(adapt = xf86XVAllocateVideoAdaptorRec(pScrn))) + return NULL; + + if(!(pPriv = xcalloc(1, sizeof(MGAPortPrivRec) + + (sizeof(DevUnion) * MGA_MAX_PORTS)))) + { + xfree(adapt); + return NULL; + } + + adapt->pPortPrivates = (DevUnion*)(&pPriv[1]); + + for(i = 0; i < MGA_MAX_PORTS; i++) + adapt->pPortPrivates[i].val = i; + + xvBrightness = MAKE_ATOM("XV_BRIGHTNESS"); + xvContrast = MAKE_ATOM("XV_CONTRAST"); + xvColorKey = MAKE_ATOM("XV_COLORKEY"); + xvDoubleBuffer = MAKE_ATOM("XV_DOUBLE_BUFFER"); + + pPriv->colorKey = pMga->videoKey; + pPriv->videoStatus = 0; + pPriv->brightness = 0; + pPriv->contrast = 128; + pPriv->lastPort = -1; + pPriv->doubleBuffer = doublebuffer; + pPriv->currentBuffer = 0; + + pMga->adaptor = adapt; + pMga->portPrivate = pPriv; + + return adapt; +} + +static XF86VideoAdaptorPtr +MGASetupImageVideoOverlay(ScreenPtr pScreen) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + MGAPtr pMga = MGAPTR(pScrn); + XF86VideoAdaptorPtr adapt; + + adapt = MGAAllocAdaptor(pScrn, TRUE); + + adapt->type = XvWindowMask | XvInputMask | XvImageMask; + adapt->flags = VIDEO_OVERLAID_IMAGES | VIDEO_CLIP_TO_VIEWPORT; + adapt->name = "Matrox G-Series Backend Scaler"; + adapt->nEncodings = 1; + adapt->pEncodings = &DummyEncoding[0]; + adapt->nFormats = NUM_FORMATS; + adapt->pFormats = Formats; + adapt->nPorts = 1; + adapt->pAttributes = Attributes; + if (pMga->Chipset == PCI_CHIP_MGAG400 || + pMga->Chipset == PCI_CHIP_MGAG550) { + adapt->nImages = 4; + adapt->nAttributes = 4; + } else { + adapt->nImages = 3; + adapt->nAttributes = 1; + } + adapt->pImages = Images; + adapt->PutVideo = NULL; + adapt->PutStill = NULL; + adapt->GetVideo = NULL; + adapt->GetStill = NULL; + adapt->StopVideo = MGAStopVideo; + adapt->SetPortAttribute = MGASetPortAttributeOverlay; + adapt->GetPortAttribute = MGAGetPortAttributeOverlay; + adapt->QueryBestSize = MGAQueryBestSize; + adapt->PutImage = MGAPutImage; + adapt->QueryImageAttributes = MGAQueryImageAttributes; + + /* gotta uninit this someplace */ + REGION_NULL(pScreen, &(pMga->portPrivate->clip)); + + MGAResetVideoOverlay(pScrn); + + return adapt; +} + + +static XF86VideoAdaptorPtr +MGASetupImageVideoTexture(ScreenPtr pScreen) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + XF86VideoAdaptorPtr adapt; + MGAPtr pMga = MGAPTR(pScrn); + + adapt = MGAAllocAdaptor(pScrn, FALSE); + + adapt->type = XvWindowMask | XvInputMask | XvImageMask; + adapt->flags = 0; + adapt->name = "Matrox G-Series Texture Engine"; + adapt->nEncodings = 1; + adapt->pEncodings = &DummyEncoding[1]; + adapt->nFormats = NUM_FORMATS; + adapt->pFormats = Formats; + adapt->nPorts = MGA_MAX_PORTS; + adapt->pAttributes = NULL; + adapt->nAttributes = 0; + adapt->pImages = Images; + if (pMga->Chipset == PCI_CHIP_MGAG400 || + pMga->Chipset == PCI_CHIP_MGAG550) + adapt->nImages = 4; + else + adapt->nImages = 3; + adapt->PutVideo = NULL; + adapt->PutStill = NULL; + adapt->GetVideo = NULL; + adapt->GetStill = NULL; + adapt->StopVideo = MGAStopVideo; + adapt->SetPortAttribute = MGASetPortAttributeTexture; + adapt->GetPortAttribute = MGAGetPortAttributeTexture; + adapt->QueryBestSize = MGAQueryBestSize; + adapt->PutImage = MGAPutImage; + adapt->QueryImageAttributes = MGAQueryImageAttributes; + + return adapt; +} + + +static void +MGAStopVideo(ScrnInfoPtr pScrn, pointer data, Bool shutdown) +{ + MGAPtr pMga = MGAPTR(pScrn); + MGAPortPrivPtr pPriv = pMga->portPrivate; + + if(pMga->TexturedVideo) return; + + REGION_EMPTY(pScrn->pScreen, &pPriv->clip); + + if(shutdown) { + if(pPriv->videoStatus & CLIENT_VIDEO_ON) + OUTREG(MGAREG_BESCTL, 0); + if (pPriv->video_memory) { + MGAFreeMemory(pScrn, pPriv->video_memory); + pPriv->video_memory = NULL; + } + pPriv->videoStatus = 0; + } else { + if(pPriv->videoStatus & CLIENT_VIDEO_ON) { + pPriv->videoStatus |= OFF_TIMER; + pPriv->offTime = currentTime.milliseconds + OFF_DELAY; + } + } +} + +static int +MGASetPortAttributeOverlay( + ScrnInfoPtr pScrn, + Atom attribute, + INT32 value, + pointer data +){ + MGAPtr pMga = MGAPTR(pScrn); + MGAPortPrivPtr pPriv = pMga->portPrivate; + + CHECK_DMA_QUIESCENT(pMga, pScrn); + + if(attribute == xvBrightness) { + if((value < -128) || (value > 127)) + return BadValue; + pPriv->brightness = value; + OUTREG(MGAREG_BESLUMACTL, ((pPriv->brightness & 0xff) << 16) | + (pPriv->contrast & 0xff)); + } else + if(attribute == xvContrast) { + if((value < 0) || (value > 255)) + return BadValue; + pPriv->contrast = value; + OUTREG(MGAREG_BESLUMACTL, ((pPriv->brightness & 0xff) << 16) | + (pPriv->contrast & 0xff)); + } else + if(attribute == xvColorKey) { + pPriv->colorKey = value; + outMGAdac(0x55, (pPriv->colorKey & pScrn->mask.red) >> + pScrn->offset.red); + outMGAdac(0x56, (pPriv->colorKey & pScrn->mask.green) >> + pScrn->offset.green); + outMGAdac(0x57, (pPriv->colorKey & pScrn->mask.blue) >> + pScrn->offset.blue); + REGION_EMPTY(pScrn->pScreen, &pPriv->clip); + } else + if(attribute == xvDoubleBuffer) { + if((value < 0) || (value > 1)) + return BadValue; + pPriv->doubleBuffer = value; + } else return BadMatch; + + return Success; +} + +static int +MGAGetPortAttributeOverlay( + ScrnInfoPtr pScrn, + Atom attribute, + INT32 *value, + pointer data +){ + MGAPtr pMga = MGAPTR(pScrn); + MGAPortPrivPtr pPriv = pMga->portPrivate; + + if(attribute == xvBrightness) { + *value = pPriv->brightness; + } else + if(attribute == xvContrast) { + *value = pPriv->contrast; + } else + if(attribute == xvDoubleBuffer) { + *value = pPriv->doubleBuffer ? 1 : 0; + } else + if(attribute == xvColorKey) { + *value = pPriv->colorKey; + } else return BadMatch; + + return Success; +} + + +static int +MGASetPortAttributeTexture( + ScrnInfoPtr pScrn, + Atom attribute, + INT32 value, + pointer data +) { + return BadMatch; +} + + +static int +MGAGetPortAttributeTexture( + ScrnInfoPtr pScrn, + Atom attribute, + INT32 *value, + pointer data +){ + return BadMatch; +} + +static void +MGAQueryBestSize( + ScrnInfoPtr pScrn, + Bool motion, + short vid_w, short vid_h, + short drw_w, short drw_h, + unsigned int *p_w, unsigned int *p_h, + pointer data +){ + *p_w = drw_w; + *p_h = drw_h; +} + + +static void +MGACopyData( + unsigned char *src, + unsigned char *dst, + int srcPitch, + int dstPitch, + int h, + int w +){ + w <<= 1; + while(h--) { + /* XXX Maybe this one needs big-endian fixes, too? -ReneR */ + memcpy(dst, src, w); + src += srcPitch; + dst += dstPitch; + } +} + +static void +MGACopyMungedData( + unsigned char *src1, + unsigned char *src2, + unsigned char *src3, + unsigned char *dst1, + int srcPitch, + int srcPitch2, + int dstPitch, + int h, + int w +){ + CARD32 *dst; + CARD8 *s1, *s2, *s3; + int i, j; + + w >>= 1; + + for(j = 0; j < h; j++) { + dst = (CARD32*)dst1; + s1 = src1; s2 = src2; s3 = src3; + i = w; + while(i > 4) { +#if X_BYTE_ORDER == X_LITTLE_ENDIAN + dst[0] = s1[0] | (s1[1] << 16) | (s3[0] << 8) | (s2[0] << 24); + dst[1] = s1[2] | (s1[3] << 16) | (s3[1] << 8) | (s2[1] << 24); + dst[2] = s1[4] | (s1[5] << 16) | (s3[2] << 8) | (s2[2] << 24); + dst[3] = s1[6] | (s1[7] << 16) | (s3[3] << 8) | (s2[3] << 24); +#else + dst[0] = (s1[0] << 16) | s1[1] | (s3[0] << 24) | (s2[0] << 8); + dst[1] = (s1[2] << 16) | s1[3] | (s3[1] << 24) | (s2[1] << 8); + dst[2] = (s1[4] << 16) | s1[5] | (s3[2] << 24) | (s2[2] << 8); + dst[3] = (s1[6] << 16) | s1[7] | (s3[3] << 24) | (s2[3] << 8); +#endif + dst += 4; s2 += 4; s3 += 4; s1 += 8; + i -= 4; + } + + while(i--) { +#if X_BYTE_ORDER == X_LITTLE_ENDIAN + dst[0] = s1[0] | (s1[1] << 16) | (s3[0] << 8) | (s2[0] << 24); +#else + dst[0] = (s1[0] << 16) | s1[1] | (s3[0] << 24) | (s2[0] << 8); +#endif + dst++; s2++; s3++; + s1 += 2; + } + + dst1 += dstPitch; + src1 += srcPitch; + if(j & 1) { + src2 += srcPitch2; + src3 += srcPitch2; + } + } +} + + +static CARD32 +MGAAllocateMemory( + ScrnInfoPtr pScrn, + void **mem_struct, + int size +){ + MGAPtr pMga = MGAPTR(pScrn); + ScreenPtr pScreen = screenInfo.screens[pScrn->scrnIndex]; + int offset = 0; + +#ifdef USE_EXA + if (pMga->Exa) { + ExaOffscreenArea *area = *mem_struct; + + if (area) { + if (area->size >= size) + return area->offset; + + exaOffscreenFree(pScrn->pScreen, area); + } + + area = exaOffscreenAlloc(pScrn->pScreen, size, 64, TRUE, MGAVideoSave, + NULL); + *mem_struct = area; + + if (!area) + return 0; + + offset = area->offset; + } +#endif /* USE_EXA */ +#ifdef USE_XAA + FBLinearPtr linear = *mem_struct; + int cpp = pMga->CurrentLayout.bitsPerPixel / 8; + + /* XAA allocates in units of pixels at the screen bpp, so adjust size + * appropriately. + */ + size = (size + cpp - 1) / cpp; + + if (!pMga->Exa) { + if (linear) { + if (linear->size >= size) + return linear->offset * cpp; + + if (xf86ResizeOffscreenLinear(linear, size)) + return linear->offset * cpp; + + xf86FreeOffscreenLinear(linear); + } + + + linear = xf86AllocateOffscreenLinear(pScreen, size, 16, + NULL, NULL, NULL); + *mem_struct = linear; + + if (!linear) { + int max_size; + + xf86QueryLargestOffscreenLinear(pScreen, &max_size, 16, + PRIORITY_EXTREME); + + if (max_size < size) + return 0; + + xf86PurgeUnlockedOffscreenAreas(pScreen); + + linear = xf86AllocateOffscreenLinear(pScreen, size, 16, + NULL, NULL, NULL); + *mem_struct = linear; + + if (!linear) + return 0; + } + + offset = linear->offset * cpp; + } +#endif /* USE_XAA */ + + return offset; +} + +static void +MGAFreeMemory(ScrnInfoPtr pScrn, void *mem_struct) +{ + MGAPtr pMga = MGAPTR(pScrn); + +#ifdef USE_EXA + if (pMga->Exa) { + ExaOffscreenArea *area = mem_struct; + + if (area) + exaOffscreenFree(pScrn->pScreen, area); + } +#endif /* USE_EXA */ +#ifdef USE_XAA + if (!pMga->Exa) { + FBLinearPtr linear = mem_struct; + + if (linear) + xf86FreeOffscreenLinear(linear); + } +#endif /* USE_XAA */ +} + +static void +MGADisplayVideoOverlay( + ScrnInfoPtr pScrn, + int id, + int offset, + short width, short height, + int pitch, + int x1, int y1, int x2, int y2, + BoxPtr dstBox, + short src_w, short src_h, + short drw_w, short drw_h +){ + MGAPtr pMga = MGAPTR(pScrn); + int tmp, hzoom, intrep; + int maxOverlayClock; + + CHECK_DMA_QUIESCENT(pMga, pScrn); + + /* got 48 scanlines to do it in */ + tmp = INREG(MGAREG_VCOUNT) + 48; + /* FIXME always change it in vertical retrace use CrtcV ?*/ + if(tmp > pScrn->currentMode->CrtcVTotal) + tmp -= 49; /* too bad */ + else + tmp = pScrn->currentMode->CrtcVTotal -1; + + tmp = pScrn->currentMode->VDisplay +1; + /* enable accelerated 2x horizontal zoom when pixelclock >135MHz */ + + if ((pMga->ChipRev >= 0x80) || (pMga->Chipset == PCI_CHIP_MGAG550)) { + /* G450, G550 */ + maxOverlayClock = 234000; + } else { + maxOverlayClock = 135000; + } + + hzoom = (pScrn->currentMode->Clock > maxOverlayClock) ? 1 : 0; + + switch(id) { + case FOURCC_UYVY: + OUTREG(MGAREG_BESGLOBCTL, 0x000000c0 | (3 * hzoom) | (tmp << 16)); + break; + case FOURCC_YUY2: + default: + OUTREG(MGAREG_BESGLOBCTL, 0x00000080 | (3 * hzoom) | (tmp << 16)); + break; + } + + OUTREG(MGAREG_BESA1ORG, offset); + + if(y1 & 0x00010000) + OUTREG(MGAREG_BESCTL, 0x00040c41); + else + OUTREG(MGAREG_BESCTL, 0x00040c01); + + OUTREG(MGAREG_BESHCOORD, (dstBox->x1 << 16) | (dstBox->x2 - 1)); + OUTREG(MGAREG_BESVCOORD, (dstBox->y1 << 16) | (dstBox->y2 - 1)); + + OUTREG(MGAREG_BESHSRCST, x1 & 0x03fffffc); + OUTREG(MGAREG_BESHSRCEND, (x2 - 0x00010000) & 0x03fffffc); + OUTREG(MGAREG_BESHSRCLST, (width - 1) << 16); + + OUTREG(MGAREG_BESPITCH, pitch >> 1); + + OUTREG(MGAREG_BESV1WGHT, y1 & 0x0000fffc); + OUTREG(MGAREG_BESV1SRCLST, height - 1 - (y1 >> 16)); + + intrep = ((drw_h == src_h) || (drw_h < 2)) ? 0 : 1; + tmp = ((src_h - intrep) << 16)/(drw_h - intrep); + if(tmp >= (32 << 16)) + tmp = (32 << 16) - 1; + OUTREG(MGAREG_BESVISCAL, tmp & 0x001ffffc); + + intrep = ((drw_w == src_w) || (drw_w < 2)) ? 0 : 1; + tmp = (((src_w - intrep) << 16)/(drw_w - intrep)) << hzoom; + if(tmp >= (32 << 16)) + tmp = (32 << 16) - 1; + OUTREG(MGAREG_BESHISCAL, tmp & 0x001ffffc); + +} + + +/** + * \todo + * Starting with at least the G200, the chip can handle non-mipmapped + * non-power-of-two textures. However, the code in this routine forces the + * texture dimensions to be powers of two. That should simplify the code and + * may improve performance slightly. + */ +static void +MGADisplayVideoTexture( + ScrnInfoPtr pScrn, + int id, int offset, + int nbox, BoxPtr pbox, + int width, int height, int pitch, + short src_x, short src_y, + short src_w, short src_h, + short drw_x, short drw_y, + short drw_w, short drw_h +){ + MGAPtr pMga = MGAPTR(pScrn); + int log2w = 0, log2h = 0, i, incx, incy, padw, padh; + + pitch >>= 1; + + i = 12; + while(--i) { + if(width & (1 << i)) { + log2w = i; + if(width & ((1 << i) - 1)) + log2w++; + break; + } + } + + i = 12; + while(--i) { + if(height & (1 << i)) { + log2h = i; + if(height & ((1 << i) - 1)) + log2h++; + break; + } + } + + padw = 1 << log2w; + padh = 1 << log2h; + incx = (src_w << 20)/(drw_w * padw); + incy = (src_h << 20)/(drw_h * padh); + + CHECK_DMA_QUIESCENT(pMga, pScrn); + + if(pMga->Overlay8Plus24) { + WAITFIFO(1); + SET_PLANEMASK_REPLICATED( 0x00ffffff, 0xffffffff, 32 ); + } + + WAITFIFO(15); + OUTREG(MGAREG_TMR0, incx); /* sx inc */ + OUTREG(MGAREG_TMR1, 0); /* sy inc */ + OUTREG(MGAREG_TMR2, 0); /* tx inc */ + OUTREG(MGAREG_TMR3, incy); /* ty inc */ + OUTREG(MGAREG_TMR4, 0x00000000); + OUTREG(MGAREG_TMR5, 0x00000000); + OUTREG(MGAREG_TMR8, 0x00010000); + OUTREG(MGAREG_TEXORG, offset); + OUTREG(MGAREG_TEXWIDTH, log2w | (((8 - log2w) & 63) << 9) | + ((width - 1) << 18)); + OUTREG(MGAREG_TEXHEIGHT, log2h | (((8 - log2h) & 63) << 9) | + ((height - 1) << 18)); + if(id == FOURCC_UYVY) + OUTREG(MGAREG_TEXCTL, 0x1A00010b | ((pitch & 0x07FF) << 9)); + else + OUTREG(MGAREG_TEXCTL, 0x1A00010a | ((pitch & 0x07FF) << 9)); + OUTREG(MGAREG_TEXCTL2, 0x00000014); + OUTREG(MGAREG_DWGCTL, 0x000c7076); + OUTREG(MGAREG_TEXFILTER, 0x01e00020); + OUTREG(MGAREG_ALPHACTRL, 0x00000001); + + padw = (src_x << 20)/padw; + padh = (src_y << 20)/padh; + + while(nbox--) { + WAITFIFO(4); + OUTREG(MGAREG_TMR6, (incx * (pbox->x1 - drw_x)) + padw); + OUTREG(MGAREG_TMR7, (incy * (pbox->y1 - drw_y)) + padh); + OUTREG(MGAREG_FXBNDRY, (pbox->x2 << 16) | (pbox->x1 & 0xffff)); + OUTREG(MGAREG_YDSTLEN + MGAREG_EXEC, + (pbox->y1 << 16) | (pbox->y2 - pbox->y1)); + pbox++; + } + + MGA_MARK_SYNC(pMga, pScrn); +} + +static int +MGAPutImage( + ScrnInfoPtr pScrn, + short src_x, short src_y, + short drw_x, short drw_y, + short src_w, short src_h, + short drw_w, short drw_h, + int id, unsigned char* buf, + short width, short height, + Bool Sync, + RegionPtr clipBoxes, pointer data, + DrawablePtr pDraw +){ + MGAPtr pMga = MGAPTR(pScrn); + MGAPortPrivPtr pPriv = pMga->portPrivate; + INT32 x1, x2, y1, y2; + unsigned char *dst_start; + int new_size, offset, offset2 = 0, offset3 = 0; + int srcPitch, srcPitch2 = 0, dstPitch; + int top, left, npixels, nlines; + BoxRec dstBox; + CARD32 tmp; + + /* Clip */ + x1 = src_x; + x2 = src_x + src_w; + y1 = src_y; + y2 = src_y + src_h; + + dstBox.x1 = drw_x; + dstBox.x2 = drw_x + drw_w; + dstBox.y1 = drw_y; + dstBox.y2 = drw_y + drw_h; + + if(!xf86XVClipVideoHelper(&dstBox, &x1, &x2, &y1, &y2, + clipBoxes, width, height)) + return Success; + + if(!pMga->TexturedVideo) { + dstBox.x1 -= pScrn->frameX0; + dstBox.x2 -= pScrn->frameX0; + dstBox.y1 -= pScrn->frameY0; + dstBox.y2 -= pScrn->frameY0; + } + + dstPitch = ((width << 1) + 15) & ~15; + new_size = dstPitch * height; + + switch(id) { + case FOURCC_YV12: + case FOURCC_I420: + srcPitch = (width + 3) & ~3; + offset2 = srcPitch * height; + srcPitch2 = ((width >> 1) + 3) & ~3; + offset3 = (srcPitch2 * (height >> 1)) + offset2; + break; + case FOURCC_UYVY: + case FOURCC_YUY2: + default: + srcPitch = (width << 1); + break; + } + + pPriv->video_offset = MGAAllocateMemory(pScrn, &pPriv->video_memory, + pPriv->doubleBuffer ? + (new_size << 1) : new_size); + if (!pPriv->video_offset) + return BadAlloc; + + pPriv->currentBuffer ^= 1; + + /* copy data */ + top = y1 >> 16; + left = (x1 >> 16) & ~1; + npixels = ((((x2 + 0xffff) >> 16) + 1) & ~1) - left; + left <<= 1; + + offset = pPriv->video_offset; + if(pPriv->doubleBuffer) + offset += pPriv->currentBuffer * new_size; + dst_start = pMga->FbStart + offset + left + (top * dstPitch); + + if (pMga->TexturedVideo && ((long)data != pPriv->lastPort)) + MGA_SYNC(pMga, pScrn); + + switch(id) { + case FOURCC_YV12: + case FOURCC_I420: + top &= ~1; + tmp = ((top >> 1) * srcPitch2) + (left >> 2); + offset2 += tmp; + offset3 += tmp; + if(id == FOURCC_I420) { + tmp = offset2; + offset2 = offset3; + offset3 = tmp; + } + nlines = ((((y2 + 0xffff) >> 16) + 1) & ~1) - top; + MGACopyMungedData(buf + (top * srcPitch) + (left >> 1), + buf + offset2, buf + offset3, dst_start, + srcPitch, srcPitch2, dstPitch, nlines, npixels); + break; + case FOURCC_UYVY: + case FOURCC_YUY2: + default: + buf += (top * srcPitch) + left; + nlines = ((y2 + 0xffff) >> 16) - top; + MGACopyData(buf, dst_start, srcPitch, dstPitch, nlines, npixels); + break; + } + + if(pMga->TexturedVideo) { + pPriv->lastPort = (long)data; + MGADisplayVideoTexture(pScrn, id, offset, + REGION_NUM_RECTS(clipBoxes), REGION_RECTS(clipBoxes), + width, height, dstPitch, src_x, src_y, src_w, src_h, + drw_x, drw_y, drw_w, drw_h); + pPriv->videoStatus = FREE_TIMER; + pPriv->freeTime = currentTime.milliseconds + FREE_DELAY; + } else { + /* update cliplist */ + if(!REGION_EQUAL(pScrn->pScreen, &pPriv->clip, clipBoxes)) { + REGION_COPY(pScrn->pScreen, &pPriv->clip, clipBoxes); + /* draw these */ + xf86XVFillKeyHelper(pScrn->pScreen, pPriv->colorKey, clipBoxes); + } + + offset += top * dstPitch; + MGADisplayVideoOverlay(pScrn, id, offset, width, height, dstPitch, + x1, y1, x2, y2, &dstBox, src_w, src_h, drw_w, drw_h); + + pPriv->videoStatus = CLIENT_VIDEO_ON; + } + pMga->VideoTimerCallback = MGAVideoTimerCallback; + + return Success; +} + + +static int +MGAQueryImageAttributes( + ScrnInfoPtr pScrn, + int id, + unsigned short *w, unsigned short *h, + int *pitches, int *offsets +){ + MGAPtr pMga = MGAPTR(pScrn); + int size, tmp; + + if(pMga->TexturedVideo) { + if(*w > 2046) *w = 2046; + if(*h > 2046) *h = 2046; + } else { + if(*w > 1024) *w = 1024; + if(*h > 1024) *h = 1024; + } + + *w = (*w + 1) & ~1; + if(offsets) offsets[0] = 0; + + switch(id) { + case FOURCC_YV12: + case FOURCC_I420: + *h = (*h + 1) & ~1; + size = (*w + 3) & ~3; + if(pitches) pitches[0] = size; + size *= *h; + if(offsets) offsets[1] = size; + tmp = ((*w >> 1) + 3) & ~3; + if(pitches) pitches[1] = pitches[2] = tmp; + tmp *= (*h >> 1); + size += tmp; + if(offsets) offsets[2] = size; + size += tmp; + break; + case FOURCC_UYVY: + case FOURCC_YUY2: + default: + size = *w << 1; + if(pitches) pitches[0] = size; + size *= *h; + break; + } + + return size; +} + +static void +MGAVideoTimerCallback(ScrnInfoPtr pScrn, Time time) +{ + MGAPtr pMga = MGAPTR(pScrn); + MGAPortPrivPtr pPriv = pMga->portPrivate; + + if(pPriv->videoStatus & TIMER_MASK) { + if(pPriv->videoStatus & OFF_TIMER) { + if(pPriv->offTime < time) { + OUTREG(MGAREG_BESCTL, 0); + pPriv->videoStatus = FREE_TIMER; + pPriv->freeTime = time + FREE_DELAY; + } + } else { /* FREE_TIMER */ + if(pPriv->freeTime < time) { + if (pPriv->video_memory) { + MGAFreeMemory(pScrn, pPriv->video_memory); + pPriv->video_memory = NULL; + } + pPriv->videoStatus = 0; + pMga->VideoTimerCallback = NULL; + } + } + } else /* shouldn't get here */ + pMga->VideoTimerCallback = NULL; +} + + +/****************** Offscreen stuff ***************/ + +typedef struct { + void *surface_memory; + Bool isOn; +} OffscreenPrivRec, * OffscreenPrivPtr; + +static int +MGAAllocateSurface( + ScrnInfoPtr pScrn, + int id, + unsigned short w, + unsigned short h, + XF86SurfacePtr surface +){ + void *surface_memory = NULL; + int pitch, size, bpp, offset; + OffscreenPrivPtr pPriv; + + if((w > 1024) || (h > 1024)) + return BadAlloc; + + w = (w + 1) & ~1; + pitch = ((w << 1) + 15) & ~15; + bpp = pScrn->bitsPerPixel >> 3; + size = ((pitch * h) + bpp - 1) / bpp; + + offset = MGAAllocateMemory(pScrn, &surface_memory, size); + if (!offset) + return BadAlloc; + + surface->width = w; + surface->height = h; + + if(!(surface->pitches = xalloc(sizeof(int)))) { + MGAFreeMemory(pScrn, surface_memory); + return BadAlloc; + } + if(!(surface->offsets = xalloc(sizeof(int)))) { + xfree(surface->pitches); + MGAFreeMemory(pScrn, surface_memory); + return BadAlloc; + } + if(!(pPriv = xalloc(sizeof(OffscreenPrivRec)))) { + xfree(surface->pitches); + xfree(surface->offsets); + MGAFreeMemory(pScrn, surface_memory); + return BadAlloc; + } + + pPriv->surface_memory = surface_memory; + pPriv->isOn = FALSE; + + surface->pScrn = pScrn; + surface->id = id; + surface->pitches[0] = pitch; + surface->offsets[0] = offset; + surface->devPrivate.ptr = (pointer)pPriv; + + return Success; +} + +static int +MGAStopSurface( + XF86SurfacePtr surface +){ + OffscreenPrivPtr pPriv = (OffscreenPrivPtr)surface->devPrivate.ptr; + + if(pPriv->isOn) { + ScrnInfoPtr pScrn = surface->pScrn; + MGAPtr pMga = MGAPTR(pScrn); + OUTREG(MGAREG_BESCTL, 0); + pPriv->isOn = FALSE; + } + + return Success; +} + + +static int +MGAFreeSurface( + XF86SurfacePtr surface +){ + ScrnInfoPtr pScrn = surface->pScrn; + OffscreenPrivPtr pPriv = (OffscreenPrivPtr)surface->devPrivate.ptr; + + if(pPriv->isOn) + MGAStopSurface(surface); + MGAFreeMemory(pScrn, pPriv->surface_memory); + xfree(surface->pitches); + xfree(surface->offsets); + xfree(surface->devPrivate.ptr); + + return Success; +} + +static int +MGAGetSurfaceAttribute( + ScrnInfoPtr pScrn, + Atom attribute, + INT32 *value +){ + return MGAGetPortAttributeOverlay(pScrn, attribute, value, 0); +} + +static int +MGASetSurfaceAttribute( + ScrnInfoPtr pScrn, + Atom attribute, + INT32 value +){ + return MGASetPortAttributeOverlay(pScrn, attribute, value, 0); +} + + +static int +MGADisplaySurface( + XF86SurfacePtr surface, + short src_x, short src_y, + short drw_x, short drw_y, + short src_w, short src_h, + short drw_w, short drw_h, + RegionPtr clipBoxes +){ + OffscreenPrivPtr pPriv = (OffscreenPrivPtr)surface->devPrivate.ptr; + ScrnInfoPtr pScrn = surface->pScrn; + MGAPtr pMga = MGAPTR(pScrn); + MGAPortPrivPtr portPriv = pMga->portPrivate; + INT32 x1, y1, x2, y2; + BoxRec dstBox; + + x1 = src_x; + x2 = src_x + src_w; + y1 = src_y; + y2 = src_y + src_h; + + dstBox.x1 = drw_x; + dstBox.x2 = drw_x + drw_w; + dstBox.y1 = drw_y; + dstBox.y2 = drw_y + drw_h; + + if(!xf86XVClipVideoHelper(&dstBox, &x1, &x2, &y1, &y2, clipBoxes, + surface->width, surface->height)) + { + return Success; + } + + dstBox.x1 -= pScrn->frameX0; + dstBox.x2 -= pScrn->frameX0; + dstBox.y1 -= pScrn->frameY0; + dstBox.y2 -= pScrn->frameY0; + + MGAResetVideoOverlay(pScrn); + + MGADisplayVideoOverlay(pScrn, surface->id, surface->offsets[0], + surface->width, surface->height, surface->pitches[0], + x1, y1, x2, y2, &dstBox, src_w, src_h, drw_w, drw_h); + + xf86XVFillKeyHelper(pScrn->pScreen, portPriv->colorKey, clipBoxes); + + pPriv->isOn = TRUE; + /* we've prempted the XvImage stream so set its free timer */ + if(portPriv->videoStatus & CLIENT_VIDEO_ON) { + REGION_EMPTY(pScrn->pScreen, &portPriv->clip); + UpdateCurrentTime(); + portPriv->videoStatus = FREE_TIMER; + portPriv->freeTime = currentTime.milliseconds + FREE_DELAY; + pMga->VideoTimerCallback = MGAVideoTimerCallback; + } + + return Success; +} + + +static void +MGAInitOffscreenImages(ScreenPtr pScreen) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + MGAPtr pMga = MGAPTR(pScrn); + int num = (pMga->Chipset == PCI_CHIP_MGAG400 || pMga->Chipset == PCI_CHIP_MGAG550) ? 2 : 1; + XF86OffscreenImagePtr offscreenImages; + + /* need to free this someplace */ + if(!(offscreenImages = xalloc(num * sizeof(XF86OffscreenImageRec)))) + return; + + offscreenImages[0].image = &Images[0]; + offscreenImages[0].flags = VIDEO_OVERLAID_IMAGES | + VIDEO_CLIP_TO_VIEWPORT; + offscreenImages[0].alloc_surface = MGAAllocateSurface; + offscreenImages[0].free_surface = MGAFreeSurface; + offscreenImages[0].display = MGADisplaySurface; + offscreenImages[0].stop = MGAStopSurface; + offscreenImages[0].setAttribute = MGASetSurfaceAttribute; + offscreenImages[0].getAttribute = MGAGetSurfaceAttribute; + offscreenImages[0].max_width = 1024; + offscreenImages[0].max_height = 1024; + offscreenImages[0].num_attributes = (num == 1) ? 1 : 4; + offscreenImages[0].attributes = Attributes; + + if(num == 2) { + offscreenImages[1].image = &Images[3]; + offscreenImages[1].flags = VIDEO_OVERLAID_IMAGES | + VIDEO_CLIP_TO_VIEWPORT; + offscreenImages[1].alloc_surface = MGAAllocateSurface; + offscreenImages[1].free_surface = MGAFreeSurface; + offscreenImages[1].display = MGADisplaySurface; + offscreenImages[1].stop = MGAStopSurface; + offscreenImages[1].setAttribute = MGASetSurfaceAttribute; + offscreenImages[1].getAttribute = MGAGetSurfaceAttribute; + offscreenImages[1].max_width = 1024; + offscreenImages[1].max_height = 1024; + offscreenImages[1].num_attributes = 4; + offscreenImages[1].attributes = Attributes; + } + + xf86XVRegisterOffscreenImages(pScreen, offscreenImages, num); +} diff --git a/driver/xf86-video-mga/src/mgareg_flags.h b/driver/xf86-video-mga/src/mgareg_flags.h new file mode 100644 index 000000000..69050fc10 --- /dev/null +++ b/driver/xf86-video-mga/src/mgareg_flags.h @@ -0,0 +1,931 @@ +/* author: stephen crowley, crow@debian.org */ + +/* + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * STEPHEN CROWLEY, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE + * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mgareg_flags.h,v 1.2 2003/01/12 03:55:47 tsi Exp $ */ + +#ifndef _MGAREGS_H_ +#define _MGAREGS_H_ + +/*************** (START) AUTOMATICLY GENERATED REGISTER FILE *****************/ +/* + * Generated on Sat Nov 20 21:25:36 CST 1999 + */ + + + +/* + * Power Graphic Mode Memory Space Registers + */ + +# define AGP_PLL_agp2xpllen_MASK 0xfffffffe /* bit 0 */ +# define AGP_PLL_agp2xpllen_disable 0x0 +# define AGP_PLL_agp2xpllen_enable 0x1 + +# define AC_src_MASK 0xfffffff0 /* bits 0-3 */ +# define AC_src_zero 0x0 /* val 0, shift 0 */ +# define AC_src_one 0x1 /* val 1, shift 0 */ +# define AC_src_dst_color 0x2 /* val 2, shift 0 */ +# define AC_src_om_dst_color 0x3 /* val 3, shift 0 */ +# define AC_src_src_alpha 0x4 /* val 4, shift 0 */ +# define AC_src_om_src_alpha 0x5 /* val 5, shift 0 */ +# define AC_src_dst_alpha 0x6 /* val 6, shift 0 */ +# define AC_src_om_dst_alpha 0x7 /* val 7, shift 0 */ +# define AC_src_src_alpha_sat 0x8 /* val 8, shift 0 */ +# define AC_dst_MASK 0xffffff0f /* bits 4-7 */ +# define AC_dst_zero 0x0 /* val 0, shift 4 */ +# define AC_dst_one 0x10 /* val 1, shift 4 */ +# define AC_dst_src_color 0x20 /* val 2, shift 4 */ +# define AC_dst_om_src_color 0x30 /* val 3, shift 4 */ +# define AC_dst_src_alpha 0x40 /* val 4, shift 4 */ +# define AC_dst_om_src_alpha 0x50 /* val 5, shift 4 */ +# define AC_dst_dst_alpha 0x60 /* val 6, shift 4 */ +# define AC_dst_om_dst_alpha 0x70 /* val 7, shift 4 */ +# define AC_amode_MASK 0xfffffcff /* bits 8-9 */ +# define AC_amode_FCOL 0x0 /* val 0, shift 8 */ +# define AC_amode_alpha_channel 0x100 /* val 1, shift 8 */ +# define AC_amode_video_alpha 0x200 /* val 2, shift 8 */ +# define AC_amode_RSVD 0x300 /* val 3, shift 8 */ +# define AC_astipple_MASK 0xfffff7ff /* bit 11 */ +# define AC_astipple_disable 0x0 +# define AC_astipple_enable 0x800 +# define AC_aten_MASK 0xffffefff /* bit 12 */ +# define AC_aten_disable 0x0 +# define AC_aten_enable 0x1000 +# define AC_atmode_MASK 0xffff1fff /* bits 13-15 */ +# define AC_atmode_noacmp 0x0 /* val 0, shift 13 */ +# define AC_atmode_ae 0x4000 /* val 2, shift 13 */ +# define AC_atmode_ane 0x6000 /* val 3, shift 13 */ +# define AC_atmode_alt 0x8000 /* val 4, shift 13 */ +# define AC_atmode_alte 0xa000 /* val 5, shift 13 */ +# define AC_atmode_agt 0xc000 /* val 6, shift 13 */ +# define AC_atmode_agte 0xe000 /* val 7, shift 13 */ +# define AC_atref_MASK 0xff00ffff /* bits 16-23 */ +# define AC_atref_SHIFT 16 +# define AC_alphasel_MASK 0xfcffffff /* bits 24-25 */ +# define AC_alphasel_fromtex 0x0 /* val 0, shift 24 */ +# define AC_alphasel_diffused 0x1000000 /* val 1, shift 24 */ +# define AC_alphasel_modulated 0x2000000 /* val 2, shift 24 */ +# define AC_alphasel_trans 0x3000000 /* val 3, shift 24 */ + +# define AR0_ar0_MASK 0xfffc0000 /* bits 0-17 */ +# define AR0_ar0_SHIFT 0 + +# define AR1_ar1_MASK 0xff000000 /* bits 0-23 */ +# define AR1_ar1_SHIFT 0 + +# define AR2_ar2_MASK 0xfffc0000 /* bits 0-17 */ +# define AR2_ar2_SHIFT 0 + +# define AR3_ar3_MASK 0xff000000 /* bits 0-23 */ +# define AR3_ar3_SHIFT 0 +# define AR3_spage_MASK 0xf8ffffff /* bits 24-26 */ +# define AR3_spage_SHIFT 24 + +# define AR4_ar4_MASK 0xfffc0000 /* bits 0-17 */ +# define AR4_ar4_SHIFT 0 + +# define AR5_ar5_MASK 0xfffc0000 /* bits 0-17 */ +# define AR5_ar5_SHIFT 0 + +# define AR6_ar6_MASK 0xfffc0000 /* bits 0-17 */ +# define AR6_ar6_SHIFT 0 + +# define BC_besen_MASK 0xfffffffe /* bit 0 */ +# define BC_besen_disable 0x0 +# define BC_besen_enable 0x1 +# define BC_besv1srcstp_MASK 0xffffffbf /* bit 6 */ +# define BC_besv1srcstp_even 0x0 +# define BC_besv1srcstp_odd 0x40 +# define BC_besv2srcstp_MASK 0xfffffeff /* bit 8 */ +# define BC_besv2srcstp_disable 0x0 +# define BC_besv2srcstp_enable 0x100 +# define BC_beshfen_MASK 0xfffffbff /* bit 10 */ +# define BC_beshfen_disable 0x0 +# define BC_beshfen_enable 0x400 +# define BC_besvfen_MASK 0xfffff7ff /* bit 11 */ +# define BC_besvfen_disable 0x0 +# define BC_besvfen_enable 0x800 +# define BC_beshfixc_MASK 0xffffefff /* bit 12 */ +# define BC_beshfixc_weight 0x0 +# define BC_beshfixc_coeff 0x1000 +# define BC_bescups_MASK 0xfffeffff /* bit 16 */ +# define BC_bescups_disable 0x0 +# define BC_bescups_enable 0x10000 +# define BC_bes420pl_MASK 0xfffdffff /* bit 17 */ +# define BC_bes420pl_422 0x0 +# define BC_bes420pl_420 0x20000 +# define BC_besdith_MASK 0xfffbffff /* bit 18 */ +# define BC_besdith_disable 0x0 +# define BC_besdith_enable 0x40000 +# define BC_beshmir_MASK 0xfff7ffff /* bit 19 */ +# define BC_beshmir_disable 0x0 +# define BC_beshmir_enable 0x80000 +# define BC_besbwen_MASK 0xffefffff /* bit 20 */ +# define BC_besbwen_color 0x0 +# define BC_besbwen_bw 0x100000 +# define BC_besblank_MASK 0xffdfffff /* bit 21 */ +# define BC_besblank_disable 0x0 +# define BC_besblank_enable 0x200000 +# define BC_besfselm_MASK 0xfeffffff /* bit 24 */ +# define BC_besfselm_soft 0x0 +# define BC_besfselm_hard 0x1000000 +# define BC_besfsel_MASK 0xf9ffffff /* bits 25-26 */ +# define BC_besfsel_a1 0x0 /* val 0, shift 25 */ +# define BC_besfsel_a2 0x2000000 /* val 1, shift 25 */ +# define BC_besfsel_b1 0x4000000 /* val 2, shift 25 */ +# define BC_besfsel_b2 0x6000000 /* val 3, shift 25 */ + +# define BGC_beshzoom_MASK 0xfffffffe /* bit 0 */ +# define BGC_beshzoom_disable 0x0 +# define BGC_beshzoom_enable 0x1 +# define BGC_beshzoomf_MASK 0xfffffffd /* bit 1 */ +# define BGC_beshzoomf_disable 0x0 +# define BGC_beshzoomf_enable 0x2 +# define BGC_bescorder_MASK 0xfffffff7 /* bit 3 */ +# define BGC_bescorder_even 0x0 +# define BGC_bescorder_odd 0x8 +# define BGC_besreghup_MASK 0xffffffef /* bit 4 */ +# define BGC_besreghup_disable 0x0 +# define BGC_besreghup_enable 0x10 +# define BGC_besvcnt_MASK 0xf000ffff /* bits 16-27 */ +# define BGC_besvcnt_SHIFT 16 + +# define BHC_besright_MASK 0xfffff800 /* bits 0-10 */ +# define BHC_besright_SHIFT 0 +# define BHC_besleft_MASK 0xf800ffff /* bits 16-26 */ +# define BHC_besleft_SHIFT 16 + +# define BHISF_beshiscal_MASK 0xffe00003 /* bits 2-20 */ +# define BHISF_beshiscal_SHIFT 2 + +# define BHSE_beshsrcend_MASK 0xfc000003 /* bits 2-25 */ +# define BHSE_beshsrcend_SHIFT 2 + +# define BHSL_beshsrclst_MASK 0xfc00ffff /* bits 16-25 */ +# define BHSL_beshsrclst_SHIFT 16 + +# define BHSS_beshsrcst_MASK 0xfc000003 /* bits 2-25 */ +# define BHSS_beshsrcst_SHIFT 2 + +# define BP_bespitch_MASK 0xfffff000 /* bits 0-11 */ +# define BP_bespitch_SHIFT 0 + +# define BS_besstat_MASK 0xfffffffc /* bits 0-1 */ +# define BS_besstat_a1 0x0 /* val 0, shift 0 */ +# define BS_besstat_a2 0x1 /* val 1, shift 0 */ +# define BS_besstat_b1 0x2 /* val 2, shift 0 */ +# define BS_besstat_b2 0x3 /* val 3, shift 0 */ + +# define BSF_besv1srclast_MASK 0xfffffc00 /* bits 0-9 */ +# define BSF_besv1srclast_SHIFT 0 + +# define BSF_besv2srclst_MASK 0xfffffc00 /* bits 0-9 */ +# define BSF_besv2srclst_SHIFT 0 + +# define BSF_besv1wght_MASK 0xffff0003 /* bits 2-15 */ +# define BSF_besv1wght_SHIFT 2 +# define BSF_besv1wghts_MASK 0xfffeffff /* bit 16 */ +# define BSF_besv1wghts_disable 0x0 +# define BSF_besv1wghts_enable 0x10000 + +# define BSF_besv2wght_MASK 0xffff0003 /* bits 2-15 */ +# define BSF_besv2wght_SHIFT 2 +# define BSF_besv2wghts_MASK 0xfffeffff /* bit 16 */ +# define BSF_besv2wghts_disable 0x0 +# define BSF_besv2wghts_enable 0x10000 + +# define BVC_besbot_MASK 0xfffff800 /* bits 0-10 */ +# define BVC_besbot_SHIFT 0 +# define BVC_bestop_MASK 0xf800ffff /* bits 16-26 */ +# define BVC_bestop_SHIFT 16 + +# define BVISF_besviscal_MASK 0xffe00003 /* bits 2-20 */ +# define BVISF_besviscal_SHIFT 2 + +# define CXB_cxleft_MASK 0xfffff000 /* bits 0-11 */ +# define CXB_cxleft_SHIFT 0 +# define CXB_cxright_MASK 0xf000ffff /* bits 16-27 */ +# define CXB_cxright_SHIFT 16 + +# define DO_dstmap_MASK 0xfffffffe /* bit 0 */ +# define DO_dstmap_fb 0x0 +# define DO_dstmap_sys 0x1 +# define DO_dstacc_MASK 0xfffffffd /* bit 1 */ +# define DO_dstacc_pci 0x0 +# define DO_dstacc_agp 0x2 +# define DO_dstorg_MASK 0x7 /* bits 3-31 */ +# define DO_dstorg_SHIFT 3 + +# define DC_opcod_MASK 0xfffffff0 /* bits 0-3 */ +# define DC_opcod_line_open 0x0 /* val 0, shift 0 */ +# define DC_opcod_autoline_open 0x1 /* val 1, shift 0 */ +# define DC_opcod_line_close 0x2 /* val 2, shift 0 */ +# define DC_opcod_autoline_close 0x3 /* val 3, shift 0 */ +# define DC_opcod_trap 0x4 /* val 4, shift 0 */ +# define DC_opcod_texture_trap 0x6 /* val 6, shift 0 */ +# define DC_opcod_bitblt 0x8 /* val 8, shift 0 */ +# define DC_opcod_iload 0x9 /* val 9, shift 0 */ +# define DC_atype_MASK 0xffffff8f /* bits 4-6 */ +# define DC_atype_rpl 0x0 /* val 0, shift 4 */ +# define DC_atype_rstr 0x10 /* val 1, shift 4 */ +# define DC_atype_zi 0x30 /* val 3, shift 4 */ +# define DC_atype_blk 0x40 /* val 4, shift 4 */ +# define DC_atype_i 0x70 /* val 7, shift 4 */ +# define DC_linear_MASK 0xffffff7f /* bit 7 */ +# define DC_linear_xy 0x0 +# define DC_linear_linear 0x80 +# define DC_zmode_MASK 0xfffff8ff /* bits 8-10 */ +# define DC_zmode_nozcmp 0x0 /* val 0, shift 8 */ +# define DC_zmode_ze 0x200 /* val 2, shift 8 */ +# define DC_zmode_zne 0x300 /* val 3, shift 8 */ +# define DC_zmode_zlt 0x400 /* val 4, shift 8 */ +# define DC_zmode_zlte 0x500 /* val 5, shift 8 */ +# define DC_zmode_zgt 0x600 /* val 6, shift 8 */ +# define DC_zmode_zgte 0x700 /* val 7, shift 8 */ +# define DC_solid_MASK 0xfffff7ff /* bit 11 */ +# define DC_solid_disable 0x0 +# define DC_solid_enable 0x800 +# define DC_arzero_MASK 0xffffefff /* bit 12 */ +# define DC_arzero_disable 0x0 +# define DC_arzero_enable 0x1000 +# define DC_sgnzero_MASK 0xffffdfff /* bit 13 */ +# define DC_sgnzero_disable 0x0 +# define DC_sgnzero_enable 0x2000 +# define DC_shftzero_MASK 0xffffbfff /* bit 14 */ +# define DC_shftzero_disable 0x0 +# define DC_shftzero_enable 0x4000 +# define DC_bop_MASK 0xfff0ffff /* bits 16-19 */ +# define DC_bop_SHIFT 16 +# define DC_trans_MASK 0xff0fffff /* bits 20-23 */ +# define DC_trans_SHIFT 20 +# define DC_bltmod_MASK 0xe1ffffff /* bits 25-28 */ +# define DC_bltmod_bmonolef 0x0 /* val 0, shift 25 */ +# define DC_bltmod_bmonowf 0x8000000 /* val 4, shift 25 */ +# define DC_bltmod_bplan 0x2000000 /* val 1, shift 25 */ +# define DC_bltmod_bfcol 0x4000000 /* val 2, shift 25 */ +# define DC_bltmod_bu32bgr 0x6000000 /* val 3, shift 25 */ +# define DC_bltmod_bu32rgb 0xe000000 /* val 7, shift 25 */ +# define DC_bltmod_bu24bgr 0x16000000 /* val 11, shift 25 */ +# define DC_bltmod_bu24rgb 0x1e000000 /* val 15, shift 25 */ +# define DC_pattern_MASK 0xdfffffff /* bit 29 */ +# define DC_pattern_disable 0x0 +# define DC_pattern_enable 0x20000000 +# define DC_transc_MASK 0xbfffffff /* bit 30 */ +# define DC_transc_disable 0x0 +# define DC_transc_enable 0x40000000 +# define DC_clipdis_MASK 0x7fffffff /* bit 31 */ +# define DC_clipdis_disable 0x0 +# define DC_clipdis_enable 0x80000000 + +# define DS_dwgsyncaddr_MASK 0x3 /* bits 2-31 */ +# define DS_dwgsyncaddr_SHIFT 2 + +# define FS_fifocount_MASK 0xffffff80 /* bits 0-6 */ +# define FS_fifocount_SHIFT 0 +# define FS_bfull_MASK 0xfffffeff /* bit 8 */ +# define FS_bfull_disable 0x0 +# define FS_bfull_enable 0x100 +# define FS_bempty_MASK 0xfffffdff /* bit 9 */ +# define FS_bempty_disable 0x0 +# define FS_bempty_enable 0x200 + +# define XA_fxleft_MASK 0xffff0000 /* bits 0-15 */ +# define XA_fxleft_SHIFT 0 +# define XA_fxright_MASK 0xffff /* bits 16-31 */ +# define XA_fxright_SHIFT 16 + +# define IC_softrapiclr_MASK 0xfffffffe /* bit 0 */ +# define IC_softrapiclr_disable 0x0 +# define IC_softrapiclr_enable 0x1 +# define IC_pickiclr_MASK 0xfffffffb /* bit 2 */ +# define IC_pickiclr_disable 0x0 +# define IC_pickiclr_enable 0x4 +# define IC_vlineiclr_MASK 0xffffffdf /* bit 5 */ +# define IC_vlineiclr_disable 0x0 +# define IC_vlineiclr_enable 0x20 +# define IC_wiclr_MASK 0xffffff7f /* bit 7 */ +# define IC_wiclr_disable 0x0 +# define IC_wiclr_enable 0x80 +# define IC_wciclr_MASK 0xfffffeff /* bit 8 */ +# define IC_wciclr_disable 0x0 +# define IC_wciclr_enable 0x100 + +# define IE_softrapien_MASK 0xfffffffe /* bit 0 */ +# define IE_softrapien_disable 0x0 +# define IE_softrapien_enable 0x1 +# define IE_pickien_MASK 0xfffffffb /* bit 2 */ +# define IE_pickien_disable 0x0 +# define IE_pickien_enable 0x4 +# define IE_vlineien_MASK 0xffffffdf /* bit 5 */ +# define IE_vlineien_disable 0x0 +# define IE_vlineien_enable 0x20 +# define IE_extien_MASK 0xffffffbf /* bit 6 */ +# define IE_extien_disable 0x0 +# define IE_extien_enable 0x40 +# define IE_wien_MASK 0xffffff7f /* bit 7 */ +# define IE_wien_disable 0x0 +# define IE_wien_enable 0x80 +# define IE_wcien_MASK 0xfffffeff /* bit 8 */ +# define IE_wcien_disable 0x0 +# define IE_wcien_enable 0x100 + +# define MA_pwidth_MASK 0xfffffffc /* bits 0-1 */ +# define MA_pwidth_8 0x0 /* val 0, shift 0 */ +# define MA_pwidth_16 0x1 /* val 1, shift 0 */ +# define MA_pwidth_32 0x2 /* val 2, shift 0 */ +# define MA_pwidth_24 0x3 /* val 3, shift 0 */ +# define MA_zwidth_MASK 0xffffffe7 /* bits 3-4 */ +# define MA_zwidth_16 0x0 /* val 0, shift 3 */ +# define MA_zwidth_32 0x8 /* val 1, shift 3 */ +# define MA_zwidth_15 0x10 /* val 2, shift 3 */ +# define MA_zwidth_24 0x18 /* val 3, shift 3 */ +# define MA_memreset_MASK 0xffff7fff /* bit 15 */ +# define MA_memreset_disable 0x0 +# define MA_memreset_enable 0x8000 +# define MA_fogen_MASK 0xfbffffff /* bit 26 */ +# define MA_fogen_disable 0x0 +# define MA_fogen_enable 0x4000000 +# define MA_tlutload_MASK 0xdfffffff /* bit 29 */ +# define MA_tlutload_disable 0x0 +# define MA_tlutload_enable 0x20000000 +# define MA_nodither_MASK 0xbfffffff /* bit 30 */ +# define MA_nodither_disable 0x0 +# define MA_nodither_enable 0x40000000 +# define MA_dit555_MASK 0x7fffffff /* bit 31 */ +# define MA_dit555_disable 0x0 +# define MA_dit555_enable 0x80000000 + +# define MCWS_casltncy_MASK 0xfffffff8 /* bits 0-2 */ +# define MCWS_casltncy_SHIFT 0 +# define MCWS_rrddelay_MASK 0xffffffcf /* bits 4-5 */ +# define MCWS_rcddelay_MASK 0xfffffe7f /* bits 7-8 */ +# define MCWS_rasmin_MASK 0xffffe3ff /* bits 10-12 */ +# define MCWS_rasmin_SHIFT 10 +# define MCWS_rpdelay_MASK 0xffff3fff /* bits 14-15 */ +# define MCWS_wrdelay_MASK 0xfff3ffff /* bits 18-19 */ +# define MCWS_rddelay_MASK 0xffdfffff /* bit 21 */ +# define MCWS_rddelay_disable 0x0 +# define MCWS_rddelay_enable 0x200000 +# define MCWS_smrdelay_MASK 0xfe7fffff /* bits 23-24 */ +# define MCWS_bwcdelay_MASK 0xf3ffffff /* bits 26-27 */ +# define MCWS_bpldelay_MASK 0x1fffffff /* bits 29-31 */ +# define MCWS_bpldelay_SHIFT 29 + +# define MRB_mclkbrd0_MASK 0xfffffff0 /* bits 0-3 */ +# define MRB_mclkbrd0_SHIFT 0 +# define MRB_mclkbrd1_MASK 0xfffffe1f /* bits 5-8 */ +# define MRB_mclkbrd1_SHIFT 5 +# define MRB_strmfctl_MASK 0xff3fffff /* bits 22-23 */ +# define MRB_mrsopcod_MASK 0xe1ffffff /* bits 25-28 */ +# define MRB_mrsopcod_SHIFT 25 + +# define OM_dmamod_MASK 0xfffffff3 /* bits 2-3 */ +# define OM_dmamod_general 0x0 /* val 0, shift 2 */ +# define OM_dmamod_blit 0x4 /* val 1, shift 2 */ +# define OM_dmamod_vector 0x8 /* val 2, shift 2 */ +# define OM_dmamod_vertex 0xc /* val 3, shift 2 */ +# define OM_dmadatasiz_MASK 0xfffffcff /* bits 8-9 */ +# define OM_dmadatasiz_8 0x0 /* val 0, shift 8 */ +# define OM_dmadatasiz_16 0x100 /* val 1, shift 8 */ +# define OM_dmadatasiz_32 0x200 /* val 2, shift 8 */ +# define OM_dirdatasiz_MASK 0xfffcffff /* bits 16-17 */ +# define OM_dirdatasiz_8 0x0 /* val 0, shift 16 */ +# define OM_dirdatasiz_16 0x10000 /* val 1, shift 16 */ +# define OM_dirdatasiz_32 0x20000 /* val 2, shift 16 */ + +# define P_iy_MASK 0xffffe000 /* bits 0-12 */ +# define P_iy_SHIFT 0 +# define P_ylin_MASK 0xffff7fff /* bit 15 */ +# define P_ylin_disable 0x0 +# define P_ylin_enable 0x8000 + +# define PDCA_primod_MASK 0xfffffffc /* bits 0-1 */ +# define PDCA_primod_general 0x0 /* val 0, shift 0 */ +# define PDCA_primod_blit 0x1 /* val 1, shift 0 */ +# define PDCA_primod_vector 0x2 /* val 2, shift 0 */ +# define PDCA_primod_vertex 0x3 /* val 3, shift 0 */ +# define PDCA_primaddress_MASK 0x3 /* bits 2-31 */ +# define PDCA_primaddress_SHIFT 2 + +# define PDEA_primnostart_MASK 0xfffffffe /* bit 0 */ +# define PDEA_primnostart_disable 0x0 +# define PDEA_primnostart_enable 0x1 +# define PDEA_pagpxfer_MASK 0xfffffffd /* bit 1 */ +# define PDEA_pagpxfer_disable 0x0 +# define PDEA_pagpxfer_enable 0x2 +# define PDEA_primend_MASK 0x3 /* bits 2-31 */ +# define PDEA_primend_SHIFT 2 + +# define PLS_primptren0_MASK 0xfffffffe /* bit 0 */ +# define PLS_primptren0_disable 0x0 +# define PLS_primptren0_enable 0x1 +# define PLS_primptren1_MASK 0xfffffffd /* bit 1 */ +# define PLS_primptren1_disable 0x0 +# define PLS_primptren1_enable 0x2 +# define PLS_primptr_MASK 0x7 /* bits 3-31 */ +# define PLS_primptr_SHIFT 3 + +# define R_softreset_MASK 0xfffffffe /* bit 0 */ +# define R_softreset_disable 0x0 +# define R_softreset_enable 0x1 +# define R_softextrst_MASK 0xfffffffd /* bit 1 */ +# define R_softextrst_disable 0x0 +# define R_softextrst_enable 0x2 + +# define SDCA_secmod_MASK 0xfffffffc /* bits 0-1 */ +# define SDCA_secmod_general 0x0 /* val 0, shift 0 */ +# define SDCA_secmod_blit 0x1 /* val 1, shift 0 */ +# define SDCA_secmod_vector 0x2 /* val 2, shift 0 */ +# define SDCA_secmod_vertex 0x3 /* val 3, shift 0 */ +# define SDCA_secaddress_MASK 0x3 /* bits 2-31 */ +# define SDCA_secaddress_SHIFT 2 + +# define SDEA_sagpxfer_MASK 0xfffffffd /* bit 1 */ +# define SDEA_sagpxfer_disable 0x0 +# define SDEA_sagpxfer_enable 0x2 +# define SDEA_secend_MASK 0x3 /* bits 2-31 */ +# define SDEA_secend_SHIFT 2 + +# define SETDCA_setupmod_MASK 0xfffffffc /* bits 0-1 */ +# define SETDCA_setupmod_vertlist 0x0 /* val 0, shift 0 */ +# define SETDCA_setupaddress_MASK 0x3 /* bits 2-31 */ +# define SETDCA_setupaddress_SHIFT 2 + +# define SETDEA_setupagpxfer_MASK 0xfffffffd /* bit 1 */ +# define SETDEA_setupagpxfer_disable 0x0 +# define SETDEA_setupagpxfer_enable 0x2 +# define SETDEA_setupend_MASK 0x3 /* bits 2-31 */ +# define SETDEA_setupend_SHIFT 2 + +# define S_sdydxl_MASK 0xfffffffe /* bit 0 */ +# define S_sdydxl_y 0x0 +# define S_sdydxl_x 0x1 +# define S_scanleft_MASK 0xfffffffe /* bit 0 */ +# define S_scanleft_disable 0x0 +# define S_scanleft_enable 0x1 +# define S_sdxl_MASK 0xfffffffd /* bit 1 */ +# define S_sdxl_pos 0x0 +# define S_sdxl_neg 0x2 +# define S_sdy_MASK 0xfffffffb /* bit 2 */ +# define S_sdy_pos 0x0 +# define S_sdy_neg 0x4 +# define S_sdxr_MASK 0xffffffdf /* bit 5 */ +# define S_sdxr_pos 0x0 +# define S_sdxr_neg 0x20 +# define S_brkleft_MASK 0xfffffeff /* bit 8 */ +# define S_brkleft_disable 0x0 +# define S_brkleft_enable 0x100 +# define S_errorinit_MASK 0x7fffffff /* bit 31 */ +# define S_errorinit_disable 0x0 +# define S_errorinit_enable 0x80000000 + +# define FSC_x_off_MASK 0xfffffff0 /* bits 0-3 */ +# define FSC_x_off_SHIFT 0 +# define FSC_funcnt_MASK 0xffffff80 /* bits 0-6 */ +# define FSC_funcnt_SHIFT 0 +# define FSC_y_off_MASK 0xffffff8f /* bits 4-6 */ +# define FSC_y_off_SHIFT 4 +# define FSC_funoff_MASK 0xffc0ffff /* bits 16-21 */ +# define FSC_funoff_SHIFT 16 +# define FSC_stylelen_MASK 0xffc0ffff /* bits 16-21 */ +# define FSC_stylelen_SHIFT 16 + + +# define STH_softraphand_MASK 0x3 /* bits 2-31 */ +# define STH_softraphand_SHIFT 2 + +# define SO_srcmap_MASK 0xfffffffe /* bit 0 */ +# define SO_srcmap_fb 0x0 +# define SO_srcmap_sys 0x1 +# define SO_srcacc_MASK 0xfffffffd /* bit 1 */ +# define SO_srcacc_pci 0x0 +# define SO_srcacc_agp 0x2 +# define SO_srcorg_MASK 0x7 /* bits 3-31 */ +# define SO_srcorg_SHIFT 3 + +# define STAT_softrapen_MASK 0xfffffffe /* bit 0 */ +# define STAT_softrapen_disable 0x0 +# define STAT_softrapen_enable 0x1 +# define STAT_pickpen_MASK 0xfffffffb /* bit 2 */ +# define STAT_pickpen_disable 0x0 +# define STAT_pickpen_enable 0x4 +# define STAT_vsyncsts_MASK 0xfffffff7 /* bit 3 */ +# define STAT_vsyncsts_disable 0x0 +# define STAT_vsyncsts_enable 0x8 +# define STAT_vsyncpen_MASK 0xffffffef /* bit 4 */ +# define STAT_vsyncpen_disable 0x0 +# define STAT_vsyncpen_enable 0x10 +# define STAT_vlinepen_MASK 0xffffffdf /* bit 5 */ +# define STAT_vlinepen_disable 0x0 +# define STAT_vlinepen_enable 0x20 +# define STAT_extpen_MASK 0xffffffbf /* bit 6 */ +# define STAT_extpen_disable 0x0 +# define STAT_extpen_enable 0x40 +# define STAT_wpen_MASK 0xffffff7f /* bit 7 */ +# define STAT_wpen_disable 0x0 +# define STAT_wpen_enable 0x80 +# define STAT_wcpen_MASK 0xfffffeff /* bit 8 */ +# define STAT_wcpen_disable 0x0 +# define STAT_wcpen_enable 0x100 +# define STAT_dwgengsts_MASK 0xfffeffff /* bit 16 */ +# define STAT_dwgengsts_disable 0x0 +# define STAT_dwgengsts_enable 0x10000 +# define STAT_endprdmasts_MASK 0xfffdffff /* bit 17 */ +# define STAT_endprdmasts_disable 0x0 +# define STAT_endprdmasts_enable 0x20000 +# define STAT_wbusy_MASK 0xfffbffff /* bit 18 */ +# define STAT_wbusy_disable 0x0 +# define STAT_wbusy_enable 0x40000 +# define STAT_swflag_MASK 0xfffffff /* bits 28-31 */ +# define STAT_swflag_SHIFT 28 + +# define S_sref_MASK 0xffffff00 /* bits 0-7 */ +# define S_sref_SHIFT 0 +# define S_smsk_MASK 0xffff00ff /* bits 8-15 */ +# define S_smsk_SHIFT 8 +# define S_swtmsk_MASK 0xff00ffff /* bits 16-23 */ +# define S_swtmsk_SHIFT 16 + +# define SC_smode_MASK 0xfffffff8 /* bits 0-2 */ +# define SC_smode_salways 0x0 /* val 0, shift 0 */ +# define SC_smode_snever 0x1 /* val 1, shift 0 */ +# define SC_smode_se 0x2 /* val 2, shift 0 */ +# define SC_smode_sne 0x3 /* val 3, shift 0 */ +# define SC_smode_slt 0x4 /* val 4, shift 0 */ +# define SC_smode_slte 0x5 /* val 5, shift 0 */ +# define SC_smode_sgt 0x6 /* val 6, shift 0 */ +# define SC_smode_sgte 0x7 /* val 7, shift 0 */ +# define SC_sfailop_MASK 0xffffffc7 /* bits 3-5 */ +# define SC_sfailop_keep 0x0 /* val 0, shift 3 */ +# define SC_sfailop_zero 0x8 /* val 1, shift 3 */ +# define SC_sfailop_replace 0x10 /* val 2, shift 3 */ +# define SC_sfailop_incrsat 0x18 /* val 3, shift 3 */ +# define SC_sfailop_decrsat 0x20 /* val 4, shift 3 */ +# define SC_sfailop_invert 0x28 /* val 5, shift 3 */ +# define SC_sfailop_incr 0x30 /* val 6, shift 3 */ +# define SC_sfailop_decr 0x38 /* val 7, shift 3 */ +# define SC_szfailop_MASK 0xfffffe3f /* bits 6-8 */ +# define SC_szfailop_keep 0x0 /* val 0, shift 6 */ +# define SC_szfailop_zero 0x40 /* val 1, shift 6 */ +# define SC_szfailop_replace 0x80 /* val 2, shift 6 */ +# define SC_szfailop_incrsat 0xc0 /* val 3, shift 6 */ +# define SC_szfailop_decrsat 0x100 /* val 4, shift 6 */ +# define SC_szfailop_invert 0x140 /* val 5, shift 6 */ +# define SC_szfailop_incr 0x180 /* val 6, shift 6 */ +# define SC_szfailop_decr 0x1c0 /* val 7, shift 6 */ +# define SC_szpassop_MASK 0xfffff1ff /* bits 9-11 */ +# define SC_szpassop_keep 0x0 /* val 0, shift 9 */ +# define SC_szpassop_zero 0x200 /* val 1, shift 9 */ +# define SC_szpassop_replace 0x400 /* val 2, shift 9 */ +# define SC_szpassop_incrsat 0x600 /* val 3, shift 9 */ +# define SC_szpassop_decrsat 0x800 /* val 4, shift 9 */ +# define SC_szpassop_invert 0xa00 /* val 5, shift 9 */ +# define SC_szpassop_incr 0xc00 /* val 6, shift 9 */ +# define SC_szpassop_decr 0xe00 /* val 7, shift 9 */ + +# define TD1_color1arg2selMASK 0xfffffffc /* bits 0-1 */ +# define TD1_color1alphaselMASK 0xffffffe3 /* bits 2-4 */ +# define TD1_color1alphaselSHIFT 2 +# define TD1_color1arg1alphaMASK 0xffffffdf /* bit 5 */ +# define TD1_color1arg1alphadisable 0x0 +# define TD1_color1arg1alphaenable 0x20 +# define TD1_color1arg1invMASK 0xffffffbf /* bit 6 */ +# define TD1_color1arg1invdisable 0x0 +# define TD1_color1arg1invenable 0x40 +# define TD1_color1arg2alphaMASK 0xffffff7f /* bit 7 */ +# define TD1_color1arg2alphadisable 0x0 +# define TD1_color1arg2alphaenable 0x80 +# define TD1_color1arg2invMASK 0xfffffeff /* bit 8 */ +# define TD1_color1arg2invdisable 0x0 +# define TD1_color1arg2invenable 0x100 +# define TD1_color1alpha1invMASK 0xfffffdff /* bit 9 */ +# define TD1_color1alpha1invdisable 0x0 +# define TD1_color1alpha1invenable 0x200 +# define TD1_color1alpha2invMASK 0xfffffbff /* bit 10 */ +# define TD1_color1alpha2invdisable 0x0 +# define TD1_color1alpha2invenable 0x400 +# define TD1_color1selMASK 0xff9fffff /* bits 21-22 */ +# define TD1_color1selarg1 0x0 /* val 0, shift 21 */ +# define TD1_color1selarg2 0x200000 /* val 1, shift 21 */ +# define TD1_color1seladd 0x400000 /* val 2, shift 21 */ +# define TD1_color1selmul 0x600000 /* val 3, shift 21 */ +# define TD1_alpha1selMASK 0x3fffffff /* bits 30-31 */ +# define TD1_alpha1selarg1 0x0 /* val 0, shift 30 */ +# define TD1_alpha1selarg2 0x40000000 /* val 1, shift 30 */ +# define TD1_alpha1seladd 0x80000000 /* val 2, shift 30 */ +# define TD1_alpha1selmul 0xc0000000 /* val 3, shift 30 */ + +# define TST_ramtsten_MASK 0xfffffffe /* bit 0 */ +# define TST_ramtsten_disable 0x0 +# define TST_ramtsten_enable 0x1 +# define TST_ramtstdone_MASK 0xfffffffd /* bit 1 */ +# define TST_ramtstdone_disable 0x0 +# define TST_ramtstdone_enable 0x2 +# define TST_wramtstpass_MASK 0xfffffffb /* bit 2 */ +# define TST_wramtstpass_disable 0x0 +# define TST_wramtstpass_enable 0x4 +# define TST_tcachetstpass_MASK 0xfffffff7 /* bit 3 */ +# define TST_tcachetstpass_disable 0x0 +# define TST_tcachetstpass_enable 0x8 +# define TST_tluttstpass_MASK 0xffffffef /* bit 4 */ +# define TST_tluttstpass_disable 0x0 +# define TST_tluttstpass_enable 0x10 +# define TST_luttstpass_MASK 0xffffffdf /* bit 5 */ +# define TST_luttstpass_disable 0x0 +# define TST_luttstpass_enable 0x20 +# define TST_besramtstpass_MASK 0xffffffbf /* bit 6 */ +# define TST_besramtstpass_disable 0x0 +# define TST_besramtstpass_enable 0x40 +# define TST_ringen_MASK 0xfffffeff /* bit 8 */ +# define TST_ringen_disable 0x0 +# define TST_ringen_enable 0x100 +# define TST_apllbyp_MASK 0xfffffdff /* bit 9 */ +# define TST_apllbyp_disable 0x0 +# define TST_apllbyp_enable 0x200 +# define TST_hiten_MASK 0xfffffbff /* bit 10 */ +# define TST_hiten_disable 0x0 +# define TST_hiten_enable 0x400 +# define TST_tmode_MASK 0xffffc7ff /* bits 11-13 */ +# define TST_tmode_SHIFT 11 +# define TST_tclksel_MASK 0xfffe3fff /* bits 14-16 */ +# define TST_tclksel_SHIFT 14 +# define TST_ringcnten_MASK 0xfffdffff /* bit 17 */ +# define TST_ringcnten_disable 0x0 +# define TST_ringcnten_enable 0x20000 +# define TST_ringcnt_MASK 0xc003ffff /* bits 18-29 */ +# define TST_ringcnt_SHIFT 18 +# define TST_ringcntclksl_MASK 0xbfffffff /* bit 30 */ +# define TST_ringcntclksl_disable 0x0 +# define TST_ringcntclksl_enable 0x40000000 +# define TST_biosboot_MASK 0x7fffffff /* bit 31 */ +# define TST_biosboot_disable 0x0 +# define TST_biosboot_enable 0x80000000 + +# define TMC_tformat_MASK 0xfffffff0 /* bits 0-3 */ +# define TMC_tformat_tw4 0x0 /* val 0, shift 0 */ +# define TMC_tformat_tw8 0x1 /* val 1, shift 0 */ +# define TMC_tformat_tw15 0x2 /* val 2, shift 0 */ +# define TMC_tformat_tw16 0x3 /* val 3, shift 0 */ +# define TMC_tformat_tw12 0x4 /* val 4, shift 0 */ +# define TMC_tformat_tw32 0x6 /* val 6, shift 0 */ +# define TMC_tformat_tw422 0xa /* val 10, shift 0 */ +# define TMC_tpitchlin_MASK 0xfffffeff /* bit 8 */ +# define TMC_tpitchlin_disable 0x0 +# define TMC_tpitchlin_enable 0x100 +# define TMC_tpitchext_MASK 0xfff001ff /* bits 9-19 */ +# define TMC_tpitchext_SHIFT 9 +# define TMC_tpitch_MASK 0xfff8ffff /* bits 16-18 */ +# define TMC_tpitch_SHIFT 16 +# define TMC_owalpha_MASK 0xffbfffff /* bit 22 */ +# define TMC_owalpha_disable 0x0 +# define TMC_owalpha_enable 0x400000 +# define TMC_azeroextend_MASK 0xff7fffff /* bit 23 */ +# define TMC_azeroextend_disable 0x0 +# define TMC_azeroextend_enable 0x800000 +# define TMC_decalckey_MASK 0xfeffffff /* bit 24 */ +# define TMC_decalckey_disable 0x0 +# define TMC_decalckey_enable 0x1000000 +# define TMC_takey_MASK 0xfdffffff /* bit 25 */ +# define TMC_takey_0 0x0 +# define TMC_takey_1 0x2000000 +# define TMC_tamask_MASK 0xfbffffff /* bit 26 */ +# define TMC_tamask_0 0x0 +# define TMC_tamask_1 0x4000000 +# define TMC_clampv_MASK 0xf7ffffff /* bit 27 */ +# define TMC_clampv_disable 0x0 +# define TMC_clampv_enable 0x8000000 +# define TMC_clampu_MASK 0xefffffff /* bit 28 */ +# define TMC_clampu_disable 0x0 +# define TMC_clampu_enable 0x10000000 +# define TMC_tmodulate_MASK 0xdfffffff /* bit 29 */ +# define TMC_tmodulate_disable 0x0 +# define TMC_tmodulate_enable 0x20000000 +# define TMC_strans_MASK 0xbfffffff /* bit 30 */ +# define TMC_strans_disable 0x0 +# define TMC_strans_enable 0x40000000 +# define TMC_itrans_MASK 0x7fffffff /* bit 31 */ +# define TMC_itrans_disable 0x0 +# define TMC_itrans_enable 0x80000000 + +# define TMC_decalblend_MASK 0xfffffffe /* bit 0 */ +# define TMC_decalblend_disable 0x0 +# define TMC_decalblend_enable 0x1 +# define TMC_idecal_MASK 0xfffffffd /* bit 1 */ +# define TMC_idecal_disable 0x0 +# define TMC_idecal_enable 0x2 +# define TMC_decaldis_MASK 0xfffffffb /* bit 2 */ +# define TMC_decaldis_disable 0x0 +# define TMC_decaldis_enable 0x4 +# define TMC_ckstransdis_MASK 0xffffffef /* bit 4 */ +# define TMC_ckstransdis_disable 0x0 +# define TMC_ckstransdis_enable 0x10 +# define TMC_borderen_MASK 0xffffffdf /* bit 5 */ +# define TMC_borderen_disable 0x0 +# define TMC_borderen_enable 0x20 +# define TMC_specen_MASK 0xffffffbf /* bit 6 */ +# define TMC_specen_disable 0x0 +# define TMC_specen_enable 0x40 + +# define TF_minfilter_MASK 0xfffffff0 /* bits 0-3 */ +# define TF_minfilter_nrst 0x0 /* val 0, shift 0 */ +# define TF_minfilter_bilin 0x2 /* val 2, shift 0 */ +# define TF_minfilter_cnst 0x3 /* val 3, shift 0 */ +# define TF_minfilter_mm1s 0x8 /* val 8, shift 0 */ +# define TF_minfilter_mm2s 0x9 /* val 9, shift 0 */ +# define TF_minfilter_mm4s 0xa /* val 10, shift 0 */ +# define TF_minfilter_mm8s 0xc /* val 12, shift 0 */ +# define TF_magfilter_MASK 0xffffff0f /* bits 4-7 */ +# define TF_magfilter_nrst 0x0 /* val 0, shift 4 */ +# define TF_magfilter_bilin 0x20 /* val 2, shift 4 */ +# define TF_magfilter_cnst 0x30 /* val 3, shift 4 */ +# define TF_avgstride_MASK 0xfff7ffff /* bit 19 */ +# define TF_avgstride_disable 0x0 +# define TF_avgstride_enable 0x80000 +# define TF_filteralpha_MASK 0xffefffff /* bit 20 */ +# define TF_filteralpha_disable 0x0 +# define TF_filteralpha_enable 0x100000 +# define TF_fthres_MASK 0xe01fffff /* bits 21-28 */ +# define TF_fthres_SHIFT 21 +# define TF_mapnb_MASK 0x1fffffff /* bits 29-31 */ +# define TF_mapnb_SHIFT 29 + +# define TH_th_MASK 0xffffffc0 /* bits 0-5 */ +# define TH_th_SHIFT 0 +# define TH_rfh_MASK 0xffff81ff /* bits 9-14 */ +# define TH_rfh_SHIFT 9 +# define TH_thmask_MASK 0xe003ffff /* bits 18-28 */ +# define TH_thmask_SHIFT 18 + +# define TO_texorgmap_MASK 0xfffffffe /* bit 0 */ +# define TO_texorgmap_fb 0x0 +# define TO_texorgmap_sys 0x1 +# define TO_texorgacc_MASK 0xfffffffd /* bit 1 */ +# define TO_texorgacc_pci 0x0 +# define TO_texorgacc_agp 0x2 +# define TO_texorg_MASK 0x1f /* bits 5-31 */ +# define TO_texorg_SHIFT 5 + +# define TT_tckey_MASK 0xffff0000 /* bits 0-15 */ +# define TT_tckey_SHIFT 0 +# define TT_tkmask_MASK 0xffff /* bits 16-31 */ +# define TT_tkmask_SHIFT 16 + +# define TT_tckeyh_MASK 0xffff0000 /* bits 0-15 */ +# define TT_tckeyh_SHIFT 0 +# define TT_tkmaskh_MASK 0xffff /* bits 16-31 */ +# define TT_tkmaskh_SHIFT 16 + +# define TW_tw_MASK 0xffffffc0 /* bits 0-5 */ +# define TW_tw_SHIFT 0 +# define TW_rfw_MASK 0xffff81ff /* bits 9-14 */ +# define TW_rfw_SHIFT 9 +# define TW_twmask_MASK 0xe003ffff /* bits 18-28 */ +# define TW_twmask_SHIFT 18 + +# define WAS_seqdst0_MASK 0xffffffc0 /* bits 0-5 */ +# define WAS_seqdst0_SHIFT 0 +# define WAS_seqdst1_MASK 0xfffff03f /* bits 6-11 */ +# define WAS_seqdst1_SHIFT 6 +# define WAS_seqdst2_MASK 0xfffc0fff /* bits 12-17 */ +# define WAS_seqdst2_SHIFT 12 +# define WAS_seqdst3_MASK 0xff03ffff /* bits 18-23 */ +# define WAS_seqdst3_SHIFT 18 +# define WAS_seqlen_MASK 0xfcffffff /* bits 24-25 */ +# define WAS_wfirsttag_MASK 0xfbffffff /* bit 26 */ +# define WAS_wfirsttag_disable 0x0 +# define WAS_wfirsttag_enable 0x4000000 +# define WAS_wsametag_MASK 0xf7ffffff /* bit 27 */ +# define WAS_wsametag_disable 0x0 +# define WAS_wsametag_enable 0x8000000 +# define WAS_seqoff_MASK 0xefffffff /* bit 28 */ +# define WAS_seqoff_disable 0x0 +# define WAS_seqoff_enable 0x10000000 + +# define WMA_wcodeaddr_MASK 0xff /* bits 8-31 */ +# define WMA_wcodeaddr_SHIFT 8 + +# define WF_walustsflag_MASK 0xffffff00 /* bits 0-7 */ +# define WF_walustsflag_SHIFT 0 +# define WF_walucfgflag_MASK 0xffff00ff /* bits 8-15 */ +# define WF_walucfgflag_SHIFT 8 +# define WF_wprgflag_MASK 0xffff /* bits 16-31 */ +# define WF_wprgflag_SHIFT 16 + +# define WF1_walustsflag1_MASK 0xffffff00 /* bits 0-7 */ +# define WF1_walustsflag1_SHIFT 0 +# define WF1_walucfgflag1_MASK 0xffff00ff /* bits 8-15 */ +# define WF1_walucfgflag1_SHIFT 8 +# define WF1_wprgflag1_MASK 0xffff /* bits 16-31 */ +# define WF1_wprgflag1_SHIFT 16 + +# define WGV_wgetmsbmin_MASK 0xffffffe0 /* bits 0-4 */ +# define WGV_wgetmsbmin_SHIFT 0 +# define WGV_wgetmsbmax_MASK 0xffffe0ff /* bits 8-12 */ +# define WGV_wgetmsbmax_SHIFT 8 +# define WGV_wbrklefttop_MASK 0xfffeffff /* bit 16 */ +# define WGV_wbrklefttop_disable 0x0 +# define WGV_wbrklefttop_enable 0x10000 +# define WGV_wfastcrop_MASK 0xfffdffff /* bit 17 */ +# define WGV_wfastcrop_disable 0x0 +# define WGV_wfastcrop_enable 0x20000 +# define WGV_wcentersnap_MASK 0xfffbffff /* bit 18 */ +# define WGV_wcentersnap_disable 0x0 +# define WGV_wcentersnap_enable 0x40000 +# define WGV_wbrkrighttop_MASK 0xfff7ffff /* bit 19 */ +# define WGV_wbrkrighttop_disable 0x0 +# define WGV_wbrkrighttop_enable 0x80000 + +# define WIA_wmode_MASK 0xfffffffc /* bits 0-1 */ +# define WIA_wmode_suspend 0x0 /* val 0, shift 0 */ +# define WIA_wmode_resume 0x1 /* val 1, shift 0 */ +# define WIA_wmode_jump 0x2 /* val 2, shift 0 */ +# define WIA_wmode_start 0x3 /* val 3, shift 0 */ +# define WIA_wagp_MASK 0xfffffffb /* bit 2 */ +# define WIA_wagp_pci 0x0 +# define WIA_wagp_agp 0x4 +# define WIA_wiaddr_MASK 0x7 /* bits 3-31 */ +# define WIA_wiaddr_SHIFT 3 + +# define WIA2_wmode_MASK 0xfffffffc /* bits 0-1 */ +# define WIA2_wmode_suspend 0x0 /* val 0, shift 0 */ +# define WIA2_wmode_resume 0x1 /* val 1, shift 0 */ +# define WIA2_wmode_jump 0x2 /* val 2, shift 0 */ +# define WIA2_wmode_start 0x3 /* val 3, shift 0 */ +# define WIA2_wagp_MASK 0xfffffffb /* bit 2 */ +# define WIA2_wagp_pci 0x0 +# define WIA2_wagp_agp 0x4 +# define WIA2_wiaddr_MASK 0x7 /* bits 3-31 */ +# define WIA2_wiaddr_SHIFT 3 + +# define WIMA_wimemaddr_MASK 0xffffff00 /* bits 0-7 */ +# define WIMA_wimemaddr_SHIFT 0 + +# define WM_wucodecache_MASK 0xfffffffe /* bit 0 */ +# define WM_wucodecache_disable 0x0 +# define WM_wucodecache_enable 0x1 +# define WM_wmaster_MASK 0xfffffffd /* bit 1 */ +# define WM_wmaster_disable 0x0 +# define WM_wmaster_enable 0x2 +# define WM_wcacheflush_MASK 0xfffffff7 /* bit 3 */ +# define WM_wcacheflush_disable 0x0 +# define WM_wcacheflush_enable 0x8 + +# define WVS_wvrtxsz_MASK 0xffffffc0 /* bits 0-5 */ +# define WVS_wvrtxsz_SHIFT 0 +# define WVS_primsz_MASK 0xffffc0ff /* bits 8-13 */ +# define WVS_primsz_SHIFT 8 + +# define XYEA_x_end_MASK 0xffff0000 /* bits 0-15 */ +# define XYEA_x_end_SHIFT 0 +# define XYEA_y_end_MASK 0xffff /* bits 16-31 */ +# define XYEA_y_end_SHIFT 16 + +# define XYSA_x_start_MASK 0xffff0000 /* bits 0-15 */ +# define XYSA_x_start_SHIFT 0 +# define XYSA_y_start_MASK 0xffff /* bits 16-31 */ +# define XYSA_y_start_SHIFT 16 + +# define YA_ydst_MASK 0xff800000 /* bits 0-22 */ +# define YA_ydst_SHIFT 0 +# define YA_sellin_MASK 0x1fffffff /* bits 29-31 */ +# define YA_sellin_SHIFT 29 + +# define YDL_length_MASK 0xffff0000 /* bits 0-15 */ +# define YDL_length_SHIFT 0 +# define YDL_yval_MASK 0xffff /* bits 16-31 */ +# define YDL_yval_SHIFT 16 + +# define ZO_zorgmap_MASK 0xfffffffe /* bit 0 */ +# define ZO_zorgmap_fb 0x0 +# define ZO_zorgmap_sys 0x1 +# define ZO_zorgacc_MASK 0xfffffffd /* bit 1 */ +# define ZO_zorgacc_pci 0x0 +# define ZO_zorgacc_agp 0x2 +# define ZO_zorg_MASK 0x3 /* bits 2-31 */ +# define ZO_zorg_SHIFT 2 + + + + +/**************** (END) AUTOMATICLY GENERATED REGISTER FILE ******************/ + +#endif /* _MGAREGS_H_ */ + |