Merge libdrm 2.4.67

1 files changed, 93 insertions, 24 deletions

diff --git a/lib/libdrm/intel/intel_chipset.h b/lib/libdrm/intel/intel_chipset.h
index 253ea7105..35148e522 100644
--- a/lib/libdrm/intel/intel_chipset.h
+++ b/lib/libdrm/intel/intel_chipset.h
@@ -165,21 +165,50 @@
 #define PCI_CHIP_CHERRYVIEW_2		0x22b2
 #define PCI_CHIP_CHERRYVIEW_3		0x22b3
 
-#define PCI_CHIP_SKYLAKE_ULT_GT2	0x1916
+#define PCI_CHIP_SKYLAKE_DT_GT1		0x1902
 #define PCI_CHIP_SKYLAKE_ULT_GT1	0x1906
-#define PCI_CHIP_SKYLAKE_ULT_GT3	0x1926
-#define PCI_CHIP_SKYLAKE_ULT_GT2F	0x1921
-#define PCI_CHIP_SKYLAKE_ULX_GT1	0x190E
-#define PCI_CHIP_SKYLAKE_ULX_GT2	0x191E
+#define PCI_CHIP_SKYLAKE_SRV_GT1	0x190A /* Reserved */
+#define PCI_CHIP_SKYLAKE_ULX_GT1	0x190E /* Reserved */
 #define PCI_CHIP_SKYLAKE_DT_GT2		0x1912
-#define PCI_CHIP_SKYLAKE_DT_GT1		0x1902
+#define PCI_CHIP_SKYLAKE_FUSED0_GT2	0x1913 /* Reserved */
+#define PCI_CHIP_SKYLAKE_FUSED1_GT2	0x1915 /* Reserved */
+#define PCI_CHIP_SKYLAKE_ULT_GT2	0x1916
+#define PCI_CHIP_SKYLAKE_FUSED2_GT2	0x1917 /* Reserved */
+#define PCI_CHIP_SKYLAKE_SRV_GT2	0x191A /* Reserved */
 #define PCI_CHIP_SKYLAKE_HALO_GT2	0x191B
-#define PCI_CHIP_SKYLAKE_HALO_GT3	0x192B
-#define PCI_CHIP_SKYLAKE_HALO_GT1 	0x190B
-#define PCI_CHIP_SKYLAKE_SRV_GT2	0x191A
-#define PCI_CHIP_SKYLAKE_SRV_GT3	0x192A
-#define PCI_CHIP_SKYLAKE_SRV_GT1	0x190A
 #define PCI_CHIP_SKYLAKE_WKS_GT2 	0x191D
+#define PCI_CHIP_SKYLAKE_ULX_GT2	0x191E
+#define PCI_CHIP_SKYLAKE_MOBILE_GT2	0x1921 /* Reserved */
+#define PCI_CHIP_SKYLAKE_GT3		0x1926
+#define PCI_CHIP_SKYLAKE_HALO_GT3	0x192B /* Reserved */
+#define PCI_CHIP_SKYLAKE_SRV_GT4	0x192A
+#define PCI_CHIP_SKYLAKE_DT_GT4		0x1932
+#define PCI_CHIP_SKYLAKE_SRV_GT4X	0x193A
+#define PCI_CHIP_SKYLAKE_H_GT4		0x193B
+#define PCI_CHIP_SKYLAKE_WKS_GT4	0x193D
+
+#define PCI_CHIP_KABYLAKE_ULT_GT2	0x5916
+#define PCI_CHIP_KABYLAKE_ULT_GT1_5	0x5913
+#define PCI_CHIP_KABYLAKE_ULT_GT1	0x5906
+#define PCI_CHIP_KABYLAKE_ULT_GT3	0x5926
+#define PCI_CHIP_KABYLAKE_ULT_GT2F	0x5921
+#define PCI_CHIP_KABYLAKE_ULX_GT1_5	0x5915
+#define PCI_CHIP_KABYLAKE_ULX_GT1	0x590E
+#define PCI_CHIP_KABYLAKE_ULX_GT2	0x591E
+#define PCI_CHIP_KABYLAKE_DT_GT2	0x5912
+#define PCI_CHIP_KABYLAKE_DT_GT1_5	0x5917
+#define PCI_CHIP_KABYLAKE_DT_GT1	0x5902
+#define PCI_CHIP_KABYLAKE_DT_GT4	0x5932
+#define PCI_CHIP_KABYLAKE_HALO_GT2	0x591B
+#define PCI_CHIP_KABYLAKE_HALO_GT4	0x593B
+#define PCI_CHIP_KABYLAKE_HALO_GT3	0x592B
+#define PCI_CHIP_KABYLAKE_HALO_GT1	0x590B
+#define PCI_CHIP_KABYLAKE_SRV_GT2	0x591A
+#define PCI_CHIP_KABYLAKE_SRV_GT3	0x592A
+#define PCI_CHIP_KABYLAKE_SRV_GT1	0x590A
+#define PCI_CHIP_KABYLAKE_SRV_GT4	0x593A
+#define PCI_CHIP_KABYLAKE_WKS_GT2	0x591D
+#define PCI_CHIP_KABYLAKE_WKS_GT4	0x593D
 
 #define PCI_CHIP_BROXTON_0		0x0A84
 #define PCI_CHIP_BROXTON_1		0x1A84
@@ -347,31 +376,71 @@
 #define IS_SKL_GT1(devid)	((devid) == PCI_CHIP_SKYLAKE_ULT_GT1	|| \
 				 (devid) == PCI_CHIP_SKYLAKE_ULX_GT1	|| \
 				 (devid) == PCI_CHIP_SKYLAKE_DT_GT1	|| \
-				 (devid) == PCI_CHIP_SKYLAKE_HALO_GT1	|| \
 				 (devid) == PCI_CHIP_SKYLAKE_SRV_GT1)
 
-#define IS_SKL_GT2(devid)	((devid) == PCI_CHIP_SKYLAKE_ULT_GT2	|| \
-				 (devid) == PCI_CHIP_SKYLAKE_ULT_GT2F	|| \
-				 (devid) == PCI_CHIP_SKYLAKE_ULX_GT2	|| \
-				 (devid) == PCI_CHIP_SKYLAKE_DT_GT2	|| \
-				 (devid) == PCI_CHIP_SKYLAKE_HALO_GT2	|| \
+#define IS_SKL_GT2(devid)	((devid) == PCI_CHIP_SKYLAKE_DT_GT2	|| \
+				 (devid) == PCI_CHIP_SKYLAKE_FUSED0_GT2	|| \
+				 (devid) == PCI_CHIP_SKYLAKE_FUSED1_GT2	|| \
+				 (devid) == PCI_CHIP_SKYLAKE_ULT_GT2	|| \
+				 (devid) == PCI_CHIP_SKYLAKE_FUSED2_GT2	|| \
 				 (devid) == PCI_CHIP_SKYLAKE_SRV_GT2	|| \
-				 (devid) == PCI_CHIP_SKYLAKE_WKS_GT2)
-
-#define IS_SKL_GT3(devid)	((devid) == PCI_CHIP_SKYLAKE_ULT_GT3	|| \
-				 (devid) == PCI_CHIP_SKYLAKE_HALO_GT3	|| \
-				 (devid) == PCI_CHIP_SKYLAKE_SRV_GT3)
+				 (devid) == PCI_CHIP_SKYLAKE_HALO_GT2	|| \
+				 (devid) == PCI_CHIP_SKYLAKE_WKS_GT2	|| \
+				 (devid) == PCI_CHIP_SKYLAKE_ULX_GT2	|| \
+				 (devid) == PCI_CHIP_SKYLAKE_MOBILE_GT2)
+
+#define IS_SKL_GT3(devid)	((devid) == PCI_CHIP_SKYLAKE_GT3	|| \
+				 (devid) == PCI_CHIP_SKYLAKE_HALO_GT3)
+
+#define IS_SKL_GT4(devid)	((devid) == PCI_CHIP_SKYLAKE_SRV_GT4	|| \
+				 (devid) == PCI_CHIP_SKYLAKE_DT_GT4	|| \
+				 (devid) == PCI_CHIP_SKYLAKE_SRV_GT4X	|| \
+				 (devid) == PCI_CHIP_SKYLAKE_H_GT4	|| \
+				 (devid) == PCI_CHIP_SKYLAKE_WKS_GT4)
+
+#define IS_KBL_GT1(devid)	((devid) == PCI_CHIP_KABYLAKE_ULT_GT1_5	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_ULX_GT1_5	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_DT_GT1_5	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_ULT_GT1	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_ULX_GT1	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_DT_GT1	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT1	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_SRV_GT1)
+
+#define IS_KBL_GT2(devid)	((devid) == PCI_CHIP_KABYLAKE_ULT_GT2	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_ULT_GT2F	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_ULX_GT2	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_DT_GT2	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT2	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_SRV_GT2	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_WKS_GT2)
+
+#define IS_KBL_GT3(devid)	((devid) == PCI_CHIP_KABYLAKE_ULT_GT3	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT3	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_SRV_GT3)
+
+#define IS_KBL_GT4(devid)	((devid) == PCI_CHIP_KABYLAKE_DT_GT4	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT4	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_SRV_GT4	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_WKS_GT4)
+
+#define IS_KABYLAKE(devid)	(IS_KBL_GT1(devid) || \
+				 IS_KBL_GT2(devid) || \
+				 IS_KBL_GT3(devid) || \
+				 IS_KBL_GT4(devid))
 
 #define IS_SKYLAKE(devid)	(IS_SKL_GT1(devid) || \
 				 IS_SKL_GT2(devid) || \
-				 IS_SKL_GT3(devid))
+				 IS_SKL_GT3(devid) || \
+				 IS_SKL_GT4(devid))
 
 #define IS_BROXTON(devid)	((devid) == PCI_CHIP_BROXTON_0	|| \
 				 (devid) == PCI_CHIP_BROXTON_1	|| \
 				 (devid) == PCI_CHIP_BROXTON_2)
 
 #define IS_GEN9(devid)		(IS_SKYLAKE(devid) || \
-				 IS_BROXTON(devid))
+				 IS_BROXTON(devid) || \
+				 IS_KABYLAKE(devid))
 
 #define IS_9XX(dev)		(IS_GEN3(dev) || \
 				 IS_GEN4(dev) || \