Merge libdrm 2.4.71

7 files changed, 68 insertions, 71 deletions

diff --git a/lib/libdrm/intel/Android.mk b/lib/libdrm/intel/Android.mk
deleted file mode 100644
index 6582dfdee..000000000
--- a/lib/libdrm/intel/Android.mk
+++ /dev/null
@@ -1,43 +0,0 @@
-#
-# Copyright © 2011 Intel Corporation
-#
-# Permission is hereby granted, free of charge, to any person obtaining a
-# copy of this software and associated documentation files (the "Software"),
-# to deal in the Software without restriction, including without limitation
-# the rights to use, copy, modify, merge, publish, distribute, sublicense,
-# and/or sell copies of the Software, and to permit persons to whom the
-# Software is furnished to do so, subject to the following conditions:
-#
-# The above copyright notice and this permission notice (including the next
-# paragraph) shall be included in all copies or substantial portions of the
-# Software.
-#
-# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
-# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
-# IN THE SOFTWARE.
-#
-
-LOCAL_PATH := $(call my-dir)
-include $(CLEAR_VARS)
-
-# Import variables LIBDRM_INTEL_FILES, LIBDRM_INTEL_H_FILES
-include $(LOCAL_PATH)/Makefile.sources
-
-LOCAL_MODULE := libdrm_intel
-LOCAL_MODULE_TAGS := optional
-
-LOCAL_SRC_FILES := $(LIBDRM_INTEL_FILES)
-LOCAL_EXPORT_C_INCLUDE_DIRS := $(LOCAL_PATH)
-
-LOCAL_CFLAGS := \
-	-DHAVE_LIBDRM_ATOMIC_PRIMITIVES=1
-
-LOCAL_SHARED_LIBRARIES := \
-	libdrm \
-	libpciaccess
-
-include $(BUILD_SHARED_LIBRARY)
diff --git a/lib/libdrm/intel/Makefile.in b/lib/libdrm/intel/Makefile.in
index 2eafa5793..ee5629aad 100644
--- a/lib/libdrm/intel/Makefile.in
+++ b/lib/libdrm/intel/Makefile.in
@@ -394,7 +394,6 @@ EXTRA_DIST = \
 	$(BATCHES:.batch=.batch-ref.txt) \
 	$(BATCHES:.batch=.batch-ref.txt) \
 	tests/test-batch.sh \
-	Android.mk \
 	$(TESTS)
 
 test_decode_LDADD = libdrm_intel.la ../libdrm.la
diff --git a/lib/libdrm/intel/intel_bufmgr.h b/lib/libdrm/intel/intel_bufmgr.h
index a1abbcd2b..96a4d9d3e 100644
--- a/lib/libdrm/intel/intel_bufmgr.h
+++ b/lib/libdrm/intel/intel_bufmgr.h
@@ -273,6 +273,9 @@ int drm_intel_get_reset_stats(drm_intel_context *ctx,
 int drm_intel_get_subslice_total(int fd, unsigned int *subslice_total);
 int drm_intel_get_eu_total(int fd, unsigned int *eu_total);
 
+int drm_intel_get_pooled_eu(int fd);
+int drm_intel_get_min_eu_in_pool(int fd);
+
 /** @{ Compatibility defines to keep old code building despite the symbol rename
  * from dri_* to drm_intel_*
  */
diff --git a/lib/libdrm/intel/intel_bufmgr_fake.c b/lib/libdrm/intel/intel_bufmgr_fake.c
index 7f4c7b9fa..24b3732aa 100644
--- a/lib/libdrm/intel/intel_bufmgr_fake.c
+++ b/lib/libdrm/intel/intel_bufmgr_fake.c
@@ -312,7 +312,7 @@ _fence_wait_internal(drm_intel_bufmgr_fake *bufmgr_fake, int seq)
 	 *
 	 * Assume that in userland we treat sequence numbers as ints, which
 	 * makes some of the comparisons convenient, since the sequence
-	 * numbers are all postive signed integers.
+	 * numbers are all positive signed integers.
 	 *
 	 * From this we get several cases we need to handle.  Here's a timeline.
 	 * 0x2   0x7                                    0x7ffffff8   0x7ffffffd
diff --git a/lib/libdrm/intel/intel_bufmgr_gem.c b/lib/libdrm/intel/intel_bufmgr_gem.c
index 93261ce97..ffb9ff3c6 100644
--- a/lib/libdrm/intel/intel_bufmgr_gem.c
+++ b/lib/libdrm/intel/intel_bufmgr_gem.c
@@ -3251,6 +3251,36 @@ drm_intel_get_eu_total(int fd, unsigned int *eu_total)
 	return 0;
 }
 
+int
+drm_intel_get_pooled_eu(int fd)
+{
+	drm_i915_getparam_t gp;
+	int ret = -1;
+
+	memclear(gp);
+	gp.param = I915_PARAM_HAS_POOLED_EU;
+	gp.value = &ret;
+	if (drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp))
+		return -errno;
+
+	return ret;
+}
+
+int
+drm_intel_get_min_eu_in_pool(int fd)
+{
+	drm_i915_getparam_t gp;
+	int ret = -1;
+
+	memclear(gp);
+	gp.param = I915_PARAM_MIN_EU_IN_POOL;
+	gp.value = &ret;
+	if (drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp))
+		return -errno;
+
+	return ret;
+}
+
 /**
  * Annotate the given bo for use in aub dumping.
  *
@@ -3395,7 +3425,7 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size)
 	    bufmgr_gem->gtt_size > 256*1024*1024) {
 		/* The unmappable part of gtt on gen 3 (i.e. above 256MB) can't
 		 * be used for tiled blits. To simplify the accounting, just
-		 * substract the unmappable part (fixed to 256MB on all known
+		 * subtract the unmappable part (fixed to 256MB on all known
 		 * gen3 devices) if the kernel advertises it. */
 		bufmgr_gem->gtt_size -= 256*1024*1024;
 	}
diff --git a/lib/libdrm/intel/intel_chipset.h b/lib/libdrm/intel/intel_chipset.h
index 35148e522..514f6594a 100644
--- a/lib/libdrm/intel/intel_chipset.h
+++ b/lib/libdrm/intel/intel_chipset.h
@@ -168,6 +168,7 @@
 #define PCI_CHIP_SKYLAKE_DT_GT1		0x1902
 #define PCI_CHIP_SKYLAKE_ULT_GT1	0x1906
 #define PCI_CHIP_SKYLAKE_SRV_GT1	0x190A /* Reserved */
+#define PCI_CHIP_SKYLAKE_H_GT1		0x190B
 #define PCI_CHIP_SKYLAKE_ULX_GT1	0x190E /* Reserved */
 #define PCI_CHIP_SKYLAKE_DT_GT2		0x1912
 #define PCI_CHIP_SKYLAKE_FUSED0_GT2	0x1913 /* Reserved */
@@ -179,9 +180,12 @@
 #define PCI_CHIP_SKYLAKE_WKS_GT2 	0x191D
 #define PCI_CHIP_SKYLAKE_ULX_GT2	0x191E
 #define PCI_CHIP_SKYLAKE_MOBILE_GT2	0x1921 /* Reserved */
-#define PCI_CHIP_SKYLAKE_GT3		0x1926
-#define PCI_CHIP_SKYLAKE_HALO_GT3	0x192B /* Reserved */
+#define PCI_CHIP_SKYLAKE_ULT_GT3_0	0x1923
+#define PCI_CHIP_SKYLAKE_ULT_GT3_1	0x1926
+#define PCI_CHIP_SKYLAKE_ULT_GT3_2	0x1927
 #define PCI_CHIP_SKYLAKE_SRV_GT4	0x192A
+#define PCI_CHIP_SKYLAKE_HALO_GT3	0x192B /* Reserved */
+#define PCI_CHIP_SKYLAKE_SRV_GT3	0x192D
 #define PCI_CHIP_SKYLAKE_DT_GT4		0x1932
 #define PCI_CHIP_SKYLAKE_SRV_GT4X	0x193A
 #define PCI_CHIP_SKYLAKE_H_GT4		0x193B
@@ -190,7 +194,9 @@
 #define PCI_CHIP_KABYLAKE_ULT_GT2	0x5916
 #define PCI_CHIP_KABYLAKE_ULT_GT1_5	0x5913
 #define PCI_CHIP_KABYLAKE_ULT_GT1	0x5906
-#define PCI_CHIP_KABYLAKE_ULT_GT3	0x5926
+#define PCI_CHIP_KABYLAKE_ULT_GT3_0	0x5923
+#define PCI_CHIP_KABYLAKE_ULT_GT3_1	0x5926
+#define PCI_CHIP_KABYLAKE_ULT_GT3_2	0x5927
 #define PCI_CHIP_KABYLAKE_ULT_GT2F	0x5921
 #define PCI_CHIP_KABYLAKE_ULX_GT1_5	0x5915
 #define PCI_CHIP_KABYLAKE_ULX_GT1	0x590E
@@ -198,21 +204,19 @@
 #define PCI_CHIP_KABYLAKE_DT_GT2	0x5912
 #define PCI_CHIP_KABYLAKE_DT_GT1_5	0x5917
 #define PCI_CHIP_KABYLAKE_DT_GT1	0x5902
-#define PCI_CHIP_KABYLAKE_DT_GT4	0x5932
 #define PCI_CHIP_KABYLAKE_HALO_GT2	0x591B
 #define PCI_CHIP_KABYLAKE_HALO_GT4	0x593B
-#define PCI_CHIP_KABYLAKE_HALO_GT3	0x592B
-#define PCI_CHIP_KABYLAKE_HALO_GT1	0x590B
+#define PCI_CHIP_KABYLAKE_HALO_GT1_0	0x5908
+#define PCI_CHIP_KABYLAKE_HALO_GT1_1	0x590B
 #define PCI_CHIP_KABYLAKE_SRV_GT2	0x591A
-#define PCI_CHIP_KABYLAKE_SRV_GT3	0x592A
 #define PCI_CHIP_KABYLAKE_SRV_GT1	0x590A
-#define PCI_CHIP_KABYLAKE_SRV_GT4	0x593A
 #define PCI_CHIP_KABYLAKE_WKS_GT2	0x591D
-#define PCI_CHIP_KABYLAKE_WKS_GT4	0x593D
 
 #define PCI_CHIP_BROXTON_0		0x0A84
 #define PCI_CHIP_BROXTON_1		0x1A84
 #define PCI_CHIP_BROXTON_2		0x5A84
+#define PCI_CHIP_BROXTON_3		0x1A85
+#define PCI_CHIP_BROXTON_4		0x5A85
 
 #define IS_MOBILE(devid)	((devid) == PCI_CHIP_I855_GM || \
 				 (devid) == PCI_CHIP_I915_GM || \
@@ -373,10 +377,11 @@
 #define IS_GEN8(devid)		(IS_BROADWELL(devid) || \
 				 IS_CHERRYVIEW(devid))
 
-#define IS_SKL_GT1(devid)	((devid) == PCI_CHIP_SKYLAKE_ULT_GT1	|| \
-				 (devid) == PCI_CHIP_SKYLAKE_ULX_GT1	|| \
-				 (devid) == PCI_CHIP_SKYLAKE_DT_GT1	|| \
-				 (devid) == PCI_CHIP_SKYLAKE_SRV_GT1)
+#define IS_SKL_GT1(devid)	((devid) == PCI_CHIP_SKYLAKE_DT_GT1	|| \
+				 (devid) == PCI_CHIP_SKYLAKE_ULT_GT1	|| \
+				 (devid) == PCI_CHIP_SKYLAKE_SRV_GT1	|| \
+				 (devid) == PCI_CHIP_SKYLAKE_H_GT1	|| \
+				 (devid) == PCI_CHIP_SKYLAKE_ULX_GT1)
 
 #define IS_SKL_GT2(devid)	((devid) == PCI_CHIP_SKYLAKE_DT_GT2	|| \
 				 (devid) == PCI_CHIP_SKYLAKE_FUSED0_GT2	|| \
@@ -389,8 +394,11 @@
 				 (devid) == PCI_CHIP_SKYLAKE_ULX_GT2	|| \
 				 (devid) == PCI_CHIP_SKYLAKE_MOBILE_GT2)
 
-#define IS_SKL_GT3(devid)	((devid) == PCI_CHIP_SKYLAKE_GT3	|| \
-				 (devid) == PCI_CHIP_SKYLAKE_HALO_GT3)
+#define IS_SKL_GT3(devid)	((devid) == PCI_CHIP_SKYLAKE_ULT_GT3_0	|| \
+				 (devid) == PCI_CHIP_SKYLAKE_ULT_GT3_1	|| \
+				 (devid) == PCI_CHIP_SKYLAKE_ULT_GT3_2	|| \
+				 (devid) == PCI_CHIP_SKYLAKE_HALO_GT3	|| \
+				 (devid) == PCI_CHIP_SKYLAKE_SRV_GT3)
 
 #define IS_SKL_GT4(devid)	((devid) == PCI_CHIP_SKYLAKE_SRV_GT4	|| \
 				 (devid) == PCI_CHIP_SKYLAKE_DT_GT4	|| \
@@ -404,7 +412,8 @@
 				 (devid) == PCI_CHIP_KABYLAKE_ULT_GT1	|| \
 				 (devid) == PCI_CHIP_KABYLAKE_ULX_GT1	|| \
 				 (devid) == PCI_CHIP_KABYLAKE_DT_GT1	|| \
-				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT1	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT1_0 || \
+				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT1_1 || \
 				 (devid) == PCI_CHIP_KABYLAKE_SRV_GT1)
 
 #define IS_KBL_GT2(devid)	((devid) == PCI_CHIP_KABYLAKE_ULT_GT2	|| \
@@ -415,14 +424,11 @@
 				 (devid) == PCI_CHIP_KABYLAKE_SRV_GT2	|| \
 				 (devid) == PCI_CHIP_KABYLAKE_WKS_GT2)
 
-#define IS_KBL_GT3(devid)	((devid) == PCI_CHIP_KABYLAKE_ULT_GT3	|| \
-				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT3	|| \
-				 (devid) == PCI_CHIP_KABYLAKE_SRV_GT3)
+#define IS_KBL_GT3(devid)	((devid) == PCI_CHIP_KABYLAKE_ULT_GT3_0	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_1	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_2)
 
-#define IS_KBL_GT4(devid)	((devid) == PCI_CHIP_KABYLAKE_DT_GT4	|| \
-				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT4	|| \
-				 (devid) == PCI_CHIP_KABYLAKE_SRV_GT4	|| \
-				 (devid) == PCI_CHIP_KABYLAKE_WKS_GT4)
+#define IS_KBL_GT4(devid)	((devid) == PCI_CHIP_KABYLAKE_HALO_GT4)
 
 #define IS_KABYLAKE(devid)	(IS_KBL_GT1(devid) || \
 				 IS_KBL_GT2(devid) || \
@@ -436,7 +442,9 @@
 
 #define IS_BROXTON(devid)	((devid) == PCI_CHIP_BROXTON_0	|| \
 				 (devid) == PCI_CHIP_BROXTON_1	|| \
-				 (devid) == PCI_CHIP_BROXTON_2)
+				 (devid) == PCI_CHIP_BROXTON_2	|| \
+				 (devid) == PCI_CHIP_BROXTON_3	|| \
+				 (devid) == PCI_CHIP_BROXTON_4)
 
 #define IS_GEN9(devid)		(IS_SKYLAKE(devid) || \
 				 IS_BROXTON(devid) || \
diff --git a/lib/libdrm/intel/intel_decode.c b/lib/libdrm/intel/intel_decode.c
index 287c34277..803d20293 100644
--- a/lib/libdrm/intel/intel_decode.c
+++ b/lib/libdrm/intel/intel_decode.c
@@ -3598,7 +3598,7 @@ decode_3d_965(struct drm_intel_decode *ctx)
 		instr_out(ctx, 0, "3DSTATE_DEPTH_BUFFER\n");
 		if (IS_GEN5(devid) || IS_GEN6(devid))
 			instr_out(ctx, 1,
-				  "%s, %s, pitch = %d bytes, %stiled, HiZ %d, Seperate Stencil %d\n",
+				  "%s, %s, pitch = %d bytes, %stiled, HiZ %d, Separate Stencil %d\n",
 				  get_965_surfacetype(data[1] >> 29),
 				  get_965_depthformat((data[1] >> 18) & 0x7),
 				  (data[1] & 0x0001ffff) + 1,