diff options
author | Jonathan Gray <jsg@cvs.openbsd.org> | 2017-02-26 12:20:31 +0000 |
---|---|---|
committer | Jonathan Gray <jsg@cvs.openbsd.org> | 2017-02-26 12:20:31 +0000 |
commit | 9b2e362559110085d2ff9b90fea11fa81e704a78 (patch) | |
tree | b114259e6fecf369e1e7b90f3bb8116fa08b1cf1 /lib/mesa/src/amd | |
parent | b5fce4e6eb297a6f7fabd0d6c6b4ffdfefa6ad8b (diff) |
Import Mesa 13.0.5
Diffstat (limited to 'lib/mesa/src/amd')
-rw-r--r-- | lib/mesa/src/amd/common/ac_nir_to_llvm.c | 4 | ||||
-rw-r--r-- | lib/mesa/src/amd/vulkan/Makefile.am | 8 | ||||
-rw-r--r-- | lib/mesa/src/amd/vulkan/radv_cmd_buffer.c | 4 | ||||
-rw-r--r-- | lib/mesa/src/amd/vulkan/radv_device.c | 47 | ||||
-rw-r--r-- | lib/mesa/src/amd/vulkan/radv_timestamp.h | 2 | ||||
-rw-r--r-- | lib/mesa/src/amd/vulkan/radv_wsi.c | 12 | ||||
-rw-r--r-- | lib/mesa/src/amd/vulkan/si_cmd_buffer.c | 11 | ||||
-rw-r--r-- | lib/mesa/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c | 14 |
8 files changed, 85 insertions, 17 deletions
diff --git a/lib/mesa/src/amd/common/ac_nir_to_llvm.c b/lib/mesa/src/amd/common/ac_nir_to_llvm.c index ccf10ac11..4f816a412 100644 --- a/lib/mesa/src/amd/common/ac_nir_to_llvm.c +++ b/lib/mesa/src/amd/common/ac_nir_to_llvm.c @@ -3946,7 +3946,7 @@ static void handle_shader_output_decl(struct nir_to_llvm_context *ctx, struct nir_variable *variable) { - int idx = variable->data.location; + int idx = variable->data.location + variable->data.index; unsigned attrib_count = glsl_count_attribute_slots(variable->type, false); variable->data.driver_location = idx * 4; @@ -3976,7 +3976,7 @@ handle_shader_output_decl(struct nir_to_llvm_context *ctx, si_build_alloca_undef(ctx, ctx->f32, ""); } } - ctx->output_mask |= ((1ull << attrib_count) - 1) << variable->data.location; + ctx->output_mask |= ((1ull << attrib_count) - 1) << idx; } static void diff --git a/lib/mesa/src/amd/vulkan/Makefile.am b/lib/mesa/src/amd/vulkan/Makefile.am index c559a9503..47cbc4a6e 100644 --- a/lib/mesa/src/amd/vulkan/Makefile.am +++ b/lib/mesa/src/amd/vulkan/Makefile.am @@ -32,9 +32,6 @@ lib_LTLIBRARIES = libvulkan_radeon.la # The gallium includes are for the util/u_math.h include from main/macros.h AM_CPPFLAGS = \ - $(AMDGPU_CFLAGS) \ - $(VALGRIND_CFLAGS) \ - $(DEFINES) \ -I$(top_srcdir)/include \ -I$(top_builddir)/src \ -I$(top_srcdir)/src \ @@ -48,7 +45,10 @@ AM_CPPFLAGS = \ -I$(top_srcdir)/src/mesa \ -I$(top_srcdir)/src/mesa/drivers/dri/common \ -I$(top_srcdir)/src/gallium/auxiliary \ - -I$(top_srcdir)/src/gallium/include + -I$(top_srcdir)/src/gallium/include \ + $(AMDGPU_CFLAGS) \ + $(VALGRIND_CFLAGS) \ + $(DEFINES) AM_CFLAGS = \ $(VISIBILITY_CFLAGS) \ diff --git a/lib/mesa/src/amd/vulkan/radv_cmd_buffer.c b/lib/mesa/src/amd/vulkan/radv_cmd_buffer.c index 9517e7a13..837cf585d 100644 --- a/lib/mesa/src/amd/vulkan/radv_cmd_buffer.c +++ b/lib/mesa/src/amd/vulkan/radv_cmd_buffer.c @@ -2283,9 +2283,11 @@ void radv_CmdPipelineBarrier( case VK_ACCESS_INDIRECT_COMMAND_READ_BIT: case VK_ACCESS_INDEX_READ_BIT: case VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT: - case VK_ACCESS_UNIFORM_READ_BIT: flush_bits |= RADV_CMD_FLAG_INV_VMEM_L1; break; + case VK_ACCESS_UNIFORM_READ_BIT: + flush_bits |= RADV_CMD_FLAG_INV_VMEM_L1 | RADV_CMD_FLAG_INV_SMEM_L1; + break; case VK_ACCESS_SHADER_READ_BIT: flush_bits |= RADV_CMD_FLAG_INV_GLOBAL_L2; break; diff --git a/lib/mesa/src/amd/vulkan/radv_device.c b/lib/mesa/src/amd/vulkan/radv_device.c index 86d577782..c0940c169 100644 --- a/lib/mesa/src/amd/vulkan/radv_device.c +++ b/lib/mesa/src/amd/vulkan/radv_device.c @@ -866,7 +866,7 @@ VkResult radv_AllocateMemory( flags |= RADEON_FLAG_NO_CPU_ACCESS; else flags |= RADEON_FLAG_CPU_ACCESS; - mem->bo = device->ws->buffer_create(device->ws, alloc_size, 32768, + mem->bo = device->ws->buffer_create(device->ws, alloc_size, 65536, domain, flags); if (!mem->bo) { @@ -1823,3 +1823,48 @@ void radv_DestroySampler( return; vk_free2(&device->alloc, pAllocator, sampler); } + + +/* vk_icd.h does not declare this function, so we declare it here to + * suppress Wmissing-prototypes. + */ +PUBLIC VKAPI_ATTR VkResult VKAPI_CALL +vk_icdNegotiateLoaderICDInterfaceVersion(uint32_t *pSupportedVersion); + +PUBLIC VKAPI_ATTR VkResult VKAPI_CALL +vk_icdNegotiateLoaderICDInterfaceVersion(uint32_t *pSupportedVersion) +{ + /* For the full details on loader interface versioning, see + * <https://github.com/KhronosGroup/Vulkan-LoaderAndValidationLayers/blob/master/loader/LoaderAndLayerInterface.md>. + * What follows is a condensed summary, to help you navigate the large and + * confusing official doc. + * + * - Loader interface v0 is incompatible with later versions. We don't + * support it. + * + * - In loader interface v1: + * - The first ICD entrypoint called by the loader is + * vk_icdGetInstanceProcAddr(). The ICD must statically expose this + * entrypoint. + * - The ICD must statically expose no other Vulkan symbol unless it is + * linked with -Bsymbolic. + * - Each dispatchable Vulkan handle created by the ICD must be + * a pointer to a struct whose first member is VK_LOADER_DATA. The + * ICD must initialize VK_LOADER_DATA.loadMagic to ICD_LOADER_MAGIC. + * - The loader implements vkCreate{PLATFORM}SurfaceKHR() and + * vkDestroySurfaceKHR(). The ICD must be capable of working with + * such loader-managed surfaces. + * + * - Loader interface v2 differs from v1 in: + * - The first ICD entrypoint called by the loader is + * vk_icdNegotiateLoaderICDInterfaceVersion(). The ICD must + * statically expose this entrypoint. + * + * - Loader interface v3 differs from v2 in: + * - The ICD must implement vkCreate{PLATFORM}SurfaceKHR(), + * vkDestroySurfaceKHR(), and other API which uses VKSurfaceKHR, + * because the loader no longer does so. + */ + *pSupportedVersion = MIN2(*pSupportedVersion, 3u); + return VK_SUCCESS; +} diff --git a/lib/mesa/src/amd/vulkan/radv_timestamp.h b/lib/mesa/src/amd/vulkan/radv_timestamp.h index f59f3b834..ac6414efb 100644 --- a/lib/mesa/src/amd/vulkan/radv_timestamp.h +++ b/lib/mesa/src/amd/vulkan/radv_timestamp.h @@ -1 +1 @@ -#define RADV_TIMESTAMP "1483631585" +#define RADV_TIMESTAMP "1487591265" diff --git a/lib/mesa/src/amd/vulkan/radv_wsi.c b/lib/mesa/src/amd/vulkan/radv_wsi.c index 1f1ab1c80..af9c4d505 100644 --- a/lib/mesa/src/amd/vulkan/radv_wsi.c +++ b/lib/mesa/src/amd/vulkan/radv_wsi.c @@ -75,7 +75,7 @@ void radv_DestroySurfaceKHR( const VkAllocationCallbacks* pAllocator) { RADV_FROM_HANDLE(radv_instance, instance, _instance); - RADV_FROM_HANDLE(_VkIcdSurfaceBase, surface, _surface); + ICD_FROM_HANDLE(VkIcdSurfaceBase, surface, _surface); vk_free2(&instance->alloc, pAllocator, surface); } @@ -87,7 +87,7 @@ VkResult radv_GetPhysicalDeviceSurfaceSupportKHR( VkBool32* pSupported) { RADV_FROM_HANDLE(radv_physical_device, device, physicalDevice); - RADV_FROM_HANDLE(_VkIcdSurfaceBase, surface, _surface); + ICD_FROM_HANDLE(VkIcdSurfaceBase, surface, _surface); struct wsi_interface *iface = device->wsi_device.wsi[surface->platform]; return iface->get_support(surface, &device->wsi_device, @@ -101,7 +101,7 @@ VkResult radv_GetPhysicalDeviceSurfaceCapabilitiesKHR( VkSurfaceCapabilitiesKHR* pSurfaceCapabilities) { RADV_FROM_HANDLE(radv_physical_device, device, physicalDevice); - RADV_FROM_HANDLE(_VkIcdSurfaceBase, surface, _surface); + ICD_FROM_HANDLE(VkIcdSurfaceBase, surface, _surface); struct wsi_interface *iface = device->wsi_device.wsi[surface->platform]; return iface->get_capabilities(surface, pSurfaceCapabilities); @@ -114,7 +114,7 @@ VkResult radv_GetPhysicalDeviceSurfaceFormatsKHR( VkSurfaceFormatKHR* pSurfaceFormats) { RADV_FROM_HANDLE(radv_physical_device, device, physicalDevice); - RADV_FROM_HANDLE(_VkIcdSurfaceBase, surface, _surface); + ICD_FROM_HANDLE(VkIcdSurfaceBase, surface, _surface); struct wsi_interface *iface = device->wsi_device.wsi[surface->platform]; return iface->get_formats(surface, &device->wsi_device, pSurfaceFormatCount, @@ -128,7 +128,7 @@ VkResult radv_GetPhysicalDeviceSurfacePresentModesKHR( VkPresentModeKHR* pPresentModes) { RADV_FROM_HANDLE(radv_physical_device, device, physicalDevice); - RADV_FROM_HANDLE(_VkIcdSurfaceBase, surface, _surface); + ICD_FROM_HANDLE(VkIcdSurfaceBase, surface, _surface); struct wsi_interface *iface = device->wsi_device.wsi[surface->platform]; return iface->get_present_modes(surface, pPresentModeCount, @@ -249,7 +249,7 @@ VkResult radv_CreateSwapchainKHR( VkSwapchainKHR* pSwapchain) { RADV_FROM_HANDLE(radv_device, device, _device); - RADV_FROM_HANDLE(_VkIcdSurfaceBase, surface, pCreateInfo->surface); + ICD_FROM_HANDLE(VkIcdSurfaceBase, surface, pCreateInfo->surface); struct wsi_interface *iface = device->instance->physicalDevice.wsi_device.wsi[surface->platform]; struct wsi_swapchain *swapchain; diff --git a/lib/mesa/src/amd/vulkan/si_cmd_buffer.c b/lib/mesa/src/amd/vulkan/si_cmd_buffer.c index a61a950de..0a78e0472 100644 --- a/lib/mesa/src/amd/vulkan/si_cmd_buffer.c +++ b/lib/mesa/src/amd/vulkan/si_cmd_buffer.c @@ -371,6 +371,15 @@ void si_init_config(struct radv_physical_device *physical_device, radeon_set_context_reg(cs, R_028408_VGT_INDX_OFFSET, 0); if (physical_device->rad_info.chip_class >= CIK) { + /* If this is 0, Bonaire can hang even if GS isn't being used. + * Other chips are unaffected. These are suboptimal values, + * but we don't use on-chip GS. + */ + radeon_set_context_reg(cs, R_028A44_VGT_GS_ONCHIP_CNTL, + S_028A44_ES_VERTS_PER_SUBGRP(64) | + S_028A44_GS_PRIMS_PER_SUBGRP(4)); + + radeon_set_sh_reg(cs, R_00B51C_SPI_SHADER_PGM_RSRC3_LS, S_00B51C_CU_EN(0xffff)); radeon_set_sh_reg(cs, R_00B41C_SPI_SHADER_PGM_RSRC3_HS, 0); radeon_set_sh_reg(cs, R_00B31C_SPI_SHADER_PGM_RSRC3_ES, S_00B31C_CU_EN(0xffff)); radeon_set_sh_reg(cs, R_00B21C_SPI_SHADER_PGM_RSRC3_GS, S_00B21C_CU_EN(0xffff)); @@ -383,7 +392,6 @@ void si_init_config(struct radv_physical_device *physical_device, * * LATE_ALLOC_VS = 2 is the highest safe number. */ - radeon_set_sh_reg(cs, R_00B51C_SPI_SHADER_PGM_RSRC3_LS, S_00B51C_CU_EN(0xffff)); radeon_set_sh_reg(cs, R_00B118_SPI_SHADER_PGM_RSRC3_VS, S_00B118_CU_EN(0xffff)); radeon_set_sh_reg(cs, R_00B11C_SPI_SHADER_LATE_ALLOC_VS, S_00B11C_LIMIT(2)); } else { @@ -392,7 +400,6 @@ void si_init_config(struct radv_physical_device *physical_device, * - VS can't execute on CU0. * - If HS writes outputs to LDS, LS can't execute on CU0. */ - radeon_set_sh_reg(cs, R_00B51C_SPI_SHADER_PGM_RSRC3_LS, S_00B51C_CU_EN(0xfffe)); radeon_set_sh_reg(cs, R_00B118_SPI_SHADER_PGM_RSRC3_VS, S_00B118_CU_EN(0xfffe)); radeon_set_sh_reg(cs, R_00B11C_SPI_SHADER_LATE_ALLOC_VS, S_00B11C_LIMIT(31)); } diff --git a/lib/mesa/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c b/lib/mesa/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c index 02aad3c81..dc596ff05 100644 --- a/lib/mesa/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c +++ b/lib/mesa/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c @@ -274,6 +274,19 @@ static void radv_set_micro_tile_mode(struct radeon_surf *surf, surf->micro_tile_mode = G_009910_MICRO_TILE_MODE(tile_mode); } +static unsigned cik_get_macro_tile_index(struct radeon_surf *surf) +{ + unsigned index, tileb; + + tileb = 8 * 8 * surf->bpe; + tileb = MIN2(surf->tile_split, tileb); + + for (index = 0; tileb > 64; index++) + tileb >>= 1; + + assert(index < 16); + return index; +} static int radv_amdgpu_winsys_surface_init(struct radeon_winsys *_ws, struct radeon_surf *surf) @@ -435,6 +448,7 @@ static int radv_amdgpu_winsys_surface_init(struct radeon_winsys *_ws, AddrSurfInfoIn.tileIndex = 10; /* 2D displayable */ else AddrSurfInfoIn.tileIndex = 14; /* 2D non-displayable */ + AddrSurfInfoOut.macroModeIndex = cik_get_macro_tile_index(surf); } } |