diff options
5 files changed, 35 insertions, 5 deletions
diff --git a/dist/Mesa/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/dist/Mesa/src/mesa/drivers/dri/i965/gen6_blorp.cpp index a4a90817a..3bef7705f 100644 --- a/dist/Mesa/src/mesa/drivers/dri/i965/gen6_blorp.cpp +++ b/dist/Mesa/src/mesa/drivers/dri/i965/gen6_blorp.cpp @@ -924,6 +924,18 @@ gen6_blorp_emit_depth_disable(struct brw_context *brw, OUT_BATCH(0); OUT_BATCH(0); ADVANCE_BATCH(); + + BEGIN_BATCH(3); + OUT_BATCH(_3DSTATE_HIER_DEPTH_BUFFER << 16 | (3 - 2)); + OUT_BATCH(0); + OUT_BATCH(0); + ADVANCE_BATCH(); + + BEGIN_BATCH(3); + OUT_BATCH(_3DSTATE_STENCIL_BUFFER << 16 | (3 - 2)); + OUT_BATCH(0); + OUT_BATCH(0); + ADVANCE_BATCH(); } @@ -951,6 +963,9 @@ void gen6_blorp_emit_drawing_rectangle(struct brw_context *brw, const brw_blorp_params *params) { + if (brw->gen == 6) + intel_emit_post_sync_nonzero_flush(brw); + BEGIN_BATCH(4); OUT_BATCH(_3DSTATE_DRAWING_RECTANGLE << 16 | (4 - 2)); OUT_BATCH(0); diff --git a/dist/Mesa/src/mesa/drivers/dri/i965/gen6_multisample_state.c b/dist/Mesa/src/mesa/drivers/dri/i965/gen6_multisample_state.c index 268dc7998..a76ab1e79 100644 --- a/dist/Mesa/src/mesa/drivers/dri/i965/gen6_multisample_state.c +++ b/dist/Mesa/src/mesa/drivers/dri/i965/gen6_multisample_state.c @@ -128,6 +128,9 @@ gen6_emit_3dstate_multisample(struct brw_context *brw, break; } + /* 3DSTATE_MULTISAMPLE is nonpipelined. */ + intel_emit_post_sync_nonzero_flush(brw); + int len = brw->gen >= 7 ? 4 : 3; BEGIN_BATCH(len); OUT_BATCH(_3DSTATE_MULTISAMPLE << 16 | (len - 2)); @@ -183,9 +186,6 @@ static void upload_multisample_state(struct brw_context *brw) } } - /* 3DSTATE_MULTISAMPLE is nonpipelined. */ - intel_emit_post_sync_nonzero_flush(brw); - gen6_emit_3dstate_multisample(brw, num_samples); gen6_emit_3dstate_sample_mask(brw, num_samples, coverage, coverage_invert, sample_mask); diff --git a/dist/Mesa/src/mesa/drivers/dri/i965/gen6_queryobj.c b/dist/Mesa/src/mesa/drivers/dri/i965/gen6_queryobj.c index 6f4f6f5de..8f26b637d 100644 --- a/dist/Mesa/src/mesa/drivers/dri/i965/gen6_queryobj.c +++ b/dist/Mesa/src/mesa/drivers/dri/i965/gen6_queryobj.c @@ -115,14 +115,14 @@ write_reg(struct brw_context *brw, BEGIN_BATCH(3); OUT_BATCH(MI_STORE_REGISTER_MEM | (3 - 2)); OUT_BATCH(reg); - OUT_RELOC(query_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, + OUT_RELOC(query_bo, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, idx * sizeof(uint64_t)); ADVANCE_BATCH(); BEGIN_BATCH(3); OUT_BATCH(MI_STORE_REGISTER_MEM | (3 - 2)); OUT_BATCH(reg + sizeof(uint32_t)); - OUT_RELOC(query_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, + OUT_RELOC(query_bo, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, sizeof(uint32_t) + idx * sizeof(uint64_t)); ADVANCE_BATCH(); } diff --git a/dist/Mesa/src/mesa/drivers/dri/i965/gen6_sol.c b/dist/Mesa/src/mesa/drivers/dri/i965/gen6_sol.c index 5c294b1d7..fd6a314fa 100644 --- a/dist/Mesa/src/mesa/drivers/dri/i965/gen6_sol.c +++ b/dist/Mesa/src/mesa/drivers/dri/i965/gen6_sol.c @@ -153,6 +153,9 @@ brw_begin_transform_feedback(struct gl_context *ctx, GLenum mode, = _mesa_compute_max_transform_feedback_vertices(xfb_obj, linked_xfb_info); + /* 3DSTATE_GS_SVB_INDEX is non-pipelined. */ + intel_emit_post_sync_nonzero_flush(brw); + /* Initialize the SVBI 0 register to zero and set the maximum index. */ BEGIN_BATCH(4); OUT_BATCH(_3DSTATE_GS_SVB_INDEX << 16 | (4 - 2)); diff --git a/dist/Mesa/src/mesa/drivers/dri/i965/gen7_blorp.cpp b/dist/Mesa/src/mesa/drivers/dri/i965/gen7_blorp.cpp index 71a5a308e..907588645 100644 --- a/dist/Mesa/src/mesa/drivers/dri/i965/gen7_blorp.cpp +++ b/dist/Mesa/src/mesa/drivers/dri/i965/gen7_blorp.cpp @@ -763,6 +763,18 @@ gen7_blorp_emit_depth_disable(struct brw_context *brw, OUT_BATCH(0); OUT_BATCH(0); ADVANCE_BATCH(); + + BEGIN_BATCH(3); + OUT_BATCH(GEN7_3DSTATE_HIER_DEPTH_BUFFER << 16 | (3 - 2)); + OUT_BATCH(0); + OUT_BATCH(0); + ADVANCE_BATCH(); + + BEGIN_BATCH(3); + OUT_BATCH(GEN7_3DSTATE_STENCIL_BUFFER << 16 | (3 - 2)); + OUT_BATCH(0); + OUT_BATCH(0); + ADVANCE_BATCH(); } |