1 files changed, 2 insertions, 5 deletions

diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_transfer.c b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_transfer.c
index 27f3ebe58..b4f30f12c 100644
--- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_transfer.c
+++ b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_transfer.c
@@ -195,7 +195,6 @@ etna_transfer_map(struct pipe_context *pctx, struct pipe_resource *prsc,
                   struct pipe_transfer **out_transfer)
 {
    struct etna_context *ctx = etna_context(pctx);
-   struct etna_screen *screen = ctx->screen;
    struct etna_resource *rsc = etna_resource(prsc);
    struct etna_transfer *trans;
    struct pipe_transfer *ptrans;
@@ -259,7 +258,7 @@ etna_transfer_map(struct pipe_context *pctx, struct pipe_resource *prsc,
       rsc = etna_resource(rsc->texture);
    } else if (rsc->ts_bo ||
               (rsc->layout != ETNA_LAYOUT_LINEAR &&
-               etna_resource_hw_tileable(screen->specs.use_blt, prsc) &&
+               etna_resource_hw_tileable(ctx->specs.use_blt, prsc) &&
                /* HALIGN 4 resources are incompatible with the resolve engine,
                 * so fall back to using software to detile this resource. */
                rsc->halign != TEXTURE_HALIGN_FOUR)) {
@@ -291,7 +290,7 @@ etna_transfer_map(struct pipe_context *pctx, struct pipe_resource *prsc,
          return NULL;
       }
 
-      if (!screen->specs.use_blt) {
+      if (!ctx->specs.use_blt) {
          /* Need to align the transfer region to satisfy RS restrictions, as we
           * really want to hit the RS blit path here.
           */
@@ -391,14 +390,12 @@ etna_transfer_map(struct pipe_context *pctx, struct pipe_resource *prsc,
           (!trans->rsc &&
            (((usage & PIPE_TRANSFER_READ) && (rsc->status & ETNA_PENDING_WRITE)) ||
            ((usage & PIPE_TRANSFER_WRITE) && rsc->status)))) {
-         mtx_lock(&rsc->lock);
          set_foreach(rsc->pending_ctx, entry) {
             struct etna_context *pend_ctx = (struct etna_context *)entry->key;
             struct pipe_context *pend_pctx = &pend_ctx->base;
 
             pend_pctx->flush(pend_pctx, NULL, 0);
          }
-         mtx_unlock(&rsc->lock);
       }
 
       mtx_unlock(&ctx->lock);