diff options
Diffstat (limited to 'lib/mesa/src/gallium/drivers/etnaviv')
37 files changed, 858 insertions, 979 deletions
diff --git a/lib/mesa/src/gallium/drivers/etnaviv/Makefile.sources b/lib/mesa/src/gallium/drivers/etnaviv/Makefile.sources index e74f7efe9..7d4ee3955 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/Makefile.sources +++ b/lib/mesa/src/gallium/drivers/etnaviv/Makefile.sources @@ -34,16 +34,14 @@ C_SOURCES := \ etnaviv_format.c \ etnaviv_format.h \ etnaviv_internal.h \ - etnaviv_perfmon.c \ - etnaviv_perfmon.h \ etnaviv_query.c \ etnaviv_query.h \ - etnaviv_query_acc_occlusion.c \ - etnaviv_query_acc_perfmon.c \ - etnaviv_query_acc.c \ - etnaviv_query_acc.h \ + etnaviv_query_hw.c \ + etnaviv_query_hw.h \ etnaviv_query_sw.c \ etnaviv_query_sw.h \ + etnaviv_query_pm.c \ + etnaviv_query_pm.h \ etnaviv_rasterizer.c \ etnaviv_rasterizer.h \ etnaviv_resource.c \ diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_clear_blit.c b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_clear_blit.c index 7b0da00c6..42dc50e2d 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_clear_blit.c +++ b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_clear_blit.c @@ -48,14 +48,12 @@ void etna_blit_save_state(struct etna_context *ctx) { - util_blitter_save_fragment_constant_buffer_slot(ctx->blitter, - ctx->constant_buffer[PIPE_SHADER_FRAGMENT].cb); util_blitter_save_vertex_buffer_slot(ctx->blitter, ctx->vertex_buffer.vb); util_blitter_save_vertex_elements(ctx->blitter, ctx->vertex_elements); util_blitter_save_vertex_shader(ctx->blitter, ctx->shader.bind_vs); util_blitter_save_rasterizer(ctx->blitter, ctx->rasterizer); util_blitter_save_viewport(ctx->blitter, &ctx->viewport_s); - util_blitter_save_scissor(ctx->blitter, &ctx->scissor); + util_blitter_save_scissor(ctx->blitter, &ctx->scissor_s); util_blitter_save_fragment_shader(ctx->blitter, ctx->shader.bind_fs); util_blitter_save_blend(ctx->blitter, ctx->blend); util_blitter_save_depth_stencil_alpha(ctx->blitter, ctx->zsa); @@ -94,34 +92,6 @@ etna_clear_blit_pack_rgba(enum pipe_format format, const union pipe_color_union } static void -etna_blit(struct pipe_context *pctx, const struct pipe_blit_info *blit_info) -{ - struct etna_context *ctx = etna_context(pctx); - struct pipe_blit_info info = *blit_info; - - if (ctx->blit(pctx, &info)) - return; - - if (util_try_blit_via_copy_region(pctx, &info)) - return; - - if (info.mask & PIPE_MASK_S) { - DBG("cannot blit stencil, skipping"); - info.mask &= ~PIPE_MASK_S; - } - - if (!util_blitter_is_blit_supported(ctx->blitter, &info)) { - DBG("blit unsupported %s -> %s", - util_format_short_name(info.src.resource->format), - util_format_short_name(info.dst.resource->format)); - return; - } - - etna_blit_save_state(ctx); - util_blitter_blit(ctx->blitter, &info); -} - -static void etna_clear_render_target(struct pipe_context *pctx, struct pipe_surface *dst, const union pipe_color_union *color, unsigned dstx, unsigned dsty, unsigned width, unsigned height, @@ -264,15 +234,13 @@ void etna_clear_blit_init(struct pipe_context *pctx) { struct etna_context *ctx = etna_context(pctx); - struct etna_screen *screen = ctx->screen; - pctx->blit = etna_blit; pctx->clear_render_target = etna_clear_render_target; pctx->clear_depth_stencil = etna_clear_depth_stencil; pctx->resource_copy_region = etna_resource_copy_region; pctx->flush_resource = etna_flush_resource; - if (screen->specs.use_blt) + if (ctx->specs.use_blt) etna_clear_blit_blt_init(pctx); else etna_clear_blit_rs_init(pctx); diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_context.c b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_context.c index 832cecbf6..df8c00c55 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_context.c +++ b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_context.c @@ -34,7 +34,7 @@ #include "etnaviv_emit.h" #include "etnaviv_fence.h" #include "etnaviv_query.h" -#include "etnaviv_query_acc.h" +#include "etnaviv_query_hw.h" #include "etnaviv_rasterizer.h" #include "etnaviv_resource.h" #include "etnaviv_screen.h" @@ -57,43 +57,12 @@ #include "hw/common.xml.h" -static inline void -etna_emit_nop_with_data(struct etna_cmd_stream *stream, uint32_t value) -{ - etna_cmd_stream_emit(stream, VIV_FE_NOP_HEADER_OP_NOP); - etna_cmd_stream_emit(stream, value); -} - -static void -etna_emit_string_marker(struct pipe_context *pctx, const char *string, int len) -{ - struct etna_context *ctx = etna_context(pctx); - struct etna_cmd_stream *stream = ctx->stream; - const uint32_t *buf = (const void *)string; - - etna_cmd_stream_reserve(stream, len * 2); - - while (len >= 4) { - etna_emit_nop_with_data(stream, *buf); - buf++; - len -= 4; - } - - /* copy remainder bytes without reading past end of input string */ - if (len > 0) { - uint32_t w = 0; - memcpy(&w, buf, len); - etna_emit_nop_with_data(stream, w); - } -} - static void etna_context_destroy(struct pipe_context *pctx) { struct etna_context *ctx = etna_context(pctx); mtx_lock(&ctx->lock); - if (ctx->used_resources_read) { /* @@ -104,9 +73,7 @@ etna_context_destroy(struct pipe_context *pctx) set_foreach(ctx->used_resources_read, entry) { struct etna_resource *rsc = (struct etna_resource *)entry->key; - mtx_lock(&rsc->lock); _mesa_set_remove_key(rsc->pending_ctx, ctx); - mtx_unlock(&rsc->lock); } _mesa_set_destroy(ctx->used_resources_read, NULL); @@ -121,9 +88,7 @@ etna_context_destroy(struct pipe_context *pctx) set_foreach(ctx->used_resources_write, entry) { struct etna_resource *rsc = (struct etna_resource *)entry->key; - mtx_lock(&rsc->lock); _mesa_set_remove_key(rsc->pending_ctx, ctx); - mtx_unlock(&rsc->lock); } _mesa_set_destroy(ctx->used_resources_write, NULL); @@ -223,7 +188,6 @@ static void etna_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info) { struct etna_context *ctx = etna_context(pctx); - struct etna_screen *screen = ctx->screen; struct pipe_framebuffer_state *pfb = &ctx->framebuffer_s; uint32_t draw_mode; unsigned i; @@ -324,11 +288,10 @@ etna_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info) } /* Mark constant buffers as being read */ - foreach_bit(i, ctx->constant_buffer[PIPE_SHADER_VERTEX].enabled_mask) - resource_read(ctx, ctx->constant_buffer[PIPE_SHADER_VERTEX].cb[i].buffer); - - foreach_bit(i, ctx->constant_buffer[PIPE_SHADER_FRAGMENT].enabled_mask) - resource_read(ctx, ctx->constant_buffer[PIPE_SHADER_FRAGMENT].cb[i].buffer); + for (unsigned i = 0; i < ETNA_MAX_CONST_BUF; i++) { + resource_read(ctx, ctx->constant_buffer[PIPE_SHADER_VERTEX][i].buffer); + resource_read(ctx, ctx->constant_buffer[PIPE_SHADER_FRAGMENT][i].buffer); + } /* Mark VBOs as being read */ foreach_bit(i, ctx->vertex_buffer.enabled_mask) { @@ -352,7 +315,10 @@ etna_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info) } } - ctx->stats.prims_generated += u_reduced_prims_for_vertices(info->mode, info->count); + list_for_each_entry(struct etna_hw_query, hq, &ctx->active_hw_queries, node) + resource_written(ctx, hq->prsc); + + ctx->stats.prims_emitted += u_reduced_prims_for_vertices(info->mode, info->count); ctx->stats.draw_calls++; /* Update state for this draw operation */ @@ -361,7 +327,7 @@ etna_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info) /* First, sync state, then emit DRAW_PRIMITIVES or DRAW_INDEXED_PRIMITIVES */ etna_emit_state(ctx); - if (screen->specs.halti >= 2) { + if (ctx->specs.halti >= 2) { /* On HALTI2+ (GC3000 and higher) only use instanced drawing commands, as the blob does */ etna_draw_instanced(ctx->stream, info->index_size, draw_mode, info->instance_count, info->count, info->index_size ? info->index_bias : info->start); @@ -395,7 +361,6 @@ static void etna_reset_gpu_state(struct etna_context *ctx) { struct etna_cmd_stream *stream = ctx->stream; - struct etna_screen *screen = ctx->screen; etna_set_state(stream, VIVS_GL_API_MODE, VIVS_GL_API_MODE_OPENGL); etna_set_state(stream, VIVS_GL_VERTEX_ELEMENT_CONFIG, 0x00000001); @@ -411,37 +376,39 @@ etna_reset_gpu_state(struct etna_context *ctx) etna_set_state(stream, VIVS_PS_CONTROL_EXT, 0x00000000); /* There is no HALTI0 specific state */ - if (screen->specs.halti >= 1) { /* Only on HALTI1+ */ + if (ctx->specs.halti >= 1) { /* Only on HALTI1+ */ etna_set_state(stream, VIVS_VS_HALTI1_UNK00884, 0x00000808); } - if (screen->specs.halti >= 2) { /* Only on HALTI2+ */ + if (ctx->specs.halti >= 2) { /* Only on HALTI2+ */ etna_set_state(stream, VIVS_RA_UNK00E0C, 0x00000000); } - if (screen->specs.halti >= 3) { /* Only on HALTI3+ */ + if (ctx->specs.halti >= 3) { /* Only on HALTI3+ */ etna_set_state(stream, VIVS_PS_HALTI3_UNK0103C, 0x76543210); } - if (screen->specs.halti >= 4) { /* Only on HALTI4+ */ + if (ctx->specs.halti >= 4) { /* Only on HALTI4+ */ etna_set_state(stream, VIVS_PS_MSAA_CONFIG, 0x6fffffff & 0xf70fffff & 0xfff6ffff & 0xffff6fff & 0xfffff6ff & 0xffffff7f); etna_set_state(stream, VIVS_PE_HALTI4_UNK014C0, 0x00000000); } - if (screen->specs.halti >= 5) { /* Only on HALTI5+ */ + if (ctx->specs.halti >= 5) { /* Only on HALTI5+ */ etna_set_state(stream, VIVS_NTE_DESCRIPTOR_UNK14C40, 0x00000001); etna_set_state(stream, VIVS_FE_HALTI5_UNK007D8, 0x00000002); + etna_set_state(stream, VIVS_FE_HALTI5_ID_CONFIG, 0x00000000); etna_set_state(stream, VIVS_PS_SAMPLER_BASE, 0x00000000); etna_set_state(stream, VIVS_VS_SAMPLER_BASE, 0x00000020); etna_set_state(stream, VIVS_SH_CONFIG, VIVS_SH_CONFIG_RTNE_ROUNDING); } else { /* Only on pre-HALTI5 */ + etna_set_state(stream, VIVS_GL_UNK03834, 0x00000000); etna_set_state(stream, VIVS_GL_UNK03838, 0x00000000); etna_set_state(stream, VIVS_GL_UNK03854, 0x00000000); } - if (!screen->specs.use_blt) { + if (!ctx->specs.use_blt) { /* Enable SINGLE_BUFFER for resolve, if supported */ - etna_set_state(stream, VIVS_RS_SINGLE_BUFFER, COND(screen->specs.single_buffer, VIVS_RS_SINGLE_BUFFER_ENABLE)); + etna_set_state(stream, VIVS_RS_SINGLE_BUFFER, COND(ctx->specs.single_buffer, VIVS_RS_SINGLE_BUFFER_ENABLE)); } - if (screen->specs.halti >= 5) { + if (ctx->specs.halti >= 5) { /* TXDESC cache flush - do this once at the beginning, as texture * descriptors are only written by the CPU once, then patched by the kernel * before command stream submission. It does not need flushing if the @@ -472,14 +439,14 @@ etna_flush(struct pipe_context *pctx, struct pipe_fence_handle **fence, mtx_lock(&ctx->lock); - list_for_each_entry(struct etna_acc_query, aq, &ctx->active_acc_queries, node) - etna_acc_query_suspend(aq, ctx); + list_for_each_entry(struct etna_hw_query, hq, &ctx->active_hw_queries, node) + etna_hw_query_suspend(hq, ctx); etna_cmd_stream_flush(ctx->stream, ctx->in_fence_fd, (flags & PIPE_FLUSH_FENCE_FD) ? &out_fence_fd : NULL); - list_for_each_entry(struct etna_acc_query, aq, &ctx->active_acc_queries, node) - etna_acc_query_resume(aq, ctx); + list_for_each_entry(struct etna_hw_query, hq, &ctx->active_hw_queries, node) + etna_hw_query_resume(hq, ctx); if (fence) *fence = etna_fence_create(pctx, out_fence_fd); @@ -492,16 +459,12 @@ etna_flush(struct pipe_context *pctx, struct pipe_fence_handle **fence, struct etna_resource *rsc = (struct etna_resource *)entry->key; struct pipe_resource *referenced = &rsc->base; - mtx_lock(&rsc->lock); - _mesa_set_remove_key(rsc->pending_ctx, ctx); /* if resource has no pending ctx's reset its status */ if (_mesa_set_next_entry(rsc->pending_ctx, NULL) == NULL) rsc->status &= ~ETNA_PENDING_READ; - mtx_unlock(&rsc->lock); - pipe_resource_reference(&referenced, NULL); } _mesa_set_clear(ctx->used_resources_read, NULL); @@ -510,13 +473,11 @@ etna_flush(struct pipe_context *pctx, struct pipe_fence_handle **fence, struct etna_resource *rsc = (struct etna_resource *)entry->key; struct pipe_resource *referenced = &rsc->base; - mtx_lock(&rsc->lock); _mesa_set_remove_key(rsc->pending_ctx, ctx); /* if resource has no pending ctx's reset its status */ if (_mesa_set_next_entry(rsc->pending_ctx, NULL) == NULL) rsc->status &= ~ETNA_PENDING_WRITE; - mtx_unlock(&rsc->lock); pipe_resource_reference(&referenced, NULL); } @@ -584,6 +545,7 @@ etna_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags) mtx_init(&ctx->lock, mtx_recursive); /* context ctxate setup */ + ctx->specs = screen->specs; ctx->screen = screen; /* need some sane default in case state tracker doesn't set some state: */ ctx->sample_mask = 0xffff; @@ -599,7 +561,6 @@ etna_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags) pctx->set_debug_callback = etna_set_debug_callback; pctx->create_fence_fd = etna_create_fence_fd; pctx->fence_server_sync = etna_fence_server_sync; - pctx->emit_string_marker = etna_emit_string_marker; /* creation of compile states */ pctx->create_blend_state = etna_blend_state_create; @@ -640,7 +601,7 @@ etna_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags) goto fail; slab_create_child(&ctx->transfer_pool, &screen->transfer_pool); - list_inithead(&ctx->active_acc_queries); + list_inithead(&ctx->active_hw_queries); /* create dummy RT buffer, used when rendering with no color buffer */ ctx->dummy_rt = etna_bo_new(ctx->screen->dev, 64 * 64 * 4, diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_context.h b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_context.h index dd6af3d93..6e3d7d1a3 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_context.h +++ b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_context.h @@ -73,11 +73,6 @@ struct etna_transfer { void *mapped; }; -struct etna_constbuf_state { - struct pipe_constant_buffer cb[ETNA_MAX_CONST_BUF]; - uint32_t enabled_mask; -}; - struct etna_vertexbuf_state { struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS]; struct compiled_set_vertex_buffer cvb[PIPE_MAX_ATTRIBS]; @@ -113,9 +108,8 @@ struct etna_context { void (*emit_texture_state)(struct etna_context *pctx); /* Get sampler TS pointer for sampler view */ struct etna_sampler_ts *(*ts_for_sampler_view)(struct pipe_sampler_view *pview); - /* GPU-specific blit implementation */ - bool (*blit)(struct pipe_context *pipe, const struct pipe_blit_info *info); + struct etna_specs specs; struct etna_screen *screen; struct etna_cmd_stream *stream; @@ -140,7 +134,6 @@ struct etna_context { ETNA_DIRTY_TS = (1 << 17), ETNA_DIRTY_TEXTURE_CACHES = (1 << 18), ETNA_DIRTY_DERIVE_TS = (1 << 19), - ETNA_DIRTY_SCISSOR_CLIP = (1 << 20), } dirty; uint32_t prim_hwsupport; @@ -159,19 +152,19 @@ struct etna_context { struct pipe_depth_stencil_alpha_state *zsa; struct compiled_vertex_elements_state *vertex_elements; struct compiled_shader_state shader_state; - struct pipe_scissor_state clipping; /* to simplify the emit process we store pre compiled state objects, * which got 'compiled' during state change. */ struct compiled_blend_color blend_color; struct compiled_stencil_ref stencil_ref; struct compiled_framebuffer_state framebuffer; + struct compiled_scissor_state scissor; struct compiled_viewport_state viewport; unsigned num_fragment_sampler_views; uint32_t active_sampler_views; uint32_t dirty_sampler_views; struct pipe_sampler_view *sampler_view[PIPE_MAX_SAMPLERS]; - struct etna_constbuf_state constant_buffer[PIPE_SHADER_TYPES]; + struct pipe_constant_buffer constant_buffer[PIPE_SHADER_TYPES][ETNA_MAX_CONST_BUF]; struct etna_vertexbuf_state vertex_buffer; struct etna_index_buffer index_buffer; struct etna_shader_state shader; @@ -180,11 +173,11 @@ struct etna_context { struct pipe_framebuffer_state framebuffer_s; struct pipe_stencil_ref stencil_ref_s; struct pipe_viewport_state viewport_s; - struct pipe_scissor_state scissor; + struct pipe_scissor_state scissor_s; /* stats/counters */ struct { - uint64_t prims_generated; + uint64_t prims_emitted; uint64_t draw_calls; uint64_t rs_operations; } stats; @@ -192,8 +185,8 @@ struct etna_context { struct pipe_debug_callback debug; int in_fence_fd; - /* list of accumulated HW queries */ - struct list_head active_acc_queries; + /* list of active hardware queries */ + struct list_head active_hw_queries; struct etna_bo *dummy_rt; struct etna_reloc dummy_rt_reloc; diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_emit.c b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_emit.c index cb55b2eb4..c3a37c4c4 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_emit.c +++ b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_emit.c @@ -145,11 +145,9 @@ emit_halti5_only_state(struct etna_context *ctx, int vs_output_count) } } if (unlikely(dirty & (ETNA_DIRTY_SHADER))) { - /*00A90*/ EMIT_STATE(PA_VARYING_NUM_COMPONENTS(0), ctx->shader_state.GL_VARYING_NUM_COMPONENTS[0]); - /*00A94*/ EMIT_STATE(PA_VARYING_NUM_COMPONENTS(1), ctx->shader_state.GL_VARYING_NUM_COMPONENTS[1]); + /*00A90*/ EMIT_STATE(PA_VARYING_NUM_COMPONENTS(0), ctx->shader_state.GL_VARYING_NUM_COMPONENTS); /*00AA8*/ EMIT_STATE(PA_VS_OUTPUT_COUNT, vs_output_count); - /*01080*/ EMIT_STATE(PS_VARYING_NUM_COMPONENTS(0), ctx->shader_state.GL_VARYING_NUM_COMPONENTS[0]); - /*01084*/ EMIT_STATE(PS_VARYING_NUM_COMPONENTS(1), ctx->shader_state.GL_VARYING_NUM_COMPONENTS[1]); + /*01080*/ EMIT_STATE(PS_VARYING_NUM_COMPONENTS(0), ctx->shader_state.GL_VARYING_NUM_COMPONENTS); /*03888*/ EMIT_STATE(GL_HALTI5_SH_SPECIALS, ctx->shader_state.GL_HALTI5_SH_SPECIALS); } etna_coalesce_end(stream, &coalesce); @@ -201,11 +199,10 @@ emit_pre_halti5_state(struct etna_context *ctx) /*01018*/ EMIT_STATE(PS_START_PC, ctx->shader_state.PS_START_PC); } if (unlikely(dirty & (ETNA_DIRTY_SHADER))) { - /*03820*/ EMIT_STATE(GL_VARYING_NUM_COMPONENTS, ctx->shader_state.GL_VARYING_NUM_COMPONENTS[0]); + /*03820*/ EMIT_STATE(GL_VARYING_NUM_COMPONENTS, ctx->shader_state.GL_VARYING_NUM_COMPONENTS); for (int x = 0; x < 2; ++x) { /*03828*/ EMIT_STATE(GL_VARYING_COMPONENT_USE(x), ctx->shader_state.GL_VARYING_COMPONENT_USE[x]); } - /*03834*/ EMIT_STATE(GL_VARYING_NUM_COMPONENTS2, ctx->shader_state.GL_VARYING_NUM_COMPONENTS[1]); } etna_coalesce_end(stream, &coalesce); } @@ -218,7 +215,6 @@ void etna_emit_state(struct etna_context *ctx) { struct etna_cmd_stream *stream = ctx->stream; - struct etna_screen *screen = ctx->screen; unsigned ccw = ctx->rasterizer->front_ccw; @@ -254,7 +250,7 @@ etna_emit_state(struct etna_context *ctx) * a) the number of vertex elements written matters: so write only active ones * b) the vertex element states must all be written: do not skip entries that stay the same */ if (dirty & (ETNA_DIRTY_VERTEX_ELEMENTS)) { - if (screen->specs.halti >= 5) { + if (ctx->specs.halti >= 5) { /*17800*/ etna_set_state_multi(stream, VIVS_NFE_GENERIC_ATTRIB_CONFIG0(0), ctx->vertex_elements->num_elements, ctx->vertex_elements->NFE_GENERIC_ATTRIB_CONFIG0); @@ -269,7 +265,7 @@ etna_emit_state(struct etna_context *ctx) /*00600*/ etna_set_state_multi(stream, VIVS_FE_VERTEX_ELEMENT_CONFIG(0), ctx->vertex_elements->num_elements, ctx->vertex_elements->FE_VERTEX_ELEMENT_CONFIG); - if (screen->specs.halti >= 2) { + if (ctx->specs.halti >= 2) { /*00780*/ etna_set_state_multi(stream, VIVS_FE_GENERIC_ATTRIB_SCALE(0), ctx->vertex_elements->num_elements, ctx->vertex_elements->NFE_GENERIC_ATTRIB_SCALE); @@ -323,7 +319,7 @@ etna_emit_state(struct etna_context *ctx) /*00674*/ EMIT_STATE(FE_PRIMITIVE_RESTART_INDEX, ctx->index_buffer.FE_PRIMITIVE_RESTART_INDEX); } if (likely(dirty & (ETNA_DIRTY_VERTEX_BUFFERS))) { - if (screen->specs.halti >= 2) { /* HALTI2+: NFE_VERTEX_STREAMS */ + if (ctx->specs.halti >= 2) { /* HALTI2+: NFE_VERTEX_STREAMS */ for (int x = 0; x < ctx->vertex_buffer.count; ++x) { /*14600*/ EMIT_STATE_RELOC(NFE_VERTEX_STREAMS_BASE_ADDR(x), &ctx->vertex_buffer.cvb[x].FE_VERTEX_STREAM_BASE_ADDR); } @@ -332,7 +328,7 @@ etna_emit_state(struct etna_context *ctx) /*14640*/ EMIT_STATE(NFE_VERTEX_STREAMS_CONTROL(x), ctx->vertex_buffer.cvb[x].FE_VERTEX_STREAM_CONTROL); } } - } else if(screen->specs.stream_count > 1) { /* hw w/ multiple vertex streams */ + } else if(ctx->specs.stream_count > 1) { /* hw w/ multiple vertex streams */ for (int x = 0; x < ctx->vertex_buffer.count; ++x) { /*00680*/ EMIT_STATE_RELOC(FE_VERTEX_STREAMS_BASE_ADDR(x), &ctx->vertex_buffer.cvb[x].FE_VERTEX_STREAM_BASE_ADDR); } @@ -347,7 +343,7 @@ etna_emit_state(struct etna_context *ctx) } } /* gallium has instance divisor as part of elements state */ - if ((dirty & (ETNA_DIRTY_VERTEX_ELEMENTS)) && screen->specs.halti >= 2) { + if ((dirty & (ETNA_DIRTY_VERTEX_ELEMENTS)) && ctx->specs.halti >= 2) { for (int x = 0; x < ctx->vertex_elements->num_buffers; ++x) { /*14680*/ EMIT_STATE(NFE_VERTEX_STREAMS_VERTEX_DIVISOR(x), ctx->vertex_elements->NFE_VERTEX_STREAMS_VERTEX_DIVISOR[x]); } @@ -391,11 +387,33 @@ etna_emit_state(struct etna_context *ctx) /*00A38*/ EMIT_STATE(PA_WIDE_LINE_WIDTH0, rasterizer->PA_LINE_WIDTH); /*00A3C*/ EMIT_STATE(PA_WIDE_LINE_WIDTH1, rasterizer->PA_LINE_WIDTH); } - if (unlikely(dirty & (ETNA_DIRTY_SCISSOR_CLIP))) { - /*00C00*/ EMIT_STATE_FIXP(SE_SCISSOR_LEFT, ctx->clipping.minx << 16); - /*00C04*/ EMIT_STATE_FIXP(SE_SCISSOR_TOP, ctx->clipping.miny << 16); - /*00C08*/ EMIT_STATE_FIXP(SE_SCISSOR_RIGHT, (ctx->clipping.maxx << 16) + ETNA_SE_SCISSOR_MARGIN_RIGHT); - /*00C0C*/ EMIT_STATE_FIXP(SE_SCISSOR_BOTTOM, (ctx->clipping.maxy << 16) + ETNA_SE_SCISSOR_MARGIN_BOTTOM); + if (unlikely(dirty & (ETNA_DIRTY_SCISSOR | ETNA_DIRTY_FRAMEBUFFER | + ETNA_DIRTY_RASTERIZER | ETNA_DIRTY_VIEWPORT))) { + /* this is a bit of a mess: rasterizer.scissor determines whether to use + * only the framebuffer scissor, or specific scissor state, and the + * viewport clips too so the logic spans four CSOs */ + struct etna_rasterizer_state *rasterizer = etna_rasterizer_state(ctx->rasterizer); + + uint32_t scissor_left = + MAX2(ctx->framebuffer.SE_SCISSOR_LEFT, ctx->viewport.SE_SCISSOR_LEFT); + uint32_t scissor_top = + MAX2(ctx->framebuffer.SE_SCISSOR_TOP, ctx->viewport.SE_SCISSOR_TOP); + uint32_t scissor_right = + MIN2(ctx->framebuffer.SE_SCISSOR_RIGHT, ctx->viewport.SE_SCISSOR_RIGHT); + uint32_t scissor_bottom = + MIN2(ctx->framebuffer.SE_SCISSOR_BOTTOM, ctx->viewport.SE_SCISSOR_BOTTOM); + + if (rasterizer->scissor) { + scissor_left = MAX2(ctx->scissor.SE_SCISSOR_LEFT, scissor_left); + scissor_top = MAX2(ctx->scissor.SE_SCISSOR_TOP, scissor_top); + scissor_right = MIN2(ctx->scissor.SE_SCISSOR_RIGHT, scissor_right); + scissor_bottom = MIN2(ctx->scissor.SE_SCISSOR_BOTTOM, scissor_bottom); + } + + /*00C00*/ EMIT_STATE_FIXP(SE_SCISSOR_LEFT, scissor_left); + /*00C04*/ EMIT_STATE_FIXP(SE_SCISSOR_TOP, scissor_top); + /*00C08*/ EMIT_STATE_FIXP(SE_SCISSOR_RIGHT, scissor_right); + /*00C0C*/ EMIT_STATE_FIXP(SE_SCISSOR_BOTTOM, scissor_bottom); } if (unlikely(dirty & (ETNA_DIRTY_RASTERIZER))) { struct etna_rasterizer_state *rasterizer = etna_rasterizer_state(ctx->rasterizer); @@ -404,9 +422,22 @@ etna_emit_state(struct etna_context *ctx) /*00C14*/ EMIT_STATE(SE_DEPTH_BIAS, rasterizer->SE_DEPTH_BIAS); /*00C18*/ EMIT_STATE(SE_CONFIG, rasterizer->SE_CONFIG); } - if (unlikely(dirty & (ETNA_DIRTY_SCISSOR_CLIP))) { - /*00C20*/ EMIT_STATE_FIXP(SE_CLIP_RIGHT, (ctx->clipping.maxx << 16) + ETNA_SE_CLIP_MARGIN_RIGHT); - /*00C24*/ EMIT_STATE_FIXP(SE_CLIP_BOTTOM, (ctx->clipping.maxy << 16) + ETNA_SE_CLIP_MARGIN_BOTTOM); + if (unlikely(dirty & (ETNA_DIRTY_SCISSOR | ETNA_DIRTY_FRAMEBUFFER | + ETNA_DIRTY_RASTERIZER | ETNA_DIRTY_VIEWPORT))) { + struct etna_rasterizer_state *rasterizer = etna_rasterizer_state(ctx->rasterizer); + + uint32_t clip_right = + MIN2(ctx->framebuffer.SE_CLIP_RIGHT, ctx->viewport.SE_CLIP_RIGHT); + uint32_t clip_bottom = + MIN2(ctx->framebuffer.SE_CLIP_BOTTOM, ctx->viewport.SE_CLIP_BOTTOM); + + if (rasterizer->scissor) { + clip_right = MIN2(ctx->scissor.SE_CLIP_RIGHT, clip_right); + clip_bottom = MIN2(ctx->scissor.SE_CLIP_BOTTOM, clip_bottom); + } + + /*00C20*/ EMIT_STATE_FIXP(SE_CLIP_RIGHT, clip_right); + /*00C24*/ EMIT_STATE_FIXP(SE_CLIP_BOTTOM, clip_bottom); } if (unlikely(dirty & (ETNA_DIRTY_SHADER))) { /*00E00*/ EMIT_STATE(RA_CONTROL, ctx->shader_state.RA_CONTROL); @@ -436,7 +467,7 @@ etna_emit_state(struct etna_context *ctx) if (unlikely(dirty & (ETNA_DIRTY_FRAMEBUFFER))) { /*0140C*/ EMIT_STATE(PE_DEPTH_NORMALIZE, ctx->framebuffer.PE_DEPTH_NORMALIZE); - if (screen->specs.pixel_pipes == 1) { + if (ctx->specs.pixel_pipes == 1) { /*01410*/ EMIT_STATE_RELOC(PE_DEPTH_ADDR, &ctx->framebuffer.PE_DEPTH_ADDR); } @@ -473,11 +504,11 @@ etna_emit_state(struct etna_context *ctx) /*0142C*/ EMIT_STATE(PE_COLOR_FORMAT, val); } if (unlikely(dirty & (ETNA_DIRTY_FRAMEBUFFER))) { - if (screen->specs.pixel_pipes == 1) { + if (ctx->specs.pixel_pipes == 1) { /*01430*/ EMIT_STATE_RELOC(PE_COLOR_ADDR, &ctx->framebuffer.PE_COLOR_ADDR); /*01434*/ EMIT_STATE(PE_COLOR_STRIDE, ctx->framebuffer.PE_COLOR_STRIDE); /*01454*/ EMIT_STATE(PE_HDEPTH_CONTROL, ctx->framebuffer.PE_HDEPTH_CONTROL); - } else if (screen->specs.pixel_pipes == 2) { + } else if (ctx->specs.pixel_pipes == 2) { /*01434*/ EMIT_STATE(PE_COLOR_STRIDE, ctx->framebuffer.PE_COLOR_STRIDE); /*01454*/ EMIT_STATE(PE_HDEPTH_CONTROL, ctx->framebuffer.PE_HDEPTH_CONTROL); /*01460*/ EMIT_STATE_RELOC(PE_PIPE_COLOR_ADDR(0), &ctx->framebuffer.PE_PIPE_COLOR_ADDR[0]); @@ -488,9 +519,8 @@ etna_emit_state(struct etna_context *ctx) abort(); } } - if (unlikely(dirty & (ETNA_DIRTY_STENCIL_REF | ETNA_DIRTY_RASTERIZER | ETNA_DIRTY_ZSA))) { - uint32_t val = etna_zsa_state(ctx->zsa)->PE_STENCIL_CONFIG_EXT; - /*014A0*/ EMIT_STATE(PE_STENCIL_CONFIG_EXT, val | ctx->stencil_ref.PE_STENCIL_CONFIG_EXT[ccw]); + if (unlikely(dirty & (ETNA_DIRTY_STENCIL_REF | ETNA_DIRTY_RASTERIZER))) { + /*014A0*/ EMIT_STATE(PE_STENCIL_CONFIG_EXT, ctx->stencil_ref.PE_STENCIL_CONFIG_EXT[ccw]); } if (unlikely(dirty & (ETNA_DIRTY_BLEND | ETNA_DIRTY_FRAMEBUFFER))) { struct etna_blend_state *blend = etna_blend_state(ctx->blend); @@ -503,14 +533,14 @@ etna_emit_state(struct etna_context *ctx) } } if (unlikely(dirty & (ETNA_DIRTY_BLEND_COLOR)) && - VIV_FEATURE(screen, chipMinorFeatures1, HALF_FLOAT)) { + VIV_FEATURE(ctx->screen, chipMinorFeatures1, HALF_FLOAT)) { /*014B0*/ EMIT_STATE(PE_ALPHA_COLOR_EXT0, ctx->blend_color.PE_ALPHA_COLOR_EXT0); /*014B4*/ EMIT_STATE(PE_ALPHA_COLOR_EXT1, ctx->blend_color.PE_ALPHA_COLOR_EXT1); } if (unlikely(dirty & (ETNA_DIRTY_ZSA | ETNA_DIRTY_RASTERIZER))) { /*014B8*/ EMIT_STATE(PE_STENCIL_CONFIG_EXT2, etna_zsa_state(ctx->zsa)->PE_STENCIL_CONFIG_EXT2[ccw]); } - if (unlikely(dirty & (ETNA_DIRTY_FRAMEBUFFER)) && screen->specs.halti >= 3) + if (unlikely(dirty & (ETNA_DIRTY_FRAMEBUFFER)) && ctx->specs.halti >= 3) /*014BC*/ EMIT_STATE(PE_MEM_CONFIG, ctx->framebuffer.PE_MEM_CONFIG); if (unlikely(dirty & (ETNA_DIRTY_FRAMEBUFFER | ETNA_DIRTY_TS))) { /*01654*/ EMIT_STATE(TS_MEM_CONFIG, ctx->framebuffer.TS_MEM_CONFIG); @@ -529,7 +559,7 @@ etna_emit_state(struct etna_context *ctx) /* end only EMIT_STATE */ /* Emit strongly architecture-specific state */ - if (screen->specs.halti >= 5) + if (ctx->specs.halti >= 5) emit_halti5_only_state(ctx, vs_output_count); else emit_pre_halti5_state(ctx); @@ -543,7 +573,7 @@ etna_emit_state(struct etna_context *ctx) * I summise that this is because the "new" locations at 0xc000 are not * properly protected against updates as other states seem to be. Hence, * we detect the "new" vertex shader instruction offset to apply this. */ - if (ctx->dirty & (ETNA_DIRTY_SHADER | ETNA_DIRTY_CONSTBUF) && screen->specs.vs_offset > 0x4000) + if (ctx->dirty & (ETNA_DIRTY_SHADER | ETNA_DIRTY_CONSTBUF) && ctx->specs.vs_offset > 0x4000) etna_stall(ctx->stream, SYNC_RECIPIENT_FE, SYNC_RECIPIENT_PE); /* We need to update the uniform cache only if one of the following bits are @@ -560,7 +590,7 @@ etna_emit_state(struct etna_context *ctx) ETNA_DIRTY_SHADER | ETNA_DIRTY_CONSTBUF; /**** Large dynamically-sized state ****/ - bool do_uniform_flush = screen->specs.halti < 5; + bool do_uniform_flush = ctx->specs.halti < 5; if (dirty & (ETNA_DIRTY_SHADER)) { /* Special case: a new shader was loaded; simply re-load all uniforms and * shader code at once */ @@ -572,7 +602,7 @@ etna_emit_state(struct etna_context *ctx) state can legitimately be programmed multiple times. */ - if (screen->specs.halti >= 5) { /* ICACHE (HALTI5) */ + if (ctx->specs.halti >= 5) { /* ICACHE (HALTI5) */ assert(ctx->shader_state.VS_INST_ADDR.bo && ctx->shader_state.PS_INST_ADDR.bo); /* Set icache (VS) */ etna_set_state(stream, VIVS_VS_NEWRANGE_LOW, 0); @@ -594,7 +624,7 @@ etna_emit_state(struct etna_context *ctx) } else if (ctx->shader_state.VS_INST_ADDR.bo || ctx->shader_state.PS_INST_ADDR.bo) { /* ICACHE (pre-HALTI5) */ - assert(screen->specs.has_icache && screen->specs.has_shader_range_registers); + assert(ctx->specs.has_icache && ctx->specs.has_shader_range_registers); /* Set icache (VS) */ etna_set_state(stream, VIVS_VS_RANGE, (ctx->shader_state.vs_inst_mem_size / 4 - 1) << 16); etna_set_state(stream, VIVS_VS_ICACHE_CONTROL, @@ -613,40 +643,40 @@ etna_emit_state(struct etna_context *ctx) } else { /* Upload shader directly, first flushing and disabling icache if * supported on this hw */ - if (screen->specs.has_icache) { + if (ctx->specs.has_icache) { etna_set_state(stream, VIVS_VS_ICACHE_CONTROL, VIVS_VS_ICACHE_CONTROL_FLUSH_PS | VIVS_VS_ICACHE_CONTROL_FLUSH_VS); } - if (screen->specs.has_shader_range_registers) { + if (ctx->specs.has_shader_range_registers) { etna_set_state(stream, VIVS_VS_RANGE, (ctx->shader_state.vs_inst_mem_size / 4 - 1) << 16); etna_set_state(stream, VIVS_PS_RANGE, ((ctx->shader_state.ps_inst_mem_size / 4 - 1 + 0x100) << 16) | 0x100); } - etna_set_state_multi(stream, screen->specs.vs_offset, + etna_set_state_multi(stream, ctx->specs.vs_offset, ctx->shader_state.vs_inst_mem_size, ctx->shader_state.VS_INST_MEM); - etna_set_state_multi(stream, screen->specs.ps_offset, + etna_set_state_multi(stream, ctx->specs.ps_offset, ctx->shader_state.ps_inst_mem_size, ctx->shader_state.PS_INST_MEM); } - if (screen->specs.has_unified_uniforms) { + if (ctx->specs.has_unified_uniforms) { etna_set_state(stream, VIVS_VS_UNIFORM_BASE, 0); - etna_set_state(stream, VIVS_PS_UNIFORM_BASE, screen->specs.max_vs_uniforms); + etna_set_state(stream, VIVS_PS_UNIFORM_BASE, ctx->specs.max_vs_uniforms); } if (do_uniform_flush) etna_set_state(stream, VIVS_VS_UNIFORM_CACHE, VIVS_VS_UNIFORM_CACHE_FLUSH); - etna_uniforms_write(ctx, ctx->shader.vs, ctx->constant_buffer[PIPE_SHADER_VERTEX].cb); + etna_uniforms_write(ctx, ctx->shader.vs, ctx->constant_buffer[PIPE_SHADER_VERTEX]); if (do_uniform_flush) etna_set_state(stream, VIVS_VS_UNIFORM_CACHE, VIVS_VS_UNIFORM_CACHE_FLUSH | VIVS_VS_UNIFORM_CACHE_PS); - etna_uniforms_write(ctx, ctx->shader.fs, ctx->constant_buffer[PIPE_SHADER_FRAGMENT].cb); + etna_uniforms_write(ctx, ctx->shader.fs, ctx->constant_buffer[PIPE_SHADER_FRAGMENT]); - if (screen->specs.halti >= 5) { + if (ctx->specs.halti >= 5) { /* HALTI5 needs to be prompted to pre-fetch shaders */ etna_set_state(stream, VIVS_VS_ICACHE_PREFETCH, 0x00000000); etna_set_state(stream, VIVS_PS_ICACHE_PREFETCH, 0x00000000); @@ -658,14 +688,14 @@ etna_emit_state(struct etna_context *ctx) etna_set_state(stream, VIVS_VS_UNIFORM_CACHE, VIVS_VS_UNIFORM_CACHE_FLUSH); if (dirty & (uniform_dirty_bits | ctx->shader.vs->uniforms_dirty_bits)) - etna_uniforms_write(ctx, ctx->shader.vs, ctx->constant_buffer[PIPE_SHADER_VERTEX].cb); + etna_uniforms_write(ctx, ctx->shader.vs, ctx->constant_buffer[PIPE_SHADER_VERTEX]); /* ideally this cache would only be flushed if there are PS uniform changes */ if (do_uniform_flush) etna_set_state(stream, VIVS_VS_UNIFORM_CACHE, VIVS_VS_UNIFORM_CACHE_FLUSH | VIVS_VS_UNIFORM_CACHE_PS); if (dirty & (uniform_dirty_bits | ctx->shader.fs->uniforms_dirty_bits)) - etna_uniforms_write(ctx, ctx->shader.fs, ctx->constant_buffer[PIPE_SHADER_FRAGMENT].cb); + etna_uniforms_write(ctx, ctx->shader.fs, ctx->constant_buffer[PIPE_SHADER_FRAGMENT]); } /**** End of state update ****/ #undef EMIT_STATE diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_format.c b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_format.c index 97df90e06..1e1486de8 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_format.c +++ b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_format.c @@ -268,11 +268,9 @@ translate_texture_format(enum pipe_format fmt) } bool -texture_use_int_filter(const struct pipe_sampler_view *sv, - const struct pipe_sampler_state *ss, - bool tex_desc) +texture_use_int_filter(const struct pipe_sampler_view *so, bool tex_desc) { - switch (sv->target) { + switch (so->target) { case PIPE_TEXTURE_1D_ARRAY: case PIPE_TEXTURE_2D_ARRAY: if (tex_desc) @@ -284,19 +282,13 @@ texture_use_int_filter(const struct pipe_sampler_view *sv, } /* only unorm formats can use int filter */ - if (!util_format_is_unorm(sv->format)) + if (!util_format_is_unorm(so->format)) return false; - if (util_format_is_srgb(sv->format)) + if (util_format_is_srgb(so->format)) return false; - if (util_format_description(sv->format)->layout == UTIL_FORMAT_LAYOUT_ASTC) - return false; - - if (ss->max_anisotropy > 1) - return false; - - switch (sv->format) { + switch (so->format) { /* apparently D16 can't use int filter but D24 can */ case PIPE_FORMAT_Z16_UNORM: case PIPE_FORMAT_R10G10B10A2_UNORM: diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_format.h b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_format.h index 0aaa4ad6e..ecc9f8e43 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_format.h +++ b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_format.h @@ -39,9 +39,7 @@ uint32_t translate_texture_format(enum pipe_format fmt); bool -texture_use_int_filter(const struct pipe_sampler_view *sv, - const struct pipe_sampler_state *ss, - bool tex_desc); +texture_use_int_filter(const struct pipe_sampler_view *so, bool tex_desc); bool texture_format_needs_swiz(enum pipe_format fmt); diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_internal.h b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_internal.h index dc5f3f2b9..03efa8e98 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_internal.h +++ b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_internal.h @@ -34,7 +34,7 @@ #include "drm/etnaviv_drmif.h" #define ETNA_NUM_INPUTS (16) -#define ETNA_NUM_VARYINGS 16 +#define ETNA_NUM_VARYINGS 8 #define ETNA_NUM_LOD (14) #define ETNA_NUM_LAYERS (6) #define ETNA_MAX_UNIFORMS (256) @@ -159,6 +159,16 @@ struct compiled_stencil_ref { uint32_t PE_STENCIL_CONFIG_EXT[2]; }; +/* Compiled pipe_scissor_state */ +struct compiled_scissor_state { + uint32_t SE_SCISSOR_LEFT; + uint32_t SE_SCISSOR_TOP; + uint32_t SE_SCISSOR_RIGHT; + uint32_t SE_SCISSOR_BOTTOM; + uint32_t SE_CLIP_RIGHT; + uint32_t SE_CLIP_BOTTOM; +}; + /* Compiled pipe_viewport_state */ struct compiled_viewport_state { uint32_t PA_VIEWPORT_SCALE_X; @@ -171,6 +181,8 @@ struct compiled_viewport_state { uint32_t SE_SCISSOR_TOP; uint32_t SE_SCISSOR_RIGHT; uint32_t SE_SCISSOR_BOTTOM; + uint32_t SE_CLIP_RIGHT; + uint32_t SE_CLIP_BOTTOM; uint32_t PE_DEPTH_NEAR; uint32_t PE_DEPTH_FAR; }; @@ -189,6 +201,12 @@ struct compiled_framebuffer_state { struct etna_reloc PE_PIPE_COLOR_ADDR[ETNA_MAX_PIXELPIPES]; uint32_t PE_COLOR_STRIDE; uint32_t PE_MEM_CONFIG; + uint32_t SE_SCISSOR_LEFT; + uint32_t SE_SCISSOR_TOP; + uint32_t SE_SCISSOR_RIGHT; + uint32_t SE_SCISSOR_BOTTOM; + uint32_t SE_CLIP_RIGHT; + uint32_t SE_CLIP_BOTTOM; uint32_t RA_MULTISAMPLE_UNK00E04; uint32_t RA_MULTISAMPLE_UNK00E10[VIVS_RA_MULTISAMPLE_UNK00E10__LEN]; uint32_t RA_CENTROID_TABLE[VIVS_RA_CENTROID_TABLE__LEN]; @@ -247,7 +265,7 @@ struct compiled_shader_state { uint32_t PS_START_PC; uint32_t PE_DEPTH_CONFIG; uint32_t GL_VARYING_TOTAL_COMPONENTS; - uint32_t GL_VARYING_NUM_COMPONENTS[2]; + uint32_t GL_VARYING_NUM_COMPONENTS; uint32_t GL_VARYING_COMPONENT_USE[2]; uint32_t GL_HALTI5_SH_SPECIALS; uint32_t FE_HALTI5_ID_CONFIG; diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_query.c b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_query.c index 01ec3bebc..89e016d01 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_query.c +++ b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_query.c @@ -29,10 +29,10 @@ #include "util/u_inlines.h" #include "etnaviv_context.h" -#include "etnaviv_perfmon.h" #include "etnaviv_query.h" -#include "etnaviv_query_acc.h" +#include "etnaviv_query_hw.h" #include "etnaviv_query_sw.h" +#include "etnaviv_query_pm.h" static struct pipe_query * etna_create_query(struct pipe_context *pctx, unsigned query_type, @@ -43,7 +43,9 @@ etna_create_query(struct pipe_context *pctx, unsigned query_type, q = etna_sw_create_query(ctx, query_type); if (!q) - q = etna_acc_create_query(ctx, query_type); + q = etna_hw_create_query(ctx, query_type); + if (!q) + q = etna_pm_create_query(ctx, query_type); return (struct pipe_query *)q; } @@ -60,10 +62,15 @@ static bool etna_begin_query(struct pipe_context *pctx, struct pipe_query *pq) { struct etna_query *q = etna_query(pq); + bool ret; - q->funcs->begin_query(etna_context(pctx), q); + if (q->active) + return false; - return true; + ret = q->funcs->begin_query(etna_context(pctx), q); + q->active = ret; + + return ret; } static bool @@ -71,7 +78,11 @@ etna_end_query(struct pipe_context *pctx, struct pipe_query *pq) { struct etna_query *q = etna_query(pq); + if (!q->active) + return false; + q->funcs->end_query(etna_context(pctx), q); + q->active = false; return true; } @@ -82,6 +93,9 @@ etna_get_query_result(struct pipe_context *pctx, struct pipe_query *pq, { struct etna_query *q = etna_query(pq); + if (q->active) + return false; + util_query_clear_result(result, q->type); return q->funcs->get_query_result(etna_context(pctx), q, wait, result); @@ -125,11 +139,11 @@ etna_set_active_query_state(struct pipe_context *pctx, bool enable) struct etna_context *ctx = etna_context(pctx); if (enable) { - list_for_each_entry(struct etna_acc_query, aq, &ctx->active_acc_queries, node) - etna_acc_query_resume(aq, ctx); + list_for_each_entry(struct etna_hw_query, hq, &ctx->active_hw_queries, node) + etna_hw_query_resume(hq, ctx); } else { - list_for_each_entry(struct etna_acc_query, aq, &ctx->active_acc_queries, node) - etna_acc_query_suspend(aq, ctx); + list_for_each_entry(struct etna_hw_query, hq, &ctx->active_hw_queries, node) + etna_hw_query_suspend(hq, ctx); } } diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_query.h b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_query.h index c3c5911f7..f1aa14990 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_query.h +++ b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_query.h @@ -35,7 +35,7 @@ struct etna_query; struct etna_query_funcs { void (*destroy_query)(struct etna_context *ctx, struct etna_query *q); - void (*begin_query)(struct etna_context *ctx, struct etna_query *q); + bool (*begin_query)(struct etna_context *ctx, struct etna_query *q); void (*end_query)(struct etna_context *ctx, struct etna_query *q); bool (*get_query_result)(struct etna_context *ctx, struct etna_query *q, bool wait, union pipe_query_result *result); @@ -43,6 +43,7 @@ struct etna_query_funcs { struct etna_query { const struct etna_query_funcs *funcs; + bool active; unsigned type; }; diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_query_acc.c b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_query_acc.c deleted file mode 100644 index 789f1234f..000000000 --- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_query_acc.c +++ /dev/null @@ -1,197 +0,0 @@ -/* - * Copyright (c) 2017 Etnaviv Project - * Copyright (C) 2017 Zodiac Inflight Innovations - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Rob Clark <robclark@freedesktop.org> - * Christian Gmeiner <christian.gmeiner@gmail.com> - */ - -#include "util/u_inlines.h" -#include "util/u_memory.h" - -#include "etnaviv_context.h" -#include "etnaviv_debug.h" -#include "etnaviv_emit.h" -#include "etnaviv_query_acc.h" -#include "etnaviv_screen.h" - - -extern const struct etna_acc_sample_provider occlusion_provider; -extern const struct etna_acc_sample_provider perfmon_provider; - -static const struct etna_acc_sample_provider *acc_sample_provider[] = -{ - &occlusion_provider, - &perfmon_provider, -}; - -static void -etna_acc_destroy_query(struct etna_context *ctx, struct etna_query *q) -{ - struct etna_acc_query *aq = etna_acc_query(q); - - pipe_resource_reference(&aq->prsc, NULL); - list_del(&aq->node); - - FREE(aq); -} - -static void -realloc_query_bo(struct etna_context *ctx, struct etna_acc_query *aq) -{ - struct etna_resource *rsc; - void *map; - - pipe_resource_reference(&aq->prsc, NULL); - - /* allocate resource with space for 64 * 64bit values */ - aq->prsc = pipe_buffer_create(&ctx->screen->base, PIPE_BIND_QUERY_BUFFER, - 0, 0x1000); - - /* don't assume the buffer is zero-initialized */ - rsc = etna_resource(aq->prsc); - - etna_bo_cpu_prep(rsc->bo, DRM_ETNA_PREP_WRITE); - - map = etna_bo_map(rsc->bo); - memset(map, 0, 0x1000); - etna_bo_cpu_fini(rsc->bo); -} - -static void -etna_acc_begin_query(struct etna_context *ctx, struct etna_query *q) -{ - struct etna_acc_query *aq = etna_acc_query(q); - const struct etna_acc_sample_provider *p = aq->provider; - - /* ->begin_query() discards previous results, so realloc bo */ - realloc_query_bo(ctx, aq); - - p->resume(aq, ctx); - aq->samples++; - - /* add to active list */ - assert(list_is_empty(&aq->node)); - list_addtail(&aq->node, &ctx->active_acc_queries); -} - -static void -etna_acc_end_query(struct etna_context *ctx, struct etna_query *q) -{ - struct etna_acc_query *aq = etna_acc_query(q); - const struct etna_acc_sample_provider *p = aq->provider; - - p->suspend(aq, ctx); - aq->samples++; - - /* remove from active list */ - list_delinit(&aq->node); -} - -static bool -etna_acc_get_query_result(struct etna_context *ctx, struct etna_query *q, - bool wait, union pipe_query_result *result) -{ - struct etna_acc_query *aq = etna_acc_query(q); - struct etna_resource *rsc = etna_resource(aq->prsc); - const struct etna_acc_sample_provider *p = aq->provider; - - assert(list_is_empty(&aq->node)); - - if (rsc->status & ETNA_PENDING_WRITE) { - if (!wait) { - /* piglit spec@arb_occlusion_query@occlusion_query_conform - * test, and silly apps perhaps, get stuck in a loop trying - * to get query result forever with wait==false.. we don't - * wait to flush unnecessarily but we also don't want to - * spin forever. - */ - if (aq->no_wait_cnt++ > 5) { - ctx->base.flush(&ctx->base, NULL, 0); - aq->no_wait_cnt = 0; - } - - return false; - } else { - /* flush that GPU executes all query related actions */ - ctx->base.flush(&ctx->base, NULL, 0); - } - } - - /* get the result */ - int ret = etna_bo_cpu_prep(rsc->bo, DRM_ETNA_PREP_READ); - if (ret) - return false; - - void *ptr = etna_bo_map(rsc->bo); - bool success = p->result(aq, ptr, result); - - if (success) - aq->samples = 0; - - etna_bo_cpu_fini(rsc->bo); - - return success; -} - -static const struct etna_query_funcs acc_query_funcs = { - .destroy_query = etna_acc_destroy_query, - .begin_query = etna_acc_begin_query, - .end_query = etna_acc_end_query, - .get_query_result = etna_acc_get_query_result, -}; - -struct etna_query * -etna_acc_create_query(struct etna_context *ctx, unsigned query_type) -{ - const struct etna_acc_sample_provider *p = NULL; - struct etna_acc_query *aq; - struct etna_query *q; - - /* find a sample provide for the requested query type */ - for (unsigned i = 0; i < ARRAY_SIZE(acc_sample_provider); i++) { - p = acc_sample_provider[i]; - - if (p->supports(query_type)) - break; - else - p = NULL; - } - - if (!p) - return NULL; - - aq = p->allocate(ctx, query_type); - if (!aq) - return NULL; - - aq->provider = p; - - list_inithead(&aq->node); - - q = &aq->base; - q->funcs = &acc_query_funcs; - q->type = query_type; - - return q; -} diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_query_acc_occlusion.c b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_query_acc_occlusion.c deleted file mode 100644 index 1094053af..000000000 --- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_query_acc_occlusion.c +++ /dev/null @@ -1,118 +0,0 @@ -/* - * Copyright (c) 2017 Etnaviv Project - * Copyright (C) 2017 Zodiac Inflight Innovations - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Rob Clark <robclark@freedesktop.org> - * Christian Gmeiner <christian.gmeiner@gmail.com> - */ - -#include "util/u_inlines.h" -#include "util/u_memory.h" - -#include "etnaviv_context.h" -#include "etnaviv_debug.h" -#include "etnaviv_emit.h" -#include "etnaviv_query_acc.h" -#include "etnaviv_screen.h" - -/* - * Occlusion Query: - * - * OCCLUSION_COUNTER and OCCLUSION_PREDICATE differ only in how they - * interpret results - */ - -static bool -occlusion_supports(unsigned query_type) -{ - switch (query_type) { - case PIPE_QUERY_OCCLUSION_COUNTER: - /* fallthrough */ - case PIPE_QUERY_OCCLUSION_PREDICATE: - /* fallthrough */ - case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE: - return true; - default: - return false; - } -} - -static struct etna_acc_query * -occlusion_allocate(struct etna_context *ctx, ASSERTED unsigned query_type) -{ - return CALLOC_STRUCT(etna_acc_query); -} - -static void -occlusion_resume(struct etna_acc_query *aq, struct etna_context *ctx) -{ - struct etna_resource *rsc = etna_resource(aq->prsc); - struct etna_reloc r = { - .bo = rsc->bo, - .flags = ETNA_RELOC_WRITE - }; - - if (aq->samples > 63) { - aq->samples = 63; - BUG("samples overflow"); - } - - r.offset = aq->samples * 8; /* 64bit value */ - - etna_set_state_reloc(ctx->stream, VIVS_GL_OCCLUSION_QUERY_ADDR, &r); - resource_written(ctx, aq->prsc); -} - -static void -occlusion_suspend(struct etna_acc_query *aq, struct etna_context *ctx) -{ - /* 0x1DF5E76 is the value used by blob - but any random value will work */ - etna_set_state(ctx->stream, VIVS_GL_OCCLUSION_QUERY_CONTROL, 0x1DF5E76); - resource_written(ctx, aq->prsc); -} - -static bool -occlusion_result(struct etna_acc_query *aq, void *buf, - union pipe_query_result *result) -{ - uint64_t sum = 0; - uint64_t *ptr = (uint64_t *)buf; - - for (unsigned i = 0; i < aq->samples; i++) - sum += *(ptr + i); - - if (aq->base.type == PIPE_QUERY_OCCLUSION_COUNTER) - result->u64 = sum; - else - result->b = !!sum; - - return true; -} - -const struct etna_acc_sample_provider occlusion_provider = { - .supports = occlusion_supports, - .allocate = occlusion_allocate, - .suspend = occlusion_suspend, - .resume = occlusion_resume, - .result = occlusion_result, -}; diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_query_acc_perfmon.c b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_query_acc_perfmon.c deleted file mode 100644 index 7c49fc88f..000000000 --- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_query_acc_perfmon.c +++ /dev/null @@ -1,167 +0,0 @@ -/* - * Copyright (c) 2017 Etnaviv Project - * Copyright (C) 2017 Zodiac Inflight Innovations - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Rob Clark <robclark@freedesktop.org> - * Christian Gmeiner <christian.gmeiner@gmail.com> - */ - -#include "util/u_memory.h" - -#include "etnaviv_context.h" -#include "etnaviv_debug.h" -#include "etnaviv_emit.h" -#include "etnaviv_query_acc.h" - -struct etna_pm_query -{ - struct etna_acc_query base; - - struct etna_perfmon_signal *signal; - unsigned sequence; -}; - -static inline struct etna_pm_query * -etna_pm_query(struct etna_acc_query *aq) -{ - return (struct etna_pm_query *)aq; -} - -static inline void -pm_add_signal(struct etna_pm_query *pq, struct etna_perfmon *perfmon, - const struct etna_perfmon_config *cfg) -{ - struct etna_perfmon_signal *signal = etna_pm_query_signal(perfmon, cfg->source); - - pq->signal = signal; -} - -static void -pm_query(struct etna_context *ctx, struct etna_acc_query *aq, unsigned flags) -{ - struct etna_cmd_stream *stream = ctx->stream; - struct etna_pm_query *pq = etna_pm_query(aq); - unsigned offset; - assert(flags); - - if (aq->samples > 127) { - aq->samples = 127; - BUG("samples overflow perfmon"); - } - - /* offset 0 is reserved for seq number */ - offset = 1 + aq->samples; - - pq->sequence++; - - /* skip seq number of 0 as the buffer got zeroed out */ - pq->sequence = MAX2(pq->sequence, 1); - - struct etna_perf p = { - .flags = flags, - .sequence = pq->sequence, - .bo = etna_resource(aq->prsc)->bo, - .signal = pq->signal, - .offset = offset - }; - - etna_cmd_stream_perf(stream, &p); - resource_written(ctx, aq->prsc); - - /* force a flush in !wait case in etna_acc_get_query_result(..) */ - aq->no_wait_cnt = 10; -} - -static bool -perfmon_supports(unsigned query_type) -{ - return !!etna_pm_query_config(query_type); -} - -static struct etna_acc_query * -perfmon_allocate(struct etna_context *ctx, unsigned query_type) -{ - struct etna_pm_query *pq; - const struct etna_perfmon_config *cfg; - - cfg = etna_pm_query_config(query_type); - if (!cfg) - return false; - - if (!etna_pm_cfg_supported(ctx->screen->perfmon, cfg)) - return false; - - pq = CALLOC_STRUCT(etna_pm_query); - if (!pq) - return NULL; - - pm_add_signal(pq, ctx->screen->perfmon, cfg); - - return &pq->base; -} - -static void -perfmon_resume(struct etna_acc_query *aq, struct etna_context *ctx) -{ - pm_query(ctx, aq, ETNA_PM_PROCESS_PRE); -} - -static void -perfmon_suspend(struct etna_acc_query *aq, struct etna_context *ctx) -{ - pm_query(ctx, aq, ETNA_PM_PROCESS_POST); -} - -static bool -perfmon_result(struct etna_acc_query *aq, void *buf, - union pipe_query_result *result) -{ - const struct etna_pm_query *pq = etna_pm_query(aq); - uint32_t sum = 0; - uint32_t *ptr = (uint32_t *)buf; - - /* check seq number */ - if (pq->sequence > ptr[0]) - return false; - - /* jump over seq number */ - ptr++; - - assert(aq->samples % 2 == 0); - - /* each pair has a start and end value */ - for (unsigned i = 0; i < aq->samples; i += 2) - sum += *(ptr + i + 1) - *(ptr + i); - - result->u32 = sum; - - return true; -} - -const struct etna_acc_sample_provider perfmon_provider = { - .supports = perfmon_supports, - .allocate = perfmon_allocate, - .resume = perfmon_resume, - .suspend = perfmon_suspend, - .result = perfmon_result, -}; diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_query_hw.c b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_query_hw.c new file mode 100644 index 000000000..588583c4f --- /dev/null +++ b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_query_hw.c @@ -0,0 +1,263 @@ +/* + * Copyright (c) 2017 Etnaviv Project + * Copyright (C) 2017 Zodiac Inflight Innovations + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Rob Clark <robclark@freedesktop.org> + * Christian Gmeiner <christian.gmeiner@gmail.com> + */ + +#include "util/u_inlines.h" +#include "util/u_memory.h" + +#include "etnaviv_context.h" +#include "etnaviv_debug.h" +#include "etnaviv_emit.h" +#include "etnaviv_query_hw.h" +#include "etnaviv_screen.h" + +/* + * Occlusion Query: + * + * OCCLUSION_COUNTER and OCCLUSION_PREDICATE differ only in how they + * interpret results + */ + +static void +occlusion_start(struct etna_hw_query *hq, struct etna_context *ctx) +{ + struct etna_resource *rsc = etna_resource(hq->prsc); + struct etna_reloc r = { + .bo = rsc->bo, + .flags = ETNA_RELOC_WRITE + }; + + if (hq->samples > 63) { + hq->samples = 63; + BUG("samples overflow"); + } + + r.offset = hq->samples * 8; /* 64bit value */ + + etna_set_state_reloc(ctx->stream, VIVS_GL_OCCLUSION_QUERY_ADDR, &r); +} + +static void +occlusion_stop(struct etna_hw_query *hq, struct etna_context *ctx) +{ + /* 0x1DF5E76 is the value used by blob - but any random value will work */ + etna_set_state(ctx->stream, VIVS_GL_OCCLUSION_QUERY_CONTROL, 0x1DF5E76); +} + +static void +occlusion_suspend(struct etna_hw_query *hq, struct etna_context *ctx) +{ + occlusion_stop(hq, ctx); +} + +static void +occlusion_resume(struct etna_hw_query *hq, struct etna_context *ctx) +{ + hq->samples++; + occlusion_start(hq, ctx); +} + +static void +occlusion_result(struct etna_hw_query *hq, void *buf, + union pipe_query_result *result) +{ + uint64_t sum = 0; + uint64_t *ptr = (uint64_t *)buf; + + for (unsigned i = 0; i <= hq->samples; i++) + sum += *(ptr + i); + + if (hq->base.type == PIPE_QUERY_OCCLUSION_COUNTER) + result->u64 = sum; + else + result->b = !!sum; +} + +static void +etna_hw_destroy_query(struct etna_context *ctx, struct etna_query *q) +{ + struct etna_hw_query *hq = etna_hw_query(q); + + pipe_resource_reference(&hq->prsc, NULL); + list_del(&hq->node); + + FREE(hq); +} + +static const struct etna_hw_sample_provider occlusion_provider = { + .start = occlusion_start, + .stop = occlusion_stop, + .suspend = occlusion_suspend, + .resume = occlusion_resume, + .result = occlusion_result, +}; + +static void +realloc_query_bo(struct etna_context *ctx, struct etna_hw_query *hq) +{ + struct etna_resource *rsc; + void *map; + + pipe_resource_reference(&hq->prsc, NULL); + + /* allocate resource with space for 64 * 64bit values */ + hq->prsc = pipe_buffer_create(&ctx->screen->base, PIPE_BIND_QUERY_BUFFER, + 0, 0x1000); + + /* don't assume the buffer is zero-initialized */ + rsc = etna_resource(hq->prsc); + + etna_bo_cpu_prep(rsc->bo, DRM_ETNA_PREP_WRITE); + + map = etna_bo_map(rsc->bo); + memset(map, 0, 0x1000); + etna_bo_cpu_fini(rsc->bo); +} + +static bool +etna_hw_begin_query(struct etna_context *ctx, struct etna_query *q) +{ + struct etna_hw_query *hq = etna_hw_query(q); + const struct etna_hw_sample_provider *p = hq->provider; + + /* ->begin_query() discards previous results, so realloc bo */ + realloc_query_bo(ctx, hq); + + p->start(hq, ctx); + + /* add to active list */ + assert(list_is_empty(&hq->node)); + list_addtail(&hq->node, &ctx->active_hw_queries); + + return true; +} + +static void +etna_hw_end_query(struct etna_context *ctx, struct etna_query *q) +{ + struct etna_hw_query *hq = etna_hw_query(q); + const struct etna_hw_sample_provider *p = hq->provider; + + p->stop(hq, ctx); + + /* remove from active list */ + list_delinit(&hq->node); +} + +static bool +etna_hw_get_query_result(struct etna_context *ctx, struct etna_query *q, + bool wait, union pipe_query_result *result) +{ + struct etna_hw_query *hq = etna_hw_query(q); + struct etna_resource *rsc = etna_resource(hq->prsc); + const struct etna_hw_sample_provider *p = hq->provider; + + assert(list_is_empty(&hq->node)); + + if (!wait) { + int ret; + + if (rsc->status & ETNA_PENDING_WRITE) { + /* piglit spec@arb_occlusion_query@occlusion_query_conform + * test, and silly apps perhaps, get stuck in a loop trying + * to get query result forever with wait==false.. we don't + * wait to flush unnecessarily but we also don't want to + * spin forever. + */ + if (hq->no_wait_cnt++ > 5) + ctx->base.flush(&ctx->base, NULL, 0); + return false; + } + + ret = etna_bo_cpu_prep(rsc->bo, DRM_ETNA_PREP_READ | DRM_ETNA_PREP_NOSYNC); + if (ret) + return false; + + etna_bo_cpu_fini(rsc->bo); + } + + /* flush that GPU executes all query related actions */ + ctx->base.flush(&ctx->base, NULL, 0); + + /* get the result */ + etna_bo_cpu_prep(rsc->bo, DRM_ETNA_PREP_READ); + + void *ptr = etna_bo_map(rsc->bo); + p->result(hq, ptr, result); + + etna_bo_cpu_fini(rsc->bo); + + return true; +} + +static const struct etna_query_funcs hw_query_funcs = { + .destroy_query = etna_hw_destroy_query, + .begin_query = etna_hw_begin_query, + .end_query = etna_hw_end_query, + .get_query_result = etna_hw_get_query_result, +}; + +static inline const struct etna_hw_sample_provider * +query_sample_provider(unsigned query_type) +{ + switch (query_type) { + case PIPE_QUERY_OCCLUSION_COUNTER: + /* fallthrough */ + case PIPE_QUERY_OCCLUSION_PREDICATE: + /* fallthrough */ + case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE: + return &occlusion_provider; + default: + return NULL; + } +} + +struct etna_query * +etna_hw_create_query(struct etna_context *ctx, unsigned query_type) +{ + struct etna_hw_query *hq; + struct etna_query *q; + const struct etna_hw_sample_provider *p; + + p = query_sample_provider(query_type); + if (!p) + return NULL; + + hq = CALLOC_STRUCT(etna_hw_query); + if (!hq) + return NULL; + + hq->provider = p; + + list_inithead(&hq->node); + + q = &hq->base; + q->funcs = &hw_query_funcs; + q->type = query_type; + + return q; +} diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_query_acc.h b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_query_hw.h index 9204befa0..73f3c851e 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_query_acc.h +++ b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_query_hw.h @@ -31,20 +31,19 @@ #include "etnaviv_query.h" -struct etna_acc_query; +struct etna_hw_query; -struct etna_acc_sample_provider { - bool (*supports)(unsigned query_type); - struct etna_acc_query * (*allocate)(struct etna_context *ctx, unsigned query_type); +struct etna_hw_sample_provider { + void (*start)(struct etna_hw_query *hq, struct etna_context *ctx); + void (*stop)(struct etna_hw_query *hq, struct etna_context *ctx); + void (*suspend)(struct etna_hw_query *hq, struct etna_context *ctx); + void (*resume)(struct etna_hw_query *hq, struct etna_context *ctx); - void (*resume)(struct etna_acc_query *aq, struct etna_context *ctx); - void (*suspend)(struct etna_acc_query *aq, struct etna_context *ctx); - - bool (*result)(struct etna_acc_query *aq, void *buf, - union pipe_query_result *result); + void (*result)(struct etna_hw_query *hq, void *buf, + union pipe_query_result *result); }; -struct etna_acc_query { +struct etna_hw_query { struct etna_query base; struct pipe_resource *prsc; @@ -52,34 +51,38 @@ struct etna_acc_query { unsigned no_wait_cnt; /* see etna_hw_get_query_result() */ struct list_head node; /* list-node in ctx->active_hw_queries */ - const struct etna_acc_sample_provider *provider; + const struct etna_hw_sample_provider *provider; }; -static inline struct etna_acc_query * -etna_acc_query(struct etna_query *q) +static inline struct etna_hw_query * +etna_hw_query(struct etna_query *q) { - return (struct etna_acc_query *)q; + return (struct etna_hw_query *)q; } struct etna_query * -etna_acc_create_query(struct etna_context *ctx, unsigned query_type); +etna_hw_create_query(struct etna_context *ctx, unsigned query_type); static inline void -etna_acc_query_suspend(struct etna_acc_query *aq, struct etna_context *ctx) +etna_hw_query_suspend(struct etna_hw_query *hq, struct etna_context *ctx) { - const struct etna_acc_sample_provider *p = aq->provider; + const struct etna_hw_sample_provider *p = hq->provider; + + if (!hq->base.active) + return; - p->suspend(aq, ctx); - aq->samples++; + p->suspend(hq, ctx); } static inline void -etna_acc_query_resume(struct etna_acc_query *aq, struct etna_context *ctx) +etna_hw_query_resume(struct etna_hw_query *hq, struct etna_context *ctx) { - const struct etna_acc_sample_provider *p = aq->provider; + const struct etna_hw_sample_provider *p = hq->provider; + + if (!hq->base.active) + return; - p->resume(aq, ctx); - aq->samples++; + p->resume(hq, ctx); } #endif diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_perfmon.c b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_query_pm.c index 049256446..1c9061f8a 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_perfmon.c +++ b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_query_pm.c @@ -25,10 +25,27 @@ * Christian Gmeiner <christian.gmeiner@gmail.com> */ +#include "util/u_inlines.h" +#include "util/u_memory.h" + #include "etnaviv_context.h" -#include "etnaviv_perfmon.h" +#include "etnaviv_query_pm.h" #include "etnaviv_screen.h" +struct etna_perfmon_source +{ + const char *domain; + const char *signal; +}; + +struct etna_perfmon_config +{ + const char *name; + unsigned type; + unsigned group_id; + const struct etna_perfmon_source *source; +}; + static const char *group_names[] = { [ETNA_QUERY_HI_GROUP_ID] = "HI", [ETNA_QUERY_PE_GROUP_ID] = "PE", @@ -403,7 +420,17 @@ static const struct etna_perfmon_config query_config[] = { } }; -struct etna_perfmon_signal * +static const struct etna_perfmon_config * +etna_pm_query_config(unsigned type) +{ + for (unsigned i = 0; i < ARRAY_SIZE(query_config); i++) + if (query_config[i].type == type) + return &query_config[i]; + + return NULL; +} + +static struct etna_perfmon_signal * etna_pm_query_signal(struct etna_perfmon *perfmon, const struct etna_perfmon_source *source) { @@ -416,6 +443,164 @@ etna_pm_query_signal(struct etna_perfmon *perfmon, return etna_perfmon_get_sig_by_name(domain, source->signal); } +static inline bool +etna_pm_cfg_supported(struct etna_perfmon *perfmon, + const struct etna_perfmon_config *cfg) +{ + struct etna_perfmon_signal *signal = etna_pm_query_signal(perfmon, cfg->source); + + return !!signal; +} + +static inline void +etna_pm_add_signal(struct etna_pm_query *pq, struct etna_perfmon *perfmon, + const struct etna_perfmon_config *cfg) +{ + struct etna_perfmon_signal *signal = etna_pm_query_signal(perfmon, cfg->source); + + pq->signal = signal; +} + +static bool +realloc_query_bo(struct etna_context *ctx, struct etna_pm_query *pq) +{ + if (pq->bo) + etna_bo_del(pq->bo); + + pq->bo = etna_bo_new(ctx->screen->dev, 64, DRM_ETNA_GEM_CACHE_WC); + if (unlikely(!pq->bo)) + return false; + + pq->data = etna_bo_map(pq->bo); + + return true; +} + +static void +etna_pm_query_get(struct etna_cmd_stream *stream, struct etna_query *q, + unsigned flags) +{ + struct etna_pm_query *pq = etna_pm_query(q); + unsigned offset; + assert(flags); + + if (flags == ETNA_PM_PROCESS_PRE) + offset = 1; + else + offset = 2; + + struct etna_perf p = { + .flags = flags, + .sequence = pq->sequence, + .bo = pq->bo, + .signal = pq->signal, + .offset = offset + }; + + etna_cmd_stream_perf(stream, &p); +} + +static inline void +etna_pm_query_update(struct etna_query *q) +{ + struct etna_pm_query *pq = etna_pm_query(q); + + if (pq->data[0] == pq->sequence) + pq->ready = true; +} + +static void +etna_pm_destroy_query(struct etna_context *ctx, struct etna_query *q) +{ + struct etna_pm_query *pq = etna_pm_query(q); + + etna_bo_del(pq->bo); + FREE(pq); +} + +static bool +etna_pm_begin_query(struct etna_context *ctx, struct etna_query *q) +{ + struct etna_pm_query *pq = etna_pm_query(q); + + pq->ready = false; + pq->sequence++; + + etna_pm_query_get(ctx->stream, q, ETNA_PM_PROCESS_PRE); + + return true; +} + +static void +etna_pm_end_query(struct etna_context *ctx, struct etna_query *q) +{ + etna_pm_query_get(ctx->stream, q, ETNA_PM_PROCESS_POST); +} + +static bool +etna_pm_get_query_result(struct etna_context *ctx, struct etna_query *q, + bool wait, union pipe_query_result *result) +{ + struct etna_pm_query *pq = etna_pm_query(q); + + etna_pm_query_update(q); + + if (!pq->ready) { + if (!wait) + return false; + + if (!etna_bo_cpu_prep(pq->bo, DRM_ETNA_PREP_READ)) + return false; + + pq->ready = true; + etna_bo_cpu_fini(pq->bo); + } + + result->u32 = pq->data[2] - pq->data[1]; + + return true; +} + +static const struct etna_query_funcs hw_query_funcs = { + .destroy_query = etna_pm_destroy_query, + .begin_query = etna_pm_begin_query, + .end_query = etna_pm_end_query, + .get_query_result = etna_pm_get_query_result, +}; + +struct etna_query * +etna_pm_create_query(struct etna_context *ctx, unsigned query_type) +{ + struct etna_perfmon *perfmon = ctx->screen->perfmon; + const struct etna_perfmon_config *cfg; + struct etna_pm_query *pq; + struct etna_query *q; + + cfg = etna_pm_query_config(query_type); + if (!cfg) + return NULL; + + if (!etna_pm_cfg_supported(perfmon, cfg)) + return NULL; + + pq = CALLOC_STRUCT(etna_pm_query); + if (!pq) + return NULL; + + if (!realloc_query_bo(ctx, pq)) { + FREE(pq); + return NULL; + } + + q = &pq->base; + q->funcs = &hw_query_funcs; + q->type = query_type; + + etna_pm_add_signal(pq, perfmon, cfg); + + return q; +} + void etna_pm_query_setup(struct etna_screen *screen) { @@ -434,16 +619,6 @@ etna_pm_query_setup(struct etna_screen *screen) } } -const struct etna_perfmon_config * -etna_pm_query_config(unsigned type) -{ - for (unsigned i = 0; i < ARRAY_SIZE(query_config); i++) - if (query_config[i].type == type) - return &query_config[i]; - - return NULL; -} - int etna_pm_get_driver_query_info(struct pipe_screen *pscreen, unsigned index, struct pipe_driver_query_info *info) @@ -464,6 +639,10 @@ etna_pm_get_driver_query_info(struct pipe_screen *pscreen, unsigned index, info->name = query_config[i].name; info->query_type = query_config[i].type; info->group_id = query_config[i].group_id; + info->type = PIPE_DRIVER_QUERY_TYPE_UINT; + info->result_type = PIPE_DRIVER_QUERY_RESULT_TYPE_AVERAGE; + info->max_value.u32 = 0; + info->flags = 0; return 1; } diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_perfmon.h b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_query_pm.h index bd658d46e..e80310cab 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_perfmon.h +++ b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_query_pm.h @@ -26,11 +26,10 @@ * Christian Gmeiner <christian.gmeiner@gmail.com> */ -#ifndef H_ETNAVIV_PERFMON -#define H_ETNAVIV_PERFMON +#ifndef H_ETNAVIV_QUERY_PM +#define H_ETNAVIV_QUERY_PM #include "etnaviv_query.h" -#include <pipe/p_screen.h> struct etna_screen; @@ -97,38 +96,26 @@ struct etna_screen; #define ETNA_QUERY_MC_TOTAL_READ_REQ_8B_FROM_IP (ETNA_PM_QUERY_BASE + 44) #define ETNA_QUERY_MC_TOTAL_WRITE_REQ_8B_FROM_PIPELINE (ETNA_PM_QUERY_BASE + 45) -struct etna_perfmon_source -{ - const char *domain; - const char *signal; -}; - -struct etna_perfmon_config -{ - const char *name; - unsigned type; - unsigned group_id; - const struct etna_perfmon_source *source; +struct etna_pm_query { + struct etna_query base; + struct etna_perfmon_signal *signal; + struct etna_bo *bo; + uint32_t *data; + uint32_t sequence; + bool ready; }; -struct etna_perfmon_signal * -etna_pm_query_signal(struct etna_perfmon *perfmon, - const struct etna_perfmon_source *source); - -static inline bool -etna_pm_cfg_supported(struct etna_perfmon *perfmon, - const struct etna_perfmon_config *cfg) +static inline struct etna_pm_query * +etna_pm_query(struct etna_query *q) { - struct etna_perfmon_signal *signal = etna_pm_query_signal(perfmon, cfg->source); - - return !!signal; + return (struct etna_pm_query *)q; } void etna_pm_query_setup(struct etna_screen *screen); -const struct etna_perfmon_config * -etna_pm_query_config(unsigned type); +struct etna_query * +etna_pm_create_query(struct etna_context *ctx, unsigned query_type); int etna_pm_get_driver_query_info(struct pipe_screen *pscreen, unsigned index, diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_query_sw.c b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_query_sw.c index 6bcd04d82..b9fc1cca2 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_query_sw.c +++ b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_query_sw.c @@ -45,8 +45,8 @@ static uint64_t read_counter(struct etna_context *ctx, unsigned type) { switch (type) { - case PIPE_QUERY_PRIMITIVES_GENERATED: - return ctx->stats.prims_generated; + case PIPE_QUERY_PRIMITIVES_EMITTED: + return ctx->stats.prims_emitted; case ETNA_QUERY_DRAW_CALLS: return ctx->stats.draw_calls; case ETNA_QUERY_RS_OPERATIONS: @@ -56,12 +56,14 @@ read_counter(struct etna_context *ctx, unsigned type) return 0; } -static void +static bool etna_sw_begin_query(struct etna_context *ctx, struct etna_query *q) { struct etna_sw_query *sq = etna_sw_query(q); sq->begin_value = read_counter(ctx, q->type); + + return true; } static void @@ -97,7 +99,7 @@ etna_sw_create_query(struct etna_context *ctx, unsigned query_type) struct etna_query *q; switch (query_type) { - case PIPE_QUERY_PRIMITIVES_GENERATED: + case PIPE_QUERY_PRIMITIVES_EMITTED: case ETNA_QUERY_DRAW_CALLS: case ETNA_QUERY_RS_OPERATIONS: break; @@ -117,7 +119,7 @@ etna_sw_create_query(struct etna_context *ctx, unsigned query_type) } static const struct pipe_driver_query_info list[] = { - {"prims-generated", PIPE_QUERY_PRIMITIVES_GENERATED, { 0 }}, + {"prims-emitted", PIPE_QUERY_PRIMITIVES_EMITTED, { 0 }}, {"draw-calls", ETNA_QUERY_DRAW_CALLS, { 0 }}, {"rs-operations", ETNA_QUERY_RS_OPERATIONS, { 0 }}, }; diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_resource.c b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_resource.c index e2ef97f28..4a992b5f6 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_resource.c +++ b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_resource.c @@ -321,7 +321,6 @@ etna_resource_alloc(struct pipe_screen *pscreen, unsigned layout, memset(map, 0, size); } - mtx_init(&rsc->lock, mtx_recursive); rsc->pending_ctx = _mesa_set_create(NULL, _mesa_hash_pointer, _mesa_key_pointer_equal); if (!rsc->pending_ctx) @@ -464,10 +463,8 @@ etna_resource_destroy(struct pipe_screen *pscreen, struct pipe_resource *prsc) { struct etna_resource *rsc = etna_resource(prsc); - mtx_lock(&rsc->lock); assert(!_mesa_set_next_entry(rsc->pending_ctx, NULL)); _mesa_set_destroy(rsc->pending_ctx, NULL); - mtx_unlock(&rsc->lock); if (rsc->bo) etna_bo_del(rsc->bo); @@ -486,8 +483,6 @@ etna_resource_destroy(struct pipe_screen *pscreen, struct pipe_resource *prsc) for (unsigned i = 0; i < ETNA_NUM_LOD; i++) FREE(rsc->levels[i].patch_offsets); - mtx_destroy(&rsc->lock); - FREE(rsc); } @@ -564,7 +559,6 @@ etna_resource_from_handle(struct pipe_screen *pscreen, goto fail; } - mtx_init(&rsc->lock, mtx_recursive); rsc->pending_ctx = _mesa_set_create(NULL, _mesa_hash_pointer, _mesa_key_pointer_equal); if (!rsc->pending_ctx) @@ -609,6 +603,34 @@ etna_resource_get_handle(struct pipe_screen *pscreen, } } +enum etna_resource_status +etna_resource_get_status(struct etna_context *ctx, struct etna_resource *rsc) +{ + enum etna_resource_status newstatus = 0; + + set_foreach(rsc->pending_ctx, entry) { + struct etna_context *extctx = (struct etna_context *)entry->key; + + set_foreach(extctx->used_resources_read, entry2) { + struct etna_resource *rsc2 = (struct etna_resource *)entry2->key; + if (ctx == extctx || rsc2 != rsc) + continue; + + newstatus |= ETNA_PENDING_READ; + } + + set_foreach(extctx->used_resources_write, entry2) { + struct etna_resource *rsc2 = (struct etna_resource *)entry2->key; + if (ctx == extctx || rsc2 != rsc) + continue; + + newstatus |= ETNA_PENDING_WRITE; + } + } + + return newstatus; +} + void etna_resource_used(struct etna_context *ctx, struct pipe_resource *prsc, enum etna_resource_status status) @@ -622,41 +644,18 @@ etna_resource_used(struct etna_context *ctx, struct pipe_resource *prsc, mtx_lock(&ctx->lock); rsc = etna_resource(prsc); -again: - mtx_lock(&rsc->lock); set_foreach(rsc->pending_ctx, entry) { struct etna_context *extctx = (struct etna_context *)entry->key; struct pipe_context *pctx = &extctx->base; - bool need_flush = false; - - if (mtx_trylock(&extctx->lock) != thrd_success) { - /* - * The other context could be locked in etna_flush() and - * stuck waiting for the resource lock, so release the - * resource lock here, let etna_flush() finish, and try - * again. - */ - mtx_unlock(&rsc->lock); - thrd_yield(); - goto again; - } set_foreach(extctx->used_resources_read, entry2) { struct etna_resource *rsc2 = (struct etna_resource *)entry2->key; if (ctx == extctx || rsc2 != rsc) continue; - if (status & ETNA_PENDING_WRITE) { - need_flush = true; - break; - } - } - - if (need_flush) { - pctx->flush(pctx, NULL, 0); - mtx_unlock(&extctx->lock); - continue; + if (status & ETNA_PENDING_WRITE) + pctx->flush(pctx, NULL, 0); } set_foreach(extctx->used_resources_write, entry2) { @@ -664,14 +663,8 @@ again: if (ctx == extctx || rsc2 != rsc) continue; - need_flush = true; - break; - } - - if (need_flush) pctx->flush(pctx, NULL, 0); - - mtx_unlock(&extctx->lock); + } } rsc->status = status; @@ -683,7 +676,6 @@ again: _mesa_set_add(rsc->pending_ctx, ctx); } - mtx_unlock(&rsc->lock); mtx_unlock(&ctx->lock); } diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_resource.h b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_resource.h index cb83e891d..1da0315ab 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_resource.h +++ b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_resource.h @@ -96,7 +96,6 @@ struct etna_resource { enum etna_resource_status status; - mtx_t lock; /* Lock to protect pending_ctx */ struct set *pending_ctx; }; @@ -151,6 +150,9 @@ etna_resource(struct pipe_resource *p) return (struct etna_resource *)p; } +enum etna_resource_status +etna_resource_get_status(struct etna_context *ctx, struct etna_resource *rsc); + void etna_resource_used(struct etna_context *ctx, struct pipe_resource *prsc, enum etna_resource_status status); diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_rs.c b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_rs.c index bcd11e05a..e3f7fbd8d 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_rs.c +++ b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_rs.c @@ -69,8 +69,6 @@ void etna_compile_rs_state(struct etna_context *ctx, struct compiled_rs_state *cs, const struct rs_state *rs) { - struct etna_screen *screen = ctx->screen; - memset(cs, 0, sizeof(*cs)); /* TILED and SUPERTILED layout have their strides multiplied with 4 in RS */ @@ -106,7 +104,7 @@ etna_compile_rs_state(struct etna_context *ctx, struct compiled_rs_state *cs, * destination buffer respectively. This will be overridden below as * necessary for the multi-pipe, multi-tiled case. */ - for (unsigned pipe = 0; pipe < screen->specs.pixel_pipes; ++pipe) { + for (unsigned pipe = 0; pipe < ctx->specs.pixel_pipes; ++pipe) { cs->source[pipe].bo = rs->source; cs->source[pipe].offset = rs->source_offset; cs->source[pipe].flags = ETNA_RELOC_READ; @@ -133,7 +131,7 @@ etna_compile_rs_state(struct etna_context *ctx, struct compiled_rs_state *cs, VIVS_RS_WINDOW_SIZE_HEIGHT(rs->height); /* use dual pipe mode when required */ - if (!screen->specs.single_buffer && screen->specs.pixel_pipes == 2 && !(rs->height & 7)) { + if (!ctx->specs.single_buffer && ctx->specs.pixel_pipes == 2 && !(rs->height & 7)) { cs->RS_WINDOW_SIZE = VIVS_RS_WINDOW_SIZE_WIDTH(rs->width) | VIVS_RS_WINDOW_SIZE_HEIGHT(rs->height / 2); cs->RS_PIPE_OFFSET[1] = VIVS_RS_PIPE_OFFSET_X(0) | VIVS_RS_PIPE_OFFSET_Y(rs->height / 2); @@ -152,7 +150,7 @@ etna_compile_rs_state(struct etna_context *ctx, struct compiled_rs_state *cs, /* If source the same as destination, and the hardware supports this, * do an in-place resolve to fill in unrendered tiles. */ - if (screen->specs.single_buffer && rs->source == rs->dest && + if (ctx->specs.single_buffer && rs->source == rs->dest && rs->source_offset == rs->dest_offset && rs->source_format == rs->dest_format && rs->source_tiling == rs->dest_tiling && @@ -269,7 +267,6 @@ void etna_rs_gen_clear_surface(struct etna_context *ctx, struct etna_surface *surf, uint64_t clear_value) { - struct etna_screen *screen = ctx->screen; struct etna_resource *dst = etna_resource(surf->base.texture); uint32_t format; @@ -281,7 +278,7 @@ etna_rs_gen_clear_surface(struct etna_context *ctx, struct etna_surface *surf, format = RS_FORMAT_A8R8G8B8; break; case 64: - assert(screen->specs.halti >= 2); + assert(ctx->specs.halti >= 2); format = RS_FORMAT_64BPP_CLEAR; break; default: @@ -407,7 +404,7 @@ etna_blit_clear_zs_rs(struct pipe_context *pctx, struct pipe_surface *dst, } static void -etna_clear_rs(struct pipe_context *pctx, unsigned buffers, const struct pipe_scissor_state *scissor_state, +etna_clear_rs(struct pipe_context *pctx, unsigned buffers, const union pipe_color_union *color, double depth, unsigned stencil) { struct etna_context *ctx = etna_context(pctx); @@ -540,12 +537,11 @@ etna_get_rs_alignment_mask(const struct etna_context *ctx, const enum etna_surface_layout layout, unsigned int *width_mask, unsigned int *height_mask) { - struct etna_screen *screen = ctx->screen; unsigned int h_align, w_align; if (layout & ETNA_LAYOUT_BIT_SUPER) { w_align = 64; - h_align = 64 * screen->specs.pixel_pipes; + h_align = 64 * ctx->specs.pixel_pipes; } else { w_align = ETNA_RS_WIDTH_MASK + 1; h_align = ETNA_RS_HEIGHT_MASK + 1; @@ -803,7 +799,7 @@ manual: return false; } -static bool +static void etna_blit_rs(struct pipe_context *pctx, const struct pipe_blit_info *blit_info) { /* This is a more extended version of resource_copy_region */ @@ -820,24 +816,43 @@ etna_blit_rs(struct pipe_context *pctx, const struct pipe_blit_info *blit_info) * * For the rest, fall back to util_blitter * XXX this goes wrong when source surface is supertiled. */ + struct etna_context *ctx = etna_context(pctx); + struct pipe_blit_info info = *blit_info; - if (blit_info->src.resource->nr_samples > 1 && - blit_info->dst.resource->nr_samples <= 1 && - !util_format_is_depth_or_stencil(blit_info->src.resource->format) && - !util_format_is_pure_integer(blit_info->src.resource->format)) { + if (info.src.resource->nr_samples > 1 && + info.dst.resource->nr_samples <= 1 && + !util_format_is_depth_or_stencil(info.src.resource->format) && + !util_format_is_pure_integer(info.src.resource->format)) { DBG("color resolve unimplemented"); - return false; + return; } - return etna_try_rs_blit(pctx, blit_info); + if (etna_try_rs_blit(pctx, blit_info)) + return; + + if (util_try_blit_via_copy_region(pctx, blit_info)) + return; + + if (info.mask & PIPE_MASK_S) { + DBG("cannot blit stencil, skipping"); + info.mask &= ~PIPE_MASK_S; + } + + if (!util_blitter_is_blit_supported(ctx->blitter, &info)) { + DBG("blit unsupported %s -> %s", + util_format_short_name(info.src.resource->format), + util_format_short_name(info.dst.resource->format)); + return; + } + + etna_blit_save_state(ctx); + util_blitter_blit(ctx->blitter, &info); } void etna_clear_blit_rs_init(struct pipe_context *pctx) { - struct etna_context *ctx = etna_context(pctx); - DBG("etnaviv: Using RS blit engine"); pctx->clear = etna_clear_rs; - ctx->blit = etna_blit_rs; + pctx->blit = etna_blit_rs; } diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_screen.c b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_screen.c index 6b3566884..cc6affe64 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_screen.c +++ b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_screen.c @@ -134,6 +134,7 @@ etna_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) switch (param) { /* Supported features (boolean caps). */ + case PIPE_CAP_ANISOTROPIC_FILTER: case PIPE_CAP_POINT_SPRITE: case PIPE_CAP_BLEND_EQUATION_SEPARATE: case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT: @@ -150,8 +151,6 @@ etna_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_VERTEX_COLOR_UNCLAMPED: case PIPE_CAP_MIXED_COLOR_DEPTH_BITS: case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES: - case PIPE_CAP_STRING_MARKER: - case PIPE_CAP_SHAREABLE_SHADERS: return 1; case PIPE_CAP_NATIVE_FENCE_FD: return screen->drm_version >= ETNA_DRM_VERSION_FENCE_FD; @@ -171,7 +170,6 @@ etna_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) return true; /* VIV_FEATURE(priv->dev, chipMinorFeatures1, NON_POWER_OF_TWO); */ - case PIPE_CAP_ANISOTROPIC_FILTER: case PIPE_CAP_TEXTURE_SWIZZLE: case PIPE_CAP_PRIMITIVE_RESTART: return VIV_FEATURE(screen, chipMinorFeatures1, HALTI0); @@ -231,22 +229,6 @@ etna_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) /* Preferences */ case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER: return 0; - case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET: { - /* etnaviv is being run on systems as small as 256MB total RAM so - * we need to provide a sane value for such a device. Limit the - * memory budget to min(~3% of pyhiscal memory, 64MB). - * - * a simple divison by 32 provides the numbers we want. - * 256MB / 32 = 8MB - * 2048MB / 32 = 64MB - */ - uint64_t system_memory; - - if (!os_get_total_physical_memory(&system_memory)) - system_memory = (uint64_t)4096 << 20; - - return MIN2(system_memory / 32, 64 * 1024 * 1024); - } case PIPE_CAP_MAX_VARYINGS: return screen->specs.max_varyings; @@ -461,9 +443,16 @@ gpu_supports_render_format(struct etna_screen *screen, enum pipe_format format, if (fmt == ETNA_NO_MATCH) return false; - /* MSAA is broken */ - if (sample_count > 1) + /* Validate MSAA; number of samples must be allowed, and render target + * must have MSAA'able format. */ + if (sample_count > 1) { + if (!VIV_FEATURE(screen, chipFeatures, MSAA)) + return false; + if (!translate_samples_to_xyscale(sample_count, NULL, NULL)) return false; + if (translate_ts_format(format) == ETNA_NO_MATCH) + return false; + } if (format == PIPE_FORMAT_R8_UNORM) return VIV_FEATURE(screen, chipMinorFeatures5, HALTI5); @@ -695,12 +684,6 @@ etna_get_specs(struct etna_screen *screen) } screen->specs.num_constants = val; - if (etna_gpu_get_param(screen->gpu, ETNA_GPU_NUM_VARYINGS, &val)) { - DBG("could not get ETNA_GPU_NUM_VARYINGS"); - goto fail; - } - screen->specs.max_varyings = MAX2(val, ETNA_NUM_VARYINGS); - /* Figure out gross GPU architecture. See rnndb/common.xml for a specific * description of the differences. */ if (VIV_FEATURE(screen, chipMinorFeatures5, HALTI5)) @@ -795,14 +778,22 @@ etna_get_specs(struct etna_screen *screen) } if (VIV_FEATURE(screen, chipMinorFeatures1, HALTI0)) { + screen->specs.max_varyings = 12; screen->specs.vertex_max_elements = 16; } else { + screen->specs.max_varyings = 8; /* Etna_viv documentation seems confused over the correct value * here so choose the lower to be safe: HALTI0 says 16 i.s.o. * 10, but VERTEX_ELEMENT_CONFIG register says 16 i.s.o. 12. */ screen->specs.vertex_max_elements = 10; } + /* Etna_viv documentation does not indicate where varyings above 8 are + * stored. Moreover, if we are passed more than 8 varyings, we will + * walk off the end of some arrays. Limit the maximum number of varyings. */ + if (screen->specs.max_varyings > ETNA_NUM_VARYINGS) + screen->specs.max_varyings = ETNA_NUM_VARYINGS; + etna_determine_uniform_limits(screen); if (screen->specs.halti >= 5) { diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_screen.h b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_screen.h index 1bdae5a16..e69d598c4 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_screen.h +++ b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_screen.h @@ -29,7 +29,7 @@ #define H_ETNAVIV_SCREEN #include "etnaviv_internal.h" -#include "etnaviv_perfmon.h" +#include "etnaviv_query_pm.h" #include "os/os_thread.h" #include "pipe/p_screen.h" diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_shader.c b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_shader.c index 3ac619ac9..6f6f8d2b9 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_shader.c +++ b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_shader.c @@ -190,8 +190,7 @@ etna_link_shaders(struct etna_context *ctx, struct compiled_shader_state *cs, cs->GL_VARYING_TOTAL_COMPONENTS = VIVS_GL_VARYING_TOTAL_COMPONENTS_NUM(align(total_components, 2)); - cs->GL_VARYING_NUM_COMPONENTS[0] = num_components[0]; - cs->GL_VARYING_NUM_COMPONENTS[1] = num_components[1]; + cs->GL_VARYING_NUM_COMPONENTS = num_components[0]; cs->GL_VARYING_COMPONENT_USE[0] = component_use[0]; cs->GL_VARYING_COMPONENT_USE[1] = component_use[1]; @@ -394,7 +393,6 @@ etna_create_shader_state(struct pipe_context *pctx, const struct pipe_shader_state *pss) { struct etna_context *ctx = etna_context(pctx); - struct etna_screen *screen = ctx->screen; struct etna_shader *shader = CALLOC_STRUCT(etna_shader); if (!shader) @@ -402,7 +400,7 @@ etna_create_shader_state(struct pipe_context *pctx, static uint32_t id; shader->id = id++; - shader->specs = &screen->specs; + shader->specs = &ctx->specs; if (DBG_ENABLED(ETNA_DBG_NIR)) shader->nir = (pss->type == PIPE_SHADER_IR_NIR) ? pss->ir.nir : diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_state.c b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_state.c index 5559cc54f..5de34a887 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_state.c +++ b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_state.c @@ -33,8 +33,6 @@ #include "etnaviv_clear_blit.h" #include "etnaviv_context.h" #include "etnaviv_format.h" -#include "etnaviv_rasterizer.h" -#include "etnaviv_screen.h" #include "etnaviv_shader.h" #include "etnaviv_surface.h" #include "etnaviv_translate.h" @@ -84,27 +82,23 @@ etna_set_constant_buffer(struct pipe_context *pctx, const struct pipe_constant_buffer *cb) { struct etna_context *ctx = etna_context(pctx); - struct etna_constbuf_state *so = &ctx->constant_buffer[shader]; assert(index < ETNA_MAX_CONST_BUF); - util_copy_constant_buffer(&so->cb[index], cb); + util_copy_constant_buffer(&ctx->constant_buffer[shader][index], cb); /* Note that the state tracker can unbind constant buffers by * passing NULL here. */ - if (unlikely(!cb || (!cb->buffer && !cb->user_buffer))) { - so->enabled_mask &= ~(1 << index); + if (unlikely(!cb || (!cb->buffer && !cb->user_buffer))) return; - } assert(index != 0 || cb->user_buffer != NULL); if (!cb->buffer) { - struct pipe_constant_buffer *cb = &so->cb[index]; + struct pipe_constant_buffer *cb = &ctx->constant_buffer[shader][index]; u_upload_data(pctx->const_uploader, 0, cb->buffer_size, 16, cb->user_buffer, &cb->buffer_offset, &cb->buffer); } - so->enabled_mask |= 1 << index; ctx->dirty |= ETNA_DIRTY_CONSTBUF; } @@ -130,7 +124,6 @@ etna_set_framebuffer_state(struct pipe_context *pctx, const struct pipe_framebuffer_state *fb) { struct etna_context *ctx = etna_context(pctx); - struct etna_screen *screen = ctx->screen; struct compiled_framebuffer_state *cs = &ctx->framebuffer; int nr_samples_color = -1; int nr_samples_depth = -1; @@ -159,7 +152,7 @@ etna_set_framebuffer_state(struct pipe_context *pctx, VIVS_PE_COLOR_FORMAT_COMPONENTS__MASK | VIVS_PE_COLOR_FORMAT_OVERWRITE | COND(color_supertiled, VIVS_PE_COLOR_FORMAT_SUPER_TILED) | - COND(color_supertiled && screen->specs.halti >= 5, VIVS_PE_COLOR_FORMAT_SUPER_TILED_NEW); + COND(color_supertiled && ctx->specs.halti >= 5, VIVS_PE_COLOR_FORMAT_SUPER_TILED_NEW); /* VIVS_PE_COLOR_FORMAT_COMPONENTS() and * VIVS_PE_COLOR_FORMAT_OVERWRITE comes from blend_state * but only if we set the bits above. */ @@ -175,13 +168,13 @@ etna_set_framebuffer_state(struct pipe_context *pctx, cbuf->surf.offset, cbuf->surf.stride * 4); } - if (screen->specs.pixel_pipes == 1) { + if (ctx->specs.pixel_pipes == 1) { cs->PE_COLOR_ADDR = cbuf->reloc[0]; cs->PE_COLOR_ADDR.flags = ETNA_RELOC_READ | ETNA_RELOC_WRITE; } else { /* Rendered textures must always be multi-tiled, or single-buffer mode must be supported */ - assert((res->layout & ETNA_LAYOUT_BIT_MULTI) || screen->specs.single_buffer); - for (int i = 0; i < screen->specs.pixel_pipes; i++) { + assert((res->layout & ETNA_LAYOUT_BIT_MULTI) || ctx->specs.single_buffer); + for (int i = 0; i < ctx->specs.pixel_pipes; i++) { cs->PE_PIPE_COLOR_ADDR[i] = cbuf->reloc[i]; cs->PE_PIPE_COLOR_ADDR[i].flags = ETNA_RELOC_READ | ETNA_RELOC_WRITE; } @@ -202,7 +195,7 @@ etna_set_framebuffer_state(struct pipe_context *pctx, if (cbuf->level->ts_compress_fmt >= 0) { /* overwrite bit breaks v1/v2 compression */ - if (!screen->specs.v4_compression) + if (!ctx->specs.v4_compression) cs->PE_COLOR_FORMAT &= ~VIVS_PE_COLOR_FORMAT_OVERWRITE; ts_mem_config |= @@ -218,7 +211,7 @@ etna_set_framebuffer_state(struct pipe_context *pctx, cs->PS_CONTROL = COND(util_format_is_unorm(cbuf->base.format), VIVS_PS_CONTROL_SATURATE_RT0); cs->PS_CONTROL_EXT = - VIVS_PS_CONTROL_EXT_OUTPUT_MODE0(translate_output_mode(cbuf->base.format, screen->specs.halti >= 5)); + VIVS_PS_CONTROL_EXT_OUTPUT_MODE0(translate_output_mode(cbuf->base.format, ctx->specs.halti >= 5)); } else { /* Clearing VIVS_PE_COLOR_FORMAT_COMPONENTS__MASK and * VIVS_PE_COLOR_FORMAT_OVERWRITE prevents us from overwriting the @@ -229,7 +222,7 @@ etna_set_framebuffer_state(struct pipe_context *pctx, cs->TS_COLOR_SURFACE_BASE.bo = NULL; cs->PE_COLOR_ADDR = ctx->dummy_rt_reloc; - for (int i = 0; i < screen->specs.pixel_pipes; i++) + for (int i = 0; i < ctx->specs.pixel_pipes; i++) cs->PE_PIPE_COLOR_ADDR[i] = ctx->dummy_rt_reloc; } @@ -251,16 +244,16 @@ etna_set_framebuffer_state(struct pipe_context *pctx, COND(depth_supertiled, VIVS_PE_DEPTH_CONFIG_SUPER_TILED) | VIVS_PE_DEPTH_CONFIG_DEPTH_MODE_Z | VIVS_PE_DEPTH_CONFIG_UNK18 | /* something to do with clipping? */ - COND(screen->specs.halti >= 5, VIVS_PE_DEPTH_CONFIG_DISABLE_ZS) /* Needs to be enabled on GC7000, otherwise depth writes hang w/ TS - apparently it does something else now */ + COND(ctx->specs.halti >= 5, VIVS_PE_DEPTH_CONFIG_DISABLE_ZS) /* Needs to be enabled on GC7000, otherwise depth writes hang w/ TS - apparently it does something else now */ ; /* VIVS_PE_DEPTH_CONFIG_ONLY_DEPTH */ /* merged with depth_stencil_alpha */ - if (screen->specs.pixel_pipes == 1) { + if (ctx->specs.pixel_pipes == 1) { cs->PE_DEPTH_ADDR = zsbuf->reloc[0]; cs->PE_DEPTH_ADDR.flags = ETNA_RELOC_READ | ETNA_RELOC_WRITE; } else { - for (int i = 0; i < screen->specs.pixel_pipes; i++) { + for (int i = 0; i < ctx->specs.pixel_pipes; i++) { cs->PE_PIPE_DEPTH_ADDR[i] = zsbuf->reloc[i]; cs->PE_PIPE_DEPTH_ADDR[i].flags = ETNA_RELOC_READ | ETNA_RELOC_WRITE; } @@ -349,6 +342,14 @@ etna_set_framebuffer_state(struct pipe_context *pctx, break; } + /* Scissor setup */ + cs->SE_SCISSOR_LEFT = 0; /* affected by rasterizer and scissor state as well */ + cs->SE_SCISSOR_TOP = 0; + cs->SE_SCISSOR_RIGHT = (fb->width << 16) + ETNA_SE_SCISSOR_MARGIN_RIGHT; + cs->SE_SCISSOR_BOTTOM = (fb->height << 16) + ETNA_SE_SCISSOR_MARGIN_BOTTOM; + cs->SE_CLIP_RIGHT = (fb->width << 16) + ETNA_SE_CLIP_MARGIN_RIGHT; + cs->SE_CLIP_BOTTOM = (fb->height << 16) + ETNA_SE_CLIP_MARGIN_BOTTOM; + cs->TS_MEM_CONFIG = ts_mem_config; cs->PE_MEM_CONFIG = pe_mem_config; @@ -357,7 +358,7 @@ etna_set_framebuffer_state(struct pipe_context *pctx, * single buffer when this feature is available. * note: the blob will use 2 in some situations, figure out why? */ - pe_logic_op |= VIVS_PE_LOGIC_OP_SINGLE_BUFFER(screen->specs.single_buffer ? 3 : 0); + pe_logic_op |= VIVS_PE_LOGIC_OP_SINGLE_BUFFER(ctx->specs.single_buffer ? 3 : 0); cs->PE_LOGIC_OP = pe_logic_op; /* keep copy of original structure */ @@ -377,10 +378,19 @@ etna_set_scissor_states(struct pipe_context *pctx, unsigned start_slot, unsigned num_scissors, const struct pipe_scissor_state *ss) { struct etna_context *ctx = etna_context(pctx); + struct compiled_scissor_state *cs = &ctx->scissor; assert(ss->minx <= ss->maxx); assert(ss->miny <= ss->maxy); - ctx->scissor = *ss; + /* note that this state is only used when rasterizer_state->scissor is on */ + ctx->scissor_s = *ss; + cs->SE_SCISSOR_LEFT = (ss->minx << 16); + cs->SE_SCISSOR_TOP = (ss->miny << 16); + cs->SE_SCISSOR_RIGHT = (ss->maxx << 16) + ETNA_SE_SCISSOR_MARGIN_RIGHT; + cs->SE_SCISSOR_BOTTOM = (ss->maxy << 16) + ETNA_SE_SCISSOR_MARGIN_BOTTOM; + cs->SE_CLIP_RIGHT = (ss->maxx << 16) + ETNA_SE_CLIP_MARGIN_RIGHT; + cs->SE_CLIP_BOTTOM = (ss->maxy << 16) + ETNA_SE_CLIP_MARGIN_BOTTOM; + ctx->dirty |= ETNA_DIRTY_SCISSOR; } @@ -415,10 +425,14 @@ etna_set_viewport_states(struct pipe_context *pctx, unsigned start_slot, /* Compute scissor rectangle (fixp) from viewport. * Make sure left is always < right and top always < bottom. */ - cs->SE_SCISSOR_LEFT = MAX2(vs->translate[0] - fabsf(vs->scale[0]), 0.0f); - cs->SE_SCISSOR_TOP = MAX2(vs->translate[1] - fabsf(vs->scale[1]), 0.0f); - cs->SE_SCISSOR_RIGHT = ceilf(MAX2(vs->translate[0] + fabsf(vs->scale[0]), 0.0f)); - cs->SE_SCISSOR_BOTTOM = ceilf(MAX2(vs->translate[1] + fabsf(vs->scale[1]), 0.0f)); + cs->SE_SCISSOR_LEFT = etna_f32_to_fixp16(MAX2(vs->translate[0] - fabsf(vs->scale[0]), 0.0f)); + cs->SE_SCISSOR_TOP = etna_f32_to_fixp16(MAX2(vs->translate[1] - fabsf(vs->scale[1]), 0.0f)); + uint32_t right_fixp = etna_f32_to_fixp16(MAX2(vs->translate[0] + fabsf(vs->scale[0]), 0.0f)); + uint32_t bottom_fixp = etna_f32_to_fixp16(MAX2(vs->translate[1] + fabsf(vs->scale[1]), 0.0f)); + cs->SE_SCISSOR_RIGHT = right_fixp + ETNA_SE_SCISSOR_MARGIN_RIGHT; + cs->SE_SCISSOR_BOTTOM = bottom_fixp + ETNA_SE_SCISSOR_MARGIN_BOTTOM; + cs->SE_CLIP_RIGHT = right_fixp + ETNA_SE_CLIP_MARGIN_RIGHT; + cs->SE_CLIP_BOTTOM = bottom_fixp + ETNA_SE_CLIP_MARGIN_BOTTOM; cs->PE_DEPTH_NEAR = fui(0.0); /* not affected if depth mode is Z (as in GL) */ cs->PE_DEPTH_FAR = fui(1.0); @@ -510,15 +524,14 @@ etna_vertex_elements_state_create(struct pipe_context *pctx, unsigned num_elements, const struct pipe_vertex_element *elements) { struct etna_context *ctx = etna_context(pctx); - struct etna_screen *screen = ctx->screen; struct compiled_vertex_elements_state *cs = CALLOC_STRUCT(compiled_vertex_elements_state); if (!cs) return NULL; - if (num_elements > screen->specs.vertex_max_elements) { + if (num_elements > ctx->specs.vertex_max_elements) { BUG("number of elements (%u) exceeds chip maximum (%u)", num_elements, - screen->specs.vertex_max_elements); + ctx->specs.vertex_max_elements); return NULL; } @@ -541,7 +554,7 @@ etna_vertex_elements_state_create(struct pipe_context *pctx, start_offset = elements[idx].src_offset; /* guaranteed by PIPE_CAP_MAX_VERTEX_BUFFERS */ - assert(buffer_idx < screen->specs.stream_count); + assert(buffer_idx < ctx->specs.stream_count); /* maximum vertex size is 256 bytes */ assert(element_size != 0 && (end_offset - start_offset) < 256); @@ -557,7 +570,7 @@ etna_vertex_elements_state_create(struct pipe_context *pctx, assert(format_type != ETNA_NO_MATCH); assert(normalize != ETNA_NO_MATCH); - if (screen->specs.halti < 5) { + if (ctx->specs.halti < 5) { cs->FE_VERTEX_ELEMENT_CONFIG[idx] = COND(nonconsecutive, VIVS_FE_VERTEX_ELEMENT_CONFIG_NONCONSECUTIVE) | format_type | @@ -647,36 +660,6 @@ etna_update_ts_config(struct etna_context *ctx) return true; } -static bool -etna_update_clipping(struct etna_context *ctx) -{ - const struct etna_rasterizer_state *rasterizer = etna_rasterizer_state(ctx->rasterizer); - const struct pipe_framebuffer_state *fb = &ctx->framebuffer_s; - - /* clip framebuffer against viewport */ - uint32_t scissor_left = ctx->viewport.SE_SCISSOR_LEFT; - uint32_t scissor_top = ctx->viewport.SE_SCISSOR_TOP; - uint32_t scissor_right = MIN2(fb->width, ctx->viewport.SE_SCISSOR_RIGHT); - uint32_t scissor_bottom = MIN2(fb->height, ctx->viewport.SE_SCISSOR_BOTTOM); - - /* clip against scissor */ - if (rasterizer->scissor) { - scissor_left = MAX2(ctx->scissor.minx, scissor_left); - scissor_top = MAX2(ctx->scissor.miny, scissor_top); - scissor_right = MIN2(ctx->scissor.maxx, scissor_right); - scissor_bottom = MIN2(ctx->scissor.maxy, scissor_bottom); - } - - ctx->clipping.minx = scissor_left; - ctx->clipping.miny = scissor_top; - ctx->clipping.maxx = scissor_right; - ctx->clipping.maxy = scissor_bottom; - - ctx->dirty |= ETNA_DIRTY_SCISSOR_CLIP; - - return true; -} - struct etna_state_updater { bool (*update)(struct etna_context *ctx); uint32_t dirty; @@ -697,10 +680,6 @@ static const struct etna_state_updater etna_state_updates[] = { }, { etna_update_ts_config, ETNA_DIRTY_DERIVE_TS, - }, - { - etna_update_clipping, ETNA_DIRTY_SCISSOR | ETNA_DIRTY_FRAMEBUFFER | - ETNA_DIRTY_RASTERIZER | ETNA_DIRTY_VIEWPORT, } }; diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_surface.c b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_surface.c index c78973bdb..420329ac3 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_surface.c +++ b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_surface.c @@ -43,10 +43,9 @@ static struct etna_resource * etna_render_handle_incompatible(struct pipe_context *pctx, struct pipe_resource *prsc) { struct etna_context *ctx = etna_context(pctx); - struct etna_screen *screen = ctx->screen; struct etna_resource *res = etna_resource(prsc); - bool need_multitiled = screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer; - bool want_supertiled = screen->specs.can_supertile; + bool need_multitiled = ctx->specs.pixel_pipes > 1 && !ctx->specs.single_buffer; + bool want_supertiled = ctx->specs.can_supertile; /* Resource is compatible if it is tiled and has multi tiling when required * TODO: LINEAR_PE feature means render to linear is possible ? @@ -78,7 +77,6 @@ etna_create_surface(struct pipe_context *pctx, struct pipe_resource *prsc, const struct pipe_surface *templat) { struct etna_context *ctx = etna_context(pctx); - struct etna_screen *screen = ctx->screen; struct etna_resource *rsc = etna_render_handle_incompatible(pctx, prsc); struct etna_surface *surf = CALLOC_STRUCT(etna_surface); @@ -102,13 +100,13 @@ etna_create_surface(struct pipe_context *pctx, struct pipe_resource *prsc, * indicate the tile status module bypasses the memory * offset and MMU. */ - if (VIV_FEATURE(screen, chipFeatures, FAST_CLEAR) && - VIV_FEATURE(screen, chipMinorFeatures0, MC20) && + if (VIV_FEATURE(ctx->screen, chipFeatures, FAST_CLEAR) && + VIV_FEATURE(ctx->screen, chipMinorFeatures0, MC20) && !rsc->ts_bo && /* needs to be RS/BLT compatible for transfer_map/unmap */ (rsc->levels[level].padded_width & ETNA_RS_WIDTH_MASK) == 0 && (rsc->levels[level].padded_height & ETNA_RS_HEIGHT_MASK) == 0 && - etna_resource_hw_tileable(screen->specs.use_blt, prsc)) { + etna_resource_hw_tileable(ctx->specs.use_blt, prsc)) { etna_screen_resource_alloc_ts(pctx->screen, rsc); } @@ -131,7 +129,7 @@ etna_create_surface(struct pipe_context *pctx, struct pipe_resource *prsc, struct etna_resource_level *lev = &rsc->levels[level]; /* Setup template relocations for this surface */ - for (unsigned pipe = 0; pipe < screen->specs.pixel_pipes; ++pipe) { + for (unsigned pipe = 0; pipe < ctx->specs.pixel_pipes; ++pipe) { surf->reloc[pipe].bo = rsc->bo; surf->reloc[pipe].offset = surf->surf.offset; surf->reloc[pipe].flags = 0; @@ -156,7 +154,7 @@ etna_create_surface(struct pipe_context *pctx, struct pipe_resource *prsc, surf->ts_reloc.offset = surf->surf.ts_offset; surf->ts_reloc.flags = 0; - if (!screen->specs.use_blt) { + if (!ctx->specs.use_blt) { /* This (ab)uses the RS as a plain buffer memset(). * Currently uses a fixed row size of 64 bytes. Some benchmarking with * different sizes may be in order. */ @@ -171,13 +169,13 @@ etna_create_surface(struct pipe_context *pctx, struct pipe_resource *prsc, .dither = {0xffffffff, 0xffffffff}, .width = 16, .height = etna_align_up(surf->surf.ts_size / 0x40, 4), - .clear_value = {screen->specs.ts_clear_value}, + .clear_value = {ctx->specs.ts_clear_value}, .clear_mode = VIVS_RS_CLEAR_CONTROL_MODE_ENABLED1, .clear_bits = 0xffff }); } } else { - if (!screen->specs.use_blt) + if (!ctx->specs.use_blt) etna_rs_gen_clear_surface(ctx, surf, surf->level->clear_value); } diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_texture.c b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_texture.c index e358f70ac..f3ca6a736 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_texture.c +++ b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_texture.c @@ -47,7 +47,6 @@ etna_bind_sampler_states(struct pipe_context *pctx, enum pipe_shader_type shader { /* bind fragment sampler */ struct etna_context *ctx = etna_context(pctx); - struct etna_screen *screen = ctx->screen; int offset; switch (shader) { @@ -56,7 +55,7 @@ etna_bind_sampler_states(struct pipe_context *pctx, enum pipe_shader_type shader ctx->num_fragment_samplers = num_samplers; break; case PIPE_SHADER_VERTEX: - offset = screen->specs.vertex_sampler_offset; + offset = ctx->specs.vertex_sampler_offset; break; default: assert(!"Invalid shader"); @@ -267,9 +266,8 @@ static inline void etna_fragtex_set_sampler_views(struct etna_context *ctx, unsigned nr, struct pipe_sampler_view **views) { - struct etna_screen *screen = ctx->screen; unsigned start = 0; - unsigned end = start + screen->specs.fragment_sampler_count; + unsigned end = start + ctx->specs.fragment_sampler_count; set_sampler_views(ctx, start, end, nr, views); ctx->num_fragment_sampler_views = nr; @@ -280,9 +278,8 @@ static inline void etna_vertex_set_sampler_views(struct etna_context *ctx, unsigned nr, struct pipe_sampler_view **views) { - struct etna_screen *screen = ctx->screen; - unsigned start = screen->specs.vertex_sampler_offset; - unsigned end = start + screen->specs.vertex_sampler_count; + unsigned start = ctx->specs.vertex_sampler_offset; + unsigned end = start + ctx->specs.vertex_sampler_count; set_sampler_views(ctx, start, end, nr, views); } @@ -329,13 +326,12 @@ void etna_texture_init(struct pipe_context *pctx) { struct etna_context *ctx = etna_context(pctx); - struct etna_screen *screen = ctx->screen; pctx->bind_sampler_states = etna_bind_sampler_states; pctx->set_sampler_views = etna_set_sampler_views; pctx->texture_barrier = etna_texture_barrier; - if (screen->specs.halti >= 5) + if (ctx->specs.halti >= 5) etna_texture_desc_init(pctx); else etna_texture_state_init(pctx); diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_transfer.c b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_transfer.c index 27f3ebe58..b4f30f12c 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_transfer.c +++ b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_transfer.c @@ -195,7 +195,6 @@ etna_transfer_map(struct pipe_context *pctx, struct pipe_resource *prsc, struct pipe_transfer **out_transfer) { struct etna_context *ctx = etna_context(pctx); - struct etna_screen *screen = ctx->screen; struct etna_resource *rsc = etna_resource(prsc); struct etna_transfer *trans; struct pipe_transfer *ptrans; @@ -259,7 +258,7 @@ etna_transfer_map(struct pipe_context *pctx, struct pipe_resource *prsc, rsc = etna_resource(rsc->texture); } else if (rsc->ts_bo || (rsc->layout != ETNA_LAYOUT_LINEAR && - etna_resource_hw_tileable(screen->specs.use_blt, prsc) && + etna_resource_hw_tileable(ctx->specs.use_blt, prsc) && /* HALIGN 4 resources are incompatible with the resolve engine, * so fall back to using software to detile this resource. */ rsc->halign != TEXTURE_HALIGN_FOUR)) { @@ -291,7 +290,7 @@ etna_transfer_map(struct pipe_context *pctx, struct pipe_resource *prsc, return NULL; } - if (!screen->specs.use_blt) { + if (!ctx->specs.use_blt) { /* Need to align the transfer region to satisfy RS restrictions, as we * really want to hit the RS blit path here. */ @@ -391,14 +390,12 @@ etna_transfer_map(struct pipe_context *pctx, struct pipe_resource *prsc, (!trans->rsc && (((usage & PIPE_TRANSFER_READ) && (rsc->status & ETNA_PENDING_WRITE)) || ((usage & PIPE_TRANSFER_WRITE) && rsc->status)))) { - mtx_lock(&rsc->lock); set_foreach(rsc->pending_ctx, entry) { struct etna_context *pend_ctx = (struct etna_context *)entry->key; struct pipe_context *pend_pctx = &pend_ctx->base; pend_pctx->flush(pend_pctx, NULL, 0); } - mtx_unlock(&rsc->lock); } mtx_unlock(&ctx->lock); diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_translate.h b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_translate.h index 0638bfd5d..e0811545e 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_translate.h +++ b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_translate.h @@ -227,6 +227,7 @@ translate_texture_filter(unsigned filter) return TEXTURE_FILTER_NEAREST; case PIPE_TEX_FILTER_LINEAR: return TEXTURE_FILTER_LINEAR; + /* What about anisotropic? */ default: DBG("Unhandled texture filter: %i", filter); return ETNA_NO_MATCH; diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_uniforms.c b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_uniforms.c index 06e1a6b35..356a55ba4 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_uniforms.c +++ b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_uniforms.c @@ -36,12 +36,10 @@ static unsigned get_const_idx(const struct etna_context *ctx, bool frag, unsigned samp_id) { - struct etna_screen *screen = ctx->screen; - if (frag) return samp_id; - return samp_id + screen->specs.vertex_sampler_offset; + return samp_id + ctx->specs.vertex_sampler_offset; } static uint32_t @@ -65,11 +63,10 @@ etna_uniforms_write(const struct etna_context *ctx, const struct etna_shader_variant *sobj, struct pipe_constant_buffer *cb) { - struct etna_screen *screen = ctx->screen; struct etna_cmd_stream *stream = ctx->stream; const struct etna_shader_uniform_info *uinfo = &sobj->uniforms; bool frag = (sobj == ctx->shader.fs); - uint32_t base = frag ? screen->specs.ps_uniforms_offset : screen->specs.vs_uniforms_offset; + uint32_t base = frag ? ctx->specs.ps_uniforms_offset : ctx->specs.vs_uniforms_offset; unsigned idx; if (!uinfo->imm_count) diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_zsa.c b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_zsa.c index 0684ab77a..8a4d12dc0 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_zsa.c +++ b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_zsa.c @@ -29,7 +29,6 @@ #include "etnaviv_context.h" #include "etnaviv_screen.h" #include "etnaviv_translate.h" -#include "util/u_half.h" #include "util/u_memory.h" #include "hw/common.xml.h" @@ -39,7 +38,6 @@ etna_zsa_state_create(struct pipe_context *pctx, const struct pipe_depth_stencil_alpha_state *so) { struct etna_context *ctx = etna_context(pctx); - struct etna_screen *screen = ctx->screen; struct etna_zsa_state *cs = CALLOC_STRUCT(etna_zsa_state); if (!cs) @@ -94,15 +92,6 @@ etna_zsa_state_create(struct pipe_context *pctx, if (so->depth.enabled == false || so->depth.func == PIPE_FUNC_ALWAYS) early_z = false; - /* calculate extra_reference value */ - uint32_t extra_reference = 0; - - if (VIV_FEATURE(screen, chipMinorFeatures1, HALF_FLOAT)) - extra_reference = util_float_to_half(CLAMP(so->alpha.ref_value, 0.0f, 1.0f)); - - cs->PE_STENCIL_CONFIG_EXT = - VIVS_PE_STENCIL_CONFIG_EXT_EXTRA_ALPHA_REF(extra_reference); - /* compare funcs have 1 to 1 mapping */ cs->PE_DEPTH_CONFIG = VIVS_PE_DEPTH_CONFIG_DEPTH_FUNC(so->depth.enabled ? so->depth.func @@ -110,15 +99,15 @@ etna_zsa_state_create(struct pipe_context *pctx, COND(so->depth.writemask, VIVS_PE_DEPTH_CONFIG_WRITE_ENABLE) | COND(early_z, VIVS_PE_DEPTH_CONFIG_EARLY_Z) | /* this bit changed meaning with HALTI5: */ - COND(disable_zs && screen->specs.halti < 5, VIVS_PE_DEPTH_CONFIG_DISABLE_ZS); + COND(disable_zs && ctx->specs.halti < 5, VIVS_PE_DEPTH_CONFIG_DISABLE_ZS); cs->PE_ALPHA_OP = COND(so->alpha.enabled, VIVS_PE_ALPHA_OP_ALPHA_TEST) | VIVS_PE_ALPHA_OP_ALPHA_FUNC(so->alpha.func) | VIVS_PE_ALPHA_OP_ALPHA_REF(etna_cfloat_to_uint8(so->alpha.ref_value)); for (unsigned i = 0; i < 2; i++) { - const struct pipe_stencil_state *stencil_front = (so->stencil[1].enabled && so->stencil[1].valuemask) ? &so->stencil[i] : &so->stencil[0]; - const struct pipe_stencil_state *stencil_back = (so->stencil[1].enabled && so->stencil[1].valuemask) ? &so->stencil[!i] : &so->stencil[0]; + const struct pipe_stencil_state *stencil_front = so->stencil[1].enabled ? &so->stencil[i] : &so->stencil[0]; + const struct pipe_stencil_state *stencil_back = so->stencil[1].enabled ? &so->stencil[!i] : &so->stencil[0]; cs->PE_STENCIL_OP[i] = VIVS_PE_STENCIL_OP_FUNC_FRONT(stencil_front->func) | VIVS_PE_STENCIL_OP_FUNC_BACK(stencil_back->func) | diff --git a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_zsa.h b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_zsa.h index 061a5f46b..21a89c0e2 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_zsa.h +++ b/lib/mesa/src/gallium/drivers/etnaviv/etnaviv_zsa.h @@ -37,7 +37,6 @@ struct etna_zsa_state { uint32_t PE_ALPHA_OP; uint32_t PE_STENCIL_OP[2]; uint32_t PE_STENCIL_CONFIG[2]; - uint32_t PE_STENCIL_CONFIG_EXT; uint32_t PE_STENCIL_CONFIG_EXT2[2]; }; diff --git a/lib/mesa/src/gallium/drivers/etnaviv/hw/cmdstream.xml.h b/lib/mesa/src/gallium/drivers/etnaviv/hw/cmdstream.xml.h index bfab93869..002b94b03 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/hw/cmdstream.xml.h +++ b/lib/mesa/src/gallium/drivers/etnaviv/hw/cmdstream.xml.h @@ -8,9 +8,9 @@ http://0x04.net/cgit/index.cgi/rules-ng-ng git clone git://0x04.net/rules-ng-ng The rules-ng-ng source files this header was generated from are: -- cmdstream.xml ( 16930 bytes, from 2019-01-04 11:37:39) -- copyright.xml ( 1597 bytes, from 2018-02-10 13:09:26) -- common.xml ( 35468 bytes, from 2020-01-04 20:02:31) +- cmdstream.xml ( 16930 bytes, from 2019-01-07 09:52:31) +- copyright.xml ( 1597 bytes, from 2019-01-07 09:52:31) +- common.xml ( 35468 bytes, from 2019-01-07 09:52:31) Copyright (C) 2012-2019 by the following authors: - Wladimir J. van der Laan <laanwj@gmail.com> diff --git a/lib/mesa/src/gallium/drivers/etnaviv/hw/common.xml.h b/lib/mesa/src/gallium/drivers/etnaviv/hw/common.xml.h index 44c458541..81e855bd3 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/hw/common.xml.h +++ b/lib/mesa/src/gallium/drivers/etnaviv/hw/common.xml.h @@ -8,12 +8,12 @@ http://0x04.net/cgit/index.cgi/rules-ng-ng git clone git://0x04.net/rules-ng-ng The rules-ng-ng source files this header was generated from are: -- texdesc_3d.xml ( 3183 bytes, from 2018-02-10 13:09:26) -- copyright.xml ( 1597 bytes, from 2018-02-10 13:09:26) -- common.xml ( 35468 bytes, from 2020-01-04 20:02:31) -- common_3d.xml ( 15058 bytes, from 2020-04-17 16:31:50) +- texdesc_3d.xml ( 3183 bytes, from 2019-01-07 09:52:31) +- copyright.xml ( 1597 bytes, from 2019-01-07 09:52:31) +- common.xml ( 35468 bytes, from 2019-01-07 09:52:31) +- common_3d.xml ( 14322 bytes, from 2019-08-19 14:35:07) -Copyright (C) 2012-2020 by the following authors: +Copyright (C) 2012-2019 by the following authors: - Wladimir J. van der Laan <laanwj@gmail.com> - Christian Gmeiner <christian.gmeiner@gmail.com> - Lucas Stach <l.stach@pengutronix.de> diff --git a/lib/mesa/src/gallium/drivers/etnaviv/hw/isa.xml.h b/lib/mesa/src/gallium/drivers/etnaviv/hw/isa.xml.h index b75e6e393..b5bf753c0 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/hw/isa.xml.h +++ b/lib/mesa/src/gallium/drivers/etnaviv/hw/isa.xml.h @@ -8,10 +8,10 @@ http://0x04.net/cgit/index.cgi/rules-ng-ng git clone git://0x04.net/rules-ng-ng The rules-ng-ng source files this header was generated from are: -- isa.xml ( 38205 bytes, from 2020-01-10 14:36:29) -- copyright.xml ( 1597 bytes, from 2018-02-10 13:09:26) +- isa.xml ( 38205 bytes, from 2019-08-19 14:35:07) +- copyright.xml ( 1597 bytes, from 2019-01-07 09:52:31) -Copyright (C) 2012-2020 by the following authors: +Copyright (C) 2012-2019 by the following authors: - Wladimir J. van der Laan <laanwj@gmail.com> - Christian Gmeiner <christian.gmeiner@gmail.com> - Lucas Stach <l.stach@pengutronix.de> diff --git a/lib/mesa/src/gallium/drivers/etnaviv/hw/state.xml.h b/lib/mesa/src/gallium/drivers/etnaviv/hw/state.xml.h index 20cccfc7d..d29627999 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/hw/state.xml.h +++ b/lib/mesa/src/gallium/drivers/etnaviv/hw/state.xml.h @@ -8,17 +8,17 @@ http://0x04.net/cgit/index.cgi/rules-ng-ng git clone git://0x04.net/rules-ng-ng The rules-ng-ng source files this header was generated from are: -- state.xml ( 26877 bytes, from 2020-02-14 10:19:56) -- common.xml ( 35468 bytes, from 2020-01-04 20:02:31) -- common_3d.xml ( 15058 bytes, from 2020-04-17 16:31:50) -- state_hi.xml ( 34851 bytes, from 2020-04-17 16:25:34) -- copyright.xml ( 1597 bytes, from 2018-02-10 13:09:26) -- state_2d.xml ( 51552 bytes, from 2018-02-10 13:09:26) -- state_3d.xml ( 83771 bytes, from 2020-04-17 17:15:55) -- state_blt.xml ( 14252 bytes, from 2020-01-10 14:36:29) -- state_vg.xml ( 5975 bytes, from 2018-02-10 13:09:26) - -Copyright (C) 2012-2020 by the following authors: +- state.xml ( 26666 bytes, from 2019-08-19 14:35:07) +- common.xml ( 35468 bytes, from 2019-01-07 09:52:31) +- common_3d.xml ( 14322 bytes, from 2019-08-19 14:35:07) +- state_hi.xml ( 30232 bytes, from 2019-01-07 09:52:31) +- copyright.xml ( 1597 bytes, from 2019-01-07 09:52:31) +- state_2d.xml ( 51552 bytes, from 2019-01-07 09:52:31) +- state_3d.xml ( 83505 bytes, from 2019-08-19 14:46:17) +- state_blt.xml ( 14252 bytes, from 2019-08-19 14:35:07) +- state_vg.xml ( 5975 bytes, from 2019-01-07 09:52:31) + +Copyright (C) 2012-2019 by the following authors: - Wladimir J. van der Laan <laanwj@gmail.com> - Christian Gmeiner <christian.gmeiner@gmail.com> - Lucas Stach <l.stach@pengutronix.de> @@ -379,7 +379,7 @@ DEALINGS IN THE SOFTWARE. #define VIVS_GL_OCCLUSION_QUERY_CONTROL 0x00003830 -#define VIVS_GL_VARYING_NUM_COMPONENTS2 0x00003834 +#define VIVS_GL_UNK03834 0x00003834 #define VIVS_GL_UNK03838 0x00003838 diff --git a/lib/mesa/src/gallium/drivers/etnaviv/hw/state_3d.xml.h b/lib/mesa/src/gallium/drivers/etnaviv/hw/state_3d.xml.h index 7c0c60767..15bf478b9 100644 --- a/lib/mesa/src/gallium/drivers/etnaviv/hw/state_3d.xml.h +++ b/lib/mesa/src/gallium/drivers/etnaviv/hw/state_3d.xml.h @@ -8,15 +8,15 @@ http://0x04.net/cgit/index.cgi/rules-ng-ng git clone git://0x04.net/rules-ng-ng The rules-ng-ng source files this header was generated from are: -- state.xml ( 26877 bytes, from 2020-02-14 10:19:56) -- common.xml ( 35468 bytes, from 2020-01-04 20:02:31) -- common_3d.xml ( 15058 bytes, from 2020-04-17 16:31:50) -- state_hi.xml ( 34851 bytes, from 2020-04-17 16:25:34) -- copyright.xml ( 1597 bytes, from 2018-02-10 13:09:26) -- state_2d.xml ( 51552 bytes, from 2018-02-10 13:09:26) -- state_3d.xml ( 83771 bytes, from 2020-04-17 17:15:55) -- state_blt.xml ( 14252 bytes, from 2020-01-10 14:36:29) -- state_vg.xml ( 5975 bytes, from 2018-02-10 13:09:26) +- state.xml ( 26666 bytes, from 2019-08-12 13:32:55) +- common.xml ( 35468 bytes, from 2019-08-09 17:16:20) +- common_3d.xml ( 15058 bytes, from 2019-09-12 20:37:35) +- state_hi.xml ( 30552 bytes, from 2020-01-06 02:44:00) +- copyright.xml ( 1597 bytes, from 2019-08-09 17:34:08) +- state_2d.xml ( 51552 bytes, from 2019-08-09 17:34:00) +- state_3d.xml ( 83644 bytes, from 2020-01-06 02:44:06) +- state_blt.xml ( 14252 bytes, from 2019-09-12 20:21:39) +- state_vg.xml ( 5975 bytes, from 2019-08-09 17:33:52) Copyright (C) 2012-2020 by the following authors: - Wladimir J. van der Laan <laanwj@gmail.com> @@ -1025,9 +1025,9 @@ DEALINGS IN THE SOFTWARE. #define VIVS_PE_STENCIL_CONFIG_EXT_REF_BACK(x) (((x) << VIVS_PE_STENCIL_CONFIG_EXT_REF_BACK__SHIFT) & VIVS_PE_STENCIL_CONFIG_EXT_REF_BACK__MASK) #define VIVS_PE_STENCIL_CONFIG_EXT_REF_BACK_MASK 0x00000100 #define VIVS_PE_STENCIL_CONFIG_EXT_UNK16_MASK 0x00000200 -#define VIVS_PE_STENCIL_CONFIG_EXT_EXTRA_ALPHA_REF__MASK 0xffff0000 -#define VIVS_PE_STENCIL_CONFIG_EXT_EXTRA_ALPHA_REF__SHIFT 16 -#define VIVS_PE_STENCIL_CONFIG_EXT_EXTRA_ALPHA_REF(x) (((x) << VIVS_PE_STENCIL_CONFIG_EXT_EXTRA_ALPHA_REF__SHIFT) & VIVS_PE_STENCIL_CONFIG_EXT_EXTRA_ALPHA_REF__MASK) +#define VIVS_PE_STENCIL_CONFIG_EXT_UNK16__MASK 0xffff0000 +#define VIVS_PE_STENCIL_CONFIG_EXT_UNK16__SHIFT 16 +#define VIVS_PE_STENCIL_CONFIG_EXT_UNK16(x) (((x) << VIVS_PE_STENCIL_CONFIG_EXT_UNK16__SHIFT) & VIVS_PE_STENCIL_CONFIG_EXT_UNK16__MASK) #define VIVS_PE_LOGIC_OP 0x000014a4 #define VIVS_PE_LOGIC_OP_OP__MASK 0x0000000f @@ -1795,7 +1795,7 @@ DEALINGS IN THE SOFTWARE. #define VIVS_NTE_DESCRIPTOR_SAMP_LOD_BIAS_MIRROR(i0) (0x00016600 + 0x4*(i0)) -#define VIVS_NTE_DESCRIPTOR_SAMP_ANISOTROPY_MIRROR(i0) (0x00016800 + 0x4*(i0)) +#define VIVS_NTE_DESCRIPTOR_UNK17400_MIRROR(i0) (0x00016800 + 0x4*(i0)) #define VIVS_NTE_DESCRIPTOR_SAMP_CTRL0(i0) (0x00016c00 + 0x4*(i0)) #define VIVS_NTE_DESCRIPTOR_SAMP_CTRL0_UWRAP__MASK 0x00000007 @@ -1846,7 +1846,7 @@ DEALINGS IN THE SOFTWARE. #define VIVS_NTE_DESCRIPTOR_SAMP_LOD_BIAS_BIAS(x) (((x) << VIVS_NTE_DESCRIPTOR_SAMP_LOD_BIAS_BIAS__SHIFT) & VIVS_NTE_DESCRIPTOR_SAMP_LOD_BIAS_BIAS__MASK) #define VIVS_NTE_DESCRIPTOR_SAMP_LOD_BIAS_ENABLE 0x00010000 -#define VIVS_NTE_DESCRIPTOR_SAMP_ANISOTROPY(i0) (0x00017400 + 0x4*(i0)) +#define VIVS_NTE_DESCRIPTOR_UNK17400(i0) (0x00017400 + 0x4*(i0)) #define VIVS_SH 0x00000000 |