From 52f6797c11bf512d42d4ea30f70a6fdedae6f9ad Mon Sep 17 00:00:00 2001 From: Reyk Floeter Date: Sat, 4 Aug 2007 19:55:22 +0000 Subject: Add support for the mobile i965GM chipset. tested by many ok matthieu@ --- driver/xf86-video-intel/src/common.h | 11 +- driver/xf86-video-intel/src/i810_driver.c | 9 + driver/xf86-video-intel/src/i830_accel.c | 14 +- driver/xf86-video-intel/src/i830_dga.c | 2 +- driver/xf86-video-intel/src/i830_dri.c | 60 ++++-- driver/xf86-video-intel/src/i830_driver.c | 328 ++++++++++++++++++++++++++---- driver/xf86-video-intel/src/i830_memory.c | 78 ++++--- driver/xf86-video-intel/src/i830_video.c | 36 ++-- 8 files changed, 420 insertions(+), 118 deletions(-) (limited to 'driver') diff --git a/driver/xf86-video-intel/src/common.h b/driver/xf86-video-intel/src/common.h index ad5ee1de3..14c90134c 100644 --- a/driver/xf86-video-intel/src/common.h +++ b/driver/xf86-video-intel/src/common.h @@ -301,6 +301,11 @@ extern int I810_DEBUG; #define PCI_CHIP_I946_GZ_BRIDGE 0x2970 #endif +#ifndef PCI_CHIP_I965_GM +#define PCI_CHIP_I965_GM 0x2A02 +#define PCI_CHIP_I965_GM_BRIDGE 0x2A00 +#endif + #define IS_I810(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I810 || \ pI810->PciInfo->chipType == PCI_CHIP_I810_DC100 || \ pI810->PciInfo->chipType == PCI_CHIP_I810_E) @@ -317,9 +322,11 @@ extern int I810_DEBUG; #define IS_I945G(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I945_G) #define IS_I945GM(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I945_GM) #define IS_I965G(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I965_G || pI810->PciInfo->chipType == PCI_CHIP_I965_G_1 || pI810->PciInfo->chipType == PCI_CHIP_I965_Q || pI810->PciInfo->chipType == PCI_CHIP_I946_GZ) -#define IS_I9XX(pI810) (IS_I915G(pI810) || IS_I915GM(pI810) || IS_I945G(pI810) || IS_I945GM(pI810) || IS_I965G(pI810)) +#define IS_I965GM(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I965_GM) +#define IS_I96X(pI810) (IS_I965G(pI810) || IS_I965GM(pI810)) +#define IS_I9XX(pI810) (IS_I915G(pI810) || IS_I915GM(pI810) || IS_I945G(pI810) || IS_I945GM(pI810) || IS_I965G(pI810) || IS_I965GM(pI810)) -#define IS_MOBILE(pI810) (IS_I830(pI810) || IS_I85X(pI810) || IS_I915GM(pI810) || IS_I945GM(pI810)) +#define IS_MOBILE(pI810) (IS_I830(pI810) || IS_I85X(pI810) || IS_I915GM(pI810) || IS_I945GM(pI810) || IS_I965GM(pI810)) #define GTT_PAGE_SIZE KB(4) #define ROUND_TO(x, y) (((x) + (y) - 1) / (y) * (y)) diff --git a/driver/xf86-video-intel/src/i810_driver.c b/driver/xf86-video-intel/src/i810_driver.c index cd6d9d7d2..17e5d7185 100644 --- a/driver/xf86-video-intel/src/i810_driver.c +++ b/driver/xf86-video-intel/src/i810_driver.c @@ -144,6 +144,7 @@ static SymTabRec I810Chipsets[] = { {PCI_CHIP_I965_G_1, "965G"}, {PCI_CHIP_I965_Q, "965Q"}, {PCI_CHIP_I946_GZ, "946GZ"}, + {PCI_CHIP_I965_GM, "965GM"}, {-1, NULL} }; @@ -167,6 +168,7 @@ static PciChipsets I810PciChipsets[] = { {PCI_CHIP_I965_G_1, PCI_CHIP_I965_G_1, RES_SHARED_VGA}, {PCI_CHIP_I965_Q, PCI_CHIP_I965_Q, RES_SHARED_VGA}, {PCI_CHIP_I946_GZ, PCI_CHIP_I946_GZ, RES_SHARED_VGA}, + {PCI_CHIP_I965_GM, PCI_CHIP_I965_GM, RES_SHARED_VGA}, {-1, -1, RES_UNDEFINED } }; @@ -313,6 +315,12 @@ const char *I810drmSymbols[] = { "drmGetLibVersion", "drmGetVersion", "drmRmMap", +#ifdef XSERVER_LIBDRM_MM + "drmMMInit", + "drmMMTakedown", + "drmMMLock", + "drmMMUnlock", +#endif NULL }; @@ -589,6 +597,7 @@ I810Probe(DriverPtr drv, int flags) case PCI_CHIP_I965_G_1: case PCI_CHIP_I965_Q: case PCI_CHIP_I946_GZ: + case PCI_CHIP_I965_GM: xf86SetEntitySharable(usedChips[i]); /* Allocate an entity private if necessary */ diff --git a/driver/xf86-video-intel/src/i830_accel.c b/driver/xf86-video-intel/src/i830_accel.c index b029968e3..f2bc5b6a5 100644 --- a/driver/xf86-video-intel/src/i830_accel.c +++ b/driver/xf86-video-intel/src/i830_accel.c @@ -148,7 +148,7 @@ I830Sync(ScrnInfoPtr pScrn) if (pI830->entityPrivate && !pI830->entityPrivate->RingRunning) return; - if (IS_I965G(pI830)) + if (IS_I96X(pI830)) flags = 0; /* Send a flush instruction and then wait till the ring is empty. @@ -175,7 +175,7 @@ I830EmitFlush(ScrnInfoPtr pScrn) I830Ptr pI830 = I830PTR(pScrn); int flags = MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE; - if (IS_I965G(pI830)) + if (IS_I96X(pI830)) flags = 0; BEGIN_LP_RING(2); @@ -403,7 +403,7 @@ CheckTiling(ScrnInfoPtr pScrn) unsigned int tiled = 0; /* Check tiling */ - if (IS_I965G(pI830)) { + if (IS_I96X(pI830)) { if (pI830->bufferOffset == pScrn->fbOffset && pI830->front_tiled == FENCE_XMAJOR) tiled = 1; if (pI830->bufferOffset == pI830->RotatedMem.Start && pI830->rotated_tiled == FENCE_XMAJOR) @@ -475,7 +475,7 @@ I830SubsequentSolidFillRect(ScrnInfoPtr pScrn, int x, int y, int w, int h) ADVANCE_LP_RING(); } - if (IS_I965G(pI830)) + if (IS_I96X(pI830)) I830EmitFlush(pScrn); } @@ -544,7 +544,7 @@ I830SubsequentScreenToScreenCopy(ScrnInfoPtr pScrn, int src_x1, int src_y1, ADVANCE_LP_RING(); } - if (IS_I965G(pI830)) + if (IS_I96X(pI830)) I830EmitFlush(pScrn); } @@ -628,7 +628,7 @@ I830SubsequentMono8x8PatternFillRect(ScrnInfoPtr pScrn, int pattx, int patty, ADVANCE_LP_RING(); } - if (IS_I965G(pI830)) + if (IS_I96X(pI830)) I830EmitFlush(pScrn); } @@ -753,7 +753,7 @@ I830SubsequentColorExpandScanline(ScrnInfoPtr pScrn, int bufno) pI830->BR[9] += pScrn->displayWidth * pI830->cpp; I830GetNextScanlineColorExpandBuffer(pScrn); - if (IS_I965G(pI830)) + if (IS_I96X(pI830)) I830EmitFlush(pScrn); } diff --git a/driver/xf86-video-intel/src/i830_dga.c b/driver/xf86-video-intel/src/i830_dga.c index bd45d61d8..55ffecd33 100644 --- a/driver/xf86-video-intel/src/i830_dga.c +++ b/driver/xf86-video-intel/src/i830_dga.c @@ -286,7 +286,7 @@ I830_Sync(ScrnInfoPtr pScrn) if (pI830->noAccel) return; - if (IS_I965G(pI830)) + if (IS_I96X(pI830)) flags = 0; BEGIN_LP_RING(2); diff --git a/driver/xf86-video-intel/src/i830_dri.c b/driver/xf86-video-intel/src/i830_dri.c index 21af65187..56db194b4 100644 --- a/driver/xf86-video-intel/src/i830_dri.c +++ b/driver/xf86-video-intel/src/i830_dri.c @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dri.c,v 1.15 2003/06/18 13:14:17 dawes Exp $ */ +/* $xfree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dri.c,v 1.15 2003/06/18 13:14:17 dawes Exp $ */ /************************************************************************** Copyright 2001 VA Linux Systems Inc., Fremont, California. @@ -84,8 +84,9 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. #include "dristruct.h" static char I830KernelDriverName[] = "i915"; -static char I830ClientDriverName[] = "i915"; +static char I830ClientDriverName[] = "i915tex"; static char I965ClientDriverName[] = "i965"; +static char I830LegacyClientDriverName[] = "i915"; static Bool I830InitVisualConfigs(ScreenPtr pScreen); static Bool I830CreateContext(ScreenPtr pScreen, VisualPtr visual, @@ -480,7 +481,7 @@ I830DRIScreenInit(ScreenPtr pScreen) pI830->LockHeld = 0; pDRIInfo->drmDriverName = I830KernelDriverName; - if (IS_I965G(pI830)) + if (IS_I96X(pI830)) pDRIInfo->clientDriverName = I965ClientDriverName; else pDRIInfo->clientDriverName = I830ClientDriverName; @@ -644,10 +645,31 @@ I830DRIScreenInit(ScreenPtr pScreen) return FALSE; } pI830->drmMinor = version->version_minor; + if (!(pI830->mmModeFlags & I830_KERNEL_TEX)) { + if ((version->version_major > 1) || + ((version->version_minor >= 7) && + (version->version_major == 1))) { + pI830->mmModeFlags |= I830_KERNEL_MM; + } else { + pI830->mmModeFlags |= I830_KERNEL_TEX; + } + } else { + xf86DrvMsg(pScreen->myNum, X_INFO, + "Not enabling the DRM memory manager.\n"); + } drmFreeVersion(version); } } + /* + * Backwards compatibility + */ + + if ((pDRIInfo->clientDriverName == I830ClientDriverName) && + (pI830->mmModeFlags & I830_KERNEL_TEX)) { + pDRIInfo->clientDriverName = I830LegacyClientDriverName; + } + return TRUE; } @@ -662,10 +684,10 @@ I830DRIMapScreenRegions(ScrnInfoPtr pScrn, drmI830Sarea *sarea) pScrn->virtualY * pI830->cpp); #endif - /* The I965G isn't ready for the front buffer mapping to be moved around, + /* The I965 isn't ready for the front buffer mapping to be moved around, * because of issues with rmmap, it seems. */ - if (!IS_I965G(pI830)) { + if (!IS_I96X(pI830)) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[drm] Mapping front buffer\n"); if (drmAddMap(pI830->drmSubFD, @@ -707,18 +729,20 @@ I830DRIMapScreenRegions(ScrnInfoPtr pScrn, drmI830Sarea *sarea) xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[drm] Depth Buffer = 0x%08x\n", (int)sarea->depth_handle); - if (drmAddMap(pI830->drmSubFD, - (drm_handle_t)sarea->tex_offset + pI830->LinearAddr, - sarea->tex_size, DRM_AGP, 0, - (drmAddress) &sarea->tex_handle) < 0) { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "[drm] drmAddMap(tex_handle) failed. Disabling DRI\n"); - DRICloseScreen(pScreen); - return FALSE; - } - xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[drm] textures = 0x%08x\n", - (int)sarea->tex_handle); + if (pI830->mmModeFlags & I830_KERNEL_TEX) { + if (drmAddMap(pI830->drmSubFD, + (drm_handle_t)sarea->tex_offset + pI830->LinearAddr, + sarea->tex_size, DRM_AGP, 0, + (drmAddress) &sarea->tex_handle) < 0) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "[drm] drmAddMap(tex_handle) failed. Disabling DRI\n"); + DRICloseScreen(pScreen); + return FALSE; + } + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[drm] textures = 0x%08x\n", + (int)sarea->tex_handle); + } return TRUE; } @@ -1208,7 +1232,7 @@ I830DRIMoveBuffers(WindowPtr pParent, DDXPointRec ptOldOrg, I830SelectBuffer(pScrn, I830_SELECT_BACK); I830SubsequentScreenToScreenCopy(pScrn, x1, y1, destx, desty, w, h); - if (!IS_I965G(pI830)) { + if (!IS_I96X(pI830)) { I830SelectBuffer(pScrn, I830_SELECT_DEPTH); I830SubsequentScreenToScreenCopy(pScrn, x1, y1, destx, desty, w, h); } @@ -1475,7 +1499,7 @@ I830UpdateDRIBuffers(ScrnInfoPtr pScrn, drmI830Sarea *sarea) success = I830DRIMapScreenRegions(pScrn, sarea); - if (success) + if (success && (pI830->mmModeFlags & I830_KERNEL_TEX)) I830InitTextureHeap(pScrn, sarea); return success; diff --git a/driver/xf86-video-intel/src/i830_driver.c b/driver/xf86-video-intel/src/i830_driver.c index 3cee1c8bc..09f933be1 100644 --- a/driver/xf86-video-intel/src/i830_driver.c +++ b/driver/xf86-video-intel/src/i830_driver.c @@ -197,6 +197,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. #ifdef XF86DRI #include "dri.h" +#include +#include #endif #define BIT(x) (1 << (x)) @@ -218,6 +220,7 @@ static SymTabRec I830BIOSChipsets[] = { {PCI_CHIP_I965_G_1, "965G"}, {PCI_CHIP_I965_Q, "965Q"}, {PCI_CHIP_I946_GZ, "946GZ"}, + {PCI_CHIP_I965_GM, "965GM"}, {-1, NULL} }; @@ -235,6 +238,7 @@ static PciChipsets I830BIOSPciChipsets[] = { {PCI_CHIP_I965_G_1, PCI_CHIP_I965_G_1, RES_SHARED_VGA}, {PCI_CHIP_I965_Q, PCI_CHIP_I965_Q, RES_SHARED_VGA}, {PCI_CHIP_I946_GZ, PCI_CHIP_I946_GZ, RES_SHARED_VGA}, + {PCI_CHIP_I965_GM, PCI_CHIP_I965_GM, RES_SHARED_VGA}, {-1, -1, RES_UNDEFINED} }; @@ -268,7 +272,9 @@ typedef enum { OPTION_SECONDHSYNC, OPTION_SECONDVREFRESH, OPTION_SECONDPOSITION, - OPTION_INTELXINERAMA + OPTION_INTELXINERAMA, + OPTION_INTELTEXPOOL, + OPTION_INTELMMSIZE } I830Opts; static OptionInfoRec I830BIOSOptions[] = { @@ -296,6 +302,8 @@ static OptionInfoRec I830BIOSOptions[] = { {OPTION_SECONDVREFRESH,"SecondMonitorVertRefresh",OPTV_STRING,{0}, FALSE }, {OPTION_SECONDPOSITION,"SecondPosition",OPTV_STRING, {0}, FALSE }, {OPTION_INTELXINERAMA,"MergedXinerama",OPTV_BOOLEAN, {0}, TRUE}, + {OPTION_INTELTEXPOOL,"Legacy3D", OPTV_BOOLEAN, {0}, FALSE}, + {OPTION_INTELMMSIZE, "AperTexSize", OPTV_INTEGER, {0}, FALSE}, {-1, NULL, OPTV_NONE, {0}, FALSE} }; /* *INDENT-ON* */ @@ -3103,7 +3111,7 @@ I830DetectMemory(ScrnInfoPtr pScrn) /* We need to reduce the stolen size, by the GTT and the popup. * The GTT varying according the the FbMapSize and the popup is 4KB. */ - if (IS_I965G(pI830)) + if (IS_I96X(pI830)) range = 512 + 4; /* Fixed 512KB size for i965 */ else range = (pI830->FbMapSize / MB(1)) + 4; @@ -3625,7 +3633,7 @@ I830LoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices, OUTREG(dspbase, INREG(dspbase)); OUTREG(dspreg, temp | DISPPLANE_GAMMA_ENABLE); OUTREG(dspbase, INREG(dspbase)); - if (IS_I965G(pI830)) + if (IS_I96X(pI830)) OUTREG(dspsurf, INREG(dspsurf)); /* It seems that an initial read is needed. */ @@ -3825,6 +3833,28 @@ I830IsPrimary(ScrnInfoPtr pScrn) return TRUE; } +#ifdef XF86DRI +static void +I830ReduceMMSize(ScrnInfoPtr pScrn, unsigned long newSize, + const char *reason) +{ + I830Ptr pI830 = I830PTR(pScrn); + + newSize = ROUND_DOWN_TO(newSize, GTT_PAGE_SIZE); + if (newSize / GTT_PAGE_SIZE > I830_MM_MINPAGES) { + pI830->mmSize = newSize / 1024; + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "DRM memory manager aperture size is reduced to %d kiB\n" + "\t%s\n", pI830->mmSize, reason); + } else { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "DRM memory manager will be disabled\n\t%s\n", reason); + pI830->mmSize = 0; + } +} +#endif + + static Bool I830BIOSPreInit(ScrnInfoPtr pScrn, int flags) { @@ -3847,6 +3877,9 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags) const char *chipname; unsigned int ver; char v[5]; +#ifdef XF86DRI + unsigned long savedMMSize; +#endif if (pScrn->numEntities != 1) return FALSE; @@ -4045,6 +4078,9 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags) case PCI_CHIP_I946_GZ: chipname = "946GZ"; break; + case PCI_CHIP_I965_GM: + chipname = "965GM"; + break; default: chipname = "unknown chipset"; break; @@ -4155,14 +4191,12 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags) pI830->FbMapSize = 0x4000000; /* 64MB - has this been tested ?? */ } } else { - if (IS_I9XX(pI830)) { + if (IS_I9XX(pI830) && !IS_I965GM(pI830) && + pI830->PciInfo->chipType != PCI_CHIP_E7221_G) { if (pI830->PciInfo->memBase[2] & 0x08000000) pI830->FbMapSize = 0x8000000; /* 128MB aperture */ else pI830->FbMapSize = 0x10000000; /* 256MB aperture */ - - if (pI830->PciInfo->chipType == PCI_CHIP_E7221_G) - pI830->FbMapSize = 0x8000000; /* 128MB aperture */ } else /* 128MB aperture for later chips */ pI830->FbMapSize = 0x8000000; @@ -4243,7 +4277,46 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags) "runs only at depths 16 and 24.\n"); pI830->directRenderingDisabled = TRUE; } - } + + pI830->mmModeFlags = 0; + + if (!pI830->directRenderingDisabled) { + Bool tmp = FALSE; + + if (IS_I96X(pI830)) + pI830->mmModeFlags |= I830_KERNEL_TEX; + + from = X_PROBED; + if (xf86GetOptValBool(pI830->Options, + OPTION_INTELTEXPOOL, &tmp)) { + from = X_CONFIG; + if (tmp) { + pI830->mmModeFlags |= I830_KERNEL_TEX; + } else { + pI830->mmModeFlags &= ~I830_KERNEL_TEX; + } + } + if (from == X_CONFIG || + (pI830->mmModeFlags & I830_KERNEL_TEX)) { + xf86DrvMsg(pScrn->scrnIndex, from, + "Will %stry to allocate texture pool " + "for old Mesa 3D driver.\n", + (pI830->mmModeFlags & I830_KERNEL_TEX) ? + "" : "not "); + } + pI830->mmSize = I830_MM_MAXSIZE; + from = X_INFO; + if (xf86GetOptValInteger(pI830->Options, OPTION_INTELMMSIZE, + &(pI830->mmSize))) { + from = X_CONFIG; + } + xf86DrvMsg(pScrn->scrnIndex, from, + "Will try to reserve %d kiB of AGP aperture space\n" + "\tfor the DRM memory manager.\n", + pI830->mmSize); + } + } + #endif pI830->LinearAlloc = 0; @@ -4900,7 +4973,7 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags) else pI830->CursorNeedsPhysical = FALSE; - if (IS_I965G(pI830)) + if (IS_I96X(pI830)) pI830->CursorNeedsPhysical = FALSE; /* Force ring buffer to be in low memory for all chipsets */ @@ -5351,9 +5424,15 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags) * If DRI is potentially usable, check if there is enough memory available * for it, and if there's also enough to allow tiling to be enabled. */ + #if defined(XF86DRI) - if (!I830CheckDRIAvailable(pScrn)) + if (!I830CheckDRIAvailable(pScrn)) { pI830->directRenderingDisabled = TRUE; + pI830->mmSize = 0; + } else if (pScrn->videoRam > pI830->FbMapSize / 1024 - pI830->mmSize) { + I830ReduceMMSize(pScrn, pI830->FbMapSize - KB(pScrn->videoRam), + "to make room for video memory"); + } if (I830IsPrimary(pScrn) && !pI830->directRenderingDisabled) { int savedDisplayWidth = pScrn->displayWidth; @@ -5395,7 +5474,9 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags) * If the displayWidth is a tilable pitch, test if there's enough * memory available to enable tiling. */ + savedMMSize = pI830->mmSize; if (pScrn->displayWidth == pitches[i]) { + retry_dryrun: I830ResetAllocations(pScrn, 0); if (I830Allocate2DMemory(pScrn, ALLOCATE_DRY_RUN | ALLOC_INITIAL) && I830Allocate3DMemory(pScrn, ALLOCATE_DRY_RUN)) { @@ -5407,7 +5488,13 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags) "required to\n\tenable tiling mode for DRI.\n", (memNeeded + 1023) / 1024); } - if (pI830->MemoryAperture.Size < 0) { + if (pI830->MemoryAperture.Size < 0) { + if (KB(pI830->mmSize) > I830_MM_MINPAGES * GTT_PAGE_SIZE) { + I830ReduceMMSize(pScrn, I830_MM_MINPAGES * GTT_PAGE_SIZE, + "to make room in AGP aperture for tiling."); + goto retry_dryrun; + } + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Allocation with DRI tiling enabled would " "exceed the\n" @@ -5435,7 +5522,9 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags) * Tiling can't be enabled. Check if there's enough memory for DRI * without tiling. */ + pI830->mmSize = savedMMSize; pI830->disableTiling = TRUE; + retry_dryrun2: I830ResetAllocations(pScrn, 0); if (I830Allocate2DMemory(pScrn, ALLOCATE_DRY_RUN | ALLOC_INITIAL) && I830Allocate3DMemory(pScrn, ALLOCATE_DRY_RUN | ALLOC_NO_TILING)) { @@ -5448,6 +5537,11 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags) (memNeeded + 1023) / 1024); } if (pI830->MemoryAperture.Size < 0) { + if (KB(pI830->mmSize) > I830_MM_MINPAGES * GTT_PAGE_SIZE) { + I830ReduceMMSize(pScrn, I830_MM_MINPAGES * GTT_PAGE_SIZE, + "to save AGP aperture space for video memory."); + goto retry_dryrun2; + } xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Allocation with DRI enabled would " "exceed the\n" @@ -5456,6 +5550,7 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags) pI830->FbMapSize / 1024, -pI830->MemoryAperture.Size / 1024); } + pI830->mmSize = 0; pI830->directRenderingDisabled = TRUE; xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Disabling DRI.\n"); } @@ -5468,6 +5563,16 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags) #endif pI830->disableTiling = TRUE; /* no DRI - so disableTiling */ + if (pScrn->displayWidth >= 4096) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Cannot support > 1024x768 in leftof/rightof configurations. disabling DRI.\n"); + pI830->directRenderingDisabled = TRUE; + } + + if (pScrn->virtualY > 2048) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Cannot support > 2048 vertical lines. disabling acceleration.\n"); + pI830->noAccel = TRUE; + } + pI830->displayWidth = pScrn->displayWidth; SetPipeAccess(pScrn); @@ -5627,7 +5732,7 @@ CheckInheritedState(ScrnInfoPtr pScrn) #if 0 if (errors) { - if (IS_I965G(pI830)) + if (IS_I96X(pI830)) I965PrintErrorState(pScrn); else I830PrintErrorState(pScrn); @@ -5661,7 +5766,7 @@ ResetState(ScrnInfoPtr pScrn, Bool flush) pI830->entityPrivate->RingRunning = 0; /* Reset the fence registers to 0 */ - if (IS_I965G(pI830)) { + if (IS_I96X(pI830)) { for (i = 0; i < FENCE_NEW_NR; i++) { OUTREG(FENCE_NEW + i * 8, 0); OUTREG(FENCE_NEW + 4 + i * 8, 0); @@ -5699,7 +5804,7 @@ SetFenceRegs(ScrnInfoPtr pScrn) if (!I830IsPrimary(pScrn)) return; - if (IS_I965G(pI830)) { + if (IS_I96X(pI830)) { for (i = 0; i < FENCE_NEW_NR; i++) { OUTREG(FENCE_NEW + i * 8, pI830->ModeReg.Fence[i]); OUTREG(FENCE_NEW + 4 + i * 8, pI830->ModeReg.Fence[i+FENCE_NEW_NR]); @@ -5815,7 +5920,7 @@ SaveHWState(ScrnInfoPtr pScrn) pVesa = pI830->vesa; - if (IS_I965G(pI830)) { + if (IS_I96X(pI830)) { pI830->savedAsurf = INREG(DSPASURF); pI830->savedBsurf = INREG(DSPBSURF); } @@ -5930,7 +6035,7 @@ RestoreHWState(ScrnInfoPtr pScrn) VBESetDisplayStart(pVbe, pVesa->x, pVesa->y, TRUE); - if (IS_I965G(pI830)) { + if (IS_I96X(pI830)) { OUTREG(DSPASURF, pI830->savedAsurf); OUTREG(DSPBSURF, pI830->savedBsurf); } @@ -6205,7 +6310,7 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode) } #if 0 - { /* I965G ENABLE TILING */ + { /* I96X ENABLE TILING */ planeA = INREG(DSPACNTR) | 1<<10; OUTREG(DSPACNTR, planeA); /* flush the change. */ @@ -6213,7 +6318,7 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode) OUTREG(DSPABASE, temp); } #else - { /* I965G DISABLE TILING */ + { /* I96X DISABLE TILING */ planeA = INREG(DSPACNTR) & ~1<<10; OUTREG(DSPACNTR, planeA); /* flush the change. */ @@ -6282,7 +6387,7 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode) /* flush the change. */ temp = INREG(DSPABASE); OUTREG(DSPABASE, temp); - if (IS_I965G(pI830)) { + if (IS_I96X(pI830)) { temp = INREG(DSPASURF); OUTREG(DSPASURF, temp); } @@ -6296,7 +6401,7 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode) /* flush the change. */ temp = INREG(DSPBADDR); OUTREG(DSPBADDR, temp); - if (IS_I965G(pI830)) { + if (IS_I96X(pI830)) { temp = INREG(DSPBSURF); OUTREG(DSPBSURF, temp); } @@ -6346,7 +6451,7 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode) /* Trigger update */ temp = INREG(basereg); OUTREG(basereg, temp); - if (IS_I965G(pI830)) { + if (IS_I96X(pI830)) { temp = INREG(surfreg); OUTREG(surfreg, temp); } @@ -6369,7 +6474,7 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode) /* Trigger update */ temp = INREG(basereg); OUTREG(basereg, temp); - if (IS_I965G(pI830)) { + if (IS_I96X(pI830)) { temp = INREG(surfreg); OUTREG(surfreg, temp); } @@ -6393,7 +6498,7 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode) /* Trigger update */ temp = INREG(basereg); OUTREG(basereg, temp); - if (IS_I965G(pI830)) { + if (IS_I96X(pI830)) { temp = INREG(surfreg); OUTREG(surfreg, temp); } @@ -6414,7 +6519,7 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode) /* Trigger update */ temp = INREG(basereg); OUTREG(basereg, temp); - if (IS_I965G(pI830)) { + if (IS_I96X(pI830)) { temp = INREG(surfreg); OUTREG(surfreg, temp); } @@ -6455,7 +6560,7 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode) /* Trigger update */ temp = INREG(basereg); OUTREG(basereg, temp); - if (IS_I965G(pI830)) { + if (IS_I96X(pI830)) { temp = INREG(surfreg); OUTREG(surfreg, temp); } @@ -6562,7 +6667,7 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode) #endif #if 0 - if (IS_I965G(pI830)) + if (IS_I96X(pI830)) I965PrintErrorState(pScrn); else I830PrintErrorState(pScrn); @@ -6985,7 +7090,7 @@ IntelEmitInvarientState(ScrnInfoPtr pScrn) I830Ptr pI830 = I830PTR(pScrn); CARD32 ctx_addr; - if (pI830->noAccel) + if (pI830->noAccel || !I830IsPrimary(pScrn)) return; ctx_addr = pI830->ContextMem.Start; @@ -7001,7 +7106,7 @@ IntelEmitInvarientState(ScrnInfoPtr pScrn) ADVANCE_LP_RING(); } - if (!IS_I965G(pI830)) + if (!IS_I96X(pI830)) { if (IS_I9XX(pI830)) I915EmitInvarientState(pScrn); @@ -7010,6 +7115,87 @@ IntelEmitInvarientState(ScrnInfoPtr pScrn) } } +#ifdef XF86DRI +#ifndef DRM_BO_MEM_TT +#error "Wrong drm.h file included. You need to compile and install a recent libdrm." +#endif + +#ifndef XSERVER_LIBDRM_MM + +static int +I830DrmMMInit(int drmFD, unsigned long pageOffs, unsigned long pageSize, + unsigned memType) +{ + + drm_mm_init_arg_t arg; + int ret; + + memset(&arg, 0, sizeof(arg)); + arg.req.op = mm_init; + arg.req.p_offset = pageOffs; + arg.req.p_size = pageSize; + arg.req.mem_type = memType; + + ret = ioctl(drmFD, DRM_IOCTL_MM_INIT, &arg); + + if (ret) + return -errno; + + return 0; + +} + +static int +I830DrmMMTakedown(int drmFD, unsigned memType) +{ + drm_mm_init_arg_t arg; + int ret = 0; + + memset(&arg, 0, sizeof(arg)); + arg.req.op = mm_takedown; + arg.req.mem_type = memType; + if (ioctl(drmFD, DRM_IOCTL_MM_INIT, &arg)) { + ret = -errno; + } + + return ret; +} + +static int I830DrmMMLock(int fd, unsigned memType) +{ + drm_mm_init_arg_t arg; + int ret; + + memset(&arg, 0, sizeof(arg)); + arg.req.op = mm_lock; + arg.req.mem_type = memType; + + do{ + ret = ioctl(fd, DRM_IOCTL_MM_INIT, &arg); + } while (ret && errno == EAGAIN); + + return ret; +} + +static int I830DrmMMUnlock(int fd, unsigned memType) +{ + drm_mm_init_arg_t arg; + int ret; + + memset(&arg, 0, sizeof(arg)); + arg.req.op = mm_unlock; + arg.req.mem_type = memType; + + do{ + ret = ioctl(fd, DRM_IOCTL_MM_INIT, &arg); + } while (ret && errno == EAGAIN); + + return ret; +} + +#endif +#endif + static Bool I830BIOSScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) { @@ -7452,8 +7638,8 @@ I830BIOSScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) xf86DisableRandR(); /* Disable built-in RandR extension */ shadowSetup(pScreen); /* support all rotations */ - if (IS_I965G(pI830)) { - I830RandRInit(pScreen, RR_Rotate_0); /* only 0 degrees for I965G */ + if (IS_I96X(pI830)) { + I830RandRInit(pScreen, RR_Rotate_0); /* only 0 degrees for I96X */ } else { I830RandRInit(pScreen, RR_Rotate_0 | RR_Rotate_90 | RR_Rotate_180 | RR_Rotate_270); } @@ -7476,7 +7662,7 @@ I830BIOSScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) I830_dump_registers(pScrn); #endif - if (IS_I965G(pI830)) { + if (IS_I96X(pI830)) { /* turn off clock gating */ #if 0 OUTREG(0x6204, 0x70804000); @@ -7517,9 +7703,52 @@ I830BIOSScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) break; } + +#ifdef XF86DRI + if (pI830->directRenderingEnabled && (pI830->mmModeFlags & I830_KERNEL_MM)) { + unsigned long aperEnd = ROUND_DOWN_TO(pI830->FbMapSize, GTT_PAGE_SIZE) + / GTT_PAGE_SIZE; + unsigned long aperStart = ROUND_TO(pI830->FbMapSize - KB(pI830->mmSize), GTT_PAGE_SIZE) + / GTT_PAGE_SIZE; + + if (aperEnd < aperStart || aperEnd - aperStart < I830_MM_MINPAGES) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Too little AGP aperture space for DRM memory manager.\n" + "\tPlease increase AGP aperture size from BIOS configuration screen\n" + "\tor decrease the amount of video RAM using option \"VideoRam\".\n" + "\tDisabling DRI.\n"); + pI830->directRenderingOpen = FALSE; + I830DRICloseScreen(pScreen); + pI830->directRenderingEnabled = FALSE; + } else { +#ifndef XSERVER_LIBDRM_MM + if (I830DrmMMInit(pI830->drmSubFD, aperStart, aperEnd - aperStart, + DRM_BO_MEM_TT)) { +#else + if (drmMMInit(pI830->drmSubFD, aperStart, aperEnd - aperStart, + DRM_BO_MEM_TT)) { +#endif + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Could not initialize the DRM memory manager.\n"); + + pI830->directRenderingOpen = FALSE; + I830DRICloseScreen(pScreen); + pI830->directRenderingEnabled = FALSE; + } else { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "Initialized DRM memory manager, %ld AGP pages\n" + "\tat AGP offset 0x%lx\n", + aperEnd - aperStart, + aperStart); + } + } + } +#endif + return TRUE; } + static void I830AdjustFrame(int scrnIndex, int x, int y, int flags) { @@ -7569,14 +7798,14 @@ I830AdjustFrame(int scrnIndex, int x, int y, int flags) if (pI830->Clone) { if (!pI830->pipe == 0) { - if (!IS_I965G(pI830)) { + if (!IS_I96X(pI830)) { OUTREG(DSPABASE, Start + ((y * pScrn->displayWidth + x) * pI830->cpp)); } else { OUTREG(DSPABASE, 0); OUTREG(DSPASURF, Start + ((y * pScrn->displayWidth + x) * pI830->cpp)); } } else { - if (!IS_I965G(pI830)) { + if (!IS_I96X(pI830)) { OUTREG(DSPBBASE, Start + ((y * pScrn->displayWidth + x) * pI830->cpp)); } else { OUTREG(DSPBBASE, 0); @@ -7586,14 +7815,14 @@ I830AdjustFrame(int scrnIndex, int x, int y, int flags) } if (pI830->pipe == 0) { - if (!IS_I965G(pI830)) { + if (!IS_I96X(pI830)) { OUTREG(DSPABASE, Start + ((y * pScrn->displayWidth + x) * pI830->cpp)); } else { OUTREG(DSPABASE, 0); OUTREG(DSPASURF, Start + ((y * pScrn->displayWidth + x) * pI830->cpp)); } } else { - if (!IS_I965G(pI830)) { + if (!IS_I96X(pI830)) { OUTREG(DSPBBASE, Start + ((y * pScrn->displayWidth + x) * pI830->cpp)); } else { OUTREG(DSPBBASE, 0); @@ -7673,7 +7902,13 @@ I830BIOSLeaveVT(int scrnIndex, int flags) #ifdef XF86DRI if (pI830->directRenderingOpen) { DRILock(screenInfo.screens[pScrn->scrnIndex], 0); - + if (pI830->mmModeFlags & I830_KERNEL_MM) { +#ifndef XSERVER_LIBDRM_MM + I830DrmMMLock(pI830->drmSubFD, DRM_BO_MEM_TT); +#else + drmMMLock(pI830->drmSubFD, DRM_BO_MEM_TT); +#endif + } I830DRISetVBlankInterrupt (pScrn, FALSE); drmCtlUninstHandler(pI830->drmSubFD); @@ -8128,6 +8363,14 @@ I830BIOSEnterVT(int scrnIndex, int flags) for(i = 0; i < I830_NR_TEX_REGIONS+1 ; i++) sarea->texList[i].age = sarea->texAge; + if (pI830->mmModeFlags & I830_KERNEL_MM) { +#ifndef XSERVER_LIBDRM_MM + I830DrmMMUnlock(pI830->drmSubFD, DRM_BO_MEM_TT); +#else + drmMMUnlock(pI830->drmSubFD, DRM_BO_MEM_TT); +#endif + } + DPRINTF(PFX, "calling dri unlock\n"); DRIUnlock(screenInfo.screens[pScrn->scrnIndex]); } @@ -8188,7 +8431,7 @@ I830BIOSSwitchMode(int scrnIndex, DisplayModePtr mode, int flags) */ if ( (!WindowTable[pScrn->scrnIndex] || pspix->devPrivate.ptr == NULL) && !pI830->DGAactive && (pScrn->PointerMoved == I830PointerMoved) && - !IS_I965G(pI830)) { + !IS_I96X(pI830)) { if (!I830Rotate(pScrn, mode)) ret = FALSE; } @@ -8254,7 +8497,7 @@ I830BIOSSaveScreen(ScreenPtr pScreen, int mode) /* Flush changes */ temp = INREG(base); OUTREG(base, temp); - if (IS_I965G(pI830)) { + if (IS_I96X(pI830)) { temp = INREG(surf); OUTREG(surf, temp); } @@ -8341,6 +8584,13 @@ I830BIOSCloseScreen(int scrnIndex, ScreenPtr pScreen) pI830->closing = TRUE; #ifdef XF86DRI if (pI830->directRenderingOpen) { + if (pI830->mmModeFlags & I830_KERNEL_MM) { +#ifndef XSERVER_LIBDRM_MM + I830DrmMMTakedown(pI830->drmSubFD, DRM_BO_MEM_TT); +#else + drmMMTakedown(pI830->drmSubFD, DRM_BO_MEM_TT); +#endif + } pI830->directRenderingOpen = FALSE; I830DRICloseScreen(pScreen); } @@ -8720,7 +8970,7 @@ I830CheckDevicesTimer(OsTimerPtr timer, CARD32 now, pointer arg) offset = pI8301->FrontBuffer2.Start + ((pScrn->frameY0 * pI830->displayWidth + pScrn->frameX0) * pI830->cpp); } - if (IS_I965G(pI830)) { + if (IS_I96X(pI830)) { if (pI830->pipe == 0) adjust = INREG(DSPASURF); else diff --git a/driver/xf86-video-intel/src/i830_memory.c b/driver/xf86-video-intel/src/i830_memory.c index 2d09b2d4d..d1c670670 100644 --- a/driver/xf86-video-intel/src/i830_memory.c +++ b/driver/xf86-video-intel/src/i830_memory.c @@ -1107,6 +1107,12 @@ I830ResetAllocations(ScrnInfoPtr pScrn, const int flags) pI830->MemoryAperture.Start = pI830->StolenMemory.End; pI830->MemoryAperture.End = pI830->FbMapSize; pI830->MemoryAperture.Size = pI830->FbMapSize - pI830->StolenMemory.Size; +#ifdef XF86DRI + if (!pI830->directRenderingDisabled) { + pI830->MemoryAperture.End -= KB(pI830->mmSize); + pI830->MemoryAperture.Size -= KB(pI830->mmSize); + } +#endif pI830->StolenPool.Fixed = pI830->StolenMemory; pI830->StolenPool.Total = pI830->StolenMemory; #if ALLOCATE_ALL_BIOSMEM @@ -1286,37 +1292,41 @@ I830AllocateTextureMemory(ScrnInfoPtr pScrn, const int flags) /* Allocate the remaining space for textures. */ memset(&(pI830->TexMem), 0, sizeof(pI830->TexMem)); pI830->TexMem.Key = -1; - size = GetFreeSpace(pScrn); - if (dryrun && (size < MB(1))) - size = MB(1); - i = myLog2(size / I830_NR_TEX_REGIONS); - if (i < I830_LOG_MIN_TEX_REGION_SIZE) - i = I830_LOG_MIN_TEX_REGION_SIZE; - pI830->TexGranularity = i; - /* Truncate size */ - size >>= i; - size <<= i; - if (size < KB(512)) { - if (!dryrun) { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "Less than 512 kBytes for texture space (real %ld kBytes).\n", - size / 1024); + + if (pI830->mmModeFlags & I830_KERNEL_TEX) { + + size = GetFreeSpace(pScrn); + if (dryrun && (size < MB(1))) + size = MB(1); + i = myLog2(size / I830_NR_TEX_REGIONS); + if (i < I830_LOG_MIN_TEX_REGION_SIZE) + i = I830_LOG_MIN_TEX_REGION_SIZE; + pI830->TexGranularity = i; + /* Truncate size */ + size >>= i; + size <<= i; + if (size < KB(512)) { + if (!dryrun) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Less than 512 kBytes for texture space (real %ld kBytes).\n", + size / 1024); + } + return FALSE; } - return FALSE; - } - alloced = I830AllocVidMem(pScrn, &(pI830->TexMem), - &(pI830->StolenPool), size, GTT_PAGE_SIZE, - flags | FROM_ANYWHERE | ALLOCATE_AT_TOP); - if (alloced < size) { - if (!dryrun) { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "Failed to allocate texture space.\n"); + alloced = I830AllocVidMem(pScrn, &(pI830->TexMem), + &(pI830->StolenPool), size, GTT_PAGE_SIZE, + flags | FROM_ANYWHERE | ALLOCATE_AT_TOP); + if (alloced < size) { + if (!dryrun) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Failed to allocate texture space.\n"); + } + return FALSE; } - return FALSE; + xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity, + "%sAllocated %ld kB for textures at 0x%lx\n", s, + alloced / 1024, pI830->TexMem.Start); } - xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity, - "%sAllocated %ld kB for textures at 0x%lx\n", s, - alloced / 1024, pI830->TexMem.Start); return TRUE; } @@ -1514,7 +1524,9 @@ I830FixupOffsets(ScrnInfoPtr pScrn) I830FixOffset(pScrn, &(pI830->ContextMem)); I830FixOffset(pScrn, &(pI830->BackBuffer)); I830FixOffset(pScrn, &(pI830->DepthBuffer)); - I830FixOffset(pScrn, &(pI830->TexMem)); + if (pI830->mmModeFlags & I830_KERNEL_TEX) { + I830FixOffset(pScrn, &(pI830->TexMem)); + } } #endif return TRUE; @@ -1694,7 +1706,7 @@ MakeTiles(ScrnInfoPtr pScrn, I830MemRange *pMem, unsigned int fence) pitch = pScrn->displayWidth * pI830->cpp; - if (IS_I965G(pI830)) { + if (IS_I96X(pI830)) { I830RegPtr i830Reg = &pI830->ModeReg; switch (fence) { @@ -1913,7 +1925,8 @@ I830BindAGPMemory(ScrnInfoPtr pScrn) return FALSE; if (!BindMemRange(pScrn, &(pI830->DepthBuffer))) return FALSE; - if (!BindMemRange(pScrn, &(pI830->TexMem))) + if ((pI830->mmModeFlags & I830_KERNEL_TEX) && + !BindMemRange(pScrn, &(pI830->TexMem))) return FALSE; } #endif @@ -1997,7 +2010,8 @@ I830UnbindAGPMemory(ScrnInfoPtr pScrn) return FALSE; if (!UnbindMemRange(pScrn, &(pI830->DepthBuffer))) return FALSE; - if (!UnbindMemRange(pScrn, &(pI830->TexMem))) + if ((pI830->mmModeFlags & I830_KERNEL_TEX) && + !UnbindMemRange(pScrn, &(pI830->TexMem))) return FALSE; } #endif diff --git a/driver/xf86-video-intel/src/i830_video.c b/driver/xf86-video-intel/src/i830_video.c index db21d8728..c97dfc8f3 100644 --- a/driver/xf86-video-intel/src/i830_video.c +++ b/driver/xf86-video-intel/src/i830_video.c @@ -1,4 +1,3 @@ -#define VIDEO_DEBUG 0 /*************************************************************************** Copyright 2000 Intel Corporation. All Rights Reserved. @@ -172,7 +171,7 @@ Edummy(const char *dummy, ...) OUT_RING(MI_NOOP); \ OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_FLIP_CONTINUE); \ } \ - if (IS_I965G(pI830)) \ + if (IS_I96X(pI830)) \ OUT_RING(pI830->OverlayMem->Start | OFC_UPDATE); \ else \ OUT_RING(pI830->OverlayMem->Physical | OFC_UPDATE); \ @@ -190,7 +189,7 @@ Edummy(const char *dummy, ...) OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE); \ OUT_RING(MI_NOOP); \ OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_FLIP_OFF); \ - if (IS_I965G(pI830)) \ + if (IS_I96X(pI830)) \ OUT_RING(pI830->OverlayMem->Start | OFC_UPDATE); \ else \ OUT_RING(pI830->OverlayMem->Physical | OFC_UPDATE); \ @@ -447,7 +446,7 @@ I830InitVideo(ScreenPtr pScreen) xvContrast = MAKE_ATOM("XV_CONTRAST"); /* Set up overlay video if we can do it at this depth. */ - if (!IS_I965G(pI830) && pScrn->bitsPerPixel != 8) { + if (!IS_I96X(pI830) && pScrn->bitsPerPixel != 8) { overlayAdaptor = I830SetupImageVideoOverlay(pScreen); if (overlayAdaptor != NULL) { adaptors[num_adaptors++] = overlayAdaptor; @@ -462,7 +461,7 @@ I830InitVideo(ScreenPtr pScreen) /* Set up textured video if we can do it at this depth and we are on * supported hardware. */ - if (pScrn->bitsPerPixel >= 16 && (IS_I9XX(pI830) || IS_I965G(pI830))) { + if (pScrn->bitsPerPixel >= 16 && (IS_I9XX(pI830) || IS_I96X(pI830))) { texturedAdaptor = I830SetupImageVideoTextured(pScreen); if (texturedAdaptor != NULL) { adaptors[num_adaptors++] = texturedAdaptor; @@ -935,14 +934,16 @@ I830SetPortAttribute(ScrnInfoPtr pScrn, pPriv->brightness = value; overlay->OCLRC0 = (pPriv->contrast << 18) | (pPriv->brightness & 0xff); ErrorF("BRIGHTNESS\n"); - OVERLAY_UPDATE; + if (*pI830->overlayOn) + OVERLAY_UPDATE; } else if (attribute == xvContrast) { if ((value < 0) || (value > 255)) return BadValue; pPriv->contrast = value; overlay->OCLRC0 = (pPriv->contrast << 18) | (pPriv->brightness & 0xff); ErrorF("CONTRAST\n"); - OVERLAY_UPDATE; + if (*pI830->overlayOn) + OVERLAY_UPDATE; } else if (pI830->Clone && attribute == xvPipe) { if ((value < 0) || (value > 1)) return BadValue; @@ -956,7 +957,8 @@ I830SetPortAttribute(ScrnInfoPtr pScrn, else overlay->OCONFIG |= OVERLAY_PIPE_B; ErrorF("PIPE CHANGE\n"); - OVERLAY_UPDATE; + if (*pI830->overlayOn) + OVERLAY_UPDATE; } else if (attribute == xvGamma0 && (IS_I9XX(pI830))) { pPriv->gamma0 = value; } else if (attribute == xvGamma1 && (IS_I9XX(pI830))) { @@ -983,7 +985,8 @@ I830SetPortAttribute(ScrnInfoPtr pScrn, break; } ErrorF("COLORKEY\n"); - OVERLAY_UPDATE; + if (*pI830->overlayOn) + OVERLAY_UPDATE; REGION_EMPTY(pScrn->pScreen, &pPriv->clip); } else if(attribute == xvDoubleBuffer) { if ((value < 0) || (value > 1)) @@ -1001,13 +1004,8 @@ I830SetPortAttribute(ScrnInfoPtr pScrn, attribute == xvGamma3 || attribute == xvGamma4 || attribute == xvGamma5) && (IS_I9XX(pI830))) { - CARD32 r = overlay->OCMD & OVERLAY_ENABLE; ErrorF("GAMMA\n"); - overlay->OCMD &= ~OVERLAY_ENABLE; - OVERLAY_UPDATE; I830UpdateGamma(pScrn); - overlay->OCMD |= r; - OVERLAY_UPDATE; } return Success; @@ -1849,7 +1847,7 @@ I830DisplayVideo(ScrnInfoPtr pScrn, int id, short width, short height, dstBox->x2, dstBox->y2); /* buffer locations */ - if (IS_I965G(pI830)) + if (IS_I96X(pI830)) { overlay->OBUF_0Y = 0; overlay->OBUF_0U = 0; @@ -2997,7 +2995,7 @@ I830PutImage(ScrnInfoPtr pScrn, if (pPriv->textured) { pitchAlignMask = 3; } else { - if (IS_I965G(pI830)) + if (IS_I96X(pI830)) pitchAlignMask = 255; else pitchAlignMask = 63; @@ -3033,7 +3031,7 @@ I830PutImage(ScrnInfoPtr pScrn, ErrorF("srcPitch: %d, dstPitch: %d, size: %d\n", srcPitch, dstPitch, size); #endif - if (IS_I965G(pI830)) + if (IS_I96X(pI830)) extraLinear = BRW_LINEAR_EXTRA; else extraLinear = 0; @@ -3147,7 +3145,7 @@ I830PutImage(ScrnInfoPtr pScrn, I830DisplayVideo(pScrn, destId, width, height, dstPitch, x1, y1, x2, y2, &dstBox, src_w, src_h, drw_w, drw_h); - } else if (IS_I965G(pI830)) { + } else if (IS_I96X(pI830)) { BroadwaterDisplayVideoTextured (pScrn, pPriv, destId, clipBoxes, width, height, dstPitch, x1, y1, x2, y2, src_w, src_h, drw_w, drw_h, pDraw); @@ -3621,7 +3619,7 @@ I830VideoSwitchModeAfter(ScrnInfoPtr pScrn, DisplayModePtr mode) } } - if (!IS_I965G(pI830)) { + if (!IS_I96X(pI830)) { if (pPriv->pipe == 0) { if (INREG(PIPEACONF) & PIPEACONF_DOUBLE_WIDE) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, -- cgit v1.2.3