Support AST2200/2150

1 files changed, 270 insertions, 4 deletions

diff --git a/src/ast_vgatool.c b/src/ast_vgatool.c
index 91a6a1d..9319d58 100644
--- a/src/ast_vgatool.c
+++ b/src/ast_vgatool.c
@@ -68,6 +68,7 @@ void vSetStartAddressCRT1(ASTRecPtr pAST, ULONG base);
 void vASTLoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices, LOCO *colors, VisualPtr pVisual);
 void ASTDisplayPowerManagementSet(ScrnInfoPtr pScrn, int PowerManagementMode, int flags);
 Bool GetVGA2EDID(ScrnInfoPtr pScrn, unsigned char *pEDIDBuffer);
+void vInitDRAMReg(ScrnInfoPtr pScrn);
 
 void
 vASTOpenKey(ScrnInfoPtr pScrn)
@@ -176,20 +177,23 @@ GetMaxDCLK(ScrnInfoPtr pScrn)
    
    /* Get Bandwidth */
    /* Modify DARM utilization to 60% for AST1100/2100 16bits DRAM, ycchen@032508 */
-   if ( ((pAST->jChipType == AST2100) || (pAST->jChipType == AST1100)) && (ulDRAMBusWidth == 16) )
+   if ( ((pAST->jChipType == AST2100) || (pAST->jChipType == AST1100) || (pAST->jChipType == AST2200) || (pAST->jChipType == AST2150)) && (ulDRAMBusWidth == 16) )
        DRAMEfficiency = 600;     
    ulDRAMBandwidth = ulMCLK * ulDRAMBusWidth * 2 / 8;
    ActualDRAMBandwidth = ulDRAMBandwidth * DRAMEfficiency / 1000;
    
-   /* Get Max DCLK */    
+   /* Get Max DCLK */
+   /* Fixed Fixed KVM + CRT threshold issue on AST2100 8bpp modes, ycchen@100708 */    
    GetIndexRegMask(CRTC_PORT, 0xD0, 0xFF, jReg);  
-   if (jReg & 0x08)                      
+   if ((jReg & 0x08) && (pAST->jChipType == AST2000))                     
        ulDCLK = ActualDRAMBandwidth / ((pScrn->bitsPerPixel+1+16) / 8);	
+   else if ((jReg & 0x08) && (pScrn->bitsPerPixel == 8))
+       ulDCLK = ActualDRAMBandwidth / ((pScrn->bitsPerPixel+1+24) / 8);	       
    else    
        ulDCLK = ActualDRAMBandwidth / ((pScrn->bitsPerPixel+1) / 8);	   
 
    /* Add for AST2100, ycchen@061807 */
-   if (pAST->jChipType == AST2100)
+   if ((pAST->jChipType == AST2100) || (pAST->jChipType == AST2200))
        if (ulDCLK > 200) ulDCLK = 200;
    else
        if (ulDCLK > 165) ulDCLK = 165;       
@@ -203,6 +207,7 @@ GetChipType(ScrnInfoPtr pScrn)
 {
    ASTRecPtr pAST = ASTPTR(pScrn);
    ULONG ulData;
+   UCHAR jReg;
    
    pAST->jChipType = AST2100;
 
@@ -211,8 +216,34 @@ GetChipType(ScrnInfoPtr pScrn)
 
    ulData = *(ULONG *) (pAST->MMIOVirtualAddr + 0x1207c);       
    
+#if 0   
    if ((ulData & 0x0300) == 0x0200)
        pAST->jChipType = AST1100;   
+#endif       
+   switch (ulData & 0x0300)
+   {
+   case 0x0200:
+       xf86DrvMsg(pScrn->scrnIndex, X_INFO, "AST1100 Detected.\n");
+       pAST->jChipType = AST1100;   
+       break;
+   case 0x0100:
+       xf86DrvMsg(pScrn->scrnIndex, X_INFO, "AST2200 Detected.\n");   
+       pAST->jChipType = AST2200;   
+       break;
+   case 0x0000:
+       xf86DrvMsg(pScrn->scrnIndex, X_INFO, "AST2150 Detected.\n");   
+       pAST->jChipType = AST2150;   
+       break;
+   default:           
+       xf86DrvMsg(pScrn->scrnIndex, X_INFO, "AST2100 Detected.\n");   
+       pAST->jChipType = AST2100;
+   }	
+       
+   /* VGA2 Clone Support */    
+   GetIndexRegMask(CRTC_PORT, 0x90, 0xFF, jReg);
+   if (jReg & 0x10)
+       pAST->VGA2Clone = TRUE;
+          
 }
 
 void
@@ -438,3 +469,238 @@ GetVGA2EDID(ScrnInfoPtr pScrn, unsigned char *pEDIDBuffer)
     return (TRUE);
 
 } /* GetVGA2EDID */
+
+typedef struct _AST_DRAMStruct {
+	
+    USHORT 	Index;
+    ULONG	Data;
+    
+} AST_DRAMStruct, *PAST_DRAMStruct; 
+
+AST_DRAMStruct AST2000DRAMTableData[] = {
+    { 0x0108, 0x00000000 },
+    { 0x0120, 0x00004a21 },
+    { 0xFF00, 0x00000043 },   	
+    { 0x0000, 0xFFFFFFFF },
+    { 0x0004, 0x00000089 },
+    { 0x0008, 0x22331353 },
+    { 0x000C, 0x0d07000b },
+    { 0x0010, 0x11113333 },
+    { 0x0020, 0x00110350 },   
+    { 0x0028, 0x1e0828f0 },
+    { 0x0024, 0x00000001 },
+    { 0x001C, 0x00000000 },
+    { 0x0014, 0x00000003 },
+    { 0xFF00, 0x00000043 },
+    { 0x0018, 0x00000131 },
+    { 0x0014, 0x00000001 },
+    { 0xFF00, 0x00000043 },
+    { 0x0018, 0x00000031 },
+    { 0x0014, 0x00000001 },
+    { 0xFF00, 0x00000043 },
+    { 0x0028, 0x1e0828f1 },
+    { 0x0024, 0x00000003 },
+    { 0x002C, 0x1f0f28fb },
+    { 0x0030, 0xFFFFFE01 },
+    { 0xFFFF, 0xFFFFFFFF }
+};
+
+AST_DRAMStruct AST1100DRAMTableData[] = {	
+    { 0x2000, 0x1688a8a8 },
+    { 0x2020, 0x000041f0 },
+    { 0xFF00, 0x00000043 },
+    { 0x0000, 0xfc600309 },
+    { 0x006C, 0x00909090 },
+    { 0x0064, 0x00050000 },
+    { 0x0004, 0x00000585 },
+    { 0x0008, 0x0011030f },
+    { 0x0010, 0x22201724 },
+    { 0x0018, 0x1e29011a },
+    { 0x0020, 0x00c82222 },
+    { 0x0014, 0x01001523 },
+    { 0x001C, 0x1024010d },
+    { 0x0024, 0x00cb2522 },
+    { 0x0038, 0xffffff82 },
+    { 0x003C, 0x00000000 },
+    { 0x0040, 0x00000000 },
+    { 0x0044, 0x00000000 },
+    { 0x0048, 0x00000000 },
+    { 0x004C, 0x00000000 },
+    { 0x0050, 0x00000000 },
+    { 0x0054, 0x00000000 },
+    { 0x0058, 0x00000000 },
+    { 0x005C, 0x00000000 },
+    { 0x0060, 0x032aa02a },
+    { 0x0064, 0x002d3000 },
+    { 0x0068, 0x00000000 },
+    { 0x0070, 0x00000000 },
+    { 0x0074, 0x00000000 },
+    { 0x0078, 0x00000000 },
+    { 0x007C, 0x00000000 },
+    { 0x0034, 0x00000001 },
+    { 0xFF00, 0x00000043 },
+    { 0x002C, 0x00000732 },
+    { 0x0030, 0x00000040 },
+    { 0x0028, 0x00000005 },
+    { 0x0028, 0x00000007 },
+    { 0x0028, 0x00000003 },
+    { 0x0028, 0x00000001 },
+    { 0x000C, 0x00005a08 },
+    { 0x002C, 0x00000632 },
+    { 0x0028, 0x00000001 },
+    { 0x0030, 0x000003c0 },
+    { 0x0028, 0x00000003 },
+    { 0x0030, 0x00000040 },
+    { 0x0028, 0x00000003 },
+    { 0x000C, 0x00005a21 },
+    { 0x0034, 0x00007c03 },
+    { 0x0120, 0x00004c41 },
+    { 0xffff, 0xffffffff },
+};
+
+AST_DRAMStruct AST2100DRAMTableData[] = {	
+    { 0x2000, 0x1688a8a8 },
+    { 0x2020, 0x00004120 },
+    { 0xFF00, 0x00000043 },
+    { 0x0000, 0xfc600309 },
+    { 0x006C, 0x00909090 },
+    { 0x0064, 0x00070000 },
+    { 0x0004, 0x00000489 },
+    { 0x0008, 0x0011030f },
+    { 0x0010, 0x32302926 },
+    { 0x0018, 0x274c0122 },
+    { 0x0020, 0x00ce2222 },
+    { 0x0014, 0x01001523 },
+    { 0x001C, 0x1024010d },
+    { 0x0024, 0x00cb2522 },
+    { 0x0038, 0xffffff82 },
+    { 0x003C, 0x00000000 },
+    { 0x0040, 0x00000000 },
+    { 0x0044, 0x00000000 },
+    { 0x0048, 0x00000000 },
+    { 0x004C, 0x00000000 },
+    { 0x0050, 0x00000000 },
+    { 0x0054, 0x00000000 },
+    { 0x0058, 0x00000000 },
+    { 0x005C, 0x00000000 },
+    { 0x0060, 0x0f2aa02a },
+    { 0x0064, 0x003f3005 },
+    { 0x0068, 0x02020202 },
+    { 0x0070, 0x00000000 },
+    { 0x0074, 0x00000000 },
+    { 0x0078, 0x00000000 },
+    { 0x007C, 0x00000000 },
+    { 0x0034, 0x00000001 },
+    { 0xFF00, 0x00000043 },
+    { 0x002C, 0x00000942 },
+    { 0x0030, 0x00000040 },
+    { 0x0028, 0x00000005 },
+    { 0x0028, 0x00000007 },
+    { 0x0028, 0x00000003 },
+    { 0x0028, 0x00000001 },
+    { 0x000C, 0x00005a08 },
+    { 0x002C, 0x00000842 },
+    { 0x0028, 0x00000001 },
+    { 0x0030, 0x000003c0 },
+    { 0x0028, 0x00000003 },
+    { 0x0030, 0x00000040 },
+    { 0x0028, 0x00000003 },
+    { 0x000C, 0x00005a21 },
+    { 0x0034, 0x00007c03 },
+    { 0x0120, 0x00005061 },
+    { 0xffff, 0xffffffff },
+};
+
+void vInitDRAMReg(ScrnInfoPtr pScrn)
+{
+    AST_DRAMStruct *pjDRAMRegInfo;
+    ASTRecPtr pAST = ASTPTR(pScrn);
+    ULONG i, ulTemp;
+    UCHAR jReg;
+
+    GetIndexRegMask(CRTC_PORT, 0xD0, 0xFF, jReg);  
+    
+    if ((jReg & 0x80) == 0)			/* VGA only */
+    {
+    	if (pAST->jChipType == AST2000)
+    	{
+            pjDRAMRegInfo = AST2000DRAMTableData;
+            
+            *(ULONG *) (pAST->MMIOVirtualAddr + 0xF004) = 0x1e6e0000;
+            *(ULONG *) (pAST->MMIOVirtualAddr + 0xF000) = 0x1;        
+            *(ULONG *) (pAST->MMIOVirtualAddr + 0x10100) = 0xa8;
+
+            do {
+               ; 	
+            } while (*(volatile ULONG *) (pAST->MMIOVirtualAddr + 0x10100) != 0xa8);
+                
+        }
+    	else	/* AST2100/1100 */	
+    	{
+    	    GetChipType(pScrn);
+            
+    	    if ((pAST->jChipType == AST2100) || (pAST->jChipType == AST2200))
+                pjDRAMRegInfo = AST2100DRAMTableData;
+    	    else
+                pjDRAMRegInfo = AST1100DRAMTableData;
+    		
+            *(ULONG *) (pAST->MMIOVirtualAddr + 0xF004) = 0x1e6e0000;
+            *(ULONG *) (pAST->MMIOVirtualAddr + 0xF000) = 0x1;
+            
+            *(ULONG *) (pAST->MMIOVirtualAddr + 0x12000) = 0x1688A8A8;
+            do {
+               ; 	
+            } while (*(volatile ULONG *) (pAST->MMIOVirtualAddr + 0x12000) != 0x01);
+            
+            *(ULONG *) (pAST->MMIOVirtualAddr + 0x10000) = 0xFC600309;
+            do {
+               ; 	
+            } while (*(volatile ULONG *) (pAST->MMIOVirtualAddr + 0x10000) != 0x01);
+
+        }
+	
+        while (pjDRAMRegInfo->Index != 0xFFFF)
+        {
+            if (pjDRAMRegInfo->Index == 0xFF00)			/* Delay function */
+            {
+            	for (i=0; i<15; i++)				
+        	    xf86UDelay(pjDRAMRegInfo->Data);
+            }
+            else if ( (pjDRAMRegInfo->Index == 0x0004) && (pAST->jChipType != AST2000) )
+            {
+                ulTemp = *(ULONG *) (pAST->MMIOVirtualAddr + 0x12070);
+                ulTemp &= 0x0000000C;
+                *(ULONG *) (pAST->MMIOVirtualAddr + 0x10000 + pjDRAMRegInfo->Index) = (pjDRAMRegInfo->Data | ulTemp);               
+            }	                
+            else
+            {	           	           
+                *(ULONG *) (pAST->MMIOVirtualAddr + 0x10000 + pjDRAMRegInfo->Index) = pjDRAMRegInfo->Data;
+            }
+            pjDRAMRegInfo++;            
+        }
+
+        switch (pAST->jChipType)
+        {
+        case AST2000:
+            *(ULONG *) (pAST->MMIOVirtualAddr + 0x10140) |= 0x40;
+            break;
+            
+        case AST1100:
+        case AST2100:
+        case AST2200:
+        case AST2150:        
+            ulTemp = *(ULONG *) (pAST->MMIOVirtualAddr + 0x1200c);
+            *(ULONG *) (pAST->MMIOVirtualAddr + 0x1200c) = (ulTemp & 0xFFFFFFFD);
+
+            *(ULONG *) (pAST->MMIOVirtualAddr + 0x12040) |= 0x40;
+            break;
+        }
+	            	
+    } /* Init DRAM */
+    
+    /* wait ready */
+    do {
+        GetIndexRegMask(CRTC_PORT, 0xD0, 0xFF, jReg);      	
+    } while ((jReg & 0x40) == 0);
+       
+} /* vInitDRAMReg */