radeon: emit colorpitch relocs.

This causes relocs to be emitted for the colorpitch.

Shouldn't have no effect on current kernels, but will keep DDX
going on kms kernels when tiling lands

Also contains a missing reloc space for r200

3 files changed, 24 insertions, 14 deletions

diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c
index 641ea1f2..9cd70cda 100644
--- a/src/radeon_exa_render.c
+++ b/src/radeon_exa_render.c
@@ -639,11 +639,11 @@ static Bool FUNC_NAME(R100PrepareComposite)(int op,
 	info->accel_state->is_transform[1] = FALSE;
     }
 
-    BEGIN_ACCEL_RELOC(10, 1);
+    BEGIN_ACCEL_RELOC(10, 2);
     OUT_ACCEL_REG(RADEON_PP_CNTL, pp_cntl);
     OUT_ACCEL_REG(RADEON_RB3D_CNTL, dst_format | RADEON_ALPHA_BLEND_ENABLE);
     EMIT_WRITE_OFFSET(RADEON_RB3D_COLOROFFSET, 0, pDst);
-    OUT_ACCEL_REG(RADEON_RB3D_COLORPITCH, colorpitch);
+    EMIT_COLORPITCH(RADEON_RB3D_COLORPITCH, colorpitch, pDst);
 
     /* IN operator: Multiply src by mask components or mask alpha.
      * BLEND_CTL_ADD is A * B + C.
@@ -968,12 +968,13 @@ static Bool FUNC_NAME(R200PrepareComposite)(int op, PicturePtr pSrcPicture,
 	info->accel_state->is_transform[1] = FALSE;
     }
 
-    BEGIN_ACCEL_RELOC(13, 1);
+    BEGIN_ACCEL_RELOC(13, 2);
 
     OUT_ACCEL_REG(RADEON_PP_CNTL, pp_cntl);
     OUT_ACCEL_REG(RADEON_RB3D_CNTL, dst_format | RADEON_ALPHA_BLEND_ENABLE);
 
     EMIT_WRITE_OFFSET(RADEON_RB3D_COLOROFFSET, 0, pDst);
+    EMIT_COLORPITCH(RADEON_RB3D_COLORPITCH, colorpitch, pDst);
 
     OUT_ACCEL_REG(R200_SE_VTX_FMT_0, R200_VTX_XY);
     if (pMask)
@@ -984,7 +985,7 @@ static Bool FUNC_NAME(R200PrepareComposite)(int op, PicturePtr pSrcPicture,
 	OUT_ACCEL_REG(R200_SE_VTX_FMT_1,
 		      (2 << R200_VTX_TEX0_COMP_CNT_SHIFT));
 
-    OUT_ACCEL_REG(RADEON_RB3D_COLORPITCH, colorpitch);
+
 
     /* IN operator: Multiply src by mask components or mask alpha.
      * BLEND_CTL_ADD is A * B + C.
@@ -2003,9 +2004,9 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture,
     FINISH_ACCEL();
 
     
-    BEGIN_ACCEL_RELOC(3, 1);
+    BEGIN_ACCEL_RELOC(3, 2);
     EMIT_WRITE_OFFSET(R300_RB3D_COLOROFFSET0, 0, pDst);
-    OUT_ACCEL_REG(R300_RB3D_COLORPITCH0, colorpitch);
+    EMIT_COLORPITCH(R300_RB3D_COLORPITCH0, colorpitch, pDst);
 
     blendcntl = RADEONGetBlendCntl(op, pMaskPicture, pDstPicture->format);
     OUT_ACCEL_REG(R300_RB3D_BLENDCNTL, blendcntl | R300_ALPHA_BLEND_ENABLE | R300_READ_ENABLE);
diff --git a/src/radeon_macros.h b/src/radeon_macros.h
index ae8d9506..26d98250 100644
--- a/src/radeon_macros.h
+++ b/src/radeon_macros.h
@@ -196,5 +196,14 @@ do {									\
       OUT_ACCEL_REG((reg), (offset) + info->fbLocation + pScrn->fbOffset);} \
   } while(0)
 
+#define EMIT_COLORPITCH(reg, value, pPix) do {			\
+    if (info->cs) {						\
+	driver_priv = exaGetPixmapDriverPrivate(pPix);			\
+	OUT_ACCEL_REG((reg), value);					\
+	OUT_RELOC(driver_priv->bo, 0, RADEON_GEM_DOMAIN_VRAM);		\
+    } else {								\
+	OUT_ACCEL_REG((reg), value);					\
+    }									\
+}while(0)
 
 #endif
diff --git a/src/radeon_textured_videofuncs.c b/src/radeon_textured_videofuncs.c
index 95db7d5a..1d6b2e7e 100644
--- a/src/radeon_textured_videofuncs.c
+++ b/src/radeon_textured_videofuncs.c
@@ -197,11 +197,11 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 
     txoffset = info->cs ? 0 : pPriv->src_offset;
 
-    BEGIN_ACCEL_RELOC(4,1);
+    BEGIN_ACCEL_RELOC(4,2);
 
     OUT_ACCEL_REG(RADEON_RB3D_CNTL, dst_format);
     EMIT_WRITE_OFFSET(RADEON_RB3D_COLOROFFSET, 0, pPixmap);
-    OUT_ACCEL_REG(RADEON_RB3D_COLORPITCH, colorpitch);
+    EMIT_COLORPITCH(RADEON_RB3D_COLORPITCH, colorpitch, pPixmap);
     OUT_ACCEL_REG(RADEON_RB3D_BLENDCNTL,
 		  RADEON_SRC_BLEND_GL_ONE | RADEON_DST_BLEND_GL_ZERO);
 
@@ -583,11 +583,11 @@ FUNC_NAME(R200DisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
     if (RADEONTilingEnabled(pScrn, pPixmap))
 	colorpitch |= RADEON_COLOR_TILE_ENABLE;
 
-    BEGIN_ACCEL(4);
+    BEGIN_ACCEL_RELOC(4,2);
 
     OUT_ACCEL_REG(RADEON_RB3D_CNTL, dst_format);
     EMIT_WRITE_OFFSET(RADEON_RB3D_COLOROFFSET, 0, pPixmap);
-    OUT_ACCEL_REG(RADEON_RB3D_COLORPITCH, colorpitch);
+    EMIT_COLORPITCH(RADEON_RB3D_COLORPITCH, colorpitch, pPixmap);
 
     OUT_ACCEL_REG(RADEON_RB3D_BLENDCNTL,
 		  RADEON_SRC_BLEND_GL_ONE | RADEON_DST_BLEND_GL_ZERO);
@@ -2271,12 +2271,12 @@ FUNC_NAME(R300DisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
 	FINISH_ACCEL();
     }
 
-    BEGIN_ACCEL_RELOC(6, 1);
+    BEGIN_ACCEL_RELOC(6, 2);
     OUT_ACCEL_REG(R300_TX_INVALTAGS, 0);
     OUT_ACCEL_REG(R300_TX_ENABLE, txenable);
 
     EMIT_WRITE_OFFSET(R300_RB3D_COLOROFFSET0, 0, pPixmap);
-    OUT_ACCEL_REG(R300_RB3D_COLORPITCH0, colorpitch);
+    EMIT_COLORPITCH(R300_RB3D_COLORPITCH0, colorpitch, pPixmap);
 
     /* no need to enable blending */
     OUT_ACCEL_REG(R300_RB3D_BLENDCNTL, RADEON_SRC_BLEND_GL_ONE | RADEON_DST_BLEND_GL_ZERO);
@@ -3848,12 +3848,12 @@ FUNC_NAME(R500DisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
 	FINISH_ACCEL();
     }
 
-    BEGIN_ACCEL_RELOC(6, 1);
+    BEGIN_ACCEL_RELOC(6, 2);
     OUT_ACCEL_REG(R300_TX_INVALTAGS, 0);
     OUT_ACCEL_REG(R300_TX_ENABLE, txenable);
 
     EMIT_WRITE_OFFSET(R300_RB3D_COLOROFFSET0, 0, pPixmap);
-    OUT_ACCEL_REG(R300_RB3D_COLORPITCH0, colorpitch);
+    EMIT_COLORPITCH(R300_RB3D_COLORPITCH0, colorpitch, pPixmap);
 
     /* no need to enable blending */
     OUT_ACCEL_REG(R300_RB3D_BLENDCNTL, RADEON_SRC_BLEND_GL_ONE | RADEON_DST_BLEND_GL_ZERO);