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authorMichel Dänzer <michel.daenzer@amd.com>2015-04-20 18:44:36 +0900
committerMichel Dänzer <michel@daenzer.net>2015-04-17 11:42:48 +0900
commit43159ef400c3b18b9f4d3e6fa1c4aef2d60d38fe (patch)
tree5f443d603ce9c72a40b830cd889c05f4db23d8e2 /man/radeon.man
parented401f5b4f07375db17ff05e294907ec95fc946d (diff)
Add Option "TearFree" v4
Avoids tearing by flipping between two scanout BOs per (non-rotated) CRTC v2: * Fix condition for TearFree log message (Richard Wilbur) * Log warning message about DRI page flipping being enabled because of TearFree (or ShadowPrimary) also when building without glamor support v3: * Only override fb_id/x/y if all scanout pixmaps have been successfully allocated v4: * Make log warning clearer if drmModePageFlip returns an error Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1)
Diffstat (limited to 'man/radeon.man')
-rw-r--r--man/radeon.man7
1 files changed, 7 insertions, 0 deletions
diff --git a/man/radeon.man b/man/radeon.man
index 27037730..f0a6be1a 100644
--- a/man/radeon.man
+++ b/man/radeon.man
@@ -276,6 +276,13 @@ Enable DRI2 page flipping. The default is
.B on.
Pageflipping is supported on all radeon hardware.
.TP
+.BI "Option \*qTearFree\*q \*q" boolean \*q
+Enable tearing prevention using the hardware page flipping mechanism. This
+option currently doesn't have any effect for rotated CRTCs. It requires
+allocating two separate scanout buffers for each non-rotated CRTC. Enabling
+this option currently disables Option \*qEnablePageFlip\*q. The default is
+.B off.
+.TP
.BI "Option \*qAccelMethod\*q \*q" "string" \*q
Chooses between available acceleration architectures. Valid values are
.B EXA