diff options
author | Alex Deucher <alexdeucher@gmail.com> | 2010-02-22 17:27:24 -0500 |
---|---|---|
committer | Alex Deucher <alexdeucher@gmail.com> | 2010-02-22 17:27:24 -0500 |
commit | 212e152536c4325e6799018891d9aee132681f48 (patch) | |
tree | a53dc9542eaef9a9ab659fd64ebfaf92b3f4e318 /src/atombios_crtc.c | |
parent | e68d3a3890fc81c51f2006b5548da1e8756ad2fd (diff) |
radeon: update new pll algo
- add support for pre-avivo chips
- add support for fixed post/ref dividers
- add support for non-fractional fb dividers
By default avivo chips use the new algo and
pre-avivo chips use the old algo. Use the
"NewPLL" option to toggle between them (set to
TRUE for the new algo, FALSE for the old).
Diffstat (limited to 'src/atombios_crtc.c')
-rw-r--r-- | src/atombios_crtc.c | 11 |
1 files changed, 3 insertions, 8 deletions
diff --git a/src/atombios_crtc.c b/src/atombios_crtc.c index 07fa8075..1d86643b 100644 --- a/src/atombios_crtc.c +++ b/src/atombios_crtc.c @@ -437,7 +437,8 @@ static void atombios_crtc_set_pll(xf86CrtcPtr crtc, DisplayModePtr mode) { RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private; - RADEONInfoPtr info = RADEONPTR(crtc->scrn); + ScrnInfoPtr pScrn = crtc->scrn; + RADEONInfoPtr info = RADEONPTR(pScrn); xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(crtc->scrn); unsigned char *RADEONMMIO = info->MMIO; int index; @@ -613,13 +614,7 @@ atombios_crtc_set_pll(xf86CrtcPtr crtc, DisplayModePtr mode) } } - if (IS_AVIVO_VARIANT) { - if (xf86ReturnOptValBool(info->Options, OPTION_NEW_PLL, TRUE)) - RADEONComputePLL_AVIVO(&info->pll, sclock, &temp, &fb_div, &frac_fb_div, &ref_div, &post_div, pll_flags); - else - RADEONComputePLL(&info->pll, sclock, &temp, &fb_div, &frac_fb_div, &ref_div, &post_div, pll_flags); - } else - RADEONComputePLL(&info->pll, sclock, &temp, &fb_div, &frac_fb_div, &ref_div, &post_div, pll_flags); + RADEONComputePLL(pScrn, &info->pll, sclock, &temp, &fb_div, &frac_fb_div, &ref_div, &post_div, pll_flags); sclock = temp; /* 10 khz */ xf86DrvMsg(crtc->scrn->scrnIndex, X_INFO, |