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authorAlex Deucher <alexdeucher@gmail.com>2010-12-16 18:49:55 -0500
committerAlex Deucher <alexdeucher@gmail.com>2010-12-16 18:49:55 -0500
commite97079c1b621433b4aa3ecfdd2aa0884aac5df76 (patch)
tree9fef358422746d29861c2e2ae4098d4b4a2b8042 /src/atombios_output.c
parent3b1fb12dec7df4e9434b2c51568ac8d997638922 (diff)
DCE4.1: fix DIGx routing
Works more like DCE4.0. With only two DIGx blocks the routing is hardcoded based on link. This fixes blank screen issues when changing crtc routing due to incorrect crtc to dig mapping. Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Diffstat (limited to 'src/atombios_output.c')
-rw-r--r--src/atombios_output.c63
1 files changed, 28 insertions, 35 deletions
diff --git a/src/atombios_output.c b/src/atombios_output.c
index 006905be..cad506e9 100644
--- a/src/atombios_output.c
+++ b/src/atombios_output.c
@@ -731,17 +731,9 @@ atombios_output_dig_transmitter_setup(xf86OutputPtr output, int action, uint8_t
else
disp_data.v3.ucLaneNum = 4;
- if (IS_DCE41_VARIANT) {
- if (radeon_output->dig_encoder)
- disp_data.v3.acConfig.ucEncoderSel = 1;
-
- if (radeon_output->linkb)
- disp_data.v3.acConfig.ucLinkSel = 1;
- } else {
- if (radeon_output->linkb) {
- disp_data.v3.acConfig.ucLinkSel = 1;
- disp_data.v2.acConfig.ucEncoderSel = 1;
- }
+ if (radeon_output->linkb) {
+ disp_data.v3.acConfig.ucLinkSel = 1;
+ disp_data.v2.acConfig.ucEncoderSel = 1;
}
// select the PLL for the UNIPHY
@@ -1638,37 +1630,38 @@ atombios_pick_dig_encoder(xf86OutputPtr output)
mode == ATOM_ENCODER_MODE_CV)
return;
- if (IS_DCE41_VARIANT) {
- RADEONCrtcPrivatePtr radeon_crtc = output->crtc->driver_private;
- radeon_output->dig_encoder = radeon_crtc->crtc_id;
- return;
- }
-
if (IS_DCE4_VARIANT) {
radeon_encoder = radeon_get_encoder(output);
- switch (radeon_encoder->encoder_id) {
- case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
+ if (IS_DCE41_VARIANT) {
if (radeon_output->linkb)
radeon_output->dig_encoder = 1;
else
radeon_output->dig_encoder = 0;
- break;
- case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
- if (radeon_output->linkb)
- radeon_output->dig_encoder = 3;
- else
- radeon_output->dig_encoder = 2;
- break;
- case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
- if (radeon_output->linkb)
- radeon_output->dig_encoder = 5;
- else
- radeon_output->dig_encoder = 4;
- break;
- default:
- ErrorF("Unknown encoder\n");
- break;
+ } else {
+ switch (radeon_encoder->encoder_id) {
+ case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
+ if (radeon_output->linkb)
+ radeon_output->dig_encoder = 1;
+ else
+ radeon_output->dig_encoder = 0;
+ break;
+ case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
+ if (radeon_output->linkb)
+ radeon_output->dig_encoder = 3;
+ else
+ radeon_output->dig_encoder = 2;
+ break;
+ case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
+ if (radeon_output->linkb)
+ radeon_output->dig_encoder = 5;
+ else
+ radeon_output->dig_encoder = 4;
+ break;
+ default:
+ ErrorF("Unknown encoder\n");
+ break;
+ }
}
return;
}