diff options
| author | Alex Deucher <alexdeucher@gmail.com> | 2010-02-22 17:27:24 -0500 |
|---|---|---|
| committer | Alex Deucher <alexdeucher@gmail.com> | 2010-02-22 17:27:24 -0500 |
| commit | 212e152536c4325e6799018891d9aee132681f48 (patch) | |
| tree | a53dc9542eaef9a9ab659fd64ebfaf92b3f4e318 /src/legacy_crtc.c | |
| parent | e68d3a3890fc81c51f2006b5548da1e8756ad2fd (diff) | |
radeon: update new pll algo
- add support for pre-avivo chips
- add support for fixed post/ref dividers
- add support for non-fractional fb dividers
By default avivo chips use the new algo and
pre-avivo chips use the old algo. Use the
"NewPLL" option to toggle between them (set to
TRUE for the new algo, FALSE for the old).
Diffstat (limited to 'src/legacy_crtc.c')
| -rw-r--r-- | src/legacy_crtc.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/legacy_crtc.c b/src/legacy_crtc.c index 0ad762b7..e4c1f043 100644 --- a/src/legacy_crtc.c +++ b/src/legacy_crtc.c @@ -1223,7 +1223,7 @@ RADEONInitPLLRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save, return; } - RADEONComputePLL(pll, mode->Clock, &freq, &feedback_div, &frac_fb_div, &reference_div, &post_divider, flags); + RADEONComputePLL(pScrn, pll, mode->Clock, &freq, &feedback_div, &frac_fb_div, &reference_div, &post_divider, flags); for (post_div = &post_divs[0]; post_div->divider; ++post_div) { if (post_div->divider == post_divider) @@ -1303,7 +1303,7 @@ RADEONInitPLL2Registers(ScrnInfoPtr pScrn, RADEONSavePtr save, return; } - RADEONComputePLL(pll, mode->Clock, &freq, &feedback_div, &frac_fb_div, &reference_div, &post_divider, flags); + RADEONComputePLL(pScrn, pll, mode->Clock, &freq, &feedback_div, &frac_fb_div, &reference_div, &post_divider, flags); for (post_div = &post_divs[0]; post_div->divider; ++post_div) { if (post_div->divider == post_divider) |