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authorChristian Koenig <deathsimple@vodafone.de>2009-03-01 23:38:37 -0500
committerAlex Deucher <alexdeucher@gmail.com>2009-03-01 23:38:37 -0500
commitccde35c3eda3fff0de29eb8c6fdc392629724a34 (patch)
treeca43998369463e653cf402778c400e4de494cfca /src/r600_shader.h
parenta8e631c1b1c9b46602aeca66f8e7e68154d0bfc8 (diff)
R6xx/R7xx: move shaders to r600_shader.c and fixup Xv PS
patches from Christian Koenig with some adjustments from me
Diffstat (limited to 'src/r600_shader.h')
-rw-r--r--src/r600_shader.h21
1 files changed, 21 insertions, 0 deletions
diff --git a/src/r600_shader.h b/src/r600_shader.h
index 58f5a528..7333d0ba 100644
--- a/src/r600_shader.h
+++ b/src/r600_shader.h
@@ -29,6 +29,7 @@
#ifndef __SHADER_H__
#define __SHADER_H__
+#include "radeon.h"
/* Restrictions of ALU instructions
* order of scalar ops is always x,y,z,w,t(rans), last to be indicated by last==1.
@@ -342,5 +343,25 @@
((ssx) << 20) | ((ssy) << 23) | ((ssz) << 26) | ((ssw) << 29))
#define TEX_DWORD_PAD 0x00000000
+extern int R600_solid_vs(RADEONChipFamily ChipSet, uint32_t* vs);
+extern int R600_solid_ps(RADEONChipFamily ChipSet, uint32_t* ps);
+
+extern int R600_copy_vs(RADEONChipFamily ChipSet, uint32_t* vs);
+extern int R600_copy_ps(RADEONChipFamily ChipSet, uint32_t* ps);
+
+extern int R600_xv_vs(RADEONChipFamily ChipSet, uint32_t* shader);
+extern int R600_xv_ps_packet(RADEONChipFamily ChipSet, uint32_t* shader);
+extern int R600_xv_ps_planar(RADEONChipFamily ChipSet, uint32_t* shader);
+
+extern int R600_comp_mask_vs(RADEONChipFamily ChipSet, uint32_t* vs);
+extern int R600_comp_mask_ps(RADEONChipFamily ChipSet,
+ uint32_t* ps,
+ int src_a, int src_r, int src_g, int src_b,
+ int mask_a, int mask_r, int mask_g, int mask_b);
+
+extern int R600_comp_vs(RADEONChipFamily ChipSet, uint32_t* vs);
+extern int R600_comp_ps(RADEONChipFamily ChipSet,
+ uint32_t* ps,
+ int src_a, int src_r, int src_g, int src_b);
#endif