diff options
| author | Alex Deucher <alex@botch2.com> | 2008-04-10 13:59:58 -0400 |
|---|---|---|
| committer | Alex Deucher <alex@botch2.com> | 2008-04-10 13:59:58 -0400 |
| commit | d79040906cd25bd494feb5901f465bbd050aa923 (patch) | |
| tree | 6b46da5442791a01915f0dffa099188e53be5b3d /src/radeon.h | |
| parent | 0a96173cc38e506728d4c3f2dd383ba56e856578 (diff) | |
R3xx+: EXA/textured video fixes
- get pipe config based on GB_PIPE_SELECT where applicable
(adapted from a similar patch from Dave)
- only flush the dst cache after submitting vertices, freeing
the cache lines stalls the pipe
- no need to wait for 3D idle after submitting vertices
- fix PURGE_CACHE() and PURGE_ZCACHE() for r3xx+
- fix depth 16 with EXA composite
Diffstat (limited to 'src/radeon.h')
| -rw-r--r-- | src/radeon.h | 22 |
1 files changed, 18 insertions, 4 deletions
diff --git a/src/radeon.h b/src/radeon.h index ef62883a..122a9dd3 100644 --- a/src/radeon.h +++ b/src/radeon.h @@ -760,6 +760,8 @@ typedef struct { Bool r600_shadow_fb; void *fb_shadow; + + int num_gb_pipes; } RADEONInfoRec, *RADEONInfoPtr; #define RADEONWaitForFifo(pScrn, entries) \ @@ -1188,15 +1190,27 @@ do { \ #define RADEON_PURGE_CACHE() \ do { \ BEGIN_RING(2); \ - OUT_RING(CP_PACKET0(RADEON_RB3D_DSTCACHE_CTLSTAT, 0)); \ - OUT_RING(RADEON_RB3D_DC_FLUSH_ALL); \ + if (info->ChipFamily <= CHIP_FAMILY_RV280) { \ + OUT_RING(CP_PACKET0(RADEON_RB3D_DSTCACHE_CTLSTAT, 0)); \ + OUT_RING(RADEON_RB3D_DC_FLUSH_ALL); \ + } else { \ + OUT_RING(CP_PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0)); \ + OUT_RING(R300_RB3D_DC_FLUSH_ALL); \ + } \ ADVANCE_RING(); \ } while (0) #define RADEON_PURGE_ZCACHE() \ do { \ - OUT_RING(CP_PACKET0(RADEON_RB3D_ZCACHE_CTLSTAT, 0)); \ - OUT_RING(RADEON_RB3D_ZC_FLUSH_ALL); \ + BEGIN_RING(2); \ + if (info->ChipFamily <= CHIP_FAMILY_RV280) { \ + OUT_RING(CP_PACKET0(RADEON_RB3D_ZCACHE_CTLSTAT, 0)); \ + OUT_RING(RADEON_RB3D_ZC_FLUSH_ALL); \ + } else { \ + OUT_RING(CP_PACKET0(R300_RB3D_ZCACHE_CTLSTAT, 0)); \ + OUT_RING(R300_ZC_FLUSH_ALL); \ + } \ + ADVANCE_RING(); \ } while (0) #endif /* XF86DRI */ |