summaryrefslogtreecommitdiff
path: root/src/radeon_bo_helper.c
diff options
context:
space:
mode:
authorMichel Dänzer <michel.daenzer@amd.com>2018-05-17 18:25:37 +0200
committerMichel Dänzer <michel@daenzer.net>2018-07-09 18:24:21 +0200
commiteec4a41925127ae490f0a5156a881a08d521e28e (patch)
treed1c9a3606ba9df798e0d95b77efd5e9fe1139d13 /src/radeon_bo_helper.c
parentac18a993a3a68629805b8f272a339e25444c0897 (diff)
Only initialize libdrm_radeon surface manager for >= R600
Not used with older GPUs. Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'src/radeon_bo_helper.c')
-rw-r--r--src/radeon_bo_helper.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/src/radeon_bo_helper.c b/src/radeon_bo_helper.c
index 0366f613..8245d624 100644
--- a/src/radeon_bo_helper.c
+++ b/src/radeon_bo_helper.c
@@ -107,9 +107,10 @@ radeon_alloc_pixmap_bo(ScrnInfoPtr pScrn, int width, int height, int depth,
pitch = RADEON_ALIGN(width, drmmode_get_pitch_align(pScrn, cpp, tiling)) * cpp;
base_align = drmmode_get_base_align(pScrn, cpp, tiling);
size = RADEON_ALIGN(heighta * pitch, RADEON_GPU_PAGE_SIZE);
- memset(&surface, 0, sizeof(struct radeon_surface));
- if (info->ChipFamily >= CHIP_FAMILY_R600 && info->surf_man) {
+ if (info->surf_man) {
+ memset(&surface, 0, sizeof(struct radeon_surface));
+
if (width) {
surface.npix_x = width;
/* need to align height to 8 for old kernel */
@@ -340,7 +341,7 @@ Bool radeon_set_shared_pixmap_backing(PixmapPtr ppix, void *fd_handle,
if (!ret)
goto error;
- if (info->ChipFamily >= CHIP_FAMILY_R600 && info->surf_man) {
+ if (info->surf_man) {
uint32_t tiling_flags;
#ifdef USE_GLAMOR